JP2011171350A - Semiconductor device and method of manufacturing the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce warpage of a semiconductor wafer due to shrinkage stress of a sealing film. <P>SOLUTION: The semiconductor wafer 1 is prepared on which a plurality of connection pads 3 and an insulating film 4 having openings 4a are formed, and a plurality of electrodes 20 for external connection which are connected to the connection pads 3 via the openings 4a of the insulating film 4 are formed. The sealing film 16 which has pre-cured resin powder (fine bodies) 18 dispersed in an uncured organic resin 17 is formed between the electrodes 20 for external connection on the semiconductor wafer 1. Thus, the sealing film (organic resin layer) 16 on the semiconductor wafer 1 includes the pre-cured resin powder (fine bodies) 18, so shrinkage during heat curing is suppressed and accordingly, the warpage of the semiconductor wafer is reduced. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a semiconductor device and a manufacturing method thereof.

  As a method for manufacturing a semiconductor device called CSP (Chip Size Package), for example, the following manufacturing method is known. A semiconductor wafer having an integrated circuit formed in each of a plurality of semiconductor formation regions is prepared, and a plurality of external connection electrodes that are electrically connected to connection pads connected to the integrated circuit are formed. Next, a sealing film made of an epoxy resin or the like is formed between the external connection electrodes on the semiconductor wafer.

The sealing film is once applied on the entire surface of the semiconductor substrate so as to be thicker than the height of the external connection electrode so as to cover the upper surface of the external connection electrode. Next, the upper part of the sealing film is ground to expose the upper surface of the columnar external connection electrode. A solder ball is mounted on the exposed upper surface of the external connection electrode and joined to the external connection electrode by a reflow process. Thereafter, the semiconductor wafer is diced and separated into semiconductor device formation regions to simultaneously obtain a plurality of semiconductor devices (see, for example, Patent Document 1).
In the above, the sealing film concentrates the stress acting on the external connection electrode due to the difference in thermal expansion coefficient between the semiconductor device and the circuit board when bonding the solder balls of the semiconductor device to the connection terminals of the circuit board. ease. In addition, the semiconductor device is protected from the external environment.

JP 2008-218731 A

  In the semiconductor device as described above, when the semiconductor substrate is thinned to reduce the thickness of the semiconductor device, the semiconductor substrate warps due to shrinkage stress after the sealing film is thermally cured. If the warpage of the semiconductor substrate becomes large, subsequent operations such as positioning when mounting the solder ball on the external connection electrode, placing the solder ball on the top surface of the external connection electrode, or marking on the back surface of the semiconductor substrate are difficult. It becomes. For this reason, there is a demand for the development of a method in which the warpage of the semiconductor substrate does not increase even when the semiconductor substrate is thin.

According to a first aspect of the present invention, there is provided a semiconductor device including: a semiconductor substrate having a plurality of connection pads; a plurality of external connection electrodes electrically connected to the connection pads; and an uncured organic resin in advance. A sealing film formed by curing an uncured organic resin after filling an organic resin layer in which fine bodies formed of a cured organic resin are dispersed between the external connection electrodes on the semiconductor substrate; It is characterized by comprising.
A semiconductor device according to a second aspect of the present invention is the semiconductor device according to the first aspect, wherein the uncured organic resin is made of the same material as the minute body.
A semiconductor device according to a third aspect of the present invention is the semiconductor device according to the first or second aspect, wherein silica is dispersed in the sealing film.
A semiconductor device according to a fourth aspect of the present invention is the semiconductor device according to any one of the first to third aspects, wherein the uncured organic resin and the micro body are formed of a thermosetting resin. It is characterized by that.
A semiconductor device according to a fifth aspect of the present invention is the semiconductor device according to any one of the first to fourth aspects, wherein a part of the connection pad is exposed between the semiconductor substrate and the external connection electrode. A wiring connected to the connection pad is formed on the insulating film, and the external connection electrode is formed on the wiring.

According to a sixth aspect of the present invention, there is provided a method of manufacturing a semiconductor device, wherein a semiconductor substrate having a plurality of connection pads and a plurality of external connection electrodes connected to the connection pads is precured into an uncured organic resin. After filling the organic resin layer in which the fine bodies formed of the organic resin are dispersed between the external connection electrodes on the semiconductor substrate, the uncured organic resin is cured to form a sealing film It is characterized by doing.
A semiconductor device manufacturing method according to a seventh aspect of the present invention is the semiconductor device manufacturing method according to the sixth aspect, wherein the semiconductor substrate is a semiconductor wafer including a plurality of semiconductor device forming regions, and the sealing After the step of forming a film, the method includes a step of cutting the semiconductor wafer into each semiconductor device formation region.
The method of manufacturing a semiconductor device according to claim 8 is the method of manufacturing a semiconductor device according to claim 6 or 6, wherein an uncured organic resin is provided between the external connection electrodes on the semiconductor substrate. In addition, the step of forming the organic resin layer in which the fine bodies formed by the precured organic resin are dispersed is characterized by any one of a printing method, a molding method, and a dispenser method.
The method for manufacturing a semiconductor device according to claim 9 is the method for manufacturing a semiconductor device according to any one of claims 6 to 8, wherein the external connection electrode on the semiconductor substrate is between The step of forming a sealing film in which fine bodies formed of a pre-cured organic resin are dispersed in an uncured organic resin is formed of the pre-cured organic resin on the uncured organic resin. The method further includes forming an organic resin layer in which the minute bodies are dispersed to be thicker than the height of the external connection electrode and covering the upper surface of the external connection electrode.
A method for manufacturing a semiconductor device according to a tenth aspect of the present invention is the method for manufacturing a semiconductor device according to the ninth aspect, wherein an uncured organic resin is formed between the external connection electrodes on the semiconductor substrate. The step of forming the organic resin layer in which the fine bodies formed by the precured organic resin are dispersed includes the step of curing the uncured organic resin layer, and then the step of forming the organic resin layer in which the fine bodies are dispersed. The method includes a step of grinding the upper surface until at least the upper surface of the external connection electrode is exposed.

  Since a sealing film in which minute bodies formed of an organic resin are dispersed in an organic resin is used, the shrinkage stress of the sealing film can be reduced, and the warpage of the semiconductor substrate can be reduced.

The expanded sectional view of the semiconductor device concerning one embodiment of this invention. FIG. 2 is a plan view of a semiconductor wafer having a semiconductor device formation region before obtaining the semiconductor device shown in FIG. 1. The enlarged plan view of the area | region A of FIG. The expanded sectional view for demonstrating the first process regarding the manufacturing method of the semiconductor device of FIG. FIG. 5 is an enlarged cross-sectional view for explaining a process following FIG. 4. FIG. 6 is an enlarged cross-sectional view for explaining a process following FIG. 5. FIG. 7 is an enlarged cross-sectional view for explaining a process following FIG. 6. FIG. 8 is an enlarged cross-sectional view for explaining a process following FIG. 7. FIG. 9 is an enlarged cross-sectional view for explaining a process following FIG. 8. FIG. 10 is an enlarged cross-sectional view for explaining a process following FIG. 9. FIG. 11 is an enlarged cross-sectional view for explaining a process following FIG. 10. FIG. 12 is an enlarged cross-sectional view for explaining a process following FIG. 11. FIG. 13 is an enlarged cross-sectional view for explaining a process following FIG. 12. FIG. 14 is an enlarged cross-sectional view for explaining a process following FIG. 13.

The semiconductor device of the present invention will be described below.
FIG. 1 is an enlarged cross-sectional view of a semiconductor device 10 according to an embodiment of the present invention. FIG. 2 is a plan view of the semiconductor wafer 1 before the semiconductor device 10 is obtained by dicing. The semiconductor devices 10 are formed on the semiconductor wafer 1 and arranged in a matrix in the row direction and the column direction. A large number of semiconductor devices 10 can be obtained at the same time by cutting the semiconductor wafer 1 along the dicing line 2 after forming a solder ball after the final process described later.

FIG. 3 is an enlarged plan view of the semiconductor device formation region A illustrated by a two-dot chain line in FIG. 2, that is, a region surrounded by a pair of row direction dicing lines 2 and a pair of column direction dicing lines 2. Show.
In the semiconductor device formation region A, connection pads 3 are arranged along each of the four sides, and a large number of external connection electrodes 20 are arranged inside the region where the connection pads 3 are arranged. Yes. The external connection electrodes 20 are usually arranged in an annular shape from the peripheral side of the semiconductor device formation region A toward the center, but may be arranged differently.

The external connection electrode 20 and the connection pad 3 are connected by a wiring 15. Although not shown in the figure, a pad portion having a size substantially the same as or slightly larger than the diameter of the external connection electrode 20 is formed in a portion corresponding to the external connection electrode 20 of each wiring 15. The electrode 20 is formed on the pad portion of the wiring 15.
Hereinafter, the semiconductor device 10 will be described in detail with reference to FIG. 1. For clarity of the drawing, in FIG. 1, one external connection is provided near each side in the semiconductor device formation region A. Description will be made assuming that the electrode 20 is formed.

  The semiconductor device 10 includes a semiconductor substrate 11 such as a silicon substrate, for example. The thickness of the semiconductor substrate 11 is 150 to 400 μm. An integrated circuit 11 a is formed on the main surface (upper surface) side of the semiconductor substrate 11. On the main surface of the semiconductor substrate 11, a plurality of connection pads 3 connected to the integrated circuit 11a are formed. The connection pad 3 is made of, for example, an aluminum-based metal. A first insulating film 4 having an opening 4 a that exposes the central portion of the connection pad 3 is formed on the main surface of the semiconductor substrate 11. The first insulating film 4 is made of an inorganic material such as silicon oxide or silicon nitride, and its peripheral side surface is in a position slightly recessed from the peripheral side surface of the semiconductor substrate 11.

  A second insulating film 12 is formed on the first insulating film 4. The second insulating film 12 is made of an organic resin material such as polyimide resin or PBO (Poly-p-Phenylene Benzobisoxazole) resin. The second insulating film 12 is also formed with an opening 12 a that exposes the central portion of the connection pad 3. The opening 12 a of the second insulating film 12 is formed in a size smaller than the opening 4 a of the first insulating film 4 and covers the vicinity of the opening 4 a of the first insulating film 4. However, the opening 12a of the second insulating film 12 can be made larger than the opening 4a of the first insulating film 4 or have the same dimensions. The peripheral side surface of the second insulating film 12 is at the same position as the peripheral side surface of the first insulating film 4, and is slightly recessed from the peripheral side surface of the semiconductor substrate 11 together with the peripheral side surface of the first insulating film 4.

  On the second insulating film 12, a wiring 15 having one end connected to the connection pad 3 through the opening 12 a of the second insulating film 12 is formed. The wiring 15 has a two-layer structure of a first wiring 13 and a second wiring 14 formed on the first wiring 13. The first wiring 13 and the second wiring 14 can be formed of, for example, a copper-based metal. The wiring 15 is not limited to a two-layer structure, but may have a three-layer or more laminated structure. In that case, for example, one or more metal layers made of titanium (Ti), tungsten (W), an alloy of titanium and tungsten, or the like are interposed.

  An external connection electrode 20 is formed on a pad portion (not shown) of the wiring 15. The external connection electrode 20 has a flat upper surface 20a, for example, has a cylindrical shape with a diameter of 150 to 300 μm and a height of 60 to 120 μm, and is made of a conductive metal such as a copper-based metal. A sealing film (organic resin layer) 16 is filled between the peripheral region of the outer peripheral side surface of the external connection electrode 20 on the second insulating film 12, in other words, between the external connection electrodes 20.

  The sealing film (organic resin layer) 16 is obtained by dispersing a large number of resin powders (microscopic objects) 18 in an organic resin 17 made of an epoxy resin or a polyimide resin. Although not shown, the sealing film (organic resin layer) 16 contains a filler made of an inorganic material such as silica. The resin powder 18 is formed of an organic resin and is not limited, but is preferably formed of a thermosetting resin such as an epoxy resin or a polyimide resin. In particular, the same material as the organic resin 17 is desirable from the viewpoint of bond strength.

  Although details will be described later, since the resin powder 18 is formed as a resin powder in advance, there is no shrinkage when the organic resin 17 is cured, and therefore, the shrinkage stress of the sealing film (organic resin layer) 16 Can be made small. The peripheral side surface of the sealing film (organic resin layer) 16 is located at the same position as the peripheral side surface of the semiconductor substrate 11 and is also formed on the semiconductor substrate 11 around the first insulating film 4 and the second insulating film 12. The side surface of the first insulating film 4 and the side surface of the second insulating film 12 are covered.

The upper surface 16a of the sealing film (organic resin layer) 16 is formed to be the same as the upper surface 20a of the external connection electrode 20 or higher than the upper surface 20a of the external connection electrode 20 by about several μm.
Solder balls 29 are formed on the upper surface 20 a of the external connection electrode 20. The solder ball 29 has an outer shape (diameter) slightly larger than the outer shape (diameter) of the external connection electrode 20. When the diameter of the external connection electrode 20 is 150 to 250 μm, the diameter of the solder ball 29 is about 200 to 300 μm at the maximum portion.

Next, an embodiment of a method for manufacturing the semiconductor device 10 of the present invention illustrated in FIG. 1 will be described with reference to FIGS.
First, as shown in FIG. 4, a semiconductor wafer 1 having a thickness larger than the thickness of the semiconductor substrate 11 of the completed semiconductor device 10, for example, a thickness of 500 μm or more is prepared. The semiconductor wafer 1 has an integrated circuit 11a in each semiconductor device formation region A, a connection pad 3 connected to the integrated circuit 11a, and an opening 4a that exposes the central portion of the connection pad 3. A first insulating film 4 covering the main surface of 1 is formed. The connection pad 3 is made of, for example, an aluminum metal.

  The first insulating film 4 is made of an inorganic material such as silicon oxide or silicon nitride. After the first insulating film 4 is formed on the entire surface of the wafer 1 on the semiconductor by a CVD (Chemical Vapor Deposition) method, 1 opening 4a is formed. At the same time, the periphery is removed so that the peripheral side surface of the first insulating film 4 is slightly recessed from the dicing line 2. The patterning for removing the inside of the first opening 4a of the first insulating film 4 and the periphery of the peripheral side surface of the first insulating film 4 can be performed by a generally known photolithography technique.

  Next, as illustrated in FIG. 5, a second insulating film 12 is formed on the first insulating film 4. An organic resin such as polyimide resin or PBO resin is applied in a solid form on the first insulating film 4 and the connection pads 3. As a coating method, an appropriate method such as a spin coating method, a screen printing method, or a scan coating method can be used. After the organic resin is applied in a solid form, an opening 12a that exposes the central portion of the connection pad 2 is formed by photolithography, and the peripheral side surface of the second insulating film 12 is slightly recessed from the dicing line 2 Remove the surroundings so that In this case, the opening 12 a of the second insulating film 12 is formed in a size smaller than the opening 4 a of the first insulating film 4.

  Next, as illustrated in FIG. 6, a metal film 13 </ b> A and a second wiring 14 for forming the first wiring 13 are formed. For example, a metal film 13A made of a copper-based metal is formed on the entire surface of the second insulating film 12 and on the connection pad 3 exposed from the opening 12a of the second insulating film 12 by sputtering or electroless plating. The metal film 13A is also formed on the semiconductor wafer 1 corresponding to the dicing line 2 and the vicinity thereof. A photoresist film 41 is applied on the metal film 13A, and an opening 41a having the shape of the second wiring 14 to be formed is formed in the photoresist film 41 by photolithography. Then, electrolytic plating is performed using the metal film 13A as a current path, and the second wiring 14 is formed on the metal film 13A in the opening 41a. This state is illustrated in FIG. Thereafter, the photoresist film 41 is peeled off.

  Next, a photoresist film 42 made of a dry photoresist film is formed on the metal film 13 </ b> A and the second wiring 14. The photoresist film 42 is formed with a thickness larger than the height of the external connection electrode 20 so that the upper surface thereof is positioned higher than the upper surface of the external connection electrode 20 to be formed. Then, an opening 42 a having the shape of the external connection electrode 20 to be formed is formed in the photoresist film 42 by photolithography. FIG. 7 shows a state in which the opening 42 a of the external connection electrode 20 is formed in the photoresist film 42.

Next, electrolytic plating is performed using the metal film 13A as a current path, and the external connection electrode 20 is formed on the second wiring 14 in the opening 42a of the photoresist film 42. This state is illustrated in FIG.
Next, the photoresist film 42 is peeled off, and the metal film 13A is etched using the second wiring 14 as a mask. Thereby, the first wiring 13 having the same pattern as the second wiring 14 is formed. That is, the wiring 15 in which the second wiring 14 is stacked on the first wiring 13 is formed. This state is illustrated in FIG.

  Next, a sealing film (organic resin layer) 16 is formed. The sealing film 16 is obtained by dispersing a large number of resin powders (microscopic objects) 18 in an uncured (liquid) organic resin 17. Although not shown, the sealing film 16 contains a filler made of an inorganic material such as silica. The organic resin 17 is preferably a thermosetting resin such as an epoxy resin or a polyimide resin. The resin powder 18 is also preferably formed of a thermosetting resin such as an epoxy resin or a polyimide resin, and in particular, the same material as the organic resin 17 is desirable from the viewpoint of bond strength. The resin powder 18 can be formed, for example, by grinding a thermosetting resin material heated to a temperature equal to or higher than the curing temperature with a file or an appropriate grinding device. The resin powder 18 may be crushed powder of thermosetting resin or resin particles synthesized by suspension polymerization. The mixing ratio of the resin powder (microparticles) 18 contained in the sealing film 16 is desirably 20 wt% or more. Further, the diameter of the resin powder (micro body) 18 is ½ or less of the interval between the wirings 15, for example, when the interval between the wirings is 0.5 mm, the diameter of the resin powder (micro body) 18 is 0.25 mm. The following is desirable.

  As illustrated in FIG. 10, the sealing film 16 is formed on the wiring 15 and the second insulating film 12 so as to be thicker than the height of the external connection electrode 20 so as to cover the upper surface 20 a of the external connection electrode 20. . The sealing film 16 is also formed on the semiconductor wafer 1 around the second insulating film 12. The sealing film 16 is filled between the external connection electrodes 20 by a screen printing method, a molding method, a dispenser method, or the like.

  Next, the organic resin 17 of the sealing film 16 is cured by being heated above the curing temperature of the thermosetting resin. Since the organic resin 17 contracts greatly during the curing process, the semiconductor wafer 1 is warped by the contraction stress of the organic resin 17. When the organic resin 17 is a room temperature curable type, it is not necessary to heat, but since the organic resin 17 contracts during the curing process, the substrate is warped due to the contraction stress. However, in the present invention, since the pre-cured resin powder 18 is dispersed in the sealing film 16, the shrinkage stress of the organic resin 17 is small. For this reason, the curvature of the semiconductor wafer 1 can be reduced accordingly.

  After the sealing film 16 is cured, the upper surface of the sealing film 16 is ground to expose the upper surface 20a of the external connection electrode 20 as shown in FIG. In this state, the upper surface 16 a of the sealing film 16 is flush with the upper surface 20 a of the external connection electrode 20.

  Since the external connection electrodes 20 are formed by electrolytic plating, the heights of the external connection electrodes 20 are different from each other, and considerably large irregularities are formed on the upper surface 20 a of each external connection electrode 20. Therefore, in the step of exposing the upper surface 20 a of the external connection electrode 20, the upper side of the external connection electrode 20 is ground together with the sealing film 16. Since the external connection electrode 20 is formed of a soft metal such as a copper-based metal, the external connection electrode 20 is not shown in FIG. 11 in the step of grinding the upper surface 20a of the external connection electrode 20. A sagging sagging can be formed around the upper surface 20a of the substrate. When a solder ball is mounted on the upper surface 20a of the external connection electrode 20 having the sagging and the reflow process is performed, the solder ball becomes deformed, and sufficient soldering strength cannot be obtained when soldered to an external terminal.

  Therefore, next, the upper surface 20a of the external connection electrode 20 is etched, and the upper side of the external connection electrode 20 is removed together with the sagging. By this step, the upper surface 20a of the external connection electrode 20 becomes lower than the upper surface 16a of the sealing film 16 in a range of about several μm or less. When the upper surface 20a of the external connection electrode 20 is not ground, for example, the sealing film 16 is formed lower than the height of the external connection electrode 20, or the upper surface 16a of the sealing film 16 is externally connected by a molding method. When the electrode 20 is formed on substantially the same surface as the upper surface 20a, the step of etching the upper surface 20a of the external connection electrode 20 for removing sagging is unnecessary.

  Next, a flux layer is formed on the upper surface 20a of the external connection electrode 20 by a printing method or the like (not shown). Then, the solder balls 29 are mounted on the flux layer and accommodated in a reflow furnace to perform a reflow process. By this reflow process, the solder ball 29 is joined to the upper surface 20 a of the external connection electrode 20. This state is illustrated in FIG. Instead of forming the flux layer in the above, a surface treatment for forming a metal layer showing wettability to solder such as gold or nickel may be performed.

  Next, as shown in FIG. 13, an adhesive tape 43 thicker than the height of the solder ball 29 is attached to the upper surface 16 a of the sealing film 16. The adhesive tape 43 is attached using, for example, an ultraviolet curable adhesive so as to cover the entire solder ball 29 including the uppermost portion. The thickness of the adhesive tape 43 is preferably, for example, about 20 μm thicker than the height of the solder ball 29.

Then, the back surface of the semiconductor wafer 1 is ground using the adhesive tape 43 as a support member. The grinding is performed until the final thickness of the semiconductor substrate 11 is, for example, about 150 to 400 μm. FIG. 13 shows a state where the grinding of the back surface of the semiconductor wafer 1 has been completed.
Next, the back surface of the ground semiconductor wafer 1 is attached to a dicing tape (not shown). Then, the adhesive tape 43 is irradiated with ultraviolet rays to be cured, and the adhesive tape 43 is peeled off by a peeling method. This state is shown in FIG.
Then, by cutting the sealing film 16 and the semiconductor wafer 1 along the dicing line 2, a plurality of semiconductor devices 10 illustrated in FIG. 1 can be obtained simultaneously.

  As described above, since the semiconductor device of the present invention uses the sealing film 16 in which the resin powder 18 formed of the organic resin is dispersed in the organic resin 17, the shrinkage stress of the sealing film 16 can be reduced. The warp of the semiconductor wafer 1 can be reduced. Further, by forming the organic resin 17 and the resin powder 18 with the same material, the bond strength between the organic resin 17 and the resin powder 18 can be increased. Further, in this case, it is easy to grind the upper surface of the sealing film 16 in order to expose the upper surface 20a of the external connection electrode 20.

  In the above embodiment, the solder balls 29 are formed on the external connection electrodes 20 in each semiconductor device formation region A before the semiconductor wafer 1 is cut to obtain individual semiconductor devices. However, the solder balls 29 may be formed on connection terminals of a circuit board to which the semiconductor device 10 is bonded.

  In addition, the external connection electrode 20 was formed on the wiring 15 connected to the connection pad 3. However, the external connection electrode 20 may be formed directly on the connection pad 3.

  The first insulating film 4 and the second insulating film 12 may be a single layer. In the case of a single layer, it is formed by a spin coating method, a screen printing method, or the like using either a liquid resin made of an inorganic material such as silicon oxide, or an organic resin such as a polyimide resin or a PBO resin.

  Although it has been described that the wiring 15 can have a three-layer laminated structure in addition to the two-layer laminated structure of the first wiring 13 and the second wiring 14, it is formed as a single layer by a sputtering method or an electroless plating method. You can also

  In addition, the semiconductor device of the present invention can be variously modified and configured within the scope of the present invention. In short, a semiconductor substrate having a plurality of connection pads and a connection pad are electrically connected. A plurality of external connection electrodes, and a sealing film provided between the external connection electrodes on the semiconductor substrate and in which fine bodies formed of the organic resin are dispersed in the organic resin. I just need it.

  According to another aspect of the present invention, there is provided a method for manufacturing a semiconductor device, comprising: preparing a semiconductor substrate on which an insulating film having a plurality of connection pads and an opening exposing a part of the connection pads is formed; The step of forming a plurality of external connection electrodes connected to the connection pads and the external connection electrodes on the semiconductor substrate are sealed in which fine bodies formed of the organic resin are dispersed in the organic resin. And a step of forming a film.

DESCRIPTION OF SYMBOLS 1 Semiconductor wafer 2 Dicing line 3 Connection pad 4 1st insulating film 10 Semiconductor device 11 Semiconductor substrate 12 2nd insulating film 15 Wiring 16 Sealing film (organic resin layer)
17 Organic resin 18 Resin powder (micro)
20 External connection electrode 29 Solder ball

Claims (10)

A semiconductor substrate having a plurality of connection pads;
A plurality of external connection electrodes electrically connected to the connection pads;
After filling an organic resin layer in which fine bodies formed of a precured organic resin are dispersed in an uncured organic resin between the external connection electrodes on the semiconductor substrate, the uncured organic resin is filled. A sealing film obtained by curing an organic resin;
A semiconductor device comprising:   2. The semiconductor device according to claim 1, wherein the uncured organic resin is made of the same material as the minute body.   3. The semiconductor device according to claim 1, wherein silica is dispersed in the sealing film.   4. The semiconductor device according to claim 1, wherein the uncured organic resin and the minute body are formed of a thermosetting resin. 5.   5. The semiconductor device according to claim 1, further comprising an insulating film having an opening exposing a part of the connection pad between the semiconductor substrate and the external connection electrode. A semiconductor device, wherein a wiring connected to the connection pad is formed on the film, and the external connection electrode is formed on the wiring.   An organic resin layer in which fine bodies formed of an organic resin precured in an uncured organic resin are dispersed on a semiconductor substrate having a plurality of connection pads and a plurality of external connection electrodes connected to the connection pads. Is filled between the external connection electrodes on the semiconductor substrate, and then the uncured organic resin is cured to form a sealing film.   7. The method of manufacturing a semiconductor device according to claim 6, wherein the semiconductor substrate is a semiconductor wafer including a plurality of semiconductor device formation regions, and the semiconductor wafer is formed after the step of forming the sealing film. The manufacturing method of the semiconductor device characterized by including the process cut | disconnected for every area | region.   8. The method of manufacturing a semiconductor device according to claim 6 or 7, wherein fine bodies formed of a precured organic resin are dispersed in an uncured organic resin between the external connection electrodes on the semiconductor substrate. The step of forming the organic resin layer is performed by any one of a printing method, a molding method, and a dispenser method.   9. The method of manufacturing a semiconductor device according to claim 6, wherein the external connection electrode on the semiconductor substrate is formed of an uncured organic resin in an uncured organic resin. The step of forming the sealing film in which the fine bodies are dispersed includes the step of forming an organic resin layer in which the fine bodies formed of a pre-cured organic resin are dispersed in the uncured organic resin. A method of manufacturing a semiconductor device, comprising a step of forming the electrode to be thicker than an electrode and covering an upper surface of the external connection electrode.   The method for manufacturing a semiconductor device according to claim 9, wherein microscopic bodies formed of a precured organic resin are dispersed in an uncured organic resin between the external connection electrodes on the semiconductor substrate. In the step of forming the organic resin layer, after the step of curing the uncured organic resin layer, the upper surface of the organic resin layer in which the fine bodies are dispersed is ground until at least the upper surface of the external connection electrode is exposed. The manufacturing method of the semiconductor device characterized by including the process to do.

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