JP2011166658A - Amplitude limiting amplifier circuit, and optical receiver - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To operate an amplitude limiting amplifier circuit with reduced power consumption. <P>SOLUTION: In an amplitude limiting amplifier circuit LA, each of pulses contained in an electric signal Pout obtained by performing photoelectric conversion on an optical signal Pin is amplified to a fixed amplitude by a main amplifier circuit 12, and an optical signal interruption detecting signal LOS indicating signal interruption of the optical signal Pin is generated based on the electric signal Pout by an optical signal interruption detecting circuit 14. In a main current source circuit 22, a current Is2 to be used for operating the main amplifier circuit 12 is supplied to the main amplifier circuit 12, and the supply of the current Is2 is controlled based on the optical signal interruption detecting signal LOS. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to an optical communication technique, and more particularly to a power saving technique for amplifying an electric signal obtained by photoelectric conversion of an optical signal to a constant amplitude.

  The PON (Passive Optical Network) system adopted in the FTTH (Fiber To The Home) system as a high-speed broadband optical transmission system is an OLT (Optical Line Terminal) that accommodates multiple users on the station side and an optical subscriber line on the user side. The optical network unit is connected to an ONU (Optical Network Unit) that terminates the network, and signals are transmitted bidirectionally.

FIG. 11 is a block diagram showing a configuration of a conventional optical receiver.
In such an OLT optical receiver, the optical signal Pin received by the photodiode PD is photoelectrically converted into a photocurrent signal Iin and amplified by a transimpedance amplifier TIA (Trans Impedance Amplifier) which is a preamplifier. The electric signal Tout obtained by the transimpedance amplifier TIA is input to an amplitude limiting amplifier circuit LA (Limiting Amplifier: amplitude limiting amplifier circuit) which is a post-amplifier, and an optical signal Pin having different intensity becomes an electric signal having a constant amplitude. Are amplified and output as an amplified output Rout.

  At this time, in the amplitude limiting amplifier circuit LA, the electric signal Tout is amplified by the first stage amplifier circuit 51 composed of an amplifier circuit or an emitter follower circuit, and then amplified by the main amplifier circuit 52 to an amplified output Rout having a constant amplitude. Further, the optical signal loss detection circuit 54 generates an optical signal loss detection signal LOS (Loss Of Signal) indicating the signal loss of the optical signal Pin based on the electric signal Tout from the first stage amplifier circuit 51, and this optical signal loss detection signal. Based on the LOS, the squelch circuit 53 controls the output of the amplified output Rout.

  The first stage amplifier circuit 51, the main amplifier circuit 52, and the squelch circuit 53 of the amplitude limit amplifier circuit LA include a first stage current source circuit 61, a main current source circuit 62, and a squelch current source circuit 63, respectively. For example, a current source circuit that supplies current is normally used for the differential amplifier circuit, the comparison circuit, and the emitter follower circuit, and the amount of current is adjusted by the reference potential VCS. The reference potential VCS is not limited to one type, and a voltage value corresponding to the amount of current required for each circuit block may be used. The voltage source of the reference potential VCS may be an output of a band gap reference (BGR) circuit mounted on the same IC chip, or a control voltage supplied from the outside of the IC chip.

In the optical signal disconnection detection circuit 54, as shown in FIG. 11, in addition to the method of detecting the presence / absence of input of the optical signal Pin based on the electric signal Tout from the first stage amplifier circuit 51, a photodiode for receiving the optical signal Pin There is a method in which the photocurrent signal Iin from the PD is transferred by a current mirror circuit, and the presence or absence of the optical signal Pin is detected based on the magnitude of the current.
Further, the optical signal interruption detection signal LOS of the optical signal interruption detection circuit 54 is used not only for the signal interruption display to the subsequent circuit but also for opening / closing its own squelch circuit. The optical signal break detection circuit 54 may be replaced with a circuit called RSSI (Received Signal Strength Indicator). In general, the optical signal break detection signal LOS displays the presence or absence of an optical signal at a digital logic level, and the RSSI displays an analog level corresponding to the optical reception intensity.

"MAX3264 / MAX3265 / MAX3268 / MAX3269 / MAX3765", MAXIM / Amplitude Limiting Amplifier Circuit / Data Sheet, Maxim Japan, 2001

However, in such a conventional technique, the main current source circuit 62 provided in the main amplifier circuit 52 of the amplitude limit amplifier circuit LA continues to supply current regardless of whether or not the optical signal Pin is input. There is a problem that power consumption in the amplifier circuit LA is large.
That is, since the main current source circuit 62 is a circuit for supplying a current, basically, the current does not increase or decrease depending on the presence or absence of a signal input to the amplitude limiting amplifier circuit LA. For this reason, since the optical signal Pin is not input and it is not necessary to perform the amplification operation, current is always supplied to the main current source circuit 62, so that useless power is consumed. It will be.

  The present invention has been made to solve such problems, and an object thereof is to provide a power saving technique for an amplitude limiting amplifier circuit that can be operated with low power consumption.

  In order to achieve such an object, an amplitude limiting amplifier circuit according to the present invention includes a main amplifier circuit that amplifies each pulse included in an electrical signal obtained by photoelectrically converting an optical signal to a constant amplitude, and an electrical signal. And an optical signal break detection circuit for generating an optical signal break detection signal indicating a signal break of the optical signal based on the optical signal, and supplying a current used for the operation of the main amplifier circuit to the main amplifier circuit, and based on the optical signal break detection signal And a main current source circuit that controls supply of the current.

  At this time, the main current source circuit has a current source composed of a transistor having a collector terminal connected to the main amplifier circuit and an emitter terminal connected to the ground potential via a resistance element, and the optical signal disconnection detection signal A switch for switching one of a reference potential higher than a voltage for applying a threshold voltage between the base and emitter of the transistor and a standby potential lower than the voltage between the base and emitter to apply to the base terminal of the transistor; May be included.

  In addition, the amplifier circuit includes an amplifier circuit or an emitter follower circuit, and includes an initial stage amplifier circuit that inputs an electrical signal and outputs the electrical signal to the main amplifier circuit. The optical signal break detection circuit is an optical signal based on the electrical signal output from the initial stage amplifier circuit. A disconnection detection signal may be generated.

  Further, a squelch circuit that controls passage or blocking of the amplified output obtained by the main amplifier circuit based on the optical signal break detection signal may be further provided.

  An amplitude limiting amplifier circuit according to the present invention is provided in parallel to an electrical signal obtained by photoelectrically converting an optical signal, and a plurality of main amplifiers each amplifying each pulse included in the electrical signal to a constant amplitude. An amplifier circuit, a plurality of squelch circuits that are provided for each of the main amplifier circuits to control the passage or blocking of the amplified output obtained by the main amplifier circuit, and a selection signal input from the outside of the squelch circuits; A selection circuit that controls any one of the corresponding squelch circuits to a passing state of the amplified output, and controls another squelch circuit to a blocked state of the amplified output, and an optical signal that indicates a signal interruption of the optical signal based on the electrical signal An optical signal disconnection detection circuit that generates a disconnection detection signal and a main amplifier circuit are provided for each of the main amplifier circuits to supply current to the main amplifier circuit and to control the supply of the current. A main current source circuit that performs the operation, and in the selection circuit, when the optical signal disconnection detection signal indicates a signal disconnection of the optical signal, the main current source circuit is instructed to interrupt or reduce the current, When the optical signal disconnection detection signal indicates that there is a signal of the optical signal, the main current source circuit corresponding to the main amplifier circuit selected by the selection signal is instructed to supply the current, and the selection signal The main current source circuit corresponding to the remaining main amplifier circuit not selected is instructed to cut off or reduce the current.

  At this time, the selection circuit is provided for each main current source, and instructs the supply control of the current in the main current source circuit based on the logical product output of the selection signal and the optical signal interruption detection signal. Good.

  In addition, an optical receiver according to the present invention includes a photoelectric conversion element that photoelectrically converts an optical signal composed of a pulse train into a photocurrent signal and outputs it, a transimpedance amplifier that amplifies the photocurrent signal and outputs an electrical signal, Any one of the above-described amplitude limiting amplifier circuits is provided that amplifies each pulse of the pulse train included in the signal to a constant amplitude and outputs the amplified signal.

  According to the present invention, the magnitude of the current supplied to the main amplifier circuit can be controlled according to whether or not an optical signal is input. Therefore, it is possible to reduce the current supplied to the main amplifier circuit when the optical signal is not input and to supply a sufficient current necessary for the amplification operation when the optical signal is input. can do. For this reason, the amplitude limiting amplifier circuit can be operated with low power consumption as a whole, and the power saving of the amplitude limiting amplifier circuit can be realized.

1 is a block diagram showing a configuration of an optical receiver and an amplitude limiting amplifier circuit according to a first embodiment. It is a circuit part which shows the structural example of a first stage current source circuit. It is a circuit part which shows the structural example of the main current source circuit concerning 1st Embodiment. FIG. 4 is a signal waveform diagram showing an operation of the amplitude limiting amplifier circuit according to the first embodiment. It is a circuit diagram which shows the structural example of the main current source circuit concerning 2nd Embodiment. It is a block diagram which shows the structure of the amplitude limiting amplifier circuit concerning 3rd Embodiment. It is a structural example of a selection circuit. It is explanatory drawing which shows the logic of each signal used with a selection circuit. It is a truth table which shows operation | movement of a selection circuit. It is explanatory drawing which shows operation | movement of the amplitude limiting amplifier circuit concerning 3rd Embodiment. It is a block diagram which shows the structure of the conventional optical receiver.

Next, embodiments of the present invention will be described with reference to the drawings.
[First Embodiment]
First, an optical receiver and an amplitude limiting amplifier circuit according to a first embodiment of the present invention will be described with reference to FIG. FIG. 1 is a block diagram illustrating a configuration of an optical receiver and an amplitude limiting amplifier circuit according to the first embodiment.

The optical receiver 100 is a communication device that converts an optical signal received via an optical fiber into an electric signal and outputs the electric signal. For example, in the PON system adopted in the FTTH system, the station side accommodates a plurality of users. Used in OLT.
The optical receiver 100 is provided with a photodiode PD, a transimpedance amplifier TIA, and an amplitude limiting amplifier circuit (limiting amplifier) LA as main circuit configurations.

  The optical signal Pin that arrives through the optical fiber is received by the photodiode PD, converted into a photocurrent signal Iin, and amplified by a transimpedance amplifier TIA that is a preamplifier. The electric signal Tout of the transimpedance amplifier TIA is input to an amplitude limiting amplifier circuit LA that is a post amplifier, and is amplified so that optical signals Pin having different intensities become electric signals having a constant amplitude, and output as an amplified output Rout. . Although not shown in FIG. 1, a waveform shaping circuit such as a CDR or a timing adjustment circuit is usually provided at the subsequent stage of the amplitude limiting amplifier circuit LA, and a clock signal is extracted from the data signal to obtain a digital signal. It is shaped into a manageable waveform.

  In the present embodiment, in the amplitude limiting amplifier circuit LA, each pulse included in the electric signal obtained by photoelectrically converting the optical signal in the main amplifier circuit is amplified to a constant amplitude, and the electric signal break detection circuit Based on the signal, an optical signal disconnection detection signal indicating a signal disconnection of the optical signal is generated, and a current used for the operation of the main amplifier circuit is supplied to the main amplifier circuit by the main current source circuit. Based on this, supply control of the current is performed.

Next, the configuration of the amplitude limiting amplifier circuit according to this embodiment will be described in detail with reference to FIG.
The amplitude limiting amplifier circuit LA includes, as main circuit parts, a first stage amplifier circuit 11, a main amplifier circuit 12, a squelch circuit 13, an optical signal break detection circuit 14, a first stage current source circuit 21, a main current source circuit 22, and a squelch current. A source circuit 23 is provided.

The first stage amplifier circuit 11 includes an amplifier circuit or an emitter follower circuit, and has a function of outputting the electric signal Tout input from the transimpedance amplifier TIA to the main amplifier circuit 12 through AC coupling using the coupling element C. ing.
The main amplifier circuit 12 includes an amplifier circuit, and has a function of amplifying each pulse included in the electric signal Pout output from the first stage amplifier circuit 11 to a constant amplitude.

The squelch circuit 13 has a function of controlling passage or blocking of the amplified output Rout obtained by the main amplifier circuit 12 based on the optical signal break detection signal LOS.
The optical signal interruption detection circuit 14 has a function of generating an optical signal interruption detection signal LOS (Loss Of Signal) indicating the signal interruption of the optical signal Pin based on the electrical signal Pout output from the first stage amplifier circuit 11. Yes.

  The first stage amplifier circuit 11, the main amplifier circuit 12, the squelch circuit 13, and the optical signal break detection circuit 14 may each have a known circuit configuration. In this embodiment, the case where the first stage amplifier circuit 11 and the main amplifier circuit 12 are AC-coupled will be described as an example. However, the first stage amplifier circuit 11 and the main amplifier circuit 12 may be directly connected. . Further, it is assumed that differential signals are used as the electrical signals Tout and Pout and the amplified output Rout.

The first stage current source circuit 21 includes a current source I1 that operates based on the reference potential VCS, and has a function of supplying a current Is1 to the first stage amplifier circuit 11.
The squelch current source circuit 23 includes a current source I3 that operates based on the reference potential VCS, and has a function of supplying the current Is3 to the squelch circuit 13.

FIG. 2 is a circuit unit showing a configuration example of the first stage current source circuit. The squelch current source circuit 23 has a circuit configuration similar to that of the first-stage current source circuit 21.
The first-stage current source circuit 21 includes a current source I1 including a transistor Q1 having a collector terminal connected to the first-stage amplifier circuit 11 and an emitter terminal connected to the ground potential GND through a resistance element R1, and the base terminal of the transistor Q1 A reference potential VCS is applied.
Since the reference potential VCS has a voltage higher than a voltage that gives a threshold voltage to the base-emitter voltage Vbe of the transistor Q1, a constant voltage corresponding to VCS-Vbe is generated in the resistance element R1. Thereby, a constant current, that is, a current of Is1 = (VCS−Vbe) / R1 flows through the resistance element R1.

  The main current source circuit 22 includes a switch SW that outputs the ground potential GND supplied via the reference potential VCS or the resistance element R based on the optical signal break detection signal LOS, and a current source that operates at the output potential of the switch SW. It has a function of supplying the current Is2 to the main amplifier circuit 12 by I2. As for the switch SW, a general switch circuit such as a transfer gate may be formed on-chip. Alternatively, the base terminal of the transistor Q1 may be drawn out of the IC chip of the amplitude limiting amplifier circuit LA and realized by an external switch circuit.

FIG. 3 is a circuit unit illustrating a configuration example of the main current source circuit according to the first embodiment.
The main current source circuit 22 includes a current source I2 including a transistor Q2 having a collector terminal connected to the main amplifier circuit 12 and an emitter terminal connected to the ground potential GND via the resistor element R2, and includes an optical signal disconnection detection signal. Either the reference potential VCS or the ground potential GND supplied via the resistance element R is applied to the base terminal of the transistor Q2 via the switch SW that is controlled to be switched by LOS.

At this time, the optical signal disconnection detection signal LOS is a DC signal that is at a low level in the burst signal section in which the optical signal is detected and that is at a high level in the signal disconnection section of the optical signal Pin. Therefore, since the reference potential VCS is applied to the base terminal of the transistor Q2 in the signal interruption period of the optical signal Pin, similarly to the first-stage current source circuit 21, a constant current, that is, Is2 = (VCS) is applied to the resistance element R2. -Vbe) / R2 current flows.
On the other hand, in the signal interruption period of the optical signal Pin, the ground potential GND is supplied to the base terminal of the transistor Q2, so that no voltage is generated in the resistance element R2. For this reason, the current Is2 flowing through the resistance element R2 is cut off.

[Operation of First Embodiment]
Next, the operation of the amplitude limiting amplifier circuit according to the present embodiment will be described with reference to FIG. FIG. 4 is a signal waveform diagram showing the operation of the amplitude limiting amplifier circuit according to the first embodiment.

Here, 10G-EPON is assumed as a system to which the optical receiver 100 including the amplitude limiting amplifier circuit LA is applied, and a burst signal having an amplitude of 200 mV is received for 1024 bits at a data rate of 10 Gbps, and subsequently an amplitude of 2 mV. The following example shows a case where the following no-signal section continues for 2048 bits in time, and then receives a burst signal of 200 mV amplitude again for 1024 bits.
Although the graph is a single layer display, both the input and output are differential signals, and the display on the inversion side is omitted. The data pattern is PRBS (pseudo random pattern) 10-7.

When the burst signal is terminated at time T0, the optical signal disconnection detection circuit 14 detects the signal disconnection state of the optical signal Pin, and at time T1 delayed by several tens of ns from the time T0, the optical signal disconnection detection circuit 14 outputs the optical signal. A high level optical signal disconnection detection signal LOS indicating the disconnection state is output.
In response to the inversion of the optical signal disconnection detection signal LOS, the squelch circuit 13 that has been opened is immediately closed, and the amplified output Rout from the main amplifier circuit 12 is shut off.

Further, the switch SW of the main current source circuit 22 is switched from the reference potential VCS side to the resistance element R side in accordance with the inversion of the optical signal disconnection detection signal LOS.
As a result, at time T2 slightly after time T1, the ground potential GND via the resistance element R is supplied to the current source I2 instead of the reference potential VCS, and the terminal potential VB of the base terminal of the transistor Q2 is about The voltage drops from the reference potential VCS of 1.5V to the ground potential GND.

  For this reason, the current Is2 supplied to the main amplifier circuit 12 by the current source I2 decreases from 55 mA to 10 mA, and is reduced by about 45 mA. In this case, since the power supply potential used in the main amplifier circuit 12 is 3.3 V, the reduction of the current Is2 reduces the power consumption of about 150 mW, and the power saving effect is about 82% compared to the normal operation. It is obtained.

Thereafter, when the burst signal is received again at time T3, the optical signal break detection signal LOS is inverted to the low level indicating that the optical signal Pin is present at the subsequent time T4.
As a result, the squelch circuit 13 is opened at time T5 thereafter, and the output of the amplified output Rout from the main amplifier circuit 12 is resumed.

Further, the switch SW of the main current source circuit 22 is switched from the resistance element R side to the reference potential VCS side in accordance with the inversion of the optical signal disconnection detection signal LOS.
As a result, the reference potential VCS is supplied to the current source I2, and the terminal potential VB of the base terminal of the transistor Q2 rises to the reference potential VCS at the subsequent time T5. For this reason, the current Is2 supplied to the main amplifier circuit 12 from the current source I2 increases to about 55 mA, and a sufficient current necessary for the amplification operation is supplied.

  Of the circuit parts constituting the amplitude limiting amplifier circuit LA, the first stage amplifier circuit 11 and the main amplifier circuit 12 for processing electrical signals are formed on the same IC chip, but the other circuit parts are the same IC. The chip may be configured on-chip, or may be configured externally connected to the IC chip.

[Effect of the first embodiment]
As described above, according to the present embodiment, in the amplitude limiting amplifier circuit LA, the main amplifier circuit 12 amplifies each pulse included in the electrical signal Pout obtained by photoelectrically converting the optical signal Pin to a constant amplitude, The signal interruption detection circuit 14 generates an optical signal interruption detection signal LOS indicating the signal interruption of the optical signal Pin based on the electric signal Pout, and the main current source circuit 22 uses the current Is2 used for the operation of the main amplification circuit 12 Since the current Is2 is controlled to be supplied to the main amplifier circuit 12 and based on the optical signal break detection signal LOS, the current supplied to the main amplifier circuit 12 according to whether the optical signal Pin is input or not. The magnitude of Is2 can be controlled.

  Therefore, the current Is2 supplied to the main amplifier circuit 12 can be reduced in a signal disconnection state in which the optical signal Pin is not input, and is sufficient for the amplification operation when the optical signal Pin is input. Current Is2 can be supplied. For this reason, the amplitude limiting amplifier circuit LA can be operated with low power consumption as a whole, and the power saving of the amplitude limiting amplifier circuit LA can be realized.

  In this embodiment, the main amplifier circuit is stopped while the necessary circuits are operated. Specifically, it is the main amplifier circuit 12 that controls the supplied current according to the optical signal disconnection detection signal LOS, and the first stage amplifier circuit 11, the squelch circuit 13, and the optical signal disconnection detection circuit 14 are controlled. It is excluded from. Among these, the first stage amplifier circuit 11 and the optical signal break detection circuit 14 are necessary for detecting the presence or absence of the input of the optical signal Pin, and the squelch circuit 13 fixes the amplified output Rout to a predetermined level when there is no signal. This is because it is necessary to prevent noise from being output.

  Therefore, in the power supply circuit provided outside the amplitude limiting amplifier circuit LA, a stable amplification operation is performed as compared with the case where the power supply of the entire amplitude limiting amplifier circuit LA is controlled based on the optical signal disconnection detection signal LOS. While maintaining extremely high response performance as power saving control, it can be applied to an optical receiver used in a high-speed broadband optical transmission system such as FTTH.

  In the present embodiment, the first stage amplifier circuit 11, the main amplifier circuit 12, the squelch circuit 13, the first stage current source circuit 21, the main current source circuit 22, and the squelch current source circuit 23 are formed in the amplitude limiting amplifier circuit LA. The optical signal break detection circuit 14 may be formed on the same chip as the IC chip to be processed. As a result, the wiring length of the electric signal Pout can be shortened and high frequency characteristics can be obtained as compared with the case where the optical signal break detection circuit 14 is an external circuit.

  In this embodiment, since the supply current to the amplifier circuit at the subsequent stage is controlled from the connection point of the optical signal break detection circuit 14, that is, the output of the first stage amplifier circuit 11, the stable operation of the optical signal break detection circuit 14 is controlled. Can be secured. Note that the stage before the connection point of the optical signal disconnection detection circuit 14 includes, for example, several stages of amplifier circuits and emitter follower circuits as the first stage amplifier circuit 11 according to the amplification factor in the transimpedance amplifier TIA and the main amplifier circuit 12. If necessary, the first stage amplifier circuit 11 may be deleted, and the electric signal Tout from the transimpedance amplifier TIA may be directly input to the main amplifier circuit 12 and the optical signal disconnection detection circuit 14.

  Further, in the present embodiment, the case where the current source is configured by a bipolar transistor has been described as an example, but may be configured by a MOSFET. For example, when the current source is configured by NMOSFET, the ground potential GND may be directly used as the standby potential VSL.

[Second Embodiment]
Next, an amplitude limiting amplifier circuit according to the second embodiment of the present invention will be described with reference to FIG. FIG. 5 is a circuit diagram showing a configuration example of a main current source circuit according to the second embodiment.

  In the first embodiment, in the main current source circuit 22, either the reference potential VCS or the ground potential GND supplied via the resistance element R is supplied to the base terminal of the transistor Q2 via the switch SW. The case of applying was described as an example. In this embodiment, the case where either the reference potential VCS or the standby potential VSL is applied to the base terminal of the transistor Q2 through the switch SW will be described. Note that the configuration other than the main current source circuit 22 in the amplitude limiting amplifier circuit LA according to the present embodiment is the same as that of the first embodiment, and detailed description thereof is omitted here.

  As shown in FIG. 5, the main current source circuit 22 according to the present embodiment includes a transistor having a collector terminal connected to the main amplifier circuit 12 and an emitter terminal connected to the ground potential GND via the resistor element R2. Either the reference potential VCS or the standby potential VSL is applied to the base terminal of the transistor Q2 via the switch SW that includes the current source I2 composed of Q2 and is controlled to be switched by the optical signal break detection signal LOS. .

  This standby potential VSL is a DC potential that is lower than a voltage that gives a threshold voltage to the base-emitter voltage Vbe of the transistor Q2 and higher than the ground potential GND. Generally, when the base potential of a transistor falls below a voltage that gives a threshold voltage to the base-emitter voltage Vbe, the collector current has a characteristic of exponentially decreasing. Therefore, when a signal disconnection of the optical signal Pin is detected, if a potential lower than the voltage that gives the threshold voltage to the base-emitter voltage Vbe is applied to the base terminal of the transistor Q2, it is not lowered to the ground potential GND. In addition, the current Is2 supplied to the main amplifier circuit 12 can be reduced.

  On the other hand, since it takes a certain amount of time to detect the burst signal in the optical signal disconnection detection circuit 14, the burst signal is already generated when the low-level optical signal disconnection detection signal LOS indicating the input of the optical signal Pin is output. Is input to the main amplifier circuit 12. Therefore, the main current source circuit 22 supplies the current Is2 having a magnitude necessary for the amplification operation to the main amplifier circuit 12 without delay from the time when the optical signal break detection signal LOS is inverted from the high level to the low level. You are required to start.

Here, the response speed at the start of current supply of the main current source circuit 22 depends on the turn-on time of the transistor Q2, and the response speed is faster as the change amount of the base potential applied to the transistor Q2 is smaller.
In the present embodiment, a standby potential VSL lower than a voltage that gives a threshold voltage to the base-emitter voltage Vbe of the transistor Q2 and higher than the ground potential GND is applied to the base terminal of the transistor Q2 in the signal interruption period of the optical signal Pin. The Therefore, the transistor Q2 is not completely turned off and is maintained in a so-called standby state. Therefore, the turn-on time of the transistor Q2 is shortened, the response speed of the main current source circuit 22 is improved, and the time required from the optical signal break detection signal LOS indicating the presence of the input of the optical signal Pin to the amplification operation is shortened. .

[Effect of the second embodiment]
As described above, in the present embodiment, the main current source circuit 22 includes a current source including the transistor Q2 having a collector terminal connected to the main amplifier circuit 12 and an emitter terminal connected to the ground potential GND via the resistor element R2. I2 is provided, and a switch SW that performs switching operation in response to the optical signal disconnection detection signal LOS. The reference potential VCS that is higher than a voltage that gives a threshold voltage to the base-emitter voltage Vbe of the transistor Q2 and the base-emitter voltage Vbe Since either one of the standby potential VSL lower than the voltage giving the threshold voltage is switched and applied to the base terminal of the transistor Q2, the response speed of the main current source circuit 22 when starting the current supply is changed. Can be fast.

  Therefore, if a certain amount of current reduction can be obtained, a high response speed can be obtained by selecting a potential closer to the voltage that gives the threshold voltage to the base-emitter voltage Vbe as the standby potential VSL. As a result, it is possible to output an amplified output from the amplitude limiting amplifier circuit LA with a small delay time from the start of input of the optical signal Pin.

  Further, in the present embodiment, the case where the current source is configured by a bipolar transistor has been described as an example, but may be configured by a MOSFET. For example, when a current source is configured by NMOSFET, a potential near the threshold value of NMOSFET may be used as standby potential VSL.

[Third Embodiment]
Next, an amplitude limiting amplifier circuit according to a third embodiment of the present invention will be described with reference to FIG. FIG. 6 is a block diagram showing a configuration of an amplitude limiting amplifier circuit according to the third embodiment.

  In the first embodiment, the case where there is one circuit system for amplifying the electric signal Pout has been described as an example. In this embodiment, a case where a plurality of circuit systems for amplifying the input electric signal Tout is provided will be described.

  For example, since the PON system employed in the FTTH system uses an optical signal Pin having a bit rate of 1 Gbps or more, the amplitude limiting amplifier circuit LA that amplifies the optical signal Pin having such an extremely high frequency uses the optical signal to be amplified. It is necessary to use a circuit configuration in consideration of the bit rate of Pin. For this reason, in order to configure an optical receiver corresponding to a plurality of bit rates, a configuration including a plurality of circuit systems each having an amplifier circuit optimized for each bit rate is required.

  As shown in FIG. 6, in the amplitude limiting amplifier circuit LA according to the present embodiment, two circuit systems of a system A and a system B are provided in parallel to the electric signal Pout. And a selection circuit 15 that selectively controls one of the system B is provided.

The system A is provided with a main amplifier circuit 12A, a squelch circuit 13A, a main current source circuit 22A, and a squelch current source circuit 23A as main circuit units, and these circuit units are optimal for an optical signal Pin of 1 Gbps. It has become.
The system B is provided with a main amplifier circuit 12B, a squelch circuit 13B, a main current source circuit 22B, and a squelch current source circuit 23B as main circuit units, and these circuit units are optimal for an optical signal Pin of 10 Gbps. It has become.

The main amplifier circuit 12A includes an amplifier circuit, and has a function of amplifying each pulse included in the electric signal Pout output from the first stage amplifier circuit 11 to a constant amplitude.
The squelch circuit 13A has a function of controlling passage or blocking of the amplified output RoutA obtained by the main amplifier circuit 12A based on the drive control signal CA from the selection circuit 15.
The main current source circuit 22A has a function of controlling the current Is2A supplied to the main amplifier circuit 12A based on the drive control signal CA from the selection circuit 15.
The squelch current source circuit 23A has a function of supplying a current Is3A to the squelch circuit 13A.

The main amplifier circuit 12B includes an amplifier circuit, and has a function of amplifying each pulse included in the electrical signal Pout output from the first stage amplifier circuit 11 to a constant amplitude.
The squelch circuit 13B has a function of controlling the passage or blocking of the amplified output RoutB obtained by the main amplifier circuit 12B based on the drive control signal CB from the selection circuit 15.
The main current source circuit 22B has a function of controlling the current Is2B supplied to the main amplifier circuit 12B based on the drive control signal CB from the selection circuit 15.
The squelch current source circuit 23B has a function of supplying a current Is3B to the squelch circuit 13B.

The selection circuit 15 includes a plurality of gate circuits, and is a logical product of the selection signal RS (Rate Select) output from the host device of the amplitude limiting amplifier circuit LA and the optical signal interruption detection signal LOS from the optical signal interruption detection circuit 14. Based on the output, drive control signals CA and CB are generated and output to the main current source circuits 22A and 22B, so that one of the system A and the system B is controlled to be in an operating state. is doing.
FIG. 7 is a configuration example of the selection circuit. Here, inverters INV1 and INV2 and NAND circuits NAND1 and NAND2 are provided as main circuit portions.

The selection signal RS has its logic inverted by INV1 and is input to one input terminal of the NAND1. The selection signal RS is also input to one input terminal of the NAND 2 without being inverted. On the other hand, the optical signal break detection signal LOS is inverted in logic by INV2, and is input to the other input terminal of NAND1 and the other input terminal of NAND2.
The output of the NAND 1 is output as the drive control signal CA to the A-system main current source circuit 22A and the squelch circuit 13A. The output of the NAND 2 is output as the drive control signal CB to the B-system main current source circuit 22A and the squelch circuit 13A.

FIG. 8 is an explanatory diagram showing the logic of each signal used in the selection circuit.
In the present embodiment, the selection signal RS is a DC signal that instructs to select the system A. When the value is “0”, that is, the Low level, a state in which the system A is selected and displayed, that is, the significance of the selection signal RS is displayed. When the value is “1”, that is, when the High level is displayed, .

  Further, the optical signal interruption detection signal LOS output from the optical signal interruption detection circuit 14 is a DC signal indicating a signal interruption state in which an optical signal Pin having a sufficient signal strength is not input. When the value “1”, that is, the high level, the signal disconnection state in which the optical signal Pin having sufficient signal strength is not input, that is, the significance of the optical signal disconnection detection signal LOS is displayed. In addition, a signal presence state in which an optical signal Pin having a sufficient signal strength is input is displayed.

The drive control signal CA is a DC signal for instructing driving of the system A. When the value is “0”, that is, the Low level, the state of instructing the driving of the system A, that is, the significance of the drive control signal CA is displayed. Display status.
Further, the drive control signal CB is a DC signal that indicates driving of the system B. A state in which driving of the system B is instructed when the value is “0”, that is, the Low level, that is, the significance of the drive control signal CB is displayed, and a stop instruction of driving of the system B is instructed when the value is “1”, that is, the High level Is displayed.

[Operation of Third Embodiment]
Next, the operation of the amplitude limiting amplifier circuit according to the present embodiment will be described with reference to FIG. FIG. 9 is a truth table showing the operation of the selection circuit.

  As shown in FIG. 9, when the selection signal RS is at the low level, it is inverted to negative logic at INV1 and the high level is input to the NAND1, so that the drive control signal CA at a level equal to the optical signal break detection signal LOS is NAND1. Is output from. Further, since the Low selection signal RS is directly input to the NAND 2, the high-level drive control signal CB is output from the NAND 2 regardless of the level of the optical signal break detection signal LOS.

  On the other hand, when the selection signal RS is at the high level, it is inverted to negative logic at INV1 and the low level is input to the NAND1, so that the drive control signal CA at the high level is NAND1 regardless of the level of the optical signal disconnection detection signal LOS. Is output from. Further, since the High selection signal RS is directly input to the NAND2, the drive control signal CB having the same level as the optical signal break detection signal LOS is output from the NAND2.

  Therefore, the selection circuit 15 instructs the main current source circuits 22A and 22B to cut off or reduce the currents Is2A and Is2B when the optical signal break detection signal LOS indicates the signal break of the optical signal Pin. Further, when the optical signal break detection signal LOS indicates that the optical signal Pin is present, for example, the current Is2A is supplied to the main current source circuit 22A corresponding to the main amplifier circuit 12A selected by the selection signal RS. In addition to instructing supply, the main current source circuit 22B corresponding to the remaining main amplifier circuit 12B not selected by the selection signal RS is instructed to cut off or reduce the current Is2B.

FIG. 10 is an explanatory diagram illustrating the operation of the amplitude limiting amplifier circuit according to the third embodiment.
First, when the system A is selected by the selection signal RS, when the optical signal disconnection detection signal LOS indicates the signal disconnection of the optical signal Pin, the drive control signals CA and CB are both at the high level. For this reason, both the squelch circuits 13A and 13B are closed, and the outputs of the amplified outputs RoutA and RoutB are both cut off. Further, in both the main current source circuits 22A and 22B, the currents Is2A and Is2B supplied to the main amplifier circuits 12A and 12B are both limited or stopped, and power consumption in the main amplifier circuits 12A and 12B is reduced, thereby saving power. It becomes a state.

  On the other hand, when the input of the optical signal Pin is detected by the optical signal disconnection detection signal LOS, only the drive control signal CA becomes the low level. As a result, only the squelch circuit 13A is opened and the amplified output RoutA is output. Further, only the main current source circuit 22A supplies a sufficient current Is2A to the main amplifier circuit 12A, and only the main amplifier circuit 12A enters a normal state in which an amplification operation is performed.

  Further, when the system B is selected by the selection signal RS, when the optical signal disconnection detection signal LOS indicates the signal disconnection of the optical signal Pin, both the drive control signals CA and CB are at the high level. For this reason, both the squelch circuits 13A and 13B are closed, and the outputs of the amplified outputs RoutA and RoutB are both cut off. Further, in both the main current source circuits 22A and 22B, the currents Is2A and Is2B supplied to the main amplifier circuits 12A and 12B are both limited or stopped, and power consumption in the main amplifier circuits 12A and 12B is reduced, thereby saving power. It becomes a state.

  On the other hand, when the input of the optical signal Pin is detected by the optical signal disconnection detection signal LOS, only the drive control signal CB is at the low level. As a result, only the squelch circuit 13B is opened and the amplified output RoutB is output. Also, only the main current source circuit 22B supplies a sufficient current Is2B to the main amplifier circuit 12B, and only the main amplifier circuit 12B enters a normal state in which an amplification operation is performed.

[Effect of the third embodiment]
As described above, in the present embodiment, when the optical signal disconnection detection signal LOS indicates the signal disconnection of the optical signal Pin in the selection circuit 15, the current is interrupted to all the main current source circuits 22. When the optical signal interruption detection signal LOS indicates the presence of the optical signal Pin, the current is supplied to the main current source circuit 22 corresponding to the main amplifier circuit 12 selected by the selection signal RS. And the main current source circuit 22 corresponding to the remaining main amplifier circuit 12 not selected by the selection signal RS are instructed to cut off or reduce the current.

  As a result, when a plurality of circuit systems for amplifying the input electric signal Tout are provided, current is supplied only to the main amplifier circuit of the selected system. In addition to reducing the power consumption of the main amplifier circuit, the main amplifier circuit of the selected system is supplied with current only when the input of the optical signal Pin is detected, so that extremely large power saving can be realized. It becomes possible.

Further, since only the main amplifier circuit of the selected system is driven, crosstalk that can occur in the main amplifier circuits of other systems can be completely suppressed, and high noise resistance can be obtained.
In addition, since the current supply to the main amplifier circuit is controlled according to whether or not the optical signal Pin is input, it is possible to realize the transition and return to the autonomous power saving mode for each burst signal. This eliminates the need for protocol-based power saving control and provides high versatility as an amplitude limiting amplifier circuit.

  Further, the circuit diagram shown in FIG. 7 is one configuration example of the selection circuit 15, and is not limited to this. The circuit diagram shown in FIG. 7 is configured by combining inverters and gate circuits to obtain a similar truth table. Also good. Further, the circuit configuration may be appropriately changed according to the control logic of the selection signal RS, the optical signal break detection signal LOS, the drive control signals CA and CB, the main current source circuit 22, the squelch circuit 13, and the like.

[Extended embodiment]
The present invention has been described above with reference to the embodiments, but the present invention is not limited to the above embodiments. Various changes that can be understood by those skilled in the art can be made to the configuration and details of the present invention within the scope of the present invention.

  DESCRIPTION OF SYMBOLS 100 ... Optical receiver, PD ... Photodiode, TIA ... Transimpedance amplifier, LA ... Amplitude limiting amplifier circuit, 11 ... First stage amplifier circuit, 12, 12A, 12B ... Main amplifier circuit, 13, 13A, 13B ... Squelch circuit, 14 ... optical signal break detection circuit, 15 ... selection circuit, 21, 21A, 21B ... first stage current source circuit, 22, 22A, 22B ... main current source circuit, 23, 23A, 23B ... squelch current source circuit, C ... capacitance element, I1, I2, I3 ... current source, Q1, Q2 ... transistor, R, R1, R2 ... resistance element, SW ... switch, INV1, INV2 ... inverter, NAND1, NAND2 ... NAND circuit, Pin ... optical signal, Iin ... photocurrent Signal, Tout, Pout ... Electric signal, Rout ... Amplified output, LOS ... Optical signal break detection signal, RS ... Selection signal, CA, CB Driving control signal, VCS ... reference potential, VSL ... standby potential, Vbe ... base - emitter voltage, VB ... base potential, GND ... ground potential.

Claims (7)

A main amplifier circuit that amplifies each pulse included in the electrical signal obtained by photoelectrically converting the optical signal to a constant amplitude;
An optical signal disconnection detection circuit for generating an optical signal disconnection detection signal indicating a signal disconnection of the optical signal based on the electrical signal;
Amplitude-limited amplification, comprising: a main current source circuit that supplies current used for the operation of the main amplifier circuit to the main amplifier circuit and performs supply control of the current based on the optical signal disconnection detection signal circuit. The amplitude limiting amplifier circuit according to claim 1,
The main current source circuit includes a current source including a transistor having a collector terminal connected to the main amplifier circuit and an emitter terminal connected to a ground potential via a resistor element, and the optical signal break detection signal A switch that switches between a reference potential higher than a voltage that gives a threshold voltage to the base-emitter voltage of a transistor and a standby potential that is lower than the base-emitter voltage and applies it to the base terminal of the transistor And an amplitude limiting amplifier circuit. In the amplitude limiting amplifier circuit according to claim 1 or 2,
An amplifier circuit or an emitter follower circuit, comprising an initial stage amplifier circuit that inputs the electrical signal and outputs it to the main amplifier circuit,
The optical signal interruption detection circuit generates the optical signal interruption detection signal based on the electrical signal output from the first stage amplification circuit. In the amplitude limiting amplifier circuit according to any one of claims 1 to 3,
An amplitude limiting amplifier circuit further comprising a squelch circuit that controls passage or blocking of the amplified output obtained by the main amplifier circuit based on the optical signal disconnection detection signal. A plurality of main amplifier circuits that are provided in parallel to an electrical signal obtained by photoelectrically converting an optical signal and each amplifies each pulse included in the electrical signal to a constant amplitude;
A plurality of squelch circuits that are provided for each of these main amplifier circuits and control the passage or blocking of the amplified output obtained by the main amplifier circuit;
A selection circuit that controls any one of the squelch circuits corresponding to a selection signal input from the outside to a passing state of the amplified output, and controls another squelch circuit to a blocked state of the amplified output. When,
An optical signal disconnection detection circuit for generating an optical signal disconnection detection signal indicating a signal disconnection of the optical signal based on the electrical signal;
A main current source circuit that is provided for each of the main amplifier circuits, and supplies a current used for the operation of the main amplifier circuit to the main amplifier circuit, and controls supply of the current;
When the optical signal break detection signal indicates the signal break of the optical signal, the selection circuit instructs the main current source circuit to cut or reduce the current, and the optical signal break detection signal Indicates that the optical signal is present, the main current source circuit corresponding to the main amplifier circuit selected by the selection signal is instructed to supply the current, and the selection signal An amplitude limiting amplifier circuit, wherein the main current source circuit corresponding to the remaining unselected main amplifier circuit is instructed to cut off or reduce the current. The amplitude limiting amplifier circuit according to claim 5,
The selection circuit is provided for each main current source, and instructs supply control of the current in the main current source circuit based on a logical product output of the selection signal and the optical signal disconnection detection signal. An amplitude limiting amplifier circuit. A photoelectric conversion element that photoelectrically converts an optical signal composed of a pulse train into a photocurrent signal and outputs the photoelectric signal;
A transimpedance amplifier that amplifies the photocurrent signal and outputs an electrical signal;
7. An optical receiver comprising: the amplitude limiting amplifier circuit according to claim 1 that outputs each pulse of the pulse train included in the electrical signal after being amplified to a constant amplitude. .

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