JP2011152003A - Circuit and method for protecting overvoltage - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a circuit and method for protecting an overvoltage, wherein voltage supply is prevented from being unnecessarily intercepted. <P>SOLUTION: The circuit for protecting the overvoltage includes; an overcurrent intercepting circuit which is provided in a first input line and is cut off when current of not less than a prescribed value flows; a thyristor interposed between the first input line and a second input line; a switching circuit which is interposed between the thyristor and the first input line and switches whether the thyristor and the first input line are conducted; an overvoltage detection circuit by which the first input line and a gate of the thyristor are conducted when a voltage difference between the first input line and the second input line becomes equal to or more than a pre-set limit voltage; and a control circuit which controls operation of the switching circuit. When a period wherein the voltage of not less than a gate trigger is applied to the gate of the thyristor exceeds a pre-set limit period, a control means controls the operation of the switching circuit so that the thyristor and the first input line are conducted. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to an overvoltage protection circuit and an overvoltage protection method.

  In a power supply device or the like, an overvoltage protection circuit is provided to prevent an overvoltage from being applied to a load.

  As a related technique, Patent Document 1 (Japanese Utility Model Laid-Open No. 61-144737) describes an overvoltage protection device. This overvoltage protection device includes a power supply circuit provided with a power transformer connected to a commercial AC power supply through an electric fuse, and a rectifying diode and a Zener voltage in the AC power supply are larger than a half-wave voltage when the AC power supply voltage is normal. A CR integrating circuit having a relatively large time constant connected through a constant voltage diode in series, and a semiconductor switching element connected to an AC power source through an electric fuse and responding to a predetermined charging voltage of a capacitor of the CR integrating circuit. It is characterized by comprising.

  As another related technology, there is a power supply device described in Patent Document 2 (Japanese Patent Laid-Open No. 3-214067). This publication describes that a commercial power input line for a power supply circuit is connected in parallel with a triac that short-circuits the lines at turn-on and a constant voltage detection circuit composed of a Zener diode, a resistor, a diode, a resistor, and a capacitor. Has been.

  In addition, as related technologies that the inventor has known, an overvoltage protection circuit described in Patent Document 3 (Japanese Patent Laid-Open No. 2007-43822), a power supply circuit described in Patent Document 4 (Japanese Patent Laid-Open No. 56-139028), a patent A constant voltage power supply protection circuit described in Document 5 (Japanese Patent Laid-Open No. 58-6032), a power supply device described in Patent Document 6 (Japanese Patent Laid-Open No. 1-144314), and Patent Document 7 (Japanese Patent Laid-Open No. 5-130730) The protection circuit of the described DC-DC converter is mentioned.

Akira 61-144737 JP-A-3-214067 JP2007-43822A JP-A-56-139028 JP 58-6032 A JP-A-1-144314 JP 5-130730 A

  FIG. 1 is a circuit diagram showing an example of an overvoltage protection circuit considered by the inventors of the present application. The overvoltage protection circuit shown in FIG. 1 includes a fuse F1, a Zener diode D1, a resistor R1, and a thyristor D2. The fuse F1 is provided on the high voltage input line that connects the high voltage input terminal IN + and the load. Zener diode D1 is connected to the high voltage input line at the cathode. The anode of the Zener diode D1 is connected to a low voltage input line (a line connecting the low voltage input terminal IN− and the load) via a resistor R1. The thyristor D2 has an anode connected to the high voltage input line and a cathode connected to the low voltage input line. The anode of the Zener diode D1 is connected to the gate of the thyristor D2.

  In the overvoltage protection circuit shown in FIG. 1, when an overvoltage is applied between the input lines, the Zener diode D1 conducts in the reverse direction. As a result, a gate current flows through the gate of the thyristor D2. The anode and cathode of the thyristor D2 are brought into conduction, and the high voltage input line and the low voltage input line are conducted. As a result, a short circuit current flows from the high voltage input terminal IN + to the low voltage input terminal IN− via the thyristor D2, and the fuse F1 is blown. Therefore, an overvoltage is prevented from being applied to the load, and a load failure is prevented.

  By the way, when the occurrence of the overvoltage is instantaneous, the load may not be affected by the overvoltage. Therefore, when the occurrence of overvoltage is instantaneous, it is considered unnecessary to protect the load from overvoltage. However, in the overvoltage protection circuit shown in FIG. 1, even if it is instantaneous, when an overvoltage is applied, a voltage higher than the gate trigger voltage is applied to the gate of the thyristor D2. As a result, the thyristor D2 becomes conductive. Once the thyristor D2 becomes conductive, the thyristor D2 holds the conductive state if a current equal to or greater than the holding current flows. In order to turn off the thyristor, the anode current must be kept below the holding current, or the anode must be reverse-biased for a certain time or more. Therefore, even if instantaneous, if an overvoltage occurs, a short-circuit current continues to flow and the fuse F1 is reliably blown. Thereafter, the blown fuse F1 must be repaired in order to supply the desired voltage to the load.

  The thyristor D2 may be misfired for some reason. Even when the thyristor D2 is falsely fired, as in the case where an overvoltage is instantaneously generated, a short-circuit current continues to flow, and the fuse F1 is surely blown.

  That is, the overvoltage protection circuit shown in FIG. 1 has a problem that the voltage supply to the load may be interrupted unnecessarily.

  An overvoltage protection circuit according to the present invention is provided in a first input line connecting a first voltage supply terminal and a load, and is disconnected when a current of a predetermined value or more flows, and the first input A thyristor interposed between a line and a second input line connecting a second voltage supply terminal and a load, and interposed between the thyristor and the first input line, the thyristor and the A switch circuit for switching whether or not to conduct the first input line, and one end connected to the first input line, the other end connected to the second input line, the first input line and the second input line Controlling the operation of the overvoltage detection circuit and the switch circuit, which makes the first input line conductive with the gate of the thyristor when the voltage difference with the input line is equal to or higher than a preset limit voltage; Control circuit Comprising a. When a period in which a voltage equal to or higher than a gate trigger voltage is applied to the gate of the thyristor exceeds a preset limit period, the control unit is configured to make the thyristor conductive with the first input line. Controls the operation of the switch circuit.

  In the voltage protection method according to the present invention, the voltage difference between the first input line connecting the first voltage supply terminal and the load and the second input line connecting the second voltage supply terminal and the load is: Detecting whether or not the voltage is higher than a preset limit voltage; and, when the voltage difference is equal to or higher than the limit voltage, connecting the first input line, the second voltage supply terminal, and the load. A step of conducting a thyristor gate connected to a cathode of two input lines, and a period in which a voltage higher than the limit voltage is applied to the gate of the thyristor exceeds a preset limit period, Conducting the anode of the thyristor and the first input line.

  According to the present invention, an overvoltage protection circuit and an overvoltage protection method are provided in which voltage supply to a load is not unnecessarily interrupted.

FIG. 1 is a circuit diagram illustrating an example of an overvoltage protection circuit. FIG. 2 is a schematic diagram showing an electric circuit to which the overvoltage protection circuit according to the first embodiment is applied. FIG. 3 is a configuration diagram illustrating an overvoltage protection circuit according to the second embodiment. FIG. 4 is a configuration diagram illustrating an overvoltage protection circuit according to the third embodiment. FIG. 5 is a configuration diagram illustrating an overvoltage protection circuit according to the fourth embodiment. FIG. 6 is a diagram illustrating an overvoltage protection circuit that combines the second embodiment and the third embodiment. FIG. 7 is a diagram illustrating an overvoltage protection circuit combining the second embodiment and the fourth embodiment.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(First embodiment)
FIG. 2 is a schematic diagram showing an electric circuit to which the overvoltage protection circuit 1 according to this embodiment is applied. In addition to the overvoltage protection circuit 1, this electric circuit includes a load 2, a high voltage input terminal 3 (first voltage input terminal), and a low voltage input terminal 4 (second voltage input terminal). The high voltage input terminal 3 is connected to the load 2 via a high voltage input line 20 (first voltage input line), and supplies a high voltage to the load 2. The low voltage input terminal 4 is connected to the load 2 via a low voltage input line 21 (second voltage input line), and supplies a low voltage to the load 2.

  The overvoltage protection circuit 1 is a circuit that prevents the load 2 from being supplied with an overvoltage that would cause the load 2 to fail. The overvoltage protection circuit 1 includes a fuse 23, an overvoltage detection circuit 5, a thyristor 6, a control circuit 7, and a switch circuit 8.

  The fuse 23 is interposed in the high voltage input line 20. The fuse 23 functions as an overcurrent cutoff circuit that is disconnected when a current of a predetermined value or more flows.

  The thyristor 6 is provided to short-circuit the high voltage input line 20 and the low voltage input line 21 when an overvoltage occurs. The thyristor 6 is connected to the high voltage input line 20 on the anode side and connected to the low voltage input line 21 on the cathode side.

  The overvoltage detection circuit 5 is provided to detect whether or not an overvoltage has occurred between the input lines (20, 21). The overvoltage detection circuit 5 detects the occurrence of an overvoltage when the voltage difference between the input lines becomes equal to or higher than a preset limit voltage. Then, the gate of the thyristor 6 is brought into conduction with the high voltage input line 20. Specifically, the overvoltage detection circuit 5 includes a Zener diode 9 and a resistance element 10. The Zener diode 9 is connected to the high voltage input line 20 at the cathode, and is connected to one end of the resistance element 10 at the anode. The anode of the Zener diode 9 is connected to the gate of the thyristor 6. The other end of the resistance element 10 is connected to the low voltage input line 21. By adopting such a configuration, when the voltage difference between the input lines (20, 21) becomes equal to or higher than the limit voltage (a voltage at which the Zener diode 9 becomes conductive) (when an overvoltage occurs), the Zener diode 9, the gate of the thyristor 6 and the high voltage input line 20 are conducted. As a result, a voltage higher than the gate trigger voltage is applied to the gate of the thyristor 6, and the thyristor 6 is turned on.

  The switch circuit 8 is provided so as to switch whether or not the high voltage input line 20 and the anode of the thyristor 6 are conducted.

  The control circuit 7 is a circuit that controls the operation of the switch circuit 8. The control circuit 7 is connected to the gate of the thyristor 6. The control circuit 7 detects whether or not the period during which the gate voltage of the thyristor 6 is equal to or higher than the gate trigger voltage exceeds a preset limit period. Then, only when the limit period is exceeded, a control signal is transmitted to the switch circuit 8 so that the high voltage input line 20 and the anode of the thyristor 6 are conducted. That is, the high voltage input line 20 and the anode of the thyristor 6 are conducted only when a voltage signal equal to or higher than the gate trigger voltage whose pulse width is equal to or longer than the limit period is applied to the gate of the thyristor 6. The limit period is set to such a length that the load 2 does not fail if the time during which the overvoltage is supplied to the load 2 is within the limit period.

  Next, an operation method of the overvoltage protection circuit 1 will be described. It is assumed that a voltage of 12 VDC is applied between the input lines (20, 21) during normal operation. Then, it is assumed that 16 VDC is set as the limiting voltage in consideration of a margin in the absolute maximum rating of the input voltage of the load 2. That is, it is assumed that the Zener voltage of the Zener diode 9 is set so that the Zener diode 9 conducts in the reverse direction when a voltage of 16 V or more is applied between the input lines (20, 21).

  It is assumed that the voltage between the high voltage input terminal 3 and the low voltage input terminal 4 has reached 16 V for some reason. At this time, the Zener diode 9 conducts in the reverse direction, and a gate current flows through the gate of the thyristor 6. As a result, the gate voltage of the thyristor 6 becomes equal to or higher than the gate trigger voltage.

  Here, when the time (period) when the gate voltage of the thyristor 6 becomes equal to or higher than the gate trigger voltage exceeds the limit period, the control circuit 7 controls the switch circuit 8 with respect to the high voltage input line 20 and the anode of the thyristor 6. A control signal is transmitted so as to conduct. As a result, the anode and cathode of the thyristor 6 become conductive, and the input lines (20, 21) are short-circuited. As a result, a short-circuit current flows from the high voltage input terminal 3 to the low voltage input terminal 4 via the fuse 23 and the thyristor 6. The fuse 23 is blown and an overvoltage (voltage exceeding 16V) is prevented from being applied to the load 2. That is, the load is protected from overvoltage.

  On the other hand, even if the gate voltage of the thyristor 6 becomes equal to or higher than the gate trigger voltage, if the period does not exceed the limit period, the control circuit 7 causes the switch circuit 8 to switch the high voltage input line 20 and the thyristor 6. A control signal that cuts off the connection with the anode is sent. In this case, the input lines (20, 21) are not short-circuited, and the fuse 23 is not blown. An overvoltage is instantaneously applied to the load 2. However, since the period during which the load 2 overvoltage is applied is within the limit period, the load 2 does not fail.

  As described above, according to the present embodiment, even if an overvoltage is applied between the input lines (20, 21), the input lines (20, 21) are not short-circuited unless the limit period is exceeded. Accordingly, the fuse 23 is not blown when the occurrence of an overvoltage is instantaneous, or when a voltage higher than the gate trigger voltage is applied to the gate of the thyristor 6 due to instantaneous noise and the thyristor 6 is erroneously fired. Therefore, the fuse 23 is prevented from being blown unnecessarily.

(Second Embodiment)
Next, the second embodiment will be described. FIG. 3 is a configuration diagram showing the overvoltage protection circuit 1 according to the present embodiment. In the present embodiment, a specific configuration of the control circuit 7 will be described. Since the configuration other than the control circuit 7 can be the same as that of the first embodiment, a detailed description thereof will be omitted. The switch circuit 8 conducts the high voltage input line 20 and the anode of the thyristor 6 when the low level voltage is acquired from the control circuit 7 and acquires the high level voltage. It is comprised so that between the anodes of 6 may be interrupted | blocked.

  As shown in FIG. 3, the control circuit 7 includes a comparator 12, a CR integration circuit 11, and a Zener diode 18.

  The CR integration circuit 11 includes a capacitive element 19, a resistive element 14, and a resistive element 15. The capacitive element 19 is connected to the gate of the thyristor 6 at one end and to the low voltage input line 21 at the other end. The resistance element 14 is connected to the gate of the thyristor 6 at one end and to one end of the resistance element 15 at the other end. The other end of the resistance element 15 is connected to the inverting input terminal of the comparator 12.

  The comparator 12 is configured to output either a high level voltage supplied from the high level voltage terminal 33 or a low voltage (low level voltage) supplied from the low voltage supply terminal 4. The output terminal of the comparator 12 is connected to the switch circuit 8. The inverting input terminal of the comparator 12 is connected to the CR integration circuit 11 as described above. The non-inverting input terminal of the comparator is connected to the cathode of the Zener diode 18 through the resistance element 16. Further, the non-inverting input terminal is connected to the low voltage input line 21 via the resistance element 17. The resistance element 17, the resistance element 16, and the resistance element 13 are designed so that a reference voltage is applied to the non-inverting input terminal of the comparator 12. The comparator 12 outputs a low level voltage when the voltage applied to the inverting input terminal exceeds the reference voltage, and outputs a high level voltage when the voltage applied to the inverting input terminal is lower than the reference voltage. ,It is configured.

  The Zener diode 18 is connected to the low voltage input line 21 at the anode. The cathode of the Zener diode 18 is connected to the high level voltage terminal 33 through the resistance element 13.

  The time constant of the CR integration circuit 11 is such that a voltage exceeding the reference voltage is supplied to the inverting input terminal of the comparator 12 when the period in which a voltage higher than the gate trigger voltage is applied to the gate voltage of the thyristor 6 exceeds the limit period. Is set to be.

  According to the present embodiment, when the gate voltage of the thyristor 6 steadily becomes equal to or higher than the gate trigger voltage (when the gate voltage becomes equal to or higher than the gate trigger voltage after the limit period), the CR integrating circuit 14 15 is supplied with a voltage higher than the reference voltage. As a result, the comparator 12 outputs a low level voltage to the switch circuit 8. When the switch circuit 8 acquires the low level voltage, the switch circuit 8 conducts between the high voltage input line 20 and the anode of the thyristor 6. As a result, a short-circuit current flows and the fuse 23 is blown.

  On the other hand, when the occurrence of the overvoltage is instantaneous, the CR integration circuit 14 supplies the comparator 15 with a voltage lower than the reference voltage. As a result, the comparator 15 outputs a high level voltage to the switch circuit 8. When the switch circuit 8 acquires the high level voltage, the switch circuit 8 cuts off the high voltage input line 20 and the anode of the thyristor 6. Accordingly, no short circuit current flows and the fuse 23 is not blown. Similarly, when the thyristor 6 is falsely fired due to the addition of noise above the gate trigger voltage to the gate, the fuse 23 is not blown. Similarly, during normal operation, the fuse 23 is not blown.

  As described above, even if the configuration of the present embodiment is adopted, the same operational effects as those of the first embodiment can be obtained.

(Third embodiment)
Subsequently, a third embodiment will be described. FIG. 4 is a configuration diagram showing the overvoltage protection circuit 1 according to the present embodiment. In the present embodiment, a specific configuration of the switch circuit 8 will be described. As shown in FIG. 4, the switch circuit 8 includes a transistor 25 and a P-channel type MOSFET 24.

  The FET 24 has a source connected to the high voltage input line 20 and a drain connected to the anode of the thyristor 6. The gate of the FET 24 is grounded via the resistance element 29.

  The base of the transistor 25 is connected to the control circuit 7 via the resistance element 28. The emitter of the transistor 25 is connected to the gate of the FET 24. The collector of the transistor is connected to the high voltage input line 20. The base of the transistor 25 is connected to the collector of the transistor 25 through the resistance element 27. Further, the collector of the transistor 25 is connected to the emitter of the transistor 25 via the resistance element 26.

  If the configuration as described above is employed as the switch circuit 8, when the low level voltage is supplied from the control circuit 7, the anode of the thyristor 6 and the high voltage input line 20 can be made conductive. Further, when a high level voltage is supplied from the control circuit 7, the anode of the thyristor 6 can be cut off from the high voltage input line 20. That is, when the control circuit 7 outputs a low level voltage, the transistor 25 is turned off and the FET 24 is turned on. On the other hand, when the control circuit 7 outputs a high level voltage, the transistor 25 is turned on and the FET 24 is turned off. Therefore, if the control circuit 7 is configured to output a low level voltage only when an overvoltage occurs regularly, the high voltage input line 20 and the low voltage input only when the overvoltage occurs constantly. The line 21 can be short-circuited. As a result, it is possible to obtain the same effects as those of the above-described embodiment.

(Fourth embodiment)
Subsequently, a fourth embodiment will be described. FIG. 5 is a configuration diagram showing the overvoltage protection circuit 1 according to the present embodiment. In the present embodiment, the specific configuration of the switch circuit 8 is changed with respect to the third embodiment. About the other point, since the structure similar to 3rd Embodiment is employable, detailed description is abbreviate | omitted.

  As shown in FIG. 5, the switch circuit 8 includes a normally-on photo MOS relay circuit. That is, the switch circuit 8 includes a photodiode 31 and a switch element 32. The anode of the photodiode 31 is connected to the control circuit 7 via the resistance element 30. The cathode of the photodiode 31 is grounded. The switch element 32 is interposed between the high voltage input line 20 and the anode of the thyristor 6 and is turned off when the photodiode 31 emits light, and is turned on when the photodiode 31 does not emit light. It is configured to be in a state.

  Even if the configuration as in the present embodiment is adopted, if the control circuit 7 is configured to output a low-level voltage only when an overvoltage occurs steadily, when the overvoltage occurs steadily, Only, the photodiode 31 is extinguished and the high voltage input line 20 and the low voltage input line 21 can be short-circuited. As a result, it is possible to obtain the same effects as those of the above-described embodiment.

  As above, the first to fourth embodiments of the present invention have been described. These embodiments are not independent from each other, and can be used in combination within a consistent range.

  FIG. 6 is a diagram illustrating an overvoltage protection circuit 1 in which the second embodiment and the third embodiment are combined. In the example shown in FIG. 6, a circuit including the CR integration circuit 11 and the comparator 12 is used as the control circuit 7, and a circuit including the transistor 25 and the FET 24 is used as the switch circuit 8. Even if such a configuration is adopted, the same effects as those of the above-described embodiment can be obtained.

  FIG. 7 is a diagram showing an overvoltage protection circuit 1 in which the second embodiment and the fourth embodiment are combined. In the example shown in FIG. 7, a circuit including a CR integration circuit 11 and a comparator 12 is used as the control circuit 7, and a normally-on photo MOS relay circuit is used as the switch circuit 8. Even if such a configuration is adopted, the same effects as those of the above-described embodiment can be obtained.

DESCRIPTION OF SYMBOLS 1 Overvoltage protection circuit 2 Load 3 High voltage input terminal 4 Low voltage input terminal 5 Overvoltage detection circuit 6 Thyristor 7 Control circuit 8 Switch circuit 9 Zener diode 10 Resistance element 11 CR integration circuit 12 Comparator 13 Resistance element 14 Resistance element 15 Resistance element 16 Resistance element 17 Resistance element 18 Zener diode 19 Capacitance element 20 High voltage input line 21 Low voltage input line 23 Fuse 24 FET
25 Transistor 26 Resistance element 27 Resistance element 28 Resistance element 29 Resistance element 30 Resistance element 31 Photodiode 32 Switch element 33 High-level voltage supply terminal

Claims (5)

An overcurrent cutoff circuit that is provided in a first input line that connects the first voltage supply terminal and the load, and is disconnected when a current of a predetermined value or more flows;
A thyristor interposed between the first input line and a second input line connecting the second voltage supply terminal and the load;
A switch circuit that is interposed between the thyristor and the first input line and switches whether the thyristor and the first input line are conducted;
An overvoltage detection circuit for conducting the first input line with the gate of the thyristor when a voltage difference between the first input line and the second input line is equal to or higher than a preset limit voltage;
A control circuit for controlling the operation of the switch circuit;
Comprising
The control means is configured to make the thyristor and the first input line conductive when a period in which a voltage higher than a gate trigger is applied to a gate of the thyristor exceeds a preset limit period. Overvoltage protection circuit that controls the operation of the switch circuit. An overvoltage protection circuit according to claim 1,
The control circuit includes:
A CR integrating circuit having an input connected to the gate of the thyristor;
Comparing a CR integration circuit output voltage output from the output terminal of the CR integration circuit with a predetermined reference voltage, and supplying a signal indicating a comparison result to the switch circuit as a switch circuit control signal,
The comparator is an overvoltage protection circuit that supplies, as the switch circuit control signal, a signal that turns on the switch circuit when the output voltage of the CR integration circuit exceeds the reference voltage. An overvoltage protection circuit according to claim 1 or 2,
The switch circuit is an overvoltage protection circuit including a field effect transistor. An overvoltage protection circuit according to claim 1 or 2,
The switch circuit is an overvoltage protection circuit having a photo MOS relay circuit. The voltage difference between the first input line connecting the first voltage supply terminal and the load and the second input line connecting the second voltage supply terminal and the load is greater than or equal to a preset limit voltage. Detecting whether or not,
When the voltage difference is not less than the limit voltage, the first input line and the gate of the thyristor connected at the cathode to the second input line connecting the second voltage supply terminal and the load are made conductive. When,
Electrically connecting the anode of the thyristor and the first input line when a period in which a voltage equal to or higher than the limit voltage is applied to the gate of the thyristor exceeds a preset limit period;
An overvoltage protection method comprising:

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