JP2011149979A - Liquid crystal display and electronic equipment - Google Patents

Liquid crystal display and electronic equipment Download PDF

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JP2011149979A
JP2011149979A JP2010008803A JP2010008803A JP2011149979A JP 2011149979 A JP2011149979 A JP 2011149979A JP 2010008803 A JP2010008803 A JP 2010008803A JP 2010008803 A JP2010008803 A JP 2010008803A JP 2011149979 A JP2011149979 A JP 2011149979A
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wiring
liquid crystal
element substrate
location
substrate
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JP5506034B2 (en
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Akira Sasaki
亮 佐々木
Osamu Kobayashi
修 小林
Osamu Kai
修 甲斐
Eiko Hirose
詠子 廣瀬
Hideki Kaneko
英樹 金子
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Sony Corp
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a liquid crystal display capable of detecting chip of wiring in a first part without detecting chip of wiring in a second part. <P>SOLUTION: Concerning the liquid crystal display 100, detection wiring 9 is arranged in the neighborhood of an end side 1a of a TFT substrate 1 in an inspection object part trying to detect the chip of common potential wiring 8. The detection wiring 9 is arranged inside rather than the neighborhood of the end side 1a of the TFT substrate 1 in a part other than the inspection object part. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

本発明は、液晶表示装置および電子機器に関し、特に、互いに対向するように配置された素子基板および対向基板のうちの素子基板の液晶層側の表面と、液晶層との間に設けられた検出配線を備える液晶表示装置および電子機器に関する。   The present invention relates to a liquid crystal display device and an electronic apparatus, and in particular, an element substrate disposed so as to face each other, and a detection provided between a liquid crystal layer side surface of the element substrate of the counter substrate and the liquid crystal layer The present invention relates to a liquid crystal display device including wiring and an electronic apparatus.

従来、互いに対向するように配置された素子基板および対向基板のうちの素子基板の液晶層側の表面と、液晶層との間に設けられた検出配線を備える液晶表示装置および電子機器が知られている(たとえば、特許文献1参照)。   2. Description of the Related Art Conventionally, there are known liquid crystal display devices and electronic devices that include a detection wiring provided between a liquid crystal layer and a surface on the liquid crystal layer side of the element substrate of the element substrate disposed opposite to each other and the counter substrate. (For example, refer to Patent Document 1).

上記特許文献1には、トランジスタ素子を含む素子基板と、素子基板に対向するように配置された対向基板と、素子基板の表面上に設けられるとともに、素子基板に基板割れが発生しているか否かを診断するための診断用配線(検出配線)とを備える液晶表示装置が開示されている。この液晶表示装置では、診断用配線は、素子基板の端辺に沿って設けられており、診断用配線と素子基板の端辺との間の幅(間隔)は、素子基板の全周において略均一である。つまり、診断用配線は、素子基板の端辺に対して、略平行に配置されている。また、診断用配線の素子基板の端辺とは反対側には、データ線や配線パターンなどの信号線が設けられている。また、上記特許文献1には、明確に記載されていないが、診断用配線と信号線との間の領域(診断用配線の内側の領域)には、液晶表示装置の共通電極に接続された共通電位配線が診断用配線に沿って設けられていると考えられる。また、素子基板の割れおよび共通電位配線の欠けを検出しようとする第1箇所において、診断用配線を越えて共通電位配線まで届くような基板割れが発生した場合には、素子基板の表面上に設けられた診断用配線が断線するとともに、共通電位配線が欠けてしまう。この場合、診断用配線が断線したか否かを判断するための導通検査を行う際に、診断用配線が導通しないため、不良品と判断される。   In Patent Document 1, an element substrate including a transistor element, a counter substrate disposed so as to face the element substrate, a surface of the element substrate, and whether a substrate crack has occurred in the element substrate. A liquid crystal display device including diagnostic wiring (detection wiring) for diagnosing the above is disclosed. In this liquid crystal display device, the diagnostic wiring is provided along the edge of the element substrate, and the width (interval) between the diagnostic wiring and the edge of the element substrate is substantially the entire circumference of the element substrate. It is uniform. That is, the diagnostic wiring is disposed substantially parallel to the end side of the element substrate. Further, signal lines such as data lines and wiring patterns are provided on the side opposite to the edge of the element substrate of the diagnostic wiring. Although not clearly described in Patent Document 1, the region between the diagnostic wiring and the signal line (the region inside the diagnostic wiring) is connected to the common electrode of the liquid crystal display device. It is considered that the common potential wiring is provided along the diagnostic wiring. In addition, when a substrate crack that reaches the common potential wiring beyond the diagnostic wiring occurs at the first location where the crack of the element substrate and the lack of the common potential wiring are to be detected, The provided diagnostic wiring is disconnected and the common potential wiring is missing. In this case, when performing a continuity test to determine whether or not the diagnostic wiring is disconnected, the diagnostic wiring is not conductive, and thus is determined to be a defective product.

特開2006−171386号公報JP 2006-171386 A

しかしながら、上記特許文献1に記載の液晶表示装置では、第1箇所において発生した基板割れと同程度の基板割れが、素子基板の割れおよび共通電位配線の欠けを検出しなくてもよい第2箇所(検査非対象箇所)において発生した際にも、診断用配線が切断されてしまう場合がある。この場合、第2箇所における共通電位配線の欠けを検出してしまうという問題点がある。   However, in the liquid crystal display device described in Patent Document 1, a substrate crack that is similar to the substrate crack generated at the first location does not require detection of a crack in the element substrate and a lack of common potential wiring. Even when it occurs in (non-inspection location), the diagnostic wiring may be cut off. In this case, there is a problem that the lack of the common potential wiring at the second location is detected.

この発明は、上記のような課題を解決するためになされたものであり、この発明の目的は、第2箇所における配線の欠けを検出せずに、第1箇所における配線の欠けを検出することが可能な液晶表示装置および電子機器を提供することである。   The present invention has been made to solve the above-described problems, and an object of the present invention is to detect a chipping of a wiring at the first location without detecting a chipping of the wiring at the second location. It is an object to provide a liquid crystal display device and an electronic apparatus that can perform the above-described operation.

課題を解決するための手段および発明の効果Means for Solving the Problems and Effects of the Invention

上記目的を達成するために、この発明の第1の局面における液晶表示装置は、液晶層を挟持するとともに、互いに対向するように配置された略矩形形状の素子基板および対向基板と、素子基板および対向基板のうちの素子基板の液晶層側の表面と液晶層との間の外縁部に沿って設けられた配線と、配線の外周に沿って設けられるとともに、断線したか否かにより少なくとも配線の欠けを検出するための検出配線とを備え、配線の欠けを検出しようとする第1箇所では、検出配線は、素子基板および対向基板のうちの一方の端辺近傍に配置され、配線の欠けを検出しようとする第1箇所以外の第2箇所では、検出配線は、素子基板および対向基板のうちの一方の端辺近傍よりも内側に配置されている。   In order to achieve the above object, a liquid crystal display device according to a first aspect of the present invention includes a substantially rectangular element substrate and a counter substrate disposed so as to face each other while sandwiching a liquid crystal layer, and an element substrate and A wiring provided along the outer edge portion between the liquid crystal layer side surface of the element substrate of the counter substrate and the liquid crystal layer, and provided along the outer periphery of the wiring, and at least the wiring depending on whether or not the wire is disconnected. And a detection wiring for detecting the chipping, and in the first location where the chipping of the wiring is to be detected, the detection wiring is arranged in the vicinity of one end of the element substrate and the counter substrate. In a second location other than the first location to be detected, the detection wiring is arranged inside the vicinity of one end side of the element substrate and the counter substrate.

この第1の局面による液晶表示装置では、上記のように、配線の欠けを検出しようとする第1箇所では、検出配線を、素子基板および対向基板のうちの一方の端辺近傍に配置し、第2箇所では、検出配線を、素子基板および対向基板のうちの一方の端辺近傍よりも内側に配置することによって、第1箇所において、検出配線を越えて配線まで届くような基板割れが発生した場合には、基板割れに起因して第1箇所の検出配線が断線するので、素子基板および対向基板のうちの一方の第1箇所において配線の欠けが発生したことを検出することができる。その一方で、第1箇所において発生した基板割れと同程度の基板割れが第2箇所において発生した場合には、第2箇所における素子基板および対向基板のうちの一方の端辺と検出配線との間の幅(間隔)が、第1箇所における素子基板および対向基板のうちの一方の端辺と検出配線との間の幅(間隔)よりも大きいので、第2箇所における検出配線は断線しない。これにより、素子基板および対向基板のうちの一方の第2箇所における配線の欠けは検出されないので、第2箇所における配線の欠けを検出せずに、第1箇所における配線の欠けを検出することができる。   In the liquid crystal display device according to the first aspect, as described above, the detection wiring is arranged in the vicinity of one end side of the element substrate and the counter substrate at the first location where the lack of the wiring is to be detected, In the second location, the detection wiring is arranged inside the vicinity of one end of the element substrate and the counter substrate, so that a substrate crack that reaches the wiring beyond the detection wiring occurs in the first location. In this case, since the detection wiring at the first location is disconnected due to the substrate cracking, it is possible to detect the occurrence of wiring chipping at one of the first location of the element substrate and the counter substrate. On the other hand, in the case where a substrate crack similar to the substrate crack occurring in the first location occurs in the second location, the one of the element substrate and the counter substrate in the second location and the detection wiring Since the width (interval) between them is larger than the width (interval) between one end of the element substrate and the counter substrate at the first location and the detection wiring, the detection wiring at the second location is not disconnected. Thereby, since the chipping of the wiring at one of the element substrate and the counter substrate is not detected, the chipping of the wiring at the first location can be detected without detecting the wiring lacking at the second location. it can.

上記第1の局面による液晶表示装置において、好ましくは、検出配線は、第1箇所では、素子基板および対向基板のうちの一方の端辺近傍に配置されるとともに、第2箇所では、素子基板および対向基板のうちの一方の端辺近傍よりも内側に配置されるとともに、第1箇所から離れるに従って検出配線と素子基板および対向基板のうちの一方の端辺近傍との間の間隔が徐々に大きくなるように構成されている。このように構成すれば、第1箇所から少し離れた場合にも、第2箇所では、第1箇所に比べて、素子基板および対向基板のうちの一方の端辺と検出配線との間の幅(間隔)が大きいので、第1箇所と第2箇所とにおいて基板割れが発生した場合には、第1箇所では検出配線が断線する一方、第2箇所では検出配線が断線しないようにすることができる。   In the liquid crystal display device according to the first aspect, preferably, the detection wiring is disposed in the vicinity of one end side of the element substrate and the counter substrate at the first location, and the element substrate and the detection substrate at the second location. The distance between the detection wiring, the element substrate, and the vicinity of one end of the counter substrate is gradually increased as the distance from the first place is increased. It is comprised so that it may become. If comprised in this way, even if it leaves | separates from the 1st location for a while, compared with the 1st location in the 2nd location, the width | variety between one edge side of an element substrate and an opposing board | substrate and detection wiring Since the (interval) is large, when a substrate crack occurs at the first location and the second location, the detection wiring is disconnected at the first location, while the detection wiring is not disconnected at the second location. it can.

上記第1の局面による液晶表示装置において、好ましくは、素子基板および対向基板は、それぞれ、トランジスタ素子を含む素子基板および対向基板であり、配線は、素子基板の液晶層側の表面と液晶層との間に設けられた共通電位配線を含み、検出配線は、素子基板の液晶層側の表面と液晶層との間の共通電位配線の外周に沿って設けられるとともに、断線したか否かにより少なくとも共通電位配線の欠けを検出可能に構成されており、第1箇所では、共通電位配線および検出配線は、素子基板の端辺近傍に配置され、第2箇所では、共通電位配線および検出配線は、素子基板の端辺近傍よりも内側に配置されている。このように構成すれば、第1箇所において、検出配線を越えて共通電位配線まで届くような素子基板の割れが発生した場合には、素子基板の割れに起因して第1箇所の検出配線が断線するので、素子基板の第1箇所において共通電位配線の欠けが発生したことを検出できる。その一方で、第1箇所において発生した素子基板の割れと同程度の素子基板の割れが第2箇所において発生した場合には、第2箇所における素子基板の端辺と検出配線との間の幅(間隔)が、第1箇所における素子基板の端辺と検出配線との間の幅(間隔)よりも大きいので、第2箇所における検出配線は断線しない。これにより、素子基板の第2箇所における共通電位配線の欠けは検出されないので、第2箇所における共通電位配線の欠けを検出せずに、第1箇所における共通電位配線の欠けを検出することができる。   In the liquid crystal display device according to the first aspect, preferably, the element substrate and the counter substrate are an element substrate and a counter substrate including transistor elements, respectively, and the wiring includes a surface on the liquid crystal layer side of the element substrate, a liquid crystal layer, The detection wiring is provided along the outer periphery of the common potential wiring between the liquid crystal layer side surface of the element substrate and the liquid crystal layer, and at least depending on whether or not the wire is disconnected. The common potential wiring and the detection wiring are arranged in the vicinity of the edge of the element substrate at the first location, and the common potential wiring and the detection wiring at the second location are configured to detect the lack of the common potential wiring. It is arranged inside the vicinity of the edge of the element substrate. With this configuration, when a crack in the element substrate that reaches the common potential wiring beyond the detection wiring occurs in the first location, the detection wiring in the first location is caused by the crack in the element substrate. Since it is disconnected, it can be detected that the common potential wiring is missing at the first location of the element substrate. On the other hand, when a crack in the element substrate that is similar to the crack in the element substrate occurring in the first location occurs in the second location, the width between the edge of the element substrate and the detection wiring in the second location. Since the (interval) is larger than the width (interval) between the edge of the element substrate and the detection wiring at the first location, the detection wiring at the second location is not disconnected. Thereby, since the lack of the common potential wiring at the second location of the element substrate is not detected, the lack of the common potential wiring at the first location can be detected without detecting the lack of the common potential wiring at the second location. .

この場合、好ましくは、素子基板の表面上に設けられたゲート線をさらに備え、ゲート線のうち第1箇所に対応する領域以外の箇所に位置する部分は、ゲート線のうち第1箇所に対応する領域に位置する部分よりも素子基板の第1箇所に対応する端辺より内側に配置されており、共通電位配線は、素子基板の第1箇所に対応する端辺において略均一の幅に形成されるとともに、ゲート線の外周に沿って設けられている。このように構成すれば、第2箇所では、第1箇所に比べて、素子基板の端辺と共通電位配線との間の間隔が大きくなるので、素子基板の端辺と検出配線との間の間隔を大きくすることができる。また、共通電位配線の幅を略均一の幅に形成することによって、第2箇所でも共通電位配線が細くなるので、この場合には、第2箇所でも共通電位配線の欠けを検出するのが好ましい。本発明では、この場合に、第2箇所において素子基板の大きな割れが発生して、共通電位配線の欠けが発生したことを検出配線の断線により検出することができるので、この点でも有利な効果を得ることができる。   In this case, preferably, the device further includes a gate line provided on the surface of the element substrate, and a portion of the gate line that is located in a region other than the region corresponding to the first location corresponds to the first location of the gate line. The common potential wiring is arranged with a substantially uniform width at the end corresponding to the first location of the element substrate, and is disposed on the inner side of the end corresponding to the first location of the element substrate. And provided along the outer periphery of the gate line. With this configuration, the distance between the edge of the element substrate and the common potential wiring is larger in the second location than in the first location. The interval can be increased. In addition, since the common potential wiring becomes thin even at the second location by forming the width of the common potential wiring to be substantially uniform, in this case, it is preferable to detect the lack of the common potential wiring also at the second location. . According to the present invention, in this case, it is possible to detect the occurrence of the common potential wiring chipping due to a large crack in the element substrate at the second location, which is advantageous in this respect as well. Can be obtained.

上記素子基板の表面上にゲート線が設けられた液晶表示装置において、好ましくは、ゲート線は、第1箇所から離れるに従って素子基板の端辺との間隔が徐々に大きくなるように構成されており、ゲート線の外周に沿って設けられた共通電位配線は、第1箇所から離れるに従って素子基板の端辺との間隔が徐々に大きくなるように構成されている。このように構成すれば、第1箇所から少し離れた場合にも、第2箇所では、第1箇所に比べて、素子基板の端辺と共通電位配線との間の間隔が大きくなるので、素子基板の端辺と検出配線との間の間隔を大きくすることができる。   In the liquid crystal display device in which the gate line is provided on the surface of the element substrate, the gate line is preferably configured such that the distance from the edge of the element substrate gradually increases as the distance from the first location increases. The common potential wiring provided along the outer periphery of the gate line is configured such that the distance from the edge of the element substrate gradually increases as the distance from the first location increases. With this configuration, even when the distance from the first location is a little, the distance between the edge of the element substrate and the common potential wiring is larger in the second location than in the first location. The distance between the edge of the substrate and the detection wiring can be increased.

上記共通電位配線を含む配線を備える液晶表示装置において、好ましくは、検出配線の幅は、共通電位配線の幅以下である。このように構成すれば、検出配線の幅が共通電位配線の幅よりも大きい場合と比べて、検出配線が断線し易くなるので、共通電位配線が欠けたことを検出し易くすることができる。   In the liquid crystal display device including the wiring including the common potential wiring, preferably, the width of the detection wiring is equal to or smaller than the width of the common potential wiring. With this configuration, the detection wiring can be easily disconnected as compared with the case where the width of the detection wiring is larger than the width of the common potential wiring, so that it is possible to easily detect the lack of the common potential wiring.

上記共通電位配線を含む配線を備える液晶表示装置において、好ましくは、対向基板の表面積は、素子基板の表面積よりも小さく形成されており、検出しようとする第1箇所は、平面的に見て、対向基板の角部と素子基板の表面とが重なる領域近傍である。このように構成すれば、対向基板の角部と素子基板の表面とが重なる領域近傍における検出配線の割れおよび共通電位配線の欠けを検出することができる。   In the liquid crystal display device including the wiring including the common potential wiring, preferably, the surface area of the counter substrate is formed smaller than the surface area of the element substrate, and the first location to be detected is seen in a plan view. In the vicinity of the region where the corner of the counter substrate and the surface of the element substrate overlap. With this configuration, it is possible to detect cracks in the detection wiring and chipping of the common potential wiring in the vicinity of the region where the corner portion of the counter substrate and the surface of the element substrate overlap.

上記第1の局面による液晶表示装置において、好ましくは、検出配線は、断線したか否かにより、配線の欠けのみならず、素子基板および対向基板のうちの一方の割れをも検査可能に構成されている。このように構成すれば、配線の欠けと、素子基板および対向基板のうちの一方の割れとの検査を1つの検出配線を用いて兼用することができるので、検出配線の本数が増加するのを抑制することができる。   In the liquid crystal display device according to the first aspect described above, preferably, the detection wiring is configured to be able to inspect not only chipping of the wiring but also one of the element substrate and the counter substrate depending on whether or not the wire is disconnected. ing. With this configuration, the inspection of the chipping of the wiring and the crack of one of the element substrate and the counter substrate can be combined using one detection wiring, so that the number of detection wirings can be increased. Can be suppressed.

この発明の第2の局面による電子機器は、上記のいずれかの構成を有する液晶表示装置を備える。このように構成すれば、第2箇所における配線の欠けを検出せずに、第1箇所における配線の欠けを検出することが可能な液晶表示装置を備えた電子機器を得ることができる。   An electronic apparatus according to a second aspect of the present invention includes a liquid crystal display device having any one of the configurations described above. If comprised in this way, the electronic device provided with the liquid crystal display device which can detect the lack of the wiring in a 1st location, without detecting the lack of the wiring in a 2nd location can be obtained.

本実施形態による液晶表示装置の斜視図である。It is a perspective view of the liquid crystal display device by this embodiment. 本実施形態による液晶表示装置の分解斜視図である。It is a disassembled perspective view of the liquid crystal display device by this embodiment. 本実施形態による液晶表示装置の上面側から見た平面図である。It is the top view seen from the upper surface side of the liquid crystal display device by this embodiment. 本実施形態による液晶表示装置の等価回路図である。FIG. 3 is an equivalent circuit diagram of the liquid crystal display device according to the present embodiment. 本実施形態による液晶表示装置の検査対象箇所において基板割れが発生した場合を示した図である。It is the figure which showed the case where the board | substrate crack generate | occur | produced in the test object location of the liquid crystal display device by this embodiment. 本実施形態による液晶表示装置の検査非対象箇所(検査対象箇所以外の箇所)において基板割れが発生した場合を示した図である。It is the figure which showed the case where the board | substrate crack generate | occur | produced in the non-inspection location (locations other than an inspection location) of the liquid crystal display device by this embodiment. 本実施形態による液晶表示装置の検査非対象箇所(検査対象箇所以外の箇所)において大きな基板割れが発生した場合を示した図である。It is the figure which showed the case where the big board | substrate crack generate | occur | produced in the non-inspection location (locations other than an inspection location) of the liquid crystal display device by this embodiment. 本実施形態による液晶表示装置を用いた電子機器の第1の例を説明するための図である。It is a figure for demonstrating the 1st example of the electronic device using the liquid crystal display device by this embodiment. 本実施形態による液晶表示装置を用いた電子機器の第2の例を説明するための図である。It is a figure for demonstrating the 2nd example of the electronic device using the liquid crystal display device by this embodiment. 本実施形態による液晶表示装置を用いた電子機器の第3の例を説明するための図である。It is a figure for demonstrating the 3rd example of the electronic device using the liquid crystal display device by this embodiment. 本実施形態による液晶表示装置の変形例を説明するための図である。It is a figure for demonstrating the modification of the liquid crystal display device by this embodiment.

以下、本発明の実施形態を図面に基づいて説明する。   Hereinafter, embodiments of the present invention will be described with reference to the drawings.

図1〜図4を参照して、本発明の一実施形態による液晶表示装置100の構成について説明する。   With reference to FIGS. 1-4, the structure of the liquid crystal display device 100 by one Embodiment of this invention is demonstrated.

本発明の一実施形態による液晶表示装置100は、図1および図2に示すように、ガラスからなるTFT基板1と、TFT基板1に対向するように配置されるとともに、ガラスからなる対向基板2とを備えている。なお、TFT基板1は、本発明の「素子基板」の一例である。また、TFT基板1および対向基板2は、平面的に見て、略矩形形状を有している。また、TFT基板1の表面上には、後述するTFT14が形成されている。なお、TFT14は、本発明の「トランジスタ素子」の一例である。また、対向基板2の表面積は、TFT基板1の表面積よりも小さく形成されている。また、TFT基板1と対向基板2との間には、図示しない液晶層が封入されている。また、TFT基板1および対向基板2は、略矩形形状の表示領域3を有している。   As shown in FIGS. 1 and 2, a liquid crystal display device 100 according to an embodiment of the present invention is disposed so as to face the TFT substrate 1 made of glass and the counter substrate 2 made of glass. And. The TFT substrate 1 is an example of the “element substrate” in the present invention. Further, the TFT substrate 1 and the counter substrate 2 have a substantially rectangular shape when seen in a plan view. Further, a TFT 14 described later is formed on the surface of the TFT substrate 1. The TFT 14 is an example of the “transistor element” in the present invention. Further, the surface area of the counter substrate 2 is smaller than the surface area of the TFT substrate 1. A liquid crystal layer (not shown) is enclosed between the TFT substrate 1 and the counter substrate 2. Further, the TFT substrate 1 and the counter substrate 2 have a substantially rectangular display region 3.

また、図3に示すように、TFT基板1の表示領域3に対応する領域には、X方向に沿って延びる複数のゲート線4と、Y方向に沿って延びる複数のデータ線5とが設けられている。また、ゲート線4とデータ線5とが交差する領域には、副画素6が設けられている。   As shown in FIG. 3, a plurality of gate lines 4 extending along the X direction and a plurality of data lines 5 extending along the Y direction are provided in a region corresponding to the display region 3 of the TFT substrate 1. It has been. A subpixel 6 is provided in a region where the gate line 4 and the data line 5 intersect.

また、TFT基板1の表示領域3に対応する領域の外周には、ゲート線4と同一層からなるとともに、ゲート線4と電気的に接続されたY方向に沿って延びるゲート線7が設けられている。また、ゲート線7は、複数本のゲート線を含むとともに、検査対象箇所からY1方向に離れるに従って本数が減るように構成されている。なお、検査対象箇所は、本発明の「第1箇所」の一例である。また、ゲート線7のX1方向、X2方向およびY1方向側の外周には、ゲート線7と所定の間隔を隔てて、共通電位配線8(Vcom配線)が設けられている。なお、共通電位配線8は、本発明の「配線」の一例である。この共通電位配線8は、約5μm以上約50μm以下の幅を有する。また、共通電位配線8のX1方向、X2方向およびY1方向側の外周には、共通電位配線8と約5μm以上約50μm以下の間隔を隔てて、金属配線からなる検出配線9が設けられている。また、検出配線9は、約5μm以上約50μm以下の幅を有する。また、検出配線9は、検出配線9が断線したか否かを判断することにより、共通電位配線8の欠けおよびTFT基板1の割れを検出するために設けられている。また、検出配線9の幅は、共通電位配線8の幅以下である。   Further, on the outer periphery of the region corresponding to the display region 3 of the TFT substrate 1, a gate line 7 is provided which is made of the same layer as the gate line 4 and extends along the Y direction electrically connected to the gate line 4. ing. Further, the gate line 7 includes a plurality of gate lines, and is configured such that the number decreases as the distance from the inspection target portion in the Y1 direction. The inspection target location is an example of the “first location” in the present invention. Further, a common potential wiring 8 (Vcom wiring) is provided on the outer periphery of the gate line 7 in the X1 direction, X2 direction, and Y1 direction side with a predetermined distance from the gate line 7. The common potential wiring 8 is an example of the “wiring” in the present invention. The common potential wiring 8 has a width of about 5 μm or more and about 50 μm or less. On the outer periphery of the common potential wiring 8 in the X1 direction, X2 direction, and Y1 direction side, a detection wiring 9 made of a metal wiring is provided at a distance of about 5 μm or more and about 50 μm or less from the common potential wiring 8. . The detection wiring 9 has a width of about 5 μm or more and about 50 μm or less. In addition, the detection wiring 9 is provided to detect the lack of the common potential wiring 8 and the crack of the TFT substrate 1 by determining whether or not the detection wiring 9 is disconnected. Further, the width of the detection wiring 9 is equal to or smaller than the width of the common potential wiring 8.

ここで、本実施形態では、共通電位配線8の欠けおよびTFT基板1の割れを検出しようとする検査対象箇所は、平面的に見て、対向基板2の角部とTFT基板1の表面とが重なる領域近傍の箇所(共通電位配線8およびTFT基板1)である。なお、対向基板2の角部とTFT基板1の表面とが重なる領域近傍の箇所では、TFT基板1および対向基板2が割れやすいとともに、TFT基板1および対向基板2の割れに伴って共通電位配線8が欠けやすい。このため、対向基板2の角部とTFT基板1の表面とが重なる領域近傍の箇所を検査対象箇所とした。また、共通電位配線8(TFT基板1)の検査対象箇所のY1方向側の箇所(検査対象箇所以外の箇所)は、共通電位配線8の欠けおよびTFT基板1の割れの検出の対象箇所ではない検査非対象箇所である。なお、検査対象箇所以外の箇所は、本発明の「第2箇所」の一例である。   Here, in the present embodiment, the inspection target portion to detect the lack of the common potential wiring 8 and the crack of the TFT substrate 1 has a corner portion of the counter substrate 2 and the surface of the TFT substrate 1 in plan view. This is a location (common potential wiring 8 and TFT substrate 1) in the vicinity of the overlapping region. It should be noted that the TFT substrate 1 and the counter substrate 2 are easily cracked at a location in the vicinity of the region where the corner portion of the counter substrate 2 and the surface of the TFT substrate 1 overlap, and the common potential wiring is accompanied by the crack of the TFT substrate 1 and the counter substrate 2. 8 is easily missing. For this reason, a location in the vicinity of a region where the corner portion of the counter substrate 2 and the surface of the TFT substrate 1 overlap each other is set as an inspection target location. Also, the Y1 direction side location (location other than the location to be inspected) of the location to be inspected of the common potential wiring 8 (TFT substrate 1) is not the location to be detected for the lack of the common potential wiring 8 and the crack of the TFT substrate 1. This is a non-inspection location. The place other than the inspection target place is an example of the “second place” in the present invention.

また、ゲート線7のうち検査非対象箇所(検査対象箇所以外の箇所)に対応する部分は、ゲート線7のうち検査対象箇所に対応する部分よりもTFT基板1の端辺1aに対して内側に設けられている。具体的には、ゲート線7は、TFT基板1の検査対象箇所からY1方向側に離れるに従って内側(表示領域3側)に先細るように設けられている。これにより、TFT基板1の検査対象箇所からY1方向側に離れるに従って、ゲート線7とTFT基板1の端辺1aとの間の間隔がX方向に徐々に大きくなるように構成されている。   Further, the portion of the gate line 7 corresponding to the non-inspection portion (the portion other than the inspection target portion) is located on the inner side of the edge 1a of the TFT substrate 1 than the portion of the gate line 7 corresponding to the inspection target portion. Is provided. Specifically, the gate line 7 is provided so as to taper inwardly (in the display region 3 side) as it moves away from the inspection target portion of the TFT substrate 1 in the Y1 direction side. As a result, the distance between the gate line 7 and the edge 1a of the TFT substrate 1 is gradually increased in the X direction as the distance from the inspection target portion of the TFT substrate 1 toward the Y1 direction is increased.

また、共通電位配線8は、略均一の幅に形成されている。また、共通電位配線8のうち検査非対象箇所(検査対象箇所以外の箇所)に対応する部分は、共通電位配線8のうち検査対象箇所に対応する部分よりもTFT基板1の端辺1aに対して内側に配置されている。具体的には、共通電位配線8は、TFT基板1の検査対象箇所からY1方向側に離れるに従って内側(表示領域3側)に入り込むように配置されている。これにより、TFT基板1の検査対象箇所からY1方向側に離れるに従って、共通電位配線8とTFT基板1の端辺1aとの間の間隔がX方向に徐々に大きくなるように構成されている。   Further, the common potential wiring 8 is formed with a substantially uniform width. In addition, a portion of the common potential wiring 8 corresponding to a non-inspection portion (a portion other than the inspection target portion) is closer to the edge 1a of the TFT substrate 1 than a portion of the common potential wiring 8 corresponding to the inspection target portion. Is placed inside. Specifically, the common potential wiring 8 is arranged so as to enter the inner side (display area 3 side) as it is away from the inspection target portion of the TFT substrate 1 in the Y1 direction side. Thus, the distance between the common potential wiring 8 and the edge 1a of the TFT substrate 1 is gradually increased in the X direction as the distance from the inspection target portion of the TFT substrate 1 toward the Y1 direction is increased.

また、本実施形態では、検出配線9は、共通電位配線8の欠けおよびTFT基板1の割れを検出しようとする検査対象箇所では、TFT基板1の端辺1a近傍に配置されている。また、検出配線9は、共通電位配線8の欠けおよびTFT基板1の割れの検出の対象箇所ではない検査非対象箇所(検査対象箇所以外の箇所)では、TFT基板1の端辺1a近傍よりも内側に設けられている。具体的には、検出配線9は、TFT基板1の検査対象箇所からY1方向側に離れるに従って内側(表示領域3側)に入り込むように配置されている。これにより、TFT基板1の検査対象箇所からY1方向側に離れるに従って、検出配線9とTFT基板1の端辺1a近傍との間の間隔がX方向に徐々に大きくなるように構成されている。また、検出配線9は、検査対象箇所と検査非対象箇所とを接続する領域において、直線状に形成されている。   Further, in the present embodiment, the detection wiring 9 is disposed in the vicinity of the edge 1 a of the TFT substrate 1 at an inspection target location where the lack of the common potential wiring 8 and the crack of the TFT substrate 1 are to be detected. Further, the detection wiring 9 is located at a non-inspection location (location other than the location to be inspected) that is not a target location for detection of chipping of the common potential wiring 8 and cracking of the TFT substrate 1 than in the vicinity of the edge 1a of the TFT substrate 1. It is provided inside. Specifically, the detection wiring 9 is arranged so as to enter the inner side (display area 3 side) as it moves away from the inspection target portion of the TFT substrate 1 in the Y1 direction side. Thus, the distance between the detection wiring 9 and the vicinity of the edge 1a of the TFT substrate 1 is gradually increased in the X direction as the distance from the inspection target portion of the TFT substrate 1 toward the Y1 direction is increased. Further, the detection wiring 9 is formed in a straight line in a region connecting the inspection target portion and the inspection non-target portion.

また、TFT基板1の表面上には、液晶表示装置100を駆動させるための駆動用IC10が設けられている。この駆動用IC10は、ゲート線7、共通電位配線8および検出配線9と接続されるとともに、種々の駆動信号を出力するように構成されている。また、駆動用IC10は、ゲート線4に駆動信号を出力するための後述するゲート線駆動回路11、および、データ線5に駆動信号を出力するための後述するデータ線駆動回路12とを含んでいる。また、TFT基板1の表面上には、電子機器本体と接続するためのコネクタが実装されたFPC13(Flexible Printed Circuits)が設けられている。   A driving IC 10 for driving the liquid crystal display device 100 is provided on the surface of the TFT substrate 1. The driving IC 10 is connected to the gate line 7, the common potential wiring 8, and the detection wiring 9, and is configured to output various driving signals. The driving IC 10 includes a gate line driving circuit 11 to be described later for outputting a driving signal to the gate line 4 and a data line driving circuit 12 to be described later for outputting a driving signal to the data line 5. Yes. Further, on the surface of the TFT substrate 1, an FPC 13 (Flexible Printed Circuits) on which a connector for connecting to the electronic device main body is mounted is provided.

また、図4に示すように、副画素6は、TFT14(Thin Film Transistor)、副画素6毎に形成された画素電極15、表示領域3全域に形成された共通電極16および画素電極15の電圧を保持するための保持容量17から構成されている。また、TFT14は、ソース電極14a、ドレイン電極14bおよびゲート電極14cから構成されている。ソース電極14aは、データ線5に接続されている。データ線5は、データ線駆動回路12に接続されている。また、ゲート電極14cは、ゲート線4に接続されている。ゲート線4(ゲート線7)は、ゲート線駆動回路11に接続されている。また、ドレイン電極14bは、画素電極15および保持容量17の一方電極に接続されている。また、共通電極16は、液晶層を挟んで画素電極15に対向するように設けられている。共通電極16は、共通電位配線8に接続されている。また、保持容量17の他方電極は、保持容量線18に接続されている。   Further, as shown in FIG. 4, the sub-pixel 6 includes a TFT 14 (Thin Film Transistor), a pixel electrode 15 formed for each sub-pixel 6, a voltage of the common electrode 16 and the pixel electrode 15 formed over the entire display region 3. It is comprised from the storage capacity | capacitance 17 for hold | maintaining. The TFT 14 includes a source electrode 14a, a drain electrode 14b, and a gate electrode 14c. The source electrode 14 a is connected to the data line 5. The data line 5 is connected to the data line driving circuit 12. The gate electrode 14 c is connected to the gate line 4. The gate line 4 (gate line 7) is connected to the gate line driving circuit 11. The drain electrode 14 b is connected to one electrode of the pixel electrode 15 and the storage capacitor 17. The common electrode 16 is provided so as to face the pixel electrode 15 with the liquid crystal layer interposed therebetween. The common electrode 16 is connected to the common potential wiring 8. The other electrode of the storage capacitor 17 is connected to the storage capacitor line 18.

次に、図5および図6を参照して、共通電位配線8の欠けの検出方法について説明する。   Next, with reference to FIG. 5 and FIG. 6, a method for detecting the lack of the common potential wiring 8 will be described.

まず、TFT基板1と対向基板2とを貼り合わせた後のパネル検査時において、検出配線9の両端部に診断用の配線などを接続するとともに、検出配線9が導通するか否かを確認する。なお、TFT基板1に駆動用IC10を実装する前の場合には、検出配線9の各々に診断用のプローブを当てて、検出配線9が導通しているか否かを検査するとよい。また、TFT基板1に駆動用IC10およびFPC13を実装した後の場合には、FPC13を介して駆動用IC10に信号を出力することにより、駆動用IC10に内蔵されている診断機能によって、検出配線9が導通しているか否かを検査可能である。そして、図5に示すように、TFT基板1の検査対象箇所において、検出配線9を越えて共通電位配線8にまで届くような基板割れが発生した場合には、検出配線9が断線するため、検出配線9は導通しない状態になる。これにより、共通電位配線8が欠けた状態であると判断される。この場合には、パネルは不良品であると判断される。   First, at the time of panel inspection after the TFT substrate 1 and the counter substrate 2 are bonded together, diagnostic wiring or the like is connected to both ends of the detection wiring 9 and whether or not the detection wiring 9 is conductive is confirmed. . In addition, before mounting the driving IC 10 on the TFT substrate 1, it is preferable to apply a diagnostic probe to each of the detection wirings 9 to inspect whether the detection wirings 9 are conductive. When the driving IC 10 and the FPC 13 are mounted on the TFT substrate 1, the detection wiring 9 is output by a diagnostic function built in the driving IC 10 by outputting a signal to the driving IC 10 through the FPC 13. It is possible to inspect whether or not is conducting. As shown in FIG. 5, when a substrate crack that reaches the common potential wiring 8 beyond the detection wiring 9 occurs in the inspection target portion of the TFT substrate 1, the detection wiring 9 is disconnected. The detection wiring 9 is not conductive. As a result, it is determined that the common potential wiring 8 is missing. In this case, the panel is determined to be defective.

また、図6に示すように、TFT基板1の検査非対象箇所(検査対象箇所以外の箇所)において、上記した検査対象箇所に発生したTFT基板1の割れと同程度の基板割れが発生した場合には、検出配線9は断線していないため、検出配線9は接続されたままの状態である。すなわち、検査非対象箇所に検査対象箇所と同程度の基板割れが生じてもパネルは良品であると判断される。   In addition, as shown in FIG. 6, in the case where a substrate crack similar to the crack of the TFT substrate 1 generated in the inspection target portion described above occurs in the inspection non-target portion (location other than the inspection target portion) of the TFT substrate 1. In this case, since the detection wiring 9 is not disconnected, the detection wiring 9 remains connected. In other words, the panel is determined to be a non-defective product even if a substrate crack similar to the inspection target portion occurs in the non-inspection target portion.

なお、共通電位配線8の幅が均一ではなく、検査対象箇所からY1方向に離れるに従って、共通電位配線8の幅が徐々に大きくなる場合では、検査非対象箇所において、共通電位配線8の幅が大きい分、共通電位配線8の欠けを検出する必要がない。つまり、検査対象箇所における共通電位配線8の幅が最小となるため、検査対象箇所における共通電位配線8の欠けを検出する必要がある。一方、共通電位配線8の幅を略均一の幅に形成する場合では、検査対象箇所以外の箇所(検査非対象箇所)でも共通電位配線8が細くなるので、検査非対象箇所でも共通電位配線8の欠けを検出するのが好ましい。たとえば、図7に示すように、検査非対象箇所において、検出配線9を越えて共通電位配線8にまで届くような、上記検査対象箇所に発生したTFT基板1の割れ(図5参照)よりも大きな基板割れが発生した場合には、検出配線9が断線するため、検出配線9は導通しない状態になる。これにより、共通電位配線8が欠けた状態であると判断される。この場合にも、パネルは不良品であると判断される。   In the case where the width of the common potential wiring 8 is not uniform and the width of the common potential wiring 8 gradually increases as the distance from the inspection target portion in the Y1 direction, the width of the common potential wiring 8 is increased in the non-inspection portion. It is not necessary to detect the lack of the common potential wiring 8 because of the large size. That is, since the width of the common potential wiring 8 at the inspection target location is minimized, it is necessary to detect the lack of the common potential wiring 8 at the inspection target location. On the other hand, in the case where the common potential wiring 8 is formed to have a substantially uniform width, the common potential wiring 8 is thin even at a place other than the inspection target part (non-inspection target part). It is preferable to detect chipping. For example, as shown in FIG. 7, in the inspection non-target portion, the cracks of the TFT substrate 1 generated in the inspection target portion that reach the common potential wiring 8 beyond the detection wiring 9 (see FIG. 5). When a large substrate crack occurs, the detection wiring 9 is disconnected, so that the detection wiring 9 is not conductive. As a result, it is determined that the common potential wiring 8 is missing. Also in this case, the panel is determined to be defective.

本実施形態では、上記のように、共通電位配線8の欠けを検出しようとする検査対象箇所では、検出配線9を、TFT基板1の端辺1a近傍に配置し、検査対象箇所以外の箇所では、検出配線9を、TFT基板1の端辺1a近傍よりも内側に配置することによって、検査対象箇所において、検出配線9を越えて共通電位配線8まで届くような基板割れが発生した場合には、基板割れに起因して検査対象箇所の検出配線9が断線するので、TFT基板1の検査対象箇所において共通電位配線8の欠けが発生したことを検出することができる。その一方で、検査対象箇所において発生した基板割れと同程度の基板割れが検査非対象箇所(検査対象箇所以外の箇所)において発生した場合には、検査対象箇所以外の箇所におけるTFT基板1の端辺1aと検出配線9との間の幅(間隔)が、検査対象箇所におけるTFT基板1の端辺1aと検出配線9との間の幅(間隔)よりも大きいので、検査非対象箇所における検出配線9は断線しない。これにより、TFT基板1の検査非対象箇所における共通電位配線8の欠けは検出されないので、検査非対象箇所における共通電位配線8の欠けを検出せずに、検査対象箇所における共通電位配線8の欠けを検出することができる。   In the present embodiment, as described above, the detection wiring 9 is arranged in the vicinity of the edge 1a of the TFT substrate 1 in the inspection target portion where the lack of the common potential wiring 8 is to be detected, and in the portion other than the inspection target portion. When the detection wiring 9 is arranged inside the vicinity of the edge 1a of the TFT substrate 1 and a substrate crack occurs so as to reach the common potential wiring 8 beyond the detection wiring 9 in the inspection target portion. Since the detection wiring 9 at the inspection target location is disconnected due to the substrate cracking, it can be detected that the common potential wiring 8 is missing at the inspection target location of the TFT substrate 1. On the other hand, when a substrate crack of the same degree as a substrate crack occurring in the inspection target portion occurs in a non-inspection portion (a portion other than the inspection target portion), the edge of the TFT substrate 1 in a portion other than the inspection target portion Since the width (interval) between the side 1a and the detection wiring 9 is larger than the width (interval) between the end side 1a of the TFT substrate 1 and the detection wiring 9 at the inspection target location, the detection at the non-inspection target location is performed. The wiring 9 is not disconnected. As a result, the lack of the common potential wiring 8 in the non-inspection location of the TFT substrate 1 is not detected, so the lack of the common potential wiring 8 in the non-inspection location is not detected, and the lack of the common potential wiring 8 in the inspection location. Can be detected.

また、本実施形態では、上記のように、検査対象箇所から離れるに従って検出配線9とTFT基板1の端辺1a近傍との間の間隔を徐々に大きくすることによって、検査対象箇所から少し離れた場合にも、検査非対象箇所では、検査対象箇所に比べて、TFT基板1の端辺1aと検出配線9との間の幅(間隔)が大きいので、検査対象箇所と検査非対象箇所とにおいて基板割れが発生した場合には、検査対象箇所では検出配線9が断線する一方、検査非対象箇所では検出配線9が断線しないようにすることができる。また、共通電位配線8の幅を略均一の幅に形成することによって、検査対象箇所以外の箇所(検査非対象箇所)でも共通電位配線8が細くなるので、この場合には、検査非対象箇所でも共通電位配線8の欠けを検出するのが好ましい。本発明では、この場合に、検査非対象箇所においてTFT基板1の大きな割れが発生して、共通電位配線8の欠けが発生したことを検出配線9の断線により検出することができるので、この点でも有利な効果を得ることができる。   Further, in the present embodiment, as described above, the distance between the detection wiring 9 and the vicinity of the edge 1a of the TFT substrate 1 is gradually increased as the distance from the inspection target portion increases, so that the distance from the inspection target portion is slightly increased. Even in this case, the width (interval) between the edge 1a of the TFT substrate 1 and the detection wiring 9 is larger in the inspection non-target portion than in the inspection target portion. When a substrate crack occurs, it is possible to prevent the detection wiring 9 from being disconnected at the inspection target portion while the detection wiring 9 is not disconnected from the inspection non-target portion. Further, by forming the common potential wiring 8 so as to have a substantially uniform width, the common potential wiring 8 is thinned at a portion other than the inspection target portion (non-inspection portion). However, it is preferable to detect the lack of the common potential wiring 8. According to the present invention, in this case, it is possible to detect the occurrence of a large crack in the TFT substrate 1 at a non-inspected location and the occurrence of the chipping of the common potential wiring 8 by the disconnection of the detection wiring 9. However, an advantageous effect can be obtained.

また、本実施形態では、上記のように、共通電位配線8を、TFT基板1の検査対象箇所に対応する端辺1aにおいて略均一の幅に形成するとともに、ゲート線7の外周に沿って設けることによって、検査非対象箇所では、検査対象箇所に比べて、TFT基板1の端辺1aと共通電位配線8との間の間隔が大きくなるので、TFT基板1の端辺1aと検出配線9との間の間隔を大きくすることができる。   Further, in the present embodiment, as described above, the common potential wiring 8 is formed to have a substantially uniform width on the edge 1 a corresponding to the inspection target portion of the TFT substrate 1, and is provided along the outer periphery of the gate line 7. As a result, the distance between the edge 1a of the TFT substrate 1 and the common potential wiring 8 is larger in the non-inspection area than in the inspection object area, so that the edge 1a of the TFT substrate 1 and the detection wiring 9 The interval between can be increased.

また、本実施形態では、上記のように、ゲート線7を、検査対象箇所から離れるに従ってTFT基板1の端辺1aとの間隔が徐々に大きくなるように構成し、ゲート線7の外周に沿って設けられた共通電位配線8を、検査対象箇所から離れるに従ってTFT基板1の端辺1aとの間隔が徐々に大きくなるように構成することによって、検査対象箇所から少し離れた場合にも、検査非対象箇所では、検査対象箇所に比べて、TFT基板1の端辺1aと共通電位配線8との間の間隔が大きくなるので、TFT基板1の端辺1aと検出配線9との間の間隔を大きくすることができる。   Further, in the present embodiment, as described above, the gate line 7 is configured such that the distance from the edge 1a of the TFT substrate 1 gradually increases as the distance from the inspection target portion increases, and along the outer periphery of the gate line 7 The common potential wiring 8 provided in this manner is configured such that the distance from the edge 1a of the TFT substrate 1 gradually increases as the distance from the inspection target portion increases, so that even when the inspection target portion is slightly away from the inspection target portion, the inspection is performed. Since the distance between the edge 1a of the TFT substrate 1 and the common potential wiring 8 is larger in the non-target area than in the inspection object area, the distance between the edge 1a of the TFT substrate 1 and the detection wiring 9 is larger. Can be increased.

また、本実施形態では、上記のように、検出配線9の幅を、共通電位配線8の幅以下にすることによって、検出配線9の幅が共通電位配線8の幅よりも大きい場合と比べて、検出配線9が断線し易くなるので、共通電位配線8が欠けたことを検出し易くすることができる。   Further, in the present embodiment, as described above, the width of the detection wiring 9 is set to be equal to or less than the width of the common potential wiring 8 as compared with the case where the width of the detection wiring 9 is larger than the width of the common potential wiring 8. Since the detection wiring 9 can be easily disconnected, it can be easily detected that the common potential wiring 8 is missing.

また、本実施形態では、上記のように、検出しようとする検査対象箇所を、平面的に見て、対向基板2の角部とTFT基板1の表面とが重なる領域近傍にすることによって、対向基板2の角部とTFT基板1の表面とが重なる領域近傍における検出配線9の割れおよび共通電位配線8の欠けを検出することができる。   Further, in the present embodiment, as described above, the inspection target portion to be detected is positioned in the vicinity of the region where the corner portion of the counter substrate 2 and the surface of the TFT substrate 1 overlap in a plan view. It is possible to detect cracks in the detection wiring 9 and chipping of the common potential wiring 8 in the vicinity of the region where the corner of the substrate 2 and the surface of the TFT substrate 1 overlap.

また、本実施形態では、上記のように、検出配線9を、断線したか否かにより、共通電位配線8の欠けのみならず、TFT基板1の割れをも検査可能に構成することによって、共通電位配線8の欠けと、TFT基板1の割れとの検査を1つの検出配線9を用いて兼用することができるので、検出配線9の本数が増加するのを抑制することができる。   Further, in the present embodiment, as described above, the detection wiring 9 is configured to be able to inspect not only the lack of the common potential wiring 8 but also the crack of the TFT substrate 1 depending on whether or not the detection wiring 9 is disconnected. Since the inspection of the chipping of the potential wiring 8 and the crack of the TFT substrate 1 can be shared by using one detection wiring 9, it is possible to suppress an increase in the number of the detection wirings 9.

図8〜図10は、それぞれ、上記した本実施形態による液晶表示装置100を用いた電子機器の第1の例〜第3の例を説明するための図である。図8〜図10を参照して、本実施形態による液晶表示装置100を用いた電子機器について説明する。   8 to 10 are diagrams for explaining first to third examples of electronic equipment using the liquid crystal display device 100 according to the present embodiment. The electronic apparatus using the liquid crystal display device 100 according to the present embodiment will be described with reference to FIGS.

本実施形態による液晶表示装置100は、図8〜図10に示すように、第1の例としてのPC(Personal Computer)200、第2の例としての携帯電話300、および、第3の例としての情報携帯端末400(PDA:Personal Digital Assistants)などに用いることが可能である。   As shown in FIGS. 8 to 10, the liquid crystal display device 100 according to the present embodiment includes a PC (Personal Computer) 200 as a first example, a mobile phone 300 as a second example, and a third example. It can be used for the personal digital assistant 400 (PDA: Personal Digital Assistants).

図8の第1の例によるPC200においては、キーボードなどの入力部210および表示画面220などに本実施形態による液晶表示装置100を用いることが可能である。図9の第2の例による携帯電話300においては、表示画面310に本実施形態による液晶表示装置100が用いられる。図10の第3の例による情報携帯端末400においては、表示画面410に本実施形態による液晶表示装置100が用いられる。   In the PC 200 according to the first example of FIG. 8, the liquid crystal display device 100 according to the present embodiment can be used for the input unit 210 such as a keyboard and the display screen 220. In the mobile phone 300 according to the second example of FIG. 9, the liquid crystal display device 100 according to the present embodiment is used for the display screen 310. In the information portable terminal 400 according to the third example of FIG. 10, the liquid crystal display device 100 according to the present embodiment is used for the display screen 410.

なお、今回開示された実施形態は、すべての点で例示であって制限的なものではないと考えられるべきである。本発明の範囲は、上記した実施形態の説明ではなく特許請求の範囲によって示され、さらに特許請求の範囲と均等の意味および範囲内でのすべての変更が含まれる。   The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is shown not by the above description of the embodiments but by the scope of claims for patent, and further includes all modifications within the meaning and scope equivalent to the scope of claims for patent.

たとえば、上記実施形態では、検査対象箇所から離れるに従って検出配線とTFT基板の端辺近傍との間の間隔が徐々に大きくなる例を示したが、本発明はこれに限らない。本発明では、検査対象箇所では検出配線がTFT基板の端辺近傍に配置されるとともに、検査非対象箇所では検出配線がTFT基板の端辺よりも内側に配置されていればよい。たとえば、検出配線を曲線状に形成してもよいし、検出配線を階段状に形成してもよい。   For example, in the above-described embodiment, the example in which the distance between the detection wiring and the vicinity of the edge of the TFT substrate gradually increases as the distance from the inspection target portion is shown, but the present invention is not limited to this. In the present invention, the detection wiring is disposed near the edge of the TFT substrate at the inspection target portion, and the detection wiring may be disposed inside the edge of the TFT substrate at the non-inspection portion. For example, the detection wiring may be formed in a curved shape, or the detection wiring may be formed in a staircase shape.

また、上記実施形態では、共通電位配線の幅を略均一に形成する例を示したが、本発明はこれに限らない。たとえば、図11に示す変形例のように、共通電位配線の幅をY1方向に沿って徐々に大きくなるように形成してもよい。ただし、共通電位配線のうち検査非対象箇所に対応する部分は、共通電位配線のうち検査対象箇所に対応する部分よりもTFT基板の端辺に対して内側に配置する。   In the above embodiment, the example in which the width of the common potential wiring is formed to be substantially uniform has been described. However, the present invention is not limited to this. For example, as in the modification shown in FIG. 11, the width of the common potential wiring may be gradually increased along the Y1 direction. However, the portion corresponding to the non-inspection portion of the common potential wiring is disposed on the inner side of the end side of the TFT substrate than the portion corresponding to the inspection target portion of the common potential wiring.

また、上記実施形態では、本発明の欠けを検出する配線の一例として共通電位配線を適用する例を示したが、本発明はこれに限らない。たとえば、本発明の欠けを検出する配線の一例として共通電位配線以外の配線に適用してもよい。   Moreover, although the example which applies a common potential wiring as an example of the wiring which detects the lack of this invention was shown in the said embodiment, this invention is not limited to this. For example, the present invention may be applied to a wiring other than the common potential wiring as an example of the wiring for detecting a defect.

また、上記実施形態では、検出配線の幅を共通電位配線の幅以下に形成する例を示したが、本発明はこれに限らない。たとえば、検出配線の幅を共通電位配線の幅より大きくしてもよい。   In the above embodiment, the example in which the width of the detection wiring is formed to be equal to or smaller than the width of the common potential wiring is shown, but the present invention is not limited to this. For example, the width of the detection wiring may be larger than the width of the common potential wiring.

また、上記実施形態では、検出配線および共通電位配線をTFT基板上に形成する例を示したが、本発明はこれに限らない。たとえば、検出配線および共通電位配線を対向基板上に形成してもよい。   In the above embodiment, an example in which the detection wiring and the common potential wiring are formed on the TFT substrate has been described, but the present invention is not limited to this. For example, the detection wiring and the common potential wiring may be formed on the counter substrate.

また、上記実施形態では、対向基板の角部とTFT基板の表面とが重なる領域近傍の箇所を検査対象箇所とする例を示したが、本発明はこれに限らない。たとえば、検査対象箇所を対向基板の角部とTFT基板の表面とが重なる領域近傍の箇所以外の箇所にしてもよい。   Moreover, although the said embodiment showed the example which made the location vicinity of the area | region where the corner | angular part of a counter substrate and the surface of a TFT substrate overlap as an inspection object location, this invention is not limited to this. For example, the inspection target location may be a location other than the location in the vicinity of the region where the corner portion of the counter substrate and the surface of the TFT substrate overlap.

1 TFT基板(素子基板) 1a 端辺 2 対向基板 8 共通電位配線(配線) 9 検出配線 13 TFT(トランジスタ素子) 100 液晶表示装置 200 PC(電子機器) 300 携帯電話(電子機器) 400 情報携帯端末(電子機器) DESCRIPTION OF SYMBOLS 1 TFT substrate (element substrate) 1a Edge 2 Opposite substrate 8 Common potential wiring (wiring) 9 Detection wiring 13 TFT (transistor element) 100 Liquid crystal display device 200 PC (electronic device) 300 Mobile phone (electronic device) 400 Information portable terminal (Electronics)

Claims (9)

液晶層を挟持するとともに、互いに対向するように配置された略矩形形状の素子基板および対向基板と、
前記素子基板および前記対向基板のうちの前記素子基板の前記液晶層側の表面と前記液晶層との間の外縁部に沿って設けられた配線と、
前記配線の外周に沿って設けられるとともに、断線したか否かにより少なくとも前記配線の欠けを検出するための検出配線とを備え、
前記配線の欠けを検出しようとする第1箇所では、前記検出配線は、前記素子基板および前記対向基板のうちの一方の端辺近傍に配置され、前記配線の欠けを検出しようとする前記第1箇所以外の第2箇所では、前記検出配線は、前記素子基板および前記対向基板のうちの一方の端辺近傍よりも内側に配置されている、液晶表示装置。
A substantially rectangular element substrate and a counter substrate disposed so as to face each other while sandwiching the liquid crystal layer;
Wiring provided along the outer edge portion between the liquid crystal layer side surface of the element substrate and the liquid crystal layer of the element substrate and the counter substrate;
The wiring is provided along the outer periphery of the wiring, and includes at least a detection wiring for detecting a chipping of the wiring depending on whether or not it is disconnected,
In the first location where the chipping of the wiring is to be detected, the detection wiring is arranged in the vicinity of one end side of the element substrate and the counter substrate, and the first part of the wiring board is to detect the chipping of the wiring. In the second place other than the place, the detection wiring is arranged inside the vicinity of one end side of the element substrate and the counter substrate.
前記検出配線は、前記第1箇所では、前記素子基板および前記対向基板のうちの一方の端辺近傍に配置されるとともに、前記第2箇所では、前記素子基板および前記対向基板のうちの一方の端辺近傍よりも内側に配置されるとともに、前記第1箇所から離れるに従って前記検出配線と前記素子基板および前記対向基板のうちの一方の端辺近傍との間の間隔が徐々に大きくなるように構成されている、請求項1に記載の液晶表示装置。   The detection wiring is arranged in the vicinity of one end of the element substrate and the counter substrate at the first location, and one of the element substrate and the counter substrate at the second location. It is arranged inside the vicinity of the end side, and the distance between the detection wiring and the vicinity of one end side of the element substrate and the counter substrate gradually increases as the distance from the first location increases. The liquid crystal display device according to claim 1, which is configured. 前記素子基板および前記対向基板は、それぞれ、トランジスタ素子を含む素子基板および対向基板であり、
前記配線は、前記素子基板の前記液晶層側の表面と前記液晶層との間に設けられた共通電位配線を含み、
前記検出配線は、前記素子基板の前記液晶層側の表面と前記液晶層との間の前記共通電位配線の外周に沿って設けられるとともに、断線したか否かにより少なくとも前記共通電位配線の欠けを検出可能に構成されており、
前記第1箇所では、前記共通電位配線および前記検出配線は、前記素子基板の端辺近傍に配置され、前記第2箇所では、前記共通電位配線および前記検出配線は、前記素子基板の端辺近傍よりも内側に配置されている、請求項1または2に記載の液晶表示装置。
The element substrate and the counter substrate are an element substrate including a transistor element and a counter substrate, respectively.
The wiring includes a common potential wiring provided between the liquid crystal layer side surface of the element substrate and the liquid crystal layer,
The detection wiring is provided along the outer periphery of the common potential wiring between the surface of the element substrate on the liquid crystal layer side and the liquid crystal layer, and at least the common potential wiring is missing depending on whether or not it is disconnected. Is configured to be detectable,
In the first place, the common potential wiring and the detection wiring are arranged in the vicinity of the edge of the element substrate. In the second place, the common potential wiring and the detection wiring are in the vicinity of the edge of the element substrate. The liquid crystal display device according to claim 1, wherein the liquid crystal display device is disposed on the inner side.
前記素子基板の表面上に設けられたゲート線をさらに備え、
前記ゲート線のうち前記第1箇所に対応する領域以外の箇所に位置する部分は、前記ゲート線のうち前記第1箇所に対応する領域に位置する部分よりも前記素子基板の前記第1箇所に対応する端辺より内側に配置されており、
前記共通電位配線は、前記素子基板の前記第1箇所に対応する端辺において略均一の幅に形成されるとともに、前記ゲート線の外周に沿って設けられている、請求項3に記載の液晶表示装置。
A gate line provided on the surface of the element substrate;
A portion of the gate line that is located in a region other than the region corresponding to the first location is closer to the first location of the element substrate than a portion of the gate line that is located in a region corresponding to the first location. It is located inside the corresponding edge,
4. The liquid crystal according to claim 3, wherein the common potential wiring is formed with a substantially uniform width at an end corresponding to the first portion of the element substrate, and is provided along an outer periphery of the gate line. Display device.
前記ゲート線は、前記第1箇所から離れるに従って前記素子基板の端辺との間隔が徐々に大きくなるように構成されており、
前記ゲート線の外周に沿って設けられた前記共通電位配線は、前記第1箇所から離れるに従って前記素子基板の端辺との間隔が徐々に大きくなるように構成されている、請求項4に記載の液晶表示装置。
The gate line is configured such that the distance from the edge of the element substrate gradually increases as the distance from the first location increases.
The said common potential wiring provided along the outer periphery of the said gate line is comprised so that the space | interval with the edge of the said element substrate may become large gradually as it leaves | separates from the said 1st location. Liquid crystal display device.
前記検出配線の幅は、前記共通電位配線の幅以下である、請求項3〜5のいずれか1項に記載の液晶表示装置。   The liquid crystal display device according to claim 3, wherein a width of the detection wiring is equal to or less than a width of the common potential wiring. 前記対向基板の表面積は、前記素子基板の表面積よりも小さく形成されており、
検出しようとする前記第1箇所は、平面的に見て、前記対向基板の角部と前記素子基板の表面とが重なる領域近傍である、請求項3〜6のいずれか1項に記載の液晶表示装置。
The surface area of the counter substrate is formed smaller than the surface area of the element substrate,
The liquid crystal according to any one of claims 3 to 6, wherein the first location to be detected is in the vicinity of a region where a corner portion of the counter substrate and a surface of the element substrate overlap in plan view. Display device.
前記検出配線は、断線したか否かにより、前記配線の欠けのみならず、前記素子基板および前記対向基板のうちの一方の割れをも検査可能に構成されている、請求項1〜7のいずれか1項に記載の液晶表示装置。   The detection wiring according to any one of claims 1 to 7, wherein the detection wiring is configured to be capable of inspecting not only the chipping of the wiring but also one of the element substrate and the counter substrate depending on whether or not the wire is disconnected. 2. A liquid crystal display device according to item 1. 請求項1〜8のいずれか1項に記載の液晶表示装置を備える、電子機器。   An electronic apparatus comprising the liquid crystal display device according to claim 1.
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