JP2011134581A - Plasma display panel - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce manufacturing time and manufacturing energy by eliminating a connecting process between a bus electrode and a flexible board. <P>SOLUTION: A plasma display panel includes: a front plate 20s mounting bus electrodes 3b, 4b to constitute a plurality of display electrode pairs on a front-side substrate 21; a rear panel 8 mounting a fluorescent layer between the barrier ribs 12 mounted to divide respective discharge cells at intersection parts of the address electrodes 10 and the display electrode pairs, wherein a plurality of the address electrodes 10 sterically cross the display electrode pairs on a rear-side substrate 9; a dielectric thin plate 17 arranged between the front plate and the rear plate; and a transparent electrode arranged as a lower layer of each bus electrode on the front-side substrate corresponding to the bus electrode to constitute a plurality of display electrode pairs or arranged between the front plate and the dielectric thin plate. The front-side substrate includes a connecting wiring part extending to outside of the display area, and the bus electrode extends to the connecting wiring part to form a connecting wiring. An end part of the connecting wiring acts as a terminal part capable of connecting to a driving circuit. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a plasma display panel (hereinafter referred to as “PDP”), and more particularly to improvement of an electrode structure in an AC driven surface discharge type PDP.

  The PDP is a display device that displays an image by causing plasma discharge of a gas such as Ne, Xe, or Ar, and exciting and emitting phosphors with generated ultraviolet rays to convert them into visible light. This PDP includes an alternating current (hereinafter referred to as AC) drive type and a direct current (hereinafter referred to as DC) drive type. The AC drive type is superior to the DC drive type in terms of performance in terms of luminance, light emission efficiency, and lifetime, and the PDP is the main driving method.

  An example of the configuration of an AC surface discharge type PDP representative as an AC drive type is shown in FIGS. FIG. 7 is a perspective view showing a part of the PDP in a state where the front plate 1 and the back plate 8 are separated. FIG. 8 shows a state in which the front plate 1 and the back plate 8 of FIG. 7 are combined, and is a cross-sectional view along the direction crossing the scan electrode 3 and the sustain electrode 4 in FIG.

  The front plate 1 has a configuration in which display electrode pairs 5 including scan electrodes 3 and sustain electrodes 4 that perform surface discharge are arranged in parallel on the surface of a transparent and insulating front side substrate 2. Scan electrode 3 and sustain electrode 4 are each composed of transparent electrodes 3a, 4a formed on the surface of front substrate 2 and bus electrodes 3b, 4b formed thereon. The bus electrodes 3b and 4b are made of, for example, silver (Ag) and a glass frit material as a binding material thereof. A front-side dielectric layer 6 is formed so as to cover the display electrode pair 5, and a protective film 7 is formed thereon.

  On the other hand, on the back plate 8, address electrodes 10 for writing image data are arranged in a direction orthogonal to the display electrode pair 5 on the front side substrate 2 on the surface of the transparent and insulating back side substrate 9. And the upper surface thereof is covered with the back-side dielectric layer 11. A partition wall 12 is formed on the back side dielectric layer 11. The barrier ribs 12 have a cross beam shape formed by vertical barrier ribs 12a formed extending in a direction parallel to the address electrodes 10 and horizontal barrier ribs 12b formed in a direction orthogonal thereto. Each pixel is defined by a region surrounded by the vertical barrier ribs 12a and the horizontal barrier ribs 12b. In each pixel region, a red (R) phosphor layer 13r, a green (G) phosphor layer 13g, a blue color (blue) (corresponding to the address electrode 10) are formed on the side surface of the partition wall 12 and the surface of the back side dielectric layer 11. B) A phosphor layer 13b (collectively referred to as “phosphor layer 13”) is formed by coating.

  The front plate 1 and the back plate 8 face each other so that the display electrode pair 5 and the address electrode 10 form a matrix. A space surrounded by the vertical barrier ribs 12a and the horizontal barrier ribs 12b between the front plate 1 and the rear plate 8 becomes a discharge space 14 of each pixel. Corresponding to each discharge space 14, the display electrode pair 5 and the address electrode 10 are three-dimensionally crossed to form a discharge cell 15. A black stripe 16 is formed between the display electrode pair 5 of the front plate 1 so as to face the upper part of the horizontal partition wall 12b.

  The outer peripheral portions of the front plate 1 and the back plate 8 are sealed by a sealing material such as glass frit (not shown), and a discharge gas composed of a mixed gas of neon (Ne) and xenon (Xe) in the discharge space 14. Is enclosed. For example, a discharge gas having a Xe ratio of 10% is used, and the discharge gas is sealed at a pressure of about 450 Torr (about 60 kPa).

  In the PDP having the above configuration, ultraviolet light is generated by gas discharge, and the phosphor layer 13 of each color of R, G, B is excited by the generated ultraviolet light to emit light, thereby performing color display. That is, when an AC voltage of several tens to several hundreds of kHz is applied between the sustain electrode 4 and the scan electrode 3 via the bus electrodes 3b and 4b and discharged, the excited Xe atoms are generated when returning to the ground state. The phosphor layer 13 can be excited by ultraviolet rays. By this excitation, the phosphor layer 13 generates colored light according to the applied material. If a pixel and a color to be emitted are selected by the address electrode 10, a necessary color can be emitted in a predetermined pixel portion, and a color image can be displayed.

  In the AC drive type PDP having such a configuration, the front-side dielectric layer 6 formed on the display electrode pair 5 exhibits a specific current limiting function, and therefore has a longer life than the DC drive type PDP. . The front-side dielectric layer 6 needs to be formed after the formation of the display electrode pair 5 and the black matrix 16 and so as to reliably cover them. Therefore, generally, a low melting point glass layer is formed by a printing / firing method. The protective film 7 is provided to prevent the front-side dielectric layer 6 from being sputtered by plasma discharge, and is required to be a material having excellent sputtering resistance. For this reason, magnesium oxide (MgO) is often used.

  In the PDP as described above, a configuration is known in which the front-side dielectric layer 6 interposed between the display electrode pair 5 and the discharge space is replaced with a dielectric thin plate 17 such as a microsheet as shown in FIG. It has been.

  In this case, the protective film 7 is formed on the dielectric thin plate 17 on the discharge space 14 side. Further, the display electrode pair 5 including the transparent electrodes 3a and 4a and the bus electrodes 3b and 4b is provided on the other surface which is the front side. Further, a transparent insulating film 18 is formed so as to cover the display electrode pair 5. Then, the discharge space 14 side of the dielectric thin plate 17 is sealed to the back-side substrate 9 with a sealing material such as low-melting glass. On the other hand, a fixed gap 19 is provided on the dielectric thin plate 17, and the front side substrate 2 as a transparent protective substrate is joined.

  Thus, by using the dielectric thin plate 17 instead of the front-side dielectric layer 6, the conventional complicated manufacturing process for forming the dielectric layer can be simplified. Further, by sealing the dielectric thin plate 17 to the back side substrate 9 with a sealing material such as low melting point glass, the front side substrate 2 is not exposed to high temperatures during the manufacturing process.

Here, the microsheet is a thin dielectric sheet such as borosilicate glass mainly composed of silicon dioxide (SiO ₂ ) and boron trioxide (B ₂ O ₃ ). The thickness is about 30 μm and at most about 50 μm. Such a microsheet is widely used, for example, as a sheet for a liquid crystal display device, and has high heat resistance and a low linear expansion coefficient.

  Thus, the structure in which the bus electrode and the transparent electrode are formed on the dielectric thin plate is disclosed in, for example, Patent Document 1. Further, for example, Patent Document 2 discloses a configuration in which a PDP using a dielectric thin plate, in which a bus electrode and a transparent electrode are formed on a front substrate.

JP-A-11-260267 Japanese Patent Laid-Open No. 10-177845

  In a general PDP display device, the bus electrode on the front plate of the PDP and the drive circuit are connected using a flexible substrate in the connection process of the bus electrode of the PDP and the drive circuit. In this case, the flexible substrate and the bus electrode are connected by a method in which an anisotropic conductive film is interposed therebetween, the electrode portion of the flexible substrate and the bus electrode are aligned, and pressure is applied while heating. Thereafter, the connecting portion is molded with a resin for suppressing the influence of moisture.

  In the case of a PDP configuration in which a bus electrode and a transparent electrode are formed on a dielectric thin plate as described in Patent Document 1, heating is performed when the bus electrode on the dielectric thin plate is connected to the electrode portion of the flexible substrate. During pressurization, the dielectric thin plate tends to crack. In order to solve this cracking problem, the bus electrode of the dielectric thin plate may be extended to the back substrate, but the process of extending the bus electrode to the back substrate is difficult, and a new process is added. Become. Therefore, it is fundamentally difficult to eliminate the connection process between the PDP bus electrode and the flexible substrate.

  In addition, even in the case of using a dielectric thin plate as described in Patent Document 2 and having a bus electrode and a transparent electrode provided on the front substrate, a connection process between the bus electrode on the front substrate and the flexible substrate is required. there were.

  As described above, the conventional PDP configuration requires a process of connecting the flexible substrate and the bus electrode of the panel, and therefore the manufacturing process becomes long.

  Further, in the case of a PDP using a dielectric thin plate, in which a transparent electrode and a bus electrode are formed on the front substrate, it is difficult to make the bus electrode thin and thick in order to increase the light extraction efficiency. .

  That is, in order to increase the light extraction efficiency, it is necessary to make the bus electrode thinner in order to reduce the light shielding by the bus electrode as much as possible. However, the bus electrode is required to have a function of supplying a discharge current to each cell, but if the bus electrode becomes thin, the resistance value of the bus electrode increases, so that a voltage drop occurs and a predetermined voltage is applied to each cell. Is difficult to apply. Therefore, even if the bus electrode is thinned, it is necessary to increase the thickness of the bus electrode so that the resistance value of the bus electrode is equal to or less.

  Here, considering a structure suitable for a PDP using a dielectric thin plate, a transparent electrode is formed on the front substrate, and a bus electrode is further formed thereon. Therefore, when the bus electrode is made thicker in order to increase the light extraction efficiency, the transparent electrode important for the discharge control is separated from the dielectric. As a result, the action of the electric field formed by the transparent electrode on the discharge space is weakened, so that the shape and position of the bus electrode dominate the discharge.

  However, when the bus electrode pattern is formed by photolithography and etching, variation is likely to occur if the bus electrode is thick. In particular, the discharge gap determined by the distance between the bus electrodes is an important parameter for determining the discharge start voltage, and when the distance between the bus electrodes varies, the discharge start voltage varies and the image becomes uneven. Also, if the position of the bus electrode changes due to the assembly accuracy of the front substrate and the rear substrate on which the bus electrode is formed, the variation in the discharge start voltage increases due to the positional relationship between the barrier rib and the bus electrode, and the image is uneven. Arise.

  In view of the above problems, the present invention provides a plasma display panel having a favorable configuration in an environment that eliminates the step of connecting a bus electrode and a flexible substrate, reduces manufacturing time, and reduces manufacturing energy. For the purpose.

  It is another object of the present invention to provide a plasma display panel that can sufficiently increase the effect of an electric field formed by a transparent electrode on a discharge space even in a configuration capable of increasing light extraction efficiency and reducing power consumption. To do.

  In order to solve the above-described problems, a plasma display panel according to the present invention includes a front plate provided with bus electrodes for forming a plurality of display electrode pairs including scan electrodes and sustain electrodes on a front substrate, and a rear side. A plurality of address electrodes that are three-dimensionally crossed with the display electrode pair are provided on a substrate, and a partition wall that partitions discharge cells is provided at an intersection of the address electrode and the display electrode pair, and a phosphor layer is provided between the partition walls. The back plate provided, the dielectric thin plate disposed between the front plate and the back plate, and the bus electrodes so as to form the plurality of display electrode pairs, A connection wiring portion including a transparent electrode disposed as a lower layer of a bus electrode, or a transparent electrode disposed between the front plate and the dielectric thin plate, wherein the front substrate extends outside a display region. Have , The bus electrode forms a connection wiring extending to the connection wiring part, the ends of the connection line may be functioning as a terminal portion connectable to a drive circuit.

  According to the above configuration, the front substrate has the connection wiring portion extending outside the display area, and can be connected to the drive circuit by the connection wiring connected to the bus electrode. The function of the cable is also used, and the connection process between the flexible substrate and the bus electrode can be eliminated.

Sectional drawing which shows a part of 1st structural example of PDP in Embodiment 1 of this invention. Sectional drawing which shows a part of 2nd structural example of the PDP The top view which shows the structural example of the front plate of the PDP Sectional drawing which shows a part of 1st structural example of PDP in Embodiment 2 of this invention. Sectional drawing which shows a part of 2nd structural example of the PDP Sectional drawing which shows a part of 1st structural example of PDP in Embodiment 3 of this invention. Sectional drawing which shows a part of 2nd structural example of the PDP Sectional drawing which shows a part of 1st structural example of PDP in Embodiment 4 of this invention. Sectional drawing which shows a part of 2nd structural example of the PDP Sectional drawing which shows a part of 1st structural example of PDP in Embodiment 5 of this invention. Sectional drawing which shows a part of 2nd structural example of the PDP The perspective view which showed a part of PDP of a prior art example in the state which isolate | separated the front plate 1 and the back plate 8. Sectional drawing which shows the state by which the front plate 1 and the back plate 8 of FIG. 7 were united. Sectional drawing which shows a part of other structural example of PDP of a prior art example

  The plasma display panel of the present invention can take the following modes based on the above-described configuration.

  That is, it is preferable that the transparent electrode is provided on a surface of the dielectric thin plate facing the front plate. According to this configuration, the transparent electrode is closer to the discharge space than the bus electrode, and a sufficiently large action on the discharge space by the electric field formed by the transparent electrode can be ensured. Moreover, even if the transparent electrode is formed by photolithography and etching in the same manner as the bus electrode, since the transparent electrode is thin, the variation in shape is reduced, so that the variation in discharge start voltage is suppressed and the image is not uneven.

  In this configuration, an insulating adhesive layer may be provided between the transparent electrode and the bus electrode.

  Alternatively, a conductive adhesive layer may be provided between the transparent electrode and the bus electrode.

  In these configurations, a transparent insulating layer is formed between the bus electrode and the transparent electrode on the front substrate, and a peripheral portion of the dielectric thin plate is bonded to the front plate by an adhesive. can do.

  Alternatively, an insulating transparent adhesive layer is formed between the bus electrode and the transparent electrode on the front substrate, and the entire surface of the dielectric thin plate is bonded to the front plate by the insulating transparent adhesive layer. It can be set as a structure.

  Further, the bus electrode is embedded in an insulating transparent resin layer formed on the front substrate with the tip portion exposed, and the transparent electrode is a surface of the insulating transparent resin layer including the bus electrode. It can be set as the structure currently formed on the top. In the case of this configuration as well as the above-described configuration in which the transparent electrode is provided on the surface facing the front plate of the dielectric thin plate, the variation in the discharge starting voltage is suppressed, and the effect of eliminating the unevenness in the image is obtained. Can do.

  In this configuration, a transparent insulating layer is formed between the transparent electrodes on the insulating transparent resin layer, and a peripheral portion of the dielectric thin plate is bonded to the front plate by an adhesive. it can.

  Alternatively, an insulating transparent adhesive layer is formed between the transparent electrodes on the insulating transparent resin layer, and the entire surface of the dielectric thin plate is joined to the front plate by the insulating transparent adhesive layer. It can be.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. The basic components of the PDP according to the embodiment of the present invention are the same as those of the conventional PDP shown in FIG. Therefore, the same elements as those shown in FIG. 9 are described with the same reference numerals, and the overlapping description is simplified.

(Embodiment 1)
The configuration of the PDP in Embodiment 1 will be described with reference to FIGS. 1A and 1B. 1A and 1B are cross-sectional views showing a part of two configuration examples of the PDP in the first exemplary embodiment.

  A first configuration example of the PDP according to the present embodiment will be described with reference to FIG. 1A. First, the back plate 8 has the same structure as that of the conventional example shown in FIGS. Furthermore, a dielectric thin plate 17 is disposed between the front plate 20a and the back plate 8. That is, the upper part of the back plate 8 is sealed by the dielectric thin plate 17, and the “back side structure” is formed by the back plate 8 and the dielectric thin plate 17.

  The front plate 20a includes, as a basic configuration, a transparent and insulating front substrate 21 and bus electrodes 3b and 4b provided on the inner surface thereof. A transparent insulating layer 22 is formed between each of the bus electrodes 3b and 4b. The transparent insulating layer 22 is provided to suppress creeping discharge that occurs on the surfaces of the bus electrodes 3b and 4b. The front plate 20a and the dielectric thin plate 17 are joined by an adhesive 23 at the peripheral edge.

  The transparent electrodes and the bus electrodes 3b and 4b constitute a plurality of display electrode pairs including the scan electrodes 3 and the sustain electrodes 4 as in the conventional example. In the rear plate 8, a plurality of address electrodes 10 that are three-dimensionally intersected with the display electrode pairs are provided on the rear substrate 9. Further, barrier ribs 12 for partitioning discharge spaces 14 for forming discharge cells are provided at the intersections between the address electrodes 10 and the display electrode pairs, and a phosphor layer (not shown; FIG. 7 to FIG. 9) is provided between the barrier ribs 12. Reference) is provided.

  As a feature of the present embodiment, the front substrate 21 has a planar structure as shown in FIG. That is, the front substrate 21 has a connection wiring part 21b extending outside the display area 21a. The bus electrodes 3b and 4b extend to the connection wiring portion 21b to form connection wirings 3c and 4c. The end portions of the connection wirings 3c and 4c are arranged on the terminal portion 21c which is the peripheral edge portion of the connection wiring portion 21b, and are connected to a drive circuit (not shown). The connection wirings 3c and 4c are preferably covered with a transparent substrate except for the display area 21a and the terminal portion 21c.

  According to this configuration, the front substrate 21 has the connection wiring portion 21b extending to the outside of the display area 21a, and can be connected to the drive circuit by the connection wiring 3c and 4c connected to the bus electrodes 3b and 4b. Therefore, the front substrate 21 also functions as a drive circuit cable, and the connection process between the flexible substrate and the bus electrode can be omitted. Therefore, the manufacturing time can be shortened and simplified, and the manufacturing energy can be reduced.

  In addition, although illustration is abbreviate | omitted in FIG. 1A, the transparent electrode is actually provided corresponding to the bus electrodes 3b and 4b so that a some display electrode pair may be comprised. The transparent electrode is disposed as a lower layer of the bus electrodes 3b and 4b on the front substrate 21 or on a surface of the dielectric thin plate 17 facing the front plate 20a.

  In the front plate 20 b of the second configuration example of the PDP of the present embodiment shown in FIG. 1B, an insulating transparent adhesive layer 24 is used in place of the transparent insulating layer 22. As a result, the peripheral edge portion is not joined by the adhesive 23 but the whole surface is joined by the insulating transparent adhesive layer 24.

  As described above, the basic configuration of the PDP according to the first embodiment is a combination of a front plate (front substrate + bus electrode + + connection wiring part + insulating layer) and (back plate + dielectric thin plate). is there.

  In order to fabricate the PDP having the above-described configuration, it is possible to apply a modification of a part of a conventionally known manufacturing process. First, in order to manufacture the back plate 8, the address electrodes 10, the partition walls 12, and the phosphor layers are formed on the back side substrate 9 by screen printing. An MgO protective film (not shown) is formed on the dielectric thin plate 17. The MgO protective film is formed by an electron beam evaporation method in a range where the protective film of the dielectric thin plate 17 is to be attached. Further, in order to produce the front plate 20a, bus electrodes 3b and 4b are formed on the inner side surface of the front substrate 21. This process will be described later.

  Thereafter, the dielectric thin plate 17 on which the MgO protective film is formed is brought into close contact with the partition wall 12 of the back plate 8 and sealed with a low melting point glass (not shown), filled with a discharge gas and chipped off. Thereafter, the dielectric thin plate 17 and the front plate 20a sealed on the back plate 8 are bonded to each other with an adhesive, for example, at room temperature to form a panel.

  The front plate 20a and the dielectric thin plate 17 (+ the back plate 8) can be bonded as follows, for example. Since the front substrate 21 constituting the front plate 20a is formed of a transparent substrate, it cannot withstand high temperature processes. Therefore, the front plate 20a and the dielectric thin plate 17 must be bonded by a low temperature process.

  That is, as in the first configuration example shown in FIG. 1A, the insulating adhesive 23 can be used when only the peripheral portions of the front plate 20a and the dielectric thin plate 17 are connected (need to be transparent). Absent). Further, as in the second configuration example shown in FIG. 1B, when the front plate 20a and the dielectric thin plate 17 are connected over the entire surface, an insulating transparent adhesive layer 24 such as an epoxy adhesive or an acrylic adhesive is used. .

  Next, the process for producing the front plate 20a will be described below. First, as the front substrate 21, for example, polyethylene terephthalate (PET), polycarbonate (PC), polyethylene naphthalate (PEN), polyimide (PI), or the like can be used. In particular, a material having a low dielectric constant is desirable. This is because reactive power can be reduced.

  In order to form the bus electrodes 3b and 4b to be thin and thick, an additive method (particularly, a semi-additive method) can be used. Alternatively, a subtractive construction method may be used. The additive method is a method in which a wiring pattern is created by performing metal plating only on necessary portions on an insulating resin. The subtractive method is a method in which after forming a metal film on the entire surface of an insulating resin, an unnecessary metal portion is removed to create a wiring pattern.

  In the process of forming the bus electrodes 3b and 4b by the semi-additive method, first, metal plating is applied as a shield layer on the entire surface of the front substrate 21 by electroless plating (for example, copper plating). A resist is affixed thereon, and exposure and development are performed so that the resist remains in portions other than the wiring pattern. Next, metal plating is performed on portions other than the resist by electrolytic plating, the resist is peeled off, and then the shield layer is removed by etching. According to the semi-additive construction method, it is possible to form the bus electrodes 3b and 4b having a high aspect ratio. The thickness of the bus electrode is 10 μm or more. As other electrode materials, silver, gold, Ni or the like can be used.

  The transparent insulating layer 22 can be formed by the following method. The first example is a method of forming an insulating film on a bus electrode by applying, drying, and heat-treating, for example, an organosilicon overcoat agent.

  The second example is a method of filling the space between the front plate 20a and the dielectric thin plate 17 with an insulating transparent liquid. As the insulating transparent liquid, for example, silicon oil, mineral oil, silicon rubber, epoxy resin, ultraviolet curable resin, low molecular liquid resin, or the like can be used. For example, the following method can be used for filling the insulating transparent liquid.

  That is, a certain amount of liquid insulating transparent liquid such as silicone oil is applied to one place on the front plate 20a so as to cross the bus electrodes 3b, 4b by a dispenser method (method of applying a liquid from a thin tube such as an injection needle) ). Then, the front plate 20a and the dielectric thin plate 17 are bonded together. For example, since silicone oil has a property of being easily wetted with respect to the glass surface, when filled between the front plate 20a and the dielectric thin plate 17, the space between the bus electrodes 3b and 4b is also wetted by capillary action. spread. In this way, by applying a necessary amount of silicone oil to the central portion of the front plate 20a by an optimum area, the entire surface of the front plate 20a is uniformly filled without overflowing from the end of the front plate 20a. . After a certain amount of silicone oil is applied, the front plate 20a and the dielectric thin plate 17 are overlapped, and a constant weight is applied, and the entire surface is loaded, whereby the silicone oil is uniformly filled over the entire surface. .

  The third example method for forming the transparent insulating layer 22 is a method of filling the space between the front plate 20a and the dielectric thin plate 17 with an insulating gas. As the insulating gas, for example, a colorless and transparent gas such as air, nitrogen, sulfur hexafluoride or the like can be used.

Examples of the dielectric thin plate 17 include borosilicate glass mainly containing silicon dioxide (SiO ₂ ) and boron trioxide (B ₂ O ₃ ), and borosilicate non-alkali containing a large amount of BaO and Al ₂ O _3. A thin dielectric sheet such as glass can be used. The thickness is about 10 to 40 μm and at most about 50 μm. Alternatively, a thick dielectric sheet may be used for sealing, and then polished and thinned (10 to 40 μm) to form the dielectric thin plate 17.

  In the above configuration, the front plate 20a can have other functions. For example, a protective substrate for protecting from external impacts, a color filter, a black stripe, an antireflection film, an electromagnetic wave shield, and the like.

(Embodiment 2)
The PDP in Embodiment 2 will be described with reference to FIGS. 3A to 3B. 3A to 3B are cross-sectional views showing a part of PDPs of two configuration examples in the present embodiment.

  A basic configuration of the PDP according to the present embodiment will be described with reference to FIG. 3A. The configuration of this PDP is generally the same as that of the PDP in Embodiment 1 shown in FIG. 1A. Therefore, the same elements as those shown in FIG. 1A are denoted by the same reference numerals, and redundant description is omitted.

  The front plate 20a has substantially the same configuration as that of the first embodiment, and is formed between the front substrate 21, the bus electrodes 3b and 4b provided on the inner surface side, and the bus electrodes 3b and 4b. The transparent insulating layer 22 is formed.

  The configuration of the back side structure in which the back plate 8 and the dielectric thin plate 17 are combined is the same as that of the first embodiment. However, the transparent electrodes 3a and 4a are provided on the surface of the dielectric thin plate 17 facing the front plate 20a. The front plate 20a and the dielectric thin plate 17 are joined by an adhesive 23 at the peripheral edge.

  In the front plate 20b of the second configuration example shown in FIG. 3B, an insulating transparent adhesive layer 24 is used instead of the transparent insulating layer 22, as in the configuration example shown in FIG. 1B. As a result, the peripheral edge portion is not joined by the adhesive 23 but the whole surface is joined by the insulating transparent adhesive layer 24.

  As described above, the basic configuration of the PDP of the second embodiment is that the front plate (front substrate + bus electrode + + connection wiring part + insulating layer) and (back plate + (thin dielectric plate + transparent electrode)). It is a combination. The configuration of the present embodiment is used to solve the following problems.

  (1) A certain amount of electrode area is required to ensure luminance. However, when the area of the bus electrodes 3b and 4b is increased, the light extraction efficiency is deteriorated and the luminance is lowered. On the other hand, in this embodiment, by providing the transparent electrodes 3a and 4a on the surface of the dielectric thin plate 17 facing the front plate 20a, the area of the bus electrodes 3b and 4b for shielding light is reduced. The electrode area is ensured by the transparent electrodes 3a and 4a. Since the transparent electrodes 3a and 4a hardly block light, the light extraction efficiency is improved.

  (2) When the patterns of the bus electrodes 3b and 4b are formed by photolithography and etching, the bus electrodes 3b and 4b are thick, so that variations in electrode shape and position are likely to occur. In particular, the discharge gap determined by the distance between the bus electrodes is an important parameter for determining the discharge start voltage, and when the distance between the bus electrodes varies, the discharge start voltage varies and the image becomes uneven. This problem can also be solved by providing the transparent electrodes 3a and 4a on the surface of the dielectric thin plate 17 facing the front plate 20a. That is, even if the transparent electrodes 3a and 4a are formed by the same etching as the bus electrodes 3b and 4b, the transparent electrodes 3a and 4a are thin, so the shape variation is small and the distance between the electrodes is small. The variation is suppressed and the image is not uneven.

  (3) The position of the bus electrodes 3b and 4b varies depending on the assembly accuracy of the front substrate 21 and the back plate 8 on which the bus electrodes 3b and 4b are formed. The deviation in the positional relationship between the barrier ribs 12 and the bus electrodes 3b and 4b increases the variation in the discharge start voltage, resulting in unevenness in the image. When the transparent electrodes 3a and 4a are provided on the surface of the dielectric thin plate 17 facing the front plate 20a, if the transparent electrodes 3a and 4a are formed after sealing, discharge starts due to the assembly accuracy of the front substrate 21 and the back plate 8. The variation in voltage is suppressed, and there is no unevenness in the image.

  In order to manufacture the PDP having the above structure, a process similar to that of the PDP in Embodiment 1 can be used. The process of the first embodiment is different from the process of forming the transparent electrodes 3a and 4a. In the process of preparing the dielectric thin plate 17, the transparent electrodes 3 a and 4 a are formed by patterning an ITO film on the opposite side of the surface of the protective film by vacuum evaporation before forming the protective film and etching by photolithography.

  Alternatively, the back plate 8 and the dielectric thin plate 17 are sealed, evacuated, gas-filled, chip-off, a transparent electrode pattern is formed on the dielectric thin plate 17 by ink-jet direct drawing, and the front plate is heated at a low temperature. Bond with 20b. Since the transparent electrodes 3a and 4a are formed after sealing, a positional shift due to sealing can be corrected when the transparent electrodes 3a and 4a are formed.

  The insulating layer is provided for both the bus electrodes 3b and 4b and the transparent electrodes 3a and 4a. The insulating layer can be formed by a method similar to that in Embodiment 1. When the front plate 20b and the (dielectric thin plate 17 + back plate 8) are joined over the entire surface using the insulating transparent adhesive layer 24, an insulating layer is provided on the bus electrodes 3b and 4b and the transparent electrodes 3a and 4a. It does not have to be provided.

  As the transparent electrodes 3a and 4a, for example, indium tin oxide (ITO), tin oxide (SnO2), zinc oxide (ZnO), or the like can be used.

  In addition to the transparent electrode, the black stripe and the color filter can be formed by direct drawing after chip-off in the same manner as the transparent electrode. Further, an ultraviolet ray preventing layer (not passing through 350 nm or less) can be formed on the entire surface or a part thereof. The role of the ultraviolet ray preventing layer is to prevent deterioration of organic materials, for example, deterioration of the transparent substrate, the color filter, the black stripe, etc. of the front substrate 21.

  When the transparent electrodes 3a and 4a are formed after chip-off, the subsequent processes are only low-temperature processes. Therefore, as a material for the black stripe, the color filter, and the ultraviolet ray prevention layer, a material that cannot withstand a high temperature process and has good characteristics that can be used only in a low temperature process (for example, an organic substance) can be used.

(Embodiment 3)
A PDP according to Embodiment 3 will be described with reference to FIGS. 4A to 4B. 4A to 4B are cross-sectional views showing a part of PDPs of two configuration examples in the present embodiment.

  A basic configuration of the PDP according to the present embodiment will be described with reference to FIG. 4A. The configuration of this PDP is substantially the same as the PDP in the second embodiment shown in FIG. 3A. Therefore, the same elements as those shown in FIG. 3A are denoted by the same reference numerals, and redundant description is omitted.

  The configuration of the front plate 20a, the back side structure in which the back plate 8 and the dielectric thin plate 17 are combined, and the transparent electrodes 3a and 4a provided on the dielectric thin plate 17 are the same as in the second embodiment. . However, an insulating adhesive layer 25 is provided between the transparent electrodes 3a and 4a and the bus electrodes 3b and 4b. The front plate 20a and the dielectric thin plate 17 are joined by an adhesive 23 at the peripheral edge.

  On the other hand, in the front plate 20b of the second configuration example shown in FIG. 4B, an insulating transparent adhesive layer 24 is used instead of the transparent insulating layer 22 as in the configuration example shown in FIG. 1B. As a result, the peripheral edge portion is not joined by the adhesive 23 but the whole surface is joined by the insulating transparent adhesive layer 24.

  As described above, the basic configuration of the PDP according to the third embodiment includes the front plate (front substrate + bus electrode + + connection wiring part + insulating layer), the insulating adhesive layer, and (back plate + (dielectric thin plate). + Transparent electrode)). In the configuration of the present embodiment, an insulating adhesive layer 25 is provided between the transparent electrodes 3a and 4a and the bus electrodes 3b and 4b, and a voltage is applied to the transparent electrodes 3a and 4a by capacitive coupling.

  That is, in the configuration of the second embodiment, since both the contact junction and the capacitive coupling are present in the same panel, the voltage applied to the transparent electrodes 3a and 4a tends to be non-uniform. Therefore, the discharge start voltage is different, and the image may be uneven.

  On the other hand, by applying the insulating adhesive layer 25 to the bus electrodes 3b and 4b or the transparent electrodes 3a and 4a and then bonding them, the voltage applied to the transparent electrodes 3a and 4a is limited only by capacitive coupling. Uniformity can be achieved, and unevenness in the image can be eliminated.

  In order to manufacture the PDP having the above structure, a process similar to that of the PDP in Embodiment 1 can be used. However, in the present embodiment, the insulating adhesive layer 25 is applied to the transparent electrodes 3a, 4a or the bus electrodes 3b, 4b by direct drawing by printing or inkjet, and then the front plate 20a or 20b (for dielectrics). The thin plate 17 + back plate 8) is joined.

  The transparent insulating layer 22 is provided for both the bus electrodes 3b and 4b and the transparent electrodes 3a and 4a. The same method as in the first embodiment can be used to form the transparent insulating layer 22.

  In addition to the connection between the bus electrodes 3b and 4b and the transparent electrodes 3a and 4a, an insulating transparent adhesive layer is used when the front plate and the (dielectric thin plate + back plate) are connected over the entire surface. In this case, as shown in FIG. 4B, the insulating layer may be substituted only by the insulating transparent adhesive layer 24 instead of the insulating layer.

  Further, even if the insulating transparent adhesive layer 24 for bonding the front plate (dielectric thin plate + back plate) over the entire surface and the insulating adhesive layer 25 applied to the transparent electrodes 3a, 4a or the bus electrodes 3b, 4b are the same. Good.

(Embodiment 4)
The PDP in Embodiment 4 will be described with reference to FIGS. 5A to 5B. FIG. 5A to FIG. 5B are cross-sectional views showing a part of PDPs of two configuration examples in the present embodiment.

  A basic configuration of the PDP according to the present embodiment will be described with reference to FIG. 5A. The configuration of this PDP is almost the same as that of the PDP in the third embodiment shown in FIG. 4A. However, a conductive adhesive layer 26 is provided between the transparent electrodes 3a and 4a and the bus electrodes 3b and 4b in place of the insulating adhesive layer 25. The front plate 20a and the dielectric thin plate 17 are joined by an adhesive 23 at the peripheral edge.

  In the front plate 20b of the second configuration example shown in FIG. 5B, an insulating transparent adhesive layer 24 is used in place of the transparent insulating layer 22 as in the configuration example shown in FIG. 1B. As a result, the peripheral edge portion is not joined by the adhesive 23 but the whole surface is joined by the insulating transparent adhesive layer 24.

  As described above, the basic configuration of the PDP according to the fourth embodiment includes the front plate (front substrate + bus electrode + + connection wiring portion + insulating layer), the conductive adhesive layer, and (back plate + (dielectric thin plate). + Transparent electrode)). In the configuration of the present embodiment, a conductive adhesive layer 26 is provided between the transparent electrodes 3a and 4a and the bus electrodes 3b and 4b, and a voltage is applied to the transparent electrodes 3a and 4a by electrical conduction.

  The configuration of the present embodiment solves the same problem as that of the third embodiment. That is, by applying the conductive adhesive layer 26 to the bus electrodes 3b, 4b or the transparent electrodes 3a, 4a and then bonding them to eliminate capacitive coupling, the voltage applied to the transparent electrodes 3a, 4a is made uniform. And image unevenness can be eliminated.

  In order to manufacture the PDP having the above configuration, a process similar to that of the PDP in Embodiment 3 can be used. That is, the conductive adhesive layer 26 can be provided in the same manner as the insulating adhesive layer 25 of the third embodiment. The arrangement of the insulating layer, the method for forming the insulating layer, the configuration using the insulating transparent adhesive layer, and the like are the same as those in the third embodiment.

  When the conductive adhesive layer 26 is formed only under the bus electrodes 3b and 4b, it does not need to be transparent. For example, a silver paste (silver filler + epoxy resin) or the like can be used. Further, when there is a high possibility that the bus electrodes 3b and 4b protrude from the lower portion, it is necessary to be as transparent as possible. For example, the same silver paste as described above is used in which the amount of the silver filler is reduced as much as possible, or an ITO paste in which an ITO filler is mixed instead of the silver filler is used.

(Embodiment 5)
A PDP according to Embodiment 5 will be described with reference to FIGS. 6A to 6B. 6A to 6B are cross-sectional views showing a part of PDPs of two configuration examples in the present embodiment.

  A basic configuration of the PDP according to the present embodiment will be described with reference to FIG. 6A. The basic configuration of this PDP is the same as that of the PDP in the second embodiment shown in FIG. 3A, but the arrangement of the transparent electrodes 3a and 4a is different from the configuration of FIG. It is provided above.

  That is, the bus electrodes 3b and 4b are embedded in the insulating transparent resin layer 27 on the front substrate 21, and the transparent electrodes 3a and 4a are formed on the insulating transparent resin layer 27 including the end surfaces of the bus electrodes 3b and 4b. Yes. A transparent insulating layer 22 is provided between each of the transparent electrodes 3a and 4a, and the front plate 20c and the dielectric thin plate 17 are joined together by an adhesive 23 at the periphery.

  In the front plate 20d of the second configuration example shown in FIG. 6B, an insulating transparent adhesive layer 24 is used in place of the transparent insulating layer 22, as in the configuration example shown in FIG. 1B. As a result, the peripheral edge portion is not joined by the adhesive 23 but the whole surface is joined by the insulating transparent adhesive layer 24.

  As described above, the basic configuration of the PDP of the fifth embodiment is a combination of the front plate (front substrate + bus electrode + transparent electrode + connection wiring part + insulating layer) and (back plate + dielectric thin plate). It is a thing. The configuration of the present embodiment uses a form different from that of the second embodiment in order to dispose the transparent electrodes 3a, 4a closer to the discharge space 14 than the bus electrodes 3b, 4b. As in the case of the second embodiment, the variation in the discharge start voltage is suppressed and the unevenness of the image is eliminated.

  In order to manufacture the PDP having the above configuration, the front plate 20c or 20d is manufactured as follows. That is, an insulating transparent resin is poured between the bus electrodes 3b and 4b on the front substrate 21 formed up to the bus electrode pattern by a semi-additive method, and is flattened. Thereafter, the transparent electrodes 3a and 4a are printed by inkjet or the like, and fired at a low temperature to complete the transparent electrodes 3a and 4a. The method of connecting the front plates 20c, 20d and the back plate 8 can be performed in the same manner as in the above embodiment.

  The PDP of the present invention is useful as a wall-mounted television or a large monitor because the front substrate also serves as a drive circuit cable and the connection process between the flexible substrate and the bus electrode can be omitted.

1, 20a, 20b, 20c, 20d Front plate 2, 21 Front side substrate 3 Scan electrode 3a, 4a Transparent electrode 3b, 4b Bus electrode 3c, 4c Connection wiring 4 Sustain electrode 5 Display electrode pair 6 Front side dielectric layer 7 Protection Film 8 Back plate 9 Back side substrate 10 Address electrode 11 Back side dielectric layer 12 Partition 12a Vertical partition 12b Horizontal partition 13 Phosphor layer 13r Red (R) phosphor layer 13g Green (G) phosphor layer 13b Blue (B) Phosphor layer 14 Discharge space 15 Discharge cell 16 Black stripe 17 Dielectric thin plate 18 Insulation coating film 19 Gap 21a Display area 21b Connection wiring part 21c Terminal part 22 Transparent insulating layer 23 Adhesive 24 Insulating transparent adhesive layer 25 Insulating Adhesive layer 26 Conductive adhesive layer 27 Insulating transparent resin layer

Claims (9)

A front plate provided with bus electrodes for constituting a plurality of display electrode pairs consisting of scan electrodes and sustain electrodes on a front substrate;
A plurality of address electrodes that are three-dimensionally crossed with the display electrode pair are provided on a back side substrate, and a partition that partitions discharge cells is provided at the intersection of the address electrode and the display electrode pair, and a phosphor is provided between the partitions. A back plate provided with a layer;
A dielectric thin plate disposed between the front plate and the back plate;
A transparent electrode disposed as a lower layer of the bus electrode on the front substrate, or between the front plate and the dielectric thin plate, corresponding to the bus electrode so as to constitute the plurality of display electrode pairs And a transparent electrode disposed on the
The front-side substrate has a connection wiring portion extending outside the display area, the bus electrode extends to the connection wiring portion to form a connection wiring, and an end portion of the connection wiring is a drive circuit A plasma display panel that functions as a terminal portion that can be connected to a plasma display panel.   The plasma display panel according to claim 1, wherein the transparent electrode is provided on a surface of the dielectric thin plate facing the front plate.   The plasma display panel according to claim 2, wherein an insulating adhesive layer is provided between the transparent electrode and the bus electrode.   The plasma display panel according to claim 2, wherein a conductive adhesive layer is provided between the transparent electrode and the bus electrode.   The transparent insulating layer is formed between the said bus electrode and the said transparent electrode on the said front side board | substrate, The peripheral part of the said thin plate for dielectrics is joined to the said front plate with the adhesive agent. 2. The plasma display panel according to claim 1.   An insulating transparent adhesive layer is formed between the bus electrode and the transparent electrode on the front substrate, and the entire surface of the dielectric thin plate is joined to the front plate by the insulating transparent adhesive layer. Item 5. The plasma display panel according to any one of Items 1 to 4.   The bus electrode is embedded in an insulating transparent resin layer formed on the front-side substrate with its tip exposed, and the transparent electrode is formed on the surface of the insulating transparent resin layer including the bus electrode. The plasma display panel according to claim 1 formed.   The plasma display panel according to claim 7, wherein a transparent insulating layer is formed between the transparent electrodes on the insulating transparent resin layer, and a peripheral portion of the dielectric thin plate is bonded to the front plate by an adhesive. .   The insulating transparent adhesive layer is formed between the transparent electrodes on the insulating transparent resin layer, and the entire surface of the dielectric thin plate is joined to the front plate by the insulating transparent adhesive layer. 2. A plasma display panel according to 1.

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