JP2011129643A5 - Semiconductor device and manufacturing method thereof - Google Patents
Semiconductor device and manufacturing method thereof Download PDFInfo
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本発明は、半導体装置及びその製造方法に関する。 The present invention relates to a method of manufacturing a semi-conductor device and its.
本発明は、これらの問題点を解決するためになされたものであって、信頼性を高めた半導体装置及びその製造方法を提供し、工程の簡素化を図ることを目的とする。 The present invention was made in order to solve these problems, and provide a semiconductor device and its manufacturing method with improved reliability, and an object thereof is to simplify the process.
本半導体装置の一の形態は、電極パッドを備えた半導体チップと、一端面がシード層を介して前記電極パッドと接続された接続電極と、前記接続電極の他端面を露出するように前記半導体チップ上に形成された第1絶縁層と、前記第1絶縁層上に形成され、前記接続電極の他端面と接続された配線と、前記配線を覆うように前記第1絶縁層に積層され、前記配線の一部を露出する第2絶縁層と、を有し、前記第1絶縁層及び前記第2絶縁層は前記半導体チップの側面に沿って延在し、前記第1絶縁層及び前記第2絶縁層が形成するコーナー部がテーパ形状であることを要件とする。
又、本半導体装置の他の形態は、電極パッドを備えた半導体チップと、一端面がシード層を介して前記電極パッドと接続された接続電極と、前記接続電極の他端面を露出するように前記半導体チップ上に形成された絶縁層と、前記接続電極の他端面と接続された外部接続端子と、を有し、前記絶縁層は前記半導体チップの側面に沿って延在し、前記絶縁層が形成するコーナー部がテーパ形状であることを要件とする。
又、本半導体装置の製造方法は、電極パッドを備えた半導体チップが複数配置された半導体基板を準備し、各々の半導体チップの電極パッド上に、一端面がシード層を介して前記電極パッドと接続された接続電極を形成する工程と、前記接続電極の他端面を露出するように、前記半導体基板上に半硬化状態の絶縁層を形成する工程と、半硬化状態の前記絶縁層が形成された前記半導体基板を個片化し、半硬化状態の前記絶縁層を有する複数の半導体チップを形成する工程と、前記半導体チップのコーナー部に対応する位置にテーパ部を有する金型を用いて、半硬化状態の前記絶縁層を前記半導体チップの側面に回し込ませて、前記絶縁層からなり前記半導体チップの側面に密着した保護層を形成する工程と、を有することを要件とする。
In one embodiment of the present semiconductor device, the semiconductor chip having an electrode pad, a connection electrode having one end surface connected to the electrode pad via a seed layer, and the other end surface of the connection electrode are exposed. A first insulating layer formed on the chip, a wiring formed on the first insulating layer, connected to the other end surface of the connection electrode, and laminated on the first insulating layer so as to cover the wiring, A second insulating layer exposing a part of the wiring, wherein the first insulating layer and the second insulating layer extend along a side surface of the semiconductor chip, and the first insulating layer and the first insulating layer corners 2 insulating layer is formed to a requirement tapered der Rukoto.
In another form of the semiconductor device, a semiconductor chip having an electrode pad, a connection electrode having one end surface connected to the electrode pad via a seed layer, and the other end surface of the connection electrode are exposed. An insulating layer formed on the semiconductor chip; and an external connection terminal connected to the other end surface of the connection electrode, the insulating layer extending along a side surface of the semiconductor chip, and the insulating layer It is a requirement that the corner formed by the taper has a tapered shape.
In the method of manufacturing the semiconductor device includes providing a semiconductor substrate having a semiconductor chip with electrode pads are more disposed to each of the semiconductor chip on the electrode pad, and the electrode pad end surface via the seed layer Forming a connected connection electrode; forming a semi-cured insulating layer on the semiconductor substrate to expose the other end surface of the connection electrode; and forming the semi-cured insulating layer. The semiconductor substrate is separated into pieces and a plurality of semiconductor chips having the semi-cured insulating layer are formed, and a mold having a tapered portion at a position corresponding to a corner portion of the semiconductor chip is used. the insulating layer of the cured by incorporated turning on a side surface of the semiconductor chip, Engineering and as you form a protective layer in close contact with the side surface of the semiconductor chip made from the insulating layer may be a requirement that has a.
信頼性を高めた半導体装置及びその製造方法を提供することができ、また、工程の簡素化を図ることができる。 Can provide a semiconductor device and its manufacturing method with increased reliability, also, it is possible to simplify the process.
図10の(b)は、(a)のU部の詳細を示している。金型母体103は、その内部に設けられた、それぞれのプレス金型104を保持する箇所に、プレス金型104の水平方向(x−y方向)の位置調整及び固定用のクランプ115と、プレス金型104の垂直方向(z方向)の位置調整固定手段106と、プレス金型104の水平方向の円滑な摺動を可能とする摺動手段107とを有している。プレス金型104に、金型内部の垂直面Mとθの角度(0度<θ<90度)を有するテーパ部Tを設け、半硬化状態の絶縁層等にプレス加工を行うと、絶縁層を半導体チップの側面に回し込ませることができる。矩形形状のCSPの個片に対して、金型内部のテーパ部Tは、四角錐の稜の部分がラウンドされた面を有する形状を有する。
(B) of FIG. 10 shows details of the U portion of (a). The
50 半導体ウエハ
50b 半導体ウエハ50の裏面
51 接続電極
51a,51b 接続電極51の端面
52 半導体集積回路
53 電極パッド
54 保護膜
56,84 シード層
57,85 フォトレジスト層
59,81 絶縁層
61 外部接続端子
63 スクライブライン
64,88 チップサイズパッケージ(CSP)
65 ダイシングテープ
66 半導体チップ
67 金型
68 絶縁層のコーナー部及び側面部
69 保護層
82 配線
86 第2絶縁層
87 外部接続端子のための開口部
101 プレス機器
102 プレス手段
103 金型母体
104,111 プレス金型
105 プレス基盤
106 プレス金型104の垂直方向の位置調整固定手段
107 プレス金型104用の摺動手段
112 フッ素樹脂
115 クランプ
150 接続層
160 再配線層
200,210 ウエハレベルパッケージ(WLP)
b 外部接続端子61の透視図における直径
D1,D2,D5,D6 半導体チップの底辺の長さ
D3,D4,D7,D8 金型67のプレス用開口部各辺の長さ
E1,E2,E3,E4,F1,F2,F3,F4 金型の各部寸法
h1 外部接続端子61の高さ
H1,H2 ブレードの高さ位置
M 金型内部における垂直面
p 保護層の長さ
t1,t2,t3,t4 絶縁層の厚さ
T 金型内部におけるテーパ面
θ 金型内部におけるテーパ面Tと垂直面Mとのなす角
50 Semiconductor wafer 50b Back surface 51 of semiconductor wafer 50 Connection electrodes 51a, 51b End face 52 of connection electrode 51 Semiconductor integrated circuit 53 Electrode pad 54 Protective film 56, 84 Seed layer 57, 85 Photoresist layer 59, 81 Insulating layer 61 External connection terminal 63 Scribe line 64, 88 Chip size package (CSP)
65 Dicing tape 66 Semiconductor chip 67 Die 68 Corner and side part of insulating layer 69 Protective layer 82 Wiring 86 Second insulating layer 87
115 Clamp 150 Connection Layer 160 Redistribution Layer 200, 210 Wafer Level Package (WLP)
b Diameters D1, D2, D5, D6 in the perspective view of the external connection terminal 61 Lengths D3, D4, D7, D8 of the bottom side of the semiconductor chip Lengths E1, E2, E3 of the sides of the pressing opening of the die 67 E4, F1, F2, F3, F4 Dimensions of the mold h1 Height of the external connection terminal 61 H1, H2 Height position of the blade M Vertical plane inside the mold p Length of the protective layer t1, t2, t3, t4 Insulating layer thickness T Tapered surface in the mold θ Angle formed by the taper surface T and the vertical surface M in the mold
Claims (10)
一端面がシード層を介して前記電極パッドと接続された接続電極と、
前記接続電極の他端面を露出するように前記半導体チップ上に形成された第1絶縁層と、
前記第1絶縁層上に形成され、前記接続電極の他端面と接続された配線と、
前記配線を覆うように前記第1絶縁層に積層され、前記配線の一部を露出する第2絶縁層と、を有し、
前記第1絶縁層及び前記第2絶縁層は前記半導体チップの側面に沿って延在し、前記第1絶縁層及び前記第2絶縁層が形成するコーナー部がテーパ形状である半導体装置。 A semiconductor chip with electrode pads;
A connection electrode having one end face connected to the electrode pad via a seed layer;
A first insulating layer formed on the semiconductor chip so as to expose the other end surface of the connection electrode;
A wiring formed on the first insulating layer and connected to the other end surface of the connection electrode;
A second insulating layer laminated on the first insulating layer so as to cover the wiring and exposing a part of the wiring;
The semiconductor device, wherein the first insulating layer and the second insulating layer extend along a side surface of the semiconductor chip, and a corner portion formed by the first insulating layer and the second insulating layer is tapered.
前記第1絶縁層は前記保護膜の上面に形成され、前記半導体チップの側面に延在して前記保護膜の側面を覆っている請求項1記載の半導体装置。 A protective film exposing the electrode pad is formed on the semiconductor chip,
The semiconductor device according to claim 1, wherein the first insulating layer is formed on an upper surface of the protective film and extends to a side surface of the semiconductor chip to cover the side surface of the protective film.
一端面がシード層を介して前記電極パッドと接続された接続電極と、
前記接続電極の他端面を露出するように前記半導体チップ上に形成された絶縁層と、
前記接続電極の他端面と接続された外部接続端子と、を有し、
前記絶縁層は前記半導体チップの側面に沿って延在し、前記絶縁層が形成するコーナー部がテーパ形状である半導体装置。 A semiconductor chip with electrode pads;
A connection electrode having one end face connected to the electrode pad via a seed layer;
An insulating layer formed on the semiconductor chip so as to expose the other end surface of the connection electrode;
An external connection terminal connected to the other end surface of the connection electrode,
The semiconductor device, wherein the insulating layer extends along a side surface of the semiconductor chip, and a corner portion formed by the insulating layer is tapered.
前記絶縁層は前記保護膜の上面に形成され、前記半導体チップの側面に延在して前記保護膜の側面を覆っている請求項3記載の半導体装置。 A protective film exposing the electrode pad is formed on the semiconductor chip,
The semiconductor device according to claim 3, wherein the insulating layer is formed on an upper surface of the protective film and extends to a side surface of the semiconductor chip to cover the side surface of the protective film.
前記接続電極の他端面を露出するように、前記半導体基板上に半硬化状態の絶縁層を形成する工程と、
半硬化状態の前記絶縁層が形成された前記半導体基板を個片化し、半硬化状態の前記絶縁層を有する複数の半導体チップを形成する工程と、
前記半導体チップのコーナー部に対応する位置にテーパ部を有する金型を用いて、半硬化状態の前記絶縁層を前記半導体チップの側面に回し込ませて、前記絶縁層からなり前記半導体チップの側面に密着した保護層を形成する工程と、を有する半導体装置の製造方法。 A step of semiconductor chips having electrode pads prepares a plurality arranged semiconductor substrate, to each of the semiconductor chip on the electrode pad to form the connection electrode having an end surface is connected to the electrode pad through the seed layer ,
Forming a semi-cured insulating layer on the semiconductor substrate so as to expose the other end surface of the connection electrode;
Separating the semiconductor substrate on which the semi-cured insulating layer is formed, and forming a plurality of semiconductor chips having the semi-cured insulating layer;
Using a mold having a tapered portion at a position corresponding to the corner portion of the semiconductor chip, the semi-cured insulating layer is turned into the side surface of the semiconductor chip, and the side surface of the semiconductor chip is made of the insulating layer. method of manufacturing a semiconductor device having a factory as a, that to form a protective layer in close contact with the.
前記保護層を形成する工程では、前記半導体チップのコーナー部に対応する位置にテーパ部を有する金型を用いて、半硬化状態の前記絶縁層及び半硬化状態の前記第2絶縁層を前記半導体チップの側面に回し込ませて、前記絶縁層及び前記第2絶縁層からなり前記半導体チップの側面に密着した保護層を形成する請求項5記載の半導体装置の製造方法。 After the step of forming the insulating layer, a step of forming a wiring connected to the connection electrode on the insulating layer, and forming a semi-cured second insulating layer on the insulating layer so as to cover the wiring And having a process
In the step of forming the protective layer, the semi-cured insulating layer and the semi-cured second insulating layer are formed on the semiconductor using a mold having a tapered portion at a position corresponding to a corner of the semiconductor chip. 6. The method of manufacturing a semiconductor device according to claim 5 , wherein a protective layer formed of the insulating layer and the second insulating layer and being in close contact with the side surface of the semiconductor chip is formed around the side surface of the chip .
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