JP2011129595A - Optical semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an optical semiconductor device reducing power consumption. <P>SOLUTION: The optical semiconductor device 200 includes: a casing 2; a temperature controller 10; an optical semiconductor element 16; a terminal part 36; a first bridge part 62 composed by providing a conductor layer electrically connected with the optical semiconductor element 16 on the upper surface, thermally connecting one end on the temperature controller 10, and positioning the other end in a region between the optical semiconductor element 16 and the terminal part 36; a second bridge part 60 provided with a conductor layer electrically connected with the element part 36 on the upper surface, and thermally connected one end on the block part 30, and positioning the other end in a region between the optical semiconductor element 16 and the terminal part 36; and a connection part 64 electrically connecting the conductor layer of the first bridge part 62 and the conductor layer of the second bridge part 60 and having a thermal conductivity lower than the thermal conductivity of the first bridge part 62 and the second bridge part 60. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to an optical semiconductor device.

  As an OSA (Optical Sub-Assembly) used in an optical communication device, an optical semiconductor device in which an optical element that outputs an optical signal is mounted in a housing is used. For example, Patent Document 1 discloses an example of OSA.

JP 2009-230032 A

  In such an optical semiconductor device, the optical element is mounted on the temperature control device in order to control the temperature of the optical element. At this time, the LD is connected to an electric signal line (for example, a strip line) in order to transmit an electric signal (high-frequency signal or the like) to a laser diode (LD). However, when this electrical signal line and the LD are directly connected, heat from the other flows into the LD. Therefore, the temperature control device consumes extra power to control the temperature of the LD. Thus, the power consumption of the optical semiconductor device increases due to the inflow of heat into the LD.

  The present invention has been made in view of the above problems, and an object thereof is to provide an optical semiconductor device capable of reducing power consumption.

  An optical semiconductor device of the present invention includes a housing, a temperature control device provided in the housing, an optical semiconductor element provided on the temperature control device, and a block unit provided on a bottom surface of the housing, Alternatively, a terminal portion provided on a side wall of the housing and a conductor layer electrically connected to the optical semiconductor element are provided on the upper surface, one end is thermally connected to the temperature control device, and the other end A first bridge portion located in a region between the optical semiconductor element and the terminal portion, and a conductor layer electrically connected to the terminal portion is provided on the upper surface, and one end is on the block portion, Or a second bridge portion that is thermally connected to a side wall of the housing and has the other end located in a region between the optical semiconductor element and the terminal portion; and a conductor layer of the first bridge portion; Electrically connecting the conductor layer of the second bridge portion to the first bridge portion and And having a connection portion comprising a low thermal conductivity than the thermal conductivity of the second bridge portion. According to the present invention, since heat other than heat generated by the optical semiconductor element can be suppressed from flowing into the temperature control device, characteristics of the temperature control device are not deteriorated and power consumption of the temperature control device is reduced. be able to. Therefore, power consumption of the optical semiconductor device can be reduced.

  In the above configuration, the conductor layer of the first bridge portion and the conductor layer of the second bridge portion may both form a strip line. According to this configuration, it is possible to transmit a high-frequency electric signal while suppressing loss.

  The said structure WHEREIN: The said 1st bridge part and the said 2nd bridge part are good also as a ceramic. According to this structure, the heat | fever which flows in into a temperature control apparatus via a 1st bridge part and a 2nd bridge part can be suppressed.

  In the above-described configuration, provided in a region between the optical semiconductor element and the terminal portion on the bottom surface of the housing, and supports the first bridge portion and the second bridge portion with respect to the bottom surface of the housing. The relay section may have a thermal conductivity smaller than that of the first bridge section and the second bridge section. According to this structure, the tolerance with respect to the stress added when attaching a connection part to a 1st bridge part and a 2nd bridge part by bonding can be improved. Therefore, it can prevent that a 1st bridge part and a 2nd bridge part are destroyed by bonding, and a 1st bridge part and a 2nd bridge part remove | deviate.

  In the above configuration, ground electrodes are provided on the bottom surfaces of the first bridge portion and the second bridge portion, and the conductor layer of the first bridge portion and the conductor layer of the second bridge portion together form a strip line. Thus, a conductive portion for electrically connecting the ground electrodes of the first bridge portion and the second bridge portion may be provided on the relay portion. According to this configuration, since the conductive portion that electrically connects the ground electrodes serves as a ground for the electric signal, the frequency characteristics can be improved. Since the ground potential of the relay unit, the first bridge unit, and the second bridge unit can be made common, the frequency characteristics can be improved. Since the cross-sectional area of the dielectric can be reduced and the thermal resistance can be increased, it is possible to suppress the heat other than the heat generated by the optical semiconductor element from flowing into the temperature control device.

  The said structure WHEREIN: You may make it the said relay part be comprised with quartz glass. According to this configuration, heat exchange between the first bridge portion and the second bridge portion can be suppressed.

  In the above configuration, the optical semiconductor element drive circuit is mounted on the block portion, and the output of the drive circuit is passed through the conductor layer of the first bridge portion and the conductor layer of the second bridge. You may make it connect with the said optical semiconductor element. According to this configuration, since heat generated by the drive circuit can be prevented from flowing into the temperature control device, the characteristics of the temperature control device are not deteriorated, and the power consumption of the temperature control device can be reduced. Therefore, power consumption of the optical semiconductor device can be reduced. Further, it is possible to transmit a high-frequency electric signal from the drive circuit to the optical semiconductor element while suppressing loss.

  The said structure WHEREIN: The said block part is good also as a heat sink. According to this configuration, it is possible to suppress the heat generated by the drive circuit from flowing into the temperature control device by cooling the drive circuit with the heat sink.

  ADVANTAGE OF THE INVENTION According to this invention, it can suppress that heat other than the heat which an optical semiconductor element emits flows into a temperature control apparatus. Therefore, power consumption of the optical semiconductor device can be reduced.

FIG. 1A is a top view of the internal structure of the optical semiconductor device according to the comparative example. FIG. 1B is a side view of the internal structure of the optical semiconductor device according to the comparative example. FIG. 2A is a top view of the internal structure of the optical semiconductor device according to the first embodiment. FIG. 2B is a side view of the internal structure of the optical semiconductor device according to the first embodiment. FIG. 3 is a diagram illustrating the configuration of the stripline and the wire according to the first embodiment. FIG. 4A is a top view of the internal structure of the optical semiconductor device according to the second embodiment. FIG. 4B is a side view of the internal structure of the optical semiconductor device according to the second embodiment. FIG. 5 is a side view of the internal structure of the optical semiconductor device according to the second embodiment. FIG. 6 is a diagram illustrating the configuration of the stripline, the wire, and the relay unit according to the second embodiment. FIG. 7A is a top view of the internal structure of the optical semiconductor device according to the third embodiment. FIG. 7B is a side view of the internal structure of the optical semiconductor device according to the third embodiment. FIG. 8A is a top view of the internal structure of the optical semiconductor device according to the fourth embodiment. FIG. 8B is a side view of the internal structure of the optical semiconductor device according to the fourth embodiment. FIG. 9A is a top view of the internal structure of the optical semiconductor device according to the fifth embodiment. FIG. 9B is a side view of the internal structure of the optical semiconductor device according to the fifth embodiment.

  For comparison with the embodiment of the present invention, a comparative example of the optical semiconductor device will be described with reference to FIGS. 1 (a) and 1 (b). FIG. 1A is a top view of an internal structure of a TOSA (Transmitter Optical Sub Assembly) 100 which is an example of an optical semiconductor device. FIG. 1B is a side view of the internal structure of the TOSA 100. In FIG. 1A and FIG. 1B, the same components are denoted by the same reference numerals.

  1A and 1B, the TOSA 100 includes a housing 2, a heat sink 30, an LDD (laser diode driver) 34, a strip line 28, an LD 16, a TEC (Thermoelectric Cooler) 10, an insulating unit 8, It has a lens 18, a receptacle 4, carriers 12 and 14, substrates 32, 36 and 38, wires 40, 42, 44, 46, 48, 50 and 52. The heat sink 30 and the TEC 10 are fixed to the bottom surface of the housing 2. One end of the substrate 32, the LDD 34, the substrate 36 and the strip line 28 is fixed to the upper surface of the heat sink 30. One end of the strip line 28 is thermally connected to the heat sink 30. A carrier 12 is fixed to the upper surface of the TEC 10. The carrier 14 and the lens 18 are fixed to the upper surface of the carrier 12. On the upper surface of the carrier 14, the other ends of the LD 16, the substrate 38, and the strip line 28 are fixed. The other end of the strip line 28 is thermally connected to the TEC 10.

  The LDD 34 is a circuit that drives the LD 16. The LD 16 is an optical semiconductor element that converts an electrical signal into an optical signal. The strip line 28 is a path for transmitting an electrical signal from the LDD 34 to the LD 16. On the upper surface of the strip line 28, a conductor layer electrically connected to a terminal portion provided on the substrate 36 is provided. The TEC 10 is a temperature control device that controls the temperature of the LD 16 that generates heat. The heat sink 30 is a block portion provided on the bottom surface of the housing 2 and is a component that cools the LDD 34 that generates heat. The material of the heat sink 30 is, for example, AlN, CuW or the like. The receptacle 4 is a connector that optically couples the LD 16 and an optical fiber (not shown). The optical signal output from the LD 16 is input to the optical fiber by the lens 18.

  The insulating portion 8 has wiring, and the lead 22 connected to the insulating portion 8 and the wires 40 and 42 are electrically connected. Another device (not shown) is connected to the lead 22 of the optical semiconductor device 100, and an electrical signal is input thereto. The substrates 32, 36 and 38 have wiring. A terminal portion which is a conductor electrically connected to one end of the strip line 28 is provided on a part of the wiring of the substrate 36. The wires 40 and 42, 44, 46, 48, 50 and 52 are respectively connected to the lead 22 and the substrate 32, the substrate 32 and the LDD 34, the LDD 34 and the substrate 36, the terminal portion of the substrate 36 and the strip line 28, the strip line 28 and the substrate 38, And the board | substrate 38 and LD16 are electrically connected. Therefore, when an electrical signal is input to the lead 22 from another device, the LDD 34 drives the LD 16 based on the electrical signal, and the LD 16 converts the electrical signal into an optical signal and outputs it. Ribbons may be used for the wires 40, 42, 44, 46, 48, 50 and 52.

  The arrow in FIG.1 (b) has shown the flow of heat. The LD 16 is controlled to a constant temperature by the TEC 10. The heat generated by the TEC 10 is released to the bottom surface of the housing 2. The heat released from the TEC 10 flows into the heat sink 30 via the bottom surface of the housing 2, so that the heat dissipation efficiency of the heat sink 30 is lowered, and the heat generated by the LDD 34 further passes to the LD 16 via the strip line 28. It flows in. Heat generated by the LDD 34 is released to the bottom surface of the housing 2 by the heat sink 30. Further, the heat generated by the LDD 34 also flows into the LD 16 through the strip line 28. For this reason, since the TEC 10 must release the heat flowing in from the LDD 34 in addition to the heat generated by the LD 16, the cooling characteristics of the TEC 10 are deteriorated. The TEC 10 consumes extra power in order to suppress a decrease in cooling characteristics. Therefore, the power consumption of the optical semiconductor device increases.

  In addition, heat from the outside may flow into the LD 16 through the side wall of the housing 2 and the strip line 28. Also in this case, since the TEC 10 must release the heat flowing from the outside in addition to the heat generated by the LD 16, the cooling characteristics of the TEC 10 are deteriorated. The TEC 10 consumes extra power in order to suppress a decrease in cooling characteristics. Therefore, the power consumption of the optical semiconductor device increases.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

  With reference to FIG. 2A and FIG. 2B, the configuration of the optical semiconductor device according to the first embodiment will be described. FIG. 2A is a top view of the internal structure of the TOSA 200 according to the first embodiment. FIG. 2B is a side view of the internal structure of the TOSA 200. The TOSA 200 shown in the first embodiment is different from the TOSA 100 shown in the comparative example in that strip lines 60 and 62 and a wire 64 are provided instead of the strip line 28.

  As shown in FIGS. 2A and 2B, the strip line 62 has a conductor layer electrically connected to the LD 16 provided on the upper surface, and one end fixed to the upper surface of the carrier 14 that transfers heat to the TEC 10. The other end extends toward the strip line 60 and is located in a region between the LD 16 and the terminal portion of the substrate 36. One end of the strip line 62 is thermally connected to the upper surface of the TEC 10. The strip line 60 has a conductor layer electrically connected to the terminal portion of the substrate 36 provided on the top surface, one end fixed to the heat sink 30 provided on the bottom surface of the housing 2, and the other end directed to the strip line 62. And is located in a region between the LD 16 and the terminal portion of the substrate 36. One end of the strip line 60 is thermally connected to the heat sink 30. The wire 64 electrically connects the conductor layer of the strip line 62 and the conductor layer of the strip line 60 and has a thermal conductivity smaller than the thermal conductivity of the strip line 62 and the strip line 60. For example, the wire 64 may be a ribbon. Since other configurations are the same as those of the comparative example, description thereof is omitted.

  The configuration of the strip lines 60 and 62 and the wire 64 will be described in detail with reference to FIG. FIG. 3 is an enlarged view of the peripheral portions of the strip lines 60 and 62 and the wire 64 of FIG. As shown in FIG. 3, the strip line 60 is provided on the upper surface of the dielectric 92, the metal plate 90 that is a conductor layer provided on the upper surface of the dielectric 92, the ground electrode 76 that is provided on the lower surface and is the ground, This is a microstrip line having metal plates 91 and 93 connected to the ground electrode 76 through via holes. Similarly, the strip line 62 is provided on the upper surface of the dielectric 96, the metal plate 94 which is a conductor layer provided on the upper surface of the dielectric 96, the ground electrode 78 which is provided on the lower surface and which is the ground, and via the via hole. And a metal strip 95 and 97 connected to the ground electrode 78. The metal plates 90 and 94 function as signal lines for electrical signals flowing from the LDD 34 to the LD 16. The material of the metal plates 90 and 94 is, for example, Au. The material of the dielectrics 92 and 96 is, for example, ceramic or alumina. The wire 64 connects one end of the metal plate 90 of the strip line 60 and one end of the metal plate 94 of the strip line 62. The wire 67 connects the metal plate 91 and the metal plate 95. The wire 69 connects the metal plate 93 and the metal plate 97. Since the ground potentials of the strip lines 60 and 62 can be made common by the wires 67 and 69, the frequency characteristics can be improved. Since the electric signal flowing from the LDD 34 to the LD 16 is a high-frequency signal, the loss in transmission can be reduced by using the strip lines 60 and 62.

  According to the first embodiment, the wire 64 has a lower thermal conductivity than the strip lines 60 and 62. As a result, the heat generated by the LDD 34 is suppressed from flowing from the strip line 60 to the strip line 62, and the flow from the TEC 10 is also suppressed. Therefore, the heat inflow unlike the comparative example hardly occurs and the cooling characteristics of the TEC 10 are not easily lowered, so that the power consumption of the TEC 10 can be reduced. Therefore, power consumption of the TOSA 200 can be reduced. Further, by shortening the wire 64, it is possible to reduce a loss in transmission of a high-frequency signal.

  According to the first embodiment, as shown in FIGS. 2 (a) and 2 (b), by forming a path for transmitting an electrical signal by the strip lines 60 and 62 and the wire 64, the LDD 34, the LD 16 and the TEC 10 Can be separated and mounted on the housing 2. Since the amount of heat generated by the LDD 34 is large, the influence of heat received by the LD 16 and the TEC 10 from the LDD 34 can be reduced.

  In the first embodiment, the example in which the carriers 14 and 12 are provided between the LD 16 and the substrate 38 and the TEC 10 has been described. Note that the LD 16 and the substrate 38 may be directly fixed to the upper surface of the TEC 10 without providing the carriers 14 and 12.

  In the first embodiment, the example in which the strip lines 60 and 62 are microstrip lines has been described. Thereby, since the cross-sectional area of the dielectrics 92 and 96 can be reduced and the thermal resistance can be increased, the inflow of heat can be suppressed. In addition, for example, the strip lines 60 and 62 may be coplanar strip lines. The coplanar strip line has a metal plate on the upper surface and a ground electrode on both sides of the metal plate, and has a larger cross-sectional area than the micro strip line, so that the thermal resistance is reduced. Therefore, it is preferable that the strip lines 60 and 62 be microstrip lines.

  In the first embodiment, the materials of the dielectrics 92 and 96 included in the strip lines 60 and 62 are preferably ceramics. Thereby, the heat | fever which flows in into the striplines 60 and 62 can be suppressed. Alumina or the like may be used as the ceramic material.

  In the first embodiment, the lengths of the strip lines 60 and 62 may be substantially the same or different.

  With reference to FIGS. 4A and 4B, the structure of the optical semiconductor device according to the second embodiment will be described. FIG. 4A is a top view of the internal structure of the TOSA 300 according to the second embodiment. FIG. 4B is a side view of the internal structure of the TOSA 300. The TOSA 300 according to the second embodiment is different from the TOSA 200 according to the first embodiment in that the relay unit 66 is included. Since others are the same as those in the first embodiment, the description thereof is omitted.

  As shown in FIGS. 4A and 4B, the relay unit 66 is provided in a region between the TEC 10 and the heat sink 30 on the bottom surface of the housing 2. That is, the relay portion 66 is provided in a region between the LD 16 and the terminal portion of the substrate 36. The relay unit 66 supports the strip lines 60 and 62 with respect to the bottom surface of the housing 2. The relay unit 66 has a thermal conductivity smaller than that of the strip lines 60 and 62. The strip lines 60 and 62 are microstrip lines as in the first embodiment.

  According to the second embodiment, since the strip lines 60 and 62 can be supported with respect to the bottom surface of the housing 2, resistance to stress applied when the wires 64 are attached to the strip lines 60 and 62 by bonding is improved. Can do. Therefore, it is possible to prevent the strip lines 60 and 62 from being broken or the strip lines 60 and 62 from being detached from the heat sink 30 and the carrier 14 by bonding.

  According to the second embodiment, the resistance to the stress of the strip lines 60 and 62 is improved, so that the length of the strip lines 60 and 62 can be increased. Thereby, since LDD34, LD16, and TEC10 can be spaced apart and mounted in the housing | casing 2, the influence of the heat which LD16 and TEC10 receive from LDD34 can be reduced.

  In the second embodiment, the material of the relay portion 66 is preferably quartz glass. Thereby, the inflow of heat from the strip line 60 to the strip line 62 can be suppressed. The material of the relay portion 66 may be other materials having a thermal conductivity smaller than that of the strip lines 60 and 62 and the heat sink 30 instead of quartz glass.

  In the second embodiment, as shown in FIGS. 5 and 6, a metal as a ground electrode is provided on the upper surface of the relay portion 66 in contact with the strip lines 60 and 62 and on the lower surface of the strip lines 60 and 62 in contact with the relay portion 66. Also good. FIG. 5 is a side view of the internal structure of the TOSA 300 and shows an example in which metal is provided on the upper surface of the relay portion 66 and the lower surfaces of the strip lines 60 and 62. FIG. 6 is an enlarged view of the peripheral portion of the relay portion 66 and the strip lines 60 and 62 of FIG. 5 and 6, the same components as those shown in FIGS. 3 and 4 are denoted by the same reference numerals, and description thereof is omitted. As shown in FIGS. 5 and 6, metal is provided on the upper surface 84 of the relay portion 66. This metal may be patterned on a part of the upper surface 84. Similarly, metal is provided on the upper surface 82 of the heat sink 30, the lower surface 70 of the substrate 32, the lower surface 72 of the LDD 34, the lower surface 74 of the substrate 36, the lower surface 80 of the substrate 38, and the upper surface 86 of the carrier 14. The ground electrodes 76 and 78 of the strip lines 60 and 62 are metal. Thereby, since the part provided with the metal serves as a ground for the electric signal, the frequency characteristics can be improved. Further, as shown in FIG. 6, since the upper surface 84 of the relay portion 66 and the ground electrodes 76 and 78 of the strip lines 60 and 62 are in contact with each other, the ground potential can be made common, thereby improving the frequency characteristics. be able to. By using the relay portion 66 as shown in FIG. 6, the strip lines 60 and 62, as shown in FIG. 3, without the metal plates 91, 93, 95 and 97, the wires 67 and 69, and the via holes, can be simplified. The ground potential of the strip lines 60 and 62 can be made common in the configuration. Therefore, cost can be reduced.

  In the second embodiment, the example in which the strip lines 60 and 62 are microstrip lines has been described. According to this, as shown in FIG. 6, by connecting the metal plates 90 and 94 on the upper surface and the wire 64, it is possible to transmit a high-frequency signal while suppressing loss. Further, since the ground electrodes 76 and 78 on the lower surface and the metal on the upper surface 84 of the relay portion 66 are in contact with each other, the ground potential can be made common, so that the frequency characteristics can be improved. Furthermore, since the metal plate and the ground electrode can be disposed on the surfaces of the dielectric that face each other, the cross-sectional area of the dielectric can be reduced and the thermal resistance can be increased. Therefore, it is possible to suppress the heat generated by the LDD 34 from flowing into the TEC 10 via the strip lines 60 and 62.

  With reference to FIGS. 7A and 7B, the structure of the optical semiconductor device according to the third embodiment will be described. FIG. 7A is a top view of the internal structure of the TOSA 400 according to the third embodiment. FIG. 7B is a side view of the internal structure of the TOSA 400. The TOSA 400 according to the third embodiment is different from the TOSA 300 according to the second embodiment in the position of the relay unit 66. Since others are the same as those in the second embodiment, the description thereof is omitted.

  As shown in FIGS. 7A and 7B, the relay portion 66 is fixed to the bottom surface of the housing 2 so as to be in contact with the side surface of the heat sink 30.

  According to the third embodiment, in the step of fixing the relay portion 66 to the bottom surface of the housing 2, the relay portion 66 can be easily fixed to the bottom surface of the housing 2 along the side surface of the heat sink 30. Therefore, the work effort can be reduced.

  With reference to FIGS. 8A and 8B, the structure of the optical semiconductor device according to the fourth embodiment will be described. FIG. 8A is a top view of the internal structure of the TOSA 500 according to the fourth embodiment. FIG. 8B is a side view of the internal structure of the TOSA 500. The TOSA 500 of the fourth embodiment is different from the TOSA 200 of the first embodiment in that it does not have the LDD 34 and the heat sink 30 and an electric signal for driving the LD 16 is input from another device (not shown). 8A and 8B, the same reference numerals are given to the same components as those in the first embodiment.

  As shown in FIGS. 8A and 8B, the TOSA 500 includes the housing 2, the strip lines 60 and 62, the LD 16, the TEC 10, the insulating portion 8, the lens 18, the receptacle 4, the carriers 12 and 14, the wire 64, 70 and 72 and leads 22. The insulating portion 8 provided on the side wall of the housing 2 is provided with a wiring and a terminal portion which is a conductor in a part of the wiring. The lead 22 and the terminal portion of the insulating portion 8 are electrically connected to the terminal portion of the insulating portion 8 and the wire 70. Another device is connected to the lead 22, and an electrical signal is input from the other device. Other devices are devices that generate heat. The wires 70, 64, and 72 electrically connect the terminal portion of the insulating portion 8 to the strip line 60, the strip line 60 and the strip line 62, and the strip line 62 and the LD 16, respectively. Therefore, when an electrical signal is input to the lead 22 from another device, the LD 16 converts the electrical signal into an optical signal and outputs it.

  The strip line 62 has a conductor layer electrically connected to the LD 16 provided on the upper surface, one end fixed to the upper surface of the carrier 14 that transfers heat to the TEC 10, and the other end extended toward the strip line 60. And the terminal portion of the insulating portion 8. One end of the strip line 62 is thermally connected to the upper surface of the TEC 10. The strip line 60 has a conductor layer electrically connected to the terminal portion of the insulating portion 8 on the upper surface, one end fixed to the insulating portion 8 provided on the side wall of the housing 2, and the other end to the strip line 62. And is located in a region between the LD 16 and the terminal portion of the insulating portion 8. One end of the strip line 60 is thermally connected to the insulating portion 8 provided on the side wall of the housing 2. The wire 64 electrically connects the conductor layer of the strip line 62 and the conductor layer of the strip line 60 and has a thermal conductivity smaller than the thermal conductivity of the strip line 62 and the strip line 60. Since others are the same as those in the first embodiment, the description thereof is omitted.

  According to the fourth embodiment, the wire 64 has a lower thermal conductivity than the strip lines 60 and 62. As a result, heat generated by another device flows into the wire 70 and the strip line 60 via the lead 22, but the flow from the strip line 60 to the strip line 62 is suppressed, and the flow into the TEC 10 is also suppressed. . Accordingly, heat does not flow in such a way that heat is sequentially transferred from other devices to the strip lines 60 and 62, the TEC 10, the bottom surface, the side wall, and the strip line 60 of the housing 2, and the cooling characteristics of the TEC 10 are not deteriorated. Power consumption can be reduced. Therefore, power consumption of the TOSA 500 can be reduced.

  With reference to FIG. 9A and FIG. 9B, a configuration of an optical semiconductor device according to the fifth embodiment will be described. FIG. 9A is a top view of the internal structure of the TOSA 600 according to the fifth embodiment. FIG. 9B is a side view of the internal structure of the TOSA 600. The TOSA 600 according to the fifth embodiment is different from the TOSA 500 according to the fourth embodiment in that the relay section 66 illustrated in the second embodiment is included. 9A and 9B, the same reference numerals are given to the same components as those of the fourth embodiment.

  As illustrated in FIGS. 9A and 9B, the relay unit 66 is provided in a region between the TEC 10 and the side wall of the housing 2 on the bottom surface of the housing 2. That is, the relay portion 66 is provided in a region between the LD 16 and the terminal portion of the insulating portion 8 provided on the side wall of the housing 2. The relay unit 66 supports the strip lines 60 and 62 with respect to the bottom surface of the housing 2. The relay unit 66 has a thermal conductivity smaller than that of the strip lines 60 and 62. Since others are the same as those in the fourth embodiment, the description thereof is omitted.

  According to the fifth embodiment, the strip lines 60 and 62 can be supported with respect to the bottom surface of the housing 2 as in the second embodiment. Therefore, the wire 64 is attached to the strip lines 60 and 62 by bonding. Resistance to stress can be improved. Therefore, it is possible to prevent the strip lines 60 and 62 from being broken or the strip lines 60 and 62 from being detached from the heat sink 30 and the carrier 14 by bonding. The configuration in which the metal is provided on the lower surfaces of the strip lines 60 and 62 and the upper surface of the relay portion 66 is the same as in the second embodiment.

  The preferred embodiments of the present invention have been described in detail above, but the present invention is not limited to such specific embodiments, and various modifications can be made within the scope of the gist of the present invention described in the claims.・ Change is possible.

2 Housing 10 TEC
16 LD
30 heat sink 34 LDD
60, 62 Strip line 64 Wire 66 Relay part 100, 200, 300, 400, 500, 600 TOSA

Claims (8)

A housing,
A temperature control device provided in the housing;
An optical semiconductor element provided on the temperature control device;
A block portion provided on the bottom surface of the housing, or a terminal portion provided on a side wall of the housing;
A conductor layer electrically connected to the optical semiconductor element is provided on the upper surface, one end is thermally connected to the temperature control device, and the other end is in a region between the optical semiconductor element and the terminal portion. A first bridge portion located;
A conductor layer electrically connected to the terminal portion is provided on the upper surface, one end is thermally connected to the block portion or the side wall of the housing, and the other end is the optical semiconductor element and the terminal portion. A second bridge portion located in a region between
The conductor layer of the first bridge part and the conductor layer of the second bridge part are electrically connected and have a thermal conductivity smaller than the thermal conductivity of the first bridge part and the second bridge part. A connection,
An optical semiconductor device comprising:   2. The optical semiconductor device according to claim 1, wherein the conductor layer of the first bridge portion and the conductor layer of the second bridge portion together form a strip line.   The optical semiconductor device according to claim 2, wherein the first bridge portion and the second bridge portion are made of ceramic.   Provided in a region between the optical semiconductor element and the terminal portion on the bottom surface of the housing, and supports the first bridge portion and the second bridge portion with respect to the bottom surface of the housing; The optical semiconductor device according to claim 1, further comprising: a relay unit having a thermal conductivity smaller than that of the bridge unit and the second bridge unit. Ground electrodes are provided on the bottom surfaces of the first bridge part and the second bridge part,
The conductor layer of the first bridge portion and the conductor layer of the second bridge portion together form a strip line,
5. The optical semiconductor device according to claim 4, wherein a conductive portion for electrically connecting the ground electrodes of the first bridge portion and the second bridge portion is provided on the relay portion.   The optical semiconductor device according to claim 4, wherein the relay portion is made of quartz glass. The block portion is mounted with a drive circuit for the optical semiconductor element,
2. The optical semiconductor device according to claim 1, wherein an output of the drive circuit is connected to the optical semiconductor element through the conductor layer of the first bridge portion and the conductor layer of the second bridge. . The optical semiconductor device according to claim 7, wherein the block portion is a heat sink.

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