JP2011124365A - Method for manufacturing semiconductor device, and semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor device excellently connecting connection parts divided into plural and resistors formed among these connection parts by electrode pads. <P>SOLUTION: In the method for manufacturing the semiconductor device, a plurality of FETs 12 are formed in parallel on a compound semiconductor substrate 11, and a gate pads 27 is divided. The method for manufacturing the semiconductor device includes a step of forming the resistors 22 on the compound semiconductor substrate 11, a step of forming protective patterns 23 protecting the resistors 22 on the resistors 22, and a step of forming protective films 24 on the compound semiconductor substrate 11 containing a plurality of FETs 12, the resistors 22, and the protective patterns 23. The method for manufacturing the semiconductor device further includes a step of removing the protective films 24 on electrode connection parts 17, 18, and 21 connecting the respective electrodes 13, 14 and 15 for the plurality of FETs 12, respectively, and on the protective patterns 23 by etching and a step of forming the electrode pads 25, 26 and 27 at places removed by etching. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a method for manufacturing a semiconductor device in which a plurality of transistors are formed in parallel on a substrate, and a semiconductor device manufactured by this method.

  A conventional semiconductor device capable of high gain has a configuration in which a plurality of field effect transistors (hereinafter referred to as FETs) are provided in parallel on a compound semiconductor substrate such as GaN or GaAs. In this semiconductor device, each electrode (drain electrode, source electrode, gate electrode) constituting each FET is an electrode connection portion (drain electrode connection portion, source electrode connection portion, gate electrode) that connects each of the plurality of electrodes. Electrically connected to the connecting part). Further, a protective film such as silicon nitride (SiN) is formed on the compound semiconductor substrate on which the FET is formed so that each electrode connection portion is exposed. Electrode pads (drain pad, source pad, gate pad) are formed on the exposed electrode connection portions.

  When a high-frequency signal is input to such a semiconductor device, a loop oscillation occurs in the device, causing a problem that a signal having a frequency other than a desired frequency is amplified. Here, the loop oscillation is a phenomenon in which a standing wave having a frequency corresponding to the length of this path is generated in an electrically closed path in the apparatus.

  Therefore, conventionally, the gate electrode connection portion is divided into a plurality of pieces, and a strip-shaped resistor is formed between the gate electrode connection portions, and the gate pad is formed on the surface of one end of the gate electrode connection portion and the resistor. And was formed to connect. (See Patent Documents 1 and 2).

  In the above-described configuration, by dividing the gate electrode connection portion into a plurality of parts, the length of the electrically closed path in the device is shortened, so that the generation of standing waves is suppressed and loop oscillation is suppressed. .

  Furthermore, in the above-described configuration, even when a potential difference is generated between the gate pads, current flows through the resistor so as to reduce the potential difference between the gate pads, so that each FET can be operated uniformly.

  The resistor is made of, for example, a silicided metal silicide. This is because the silicided metal silicide is difficult to react with the above-described compound semiconductor substrate, and a wide range of resistance of about 1 to 1000 Ω with a length of μm level and thickness of about several tens of nanometers is arbitrarily selected. It is used because it is a material that can be formed.

JP-A-4-45547 JP 2001-274415 A

In the semiconductor device described above, the gate pad is formed as follows. That is, first, a protective film is formed on a compound semiconductor substrate on which a plurality of FETs, electrode connection portions, and strip-shaped resistors are formed. Next, the protective film on both ends of the resistor and on each electrode connection portion is removed by dry etching using a fluorine compound gas such as CF ₄ gas. Then, the drain pad and the source pad are formed on the drain electrode connection portion and the source electrode connection portion exposed on the surface by removing the protective film, and the resistor and the gate electrode connection portion are electrically connected. Thus, a gate pad is formed.

  However, in the dry etching process for removing the protective film, an etching gas suitable for etching the protective film formed of a Si-based material is used. Accordingly, in this etching process, the resistor formed of the Si-based material is also etched. Therefore, there is a problem that the gate pad and the resistor are not in good contact.

  That is, since the etching gas enters under the protective film left on the central portion of the resistor, the resistor under the protective film is also etched. As a result, there is a problem that the gate pad and the resistor are not in contact with each other and the gate electrode connection portion is not connected by the resistor. In addition, even when the resistor under the protective film is not etched, the gate pad contacts only on the side surface of the resistor, so the contact area is very small, and this part is equivalently a large resistance, There exists a problem that the function as a resistor is not fully exhibited.

  Accordingly, the present invention provides a method of manufacturing a semiconductor device and a semiconductor device in which an electrode connection section divided into a plurality of parts and a resistor formed between these electrode connection sections are satisfactorily connected by electrode pads. There is.

  A method of manufacturing a semiconductor device according to the present invention includes a plurality of transistors arranged in parallel to each other, and a plurality of drain electrodes, a plurality of source electrodes, and a plurality of gate electrodes that constitute these transistors, respectively. A connection part, a source electrode connection part, and a gate electrode connection part are formed on the compound semiconductor substrate, respectively, and at least one of the drain electrode connection part and the gate electrode connection part is divided into a plurality of parts. The electrode connection portions are a method of manufacturing a semiconductor device electrically connected to each other by a resistor formed between them, and each of the electrode connection portions has a band-like shape at a position between the divided electrode connection portions. Forming the resistor, and forming protective patterns for protecting the resistor on the surfaces of both ends of the resistor, respectively; A step of forming the protective film on the compound semiconductor substrate on which the plurality of transistors, each of the electrode connecting portions, the resistor, and the protective pattern are respectively formed, on the protective pattern, and Removing the protective film formed on each electrode connecting portion by etching; forming a first electrode pad on the non-divided electrode connecting portion; and forming the first electrode pad on the divided electrode connecting portion, Forming a plurality of second electrode pads so as to be in contact with the protective pattern adjacent to the divided electrode connecting portion.

  The semiconductor device according to the present invention electrically connects a plurality of transistors arranged in parallel to each other on a compound semiconductor substrate, and a plurality of drain electrodes, a plurality of source electrodes, and a plurality of gate electrodes constituting the transistors. A drain electrode connection portion, a source electrode connection portion, and a gate electrode connection portion that are connected to each other, and at least one of the drain electrode connection portion and the gate electrode connection portion is divided into a plurality of parts. A strip-shaped resistor formed between the plurality of divided electrode connection portions, a protective pattern formed on the surfaces of both ends of the resistor and protecting the resistor, and the electrode connection And the protective film formed on the compound semiconductor substrate so that the top surface and the protective pattern are exposed, A first electrode pad formed on the connecting portion; and a plurality of second pads formed on the divided electrode connecting portion so as to contact the protective pattern adjacent to the divided electrode connecting portion. And an electrode pad.

  ADVANTAGE OF THE INVENTION According to this invention, the manufacturing method and semiconductor device of a semiconductor device by which the electrode connection part divided | segmented into multiple and the resistor formed between these electrode connection parts are connected favorably by an electrode pad are provided. be able to.

1 is a top view illustrating a semiconductor device according to an embodiment of the present invention. Sectional drawing shown along the dashed-dotted line AA 'of FIG. It is sectional drawing which shows the manufacturing method of the semiconductor device of this embodiment along the dashed-dotted line AA 'of FIG. It is sectional drawing which shows the manufacturing method of the semiconductor device of this embodiment along the dashed-dotted line AA 'of FIG. It is sectional drawing which shows the manufacturing method of the semiconductor device of this embodiment along the dashed-dotted line AA 'of FIG. It is sectional drawing which shows the manufacturing method of the semiconductor device of this embodiment along the dashed-dotted line AA 'of FIG. It is sectional drawing which shows the manufacturing method of the semiconductor device of this embodiment along the dashed-dotted line AA 'of FIG. The top view which shows the semiconductor device which concerns on the 1st modification of this invention. The top view which shows the semiconductor device which concerns on the 2nd modification of this invention. Sectional drawing which shows the semiconductor device which concerns on the 3rd modification of this invention along the dashed-dotted line AA 'of FIG.

  Hereinafter, a semiconductor device according to an embodiment of the present invention will be described in detail with reference to the drawings. FIG. 1 is a top view showing the semiconductor device of this embodiment. As shown in FIG. 1, the semiconductor device according to the present embodiment has a compound semiconductor substrate 11 in which, for example, a plurality of field effect transistors 12 (hereinafter referred to as FETs 12) are arranged in parallel as a plurality of transistors. is there. The compound semiconductor substrate 11 is a substrate formed of a material having excellent high frequency characteristics such as a GaAs substrate or a GaN substrate.

  Each FET 12 includes a drain electrode 13, a source electrode 14, and a gate electrode 15 that are parallel to each other, and a gate electrode 15 is formed between the drain electrode 13 and the source electrode 14. Each of these electrodes 13, 14, 15 is formed so as to cross over the element region 16 formed in a strip shape on the compound semiconductor substrate 11. The element region 16 is a region appropriately formed so that, for example, the FET 12 performs a desired operation.

  Here, for example, attention is focused on the FET 12 shown in FIG. At this time, the FET 12 and the left FET 12 adjacent thereto are formed so as to share the source electrode 14 with each other. Further, the FET 12 shown in FIG. 1 and the right-side FET 12 adjacent thereto are formed so as to share the drain electrode 13. Thus, the plurality of FETs 12 are arranged so as to share the source electrode 14 or the drain electrode 13 with adjacent FETs. The drain electrode 13 and the source electrode 14 are made of ohmic metal such as AuGe, for example. The gate electrode 15 is made of, for example, a Schottky metal in which Ti, Pt, and Au are stacked in this order.

  The plurality of drain electrodes 13 described above are connected to a drain electrode connection portion 17 formed on the compound semiconductor substrate 11. Similarly, the plurality of source electrodes 14 are connected to a source electrode connection portion 18 formed on the compound semiconductor substrate 11. The plurality of gate electrodes 15 are connected to a gate bus line 19 formed on the compound semiconductor substrate 11. The gate bus line 19 is connected to the gate electrode connection portion 21 through a plurality of lead lines 20. Thus, the plurality of gate electrodes 15 are electrically connected to the gate electrode connection portion 21. The drain electrode connecting portion 17 is formed integrally with the plurality of drain electrodes 13. Similarly, the source electrode connection portion 18 is formed integrally with the plurality of source electrodes 14. The gate electrode connection portion 21 is formed integrally with the plurality of gate electrodes 15, the gate bus lines 19, and the plurality of lead lines 20.

  The drain electrode connection portion 17, the source electrode connection portion 18, the gate bus line 19, the plurality of lead lines 20, and the gate electrode connection portion 21 are each formed outside the element region 16 on the compound semiconductor substrate 11. Among these, the drain electrode connection portion 17 is formed along the longitudinal direction of the element region 16. Further, the source electrode connecting portion 18 is formed along the longitudinal direction of the element region 16 at a position facing the drain electrode connecting portion 17 with the element region 16 therebetween. Furthermore, the gate bus line 19 is formed along the longitudinal direction of the element region 16 at a position between the source electrode connection 18 and the element region 16, and the gate electrode connection 21 is connected to the source electrode connection 18. Is formed along the longitudinal direction of the element region 16 at a position facing the gate bus line 19 with a gap therebetween. The plurality of lead lines 20 are formed between the gate bus line 19 and the gate electrode connection portion 21 in a direction perpendicular to the longitudinal direction thereof. And the gate electrode connection portion 21 are electrically connected.

  The plurality of source electrodes 14 are formed so as to be electrically insulated from each other at positions intersecting the gate bus lines 19. Similarly, the source electrode connection portion 18 is formed so as to be electrically insulated from each other at a position intersecting with the plurality of lead lines 20. Specifically, for example, the plurality of source electrodes 14 are formed in an air bridge shape on the gate bus line 19. Alternatively, it is formed on the gate bus line 19 via an insulator. The same applies to the source electrode connecting portion 18.

  Here, the gate bus line 19 and the gate electrode connection portion 21 are divided into a plurality of parts. The gate electrode connection portion 21 is formed so as to have a cutout portion at this end portion. These division numbers are appropriately determined according to the carrier frequency of the high-frequency signal input to the apparatus. Although FIG. 1 shows an example in which the gate bus line 19 and the gate electrode connection portion 21 are divided into two parts, actually, for example, in a device in which about 100 to 200 FETs 12 are formed in total. When a 10 GHz RF signal is input, the gate bus line 19 and the gate electrode connection portion 21 are divided into, for example, about 10 to 20 pieces. Note that the notched portion formed at the end of the gate electrode connecting portion 21 is not necessarily formed.

  Below, the divided | segmented part of the gate electrode connection part 21 is demonstrated with reference to FIG. 2 is a cross-sectional view taken along one-dot chain line AA ′ in FIG. As shown in FIG. 2, a strip-shaped resistor 22 is formed between the gate electrode connection portions 21 divided into a plurality of portions so that both end portions thereof are located in the notch portions. The resistor 22 is formed of a material that does not easily react with the compound semiconductor substrate 11. When a GaN substrate or a GaAs substrate is applied as the compound semiconductor substrate 11, for example, a silicided metal silicide or tantalum nitride is applied as the resistor 22. In particular, the silicided metal silicide is suitable as the resistor 22 because it can arbitrarily form a wide resistance of about 1 to 1000Ω with a length of μm level and a thickness of about several tens of nanometers. is there. In the case where the gate electrode connection portion 21 has a structure not having a notch, the resistor 22 may be formed between the gate electrode connection portions 21.

  Protection patterns 23 are formed on the surfaces of both ends of the strip-shaped resistor 22, respectively. These protective patterns 23 are patterns that protect the resistor 22 from an etching gas in an etching process of the protective film 24 described later. These protective patterns 23 are formed of the same material as the drain electrode 13 or the source electrode 14, for example. However, the protective pattern 23 can be applied as long as it is a material that is not etched by the etching gas used when the protective film 24 is etched and is a conductive material.

As described above, the electrode connection portions 17, the plurality of FETs 12 shown in FIG. 1, the electrode connection portions 17, 18, 21, etc. 18 and 21, a protective pattern 23, and a protective film 24 (not shown in FIG. 1) having openings through which the compound semiconductor substrate 11 between the gate electrode connection portion 21 and the resistor 22 is exposed. ing. The protective film 24 is made of, for example, silicon nitride (SiN) or silicon oxide (SiO ₂ ). Electrode pads are respectively formed in the openings of the protective film 24. That is, the drain pad 25 and the source pad 26 are formed on the drain electrode connection portion 17 and the source electrode connection portion 18, respectively.

  As shown in FIG. 2, a gate pad 27 is extended from the gate electrode connecting portion 21 to a position including the protective pattern 23 adjacent to the connecting portion 21. Therefore, each gate electrode connection part 21 divided | segmented into plurality by each gate pad 27 and the protection pattern 23 adjacent to this connection part 21 are electrically connected. Further, each of the divided gate electrode connection portions 21 is electrically connected via each gate pad 27, the protection pattern 23, and the resistor 22.

  Next, a method for manufacturing the above-described semiconductor device will be described with reference to FIGS. 1 and 2 and FIGS. 3 to 7 are cross-sectional views showing the method of manufacturing the semiconductor device according to this embodiment along the one-dot chain line AA ′ in FIG.

  First, as shown in FIG. 1, a plurality of gate electrodes 15, a plurality of gate bus lines 19, a plurality of lead lines 20, and a plurality of gate electrode connection portions 21 are integrated on the compound semiconductor substrate 11 by patterning. To form.

  Next, as shown in FIG. 3, a resistor 22 is formed between the gate electrode connection portions 21 by patterning.

  Next, as shown in FIG. 1, a plurality of drain electrodes 13 and drain electrode connection portions 17 are integrally formed on the compound semiconductor substrate 11 by patterning. At this time, simultaneously with the drain electrode 13 and the like, the protection patterns 23 are formed on the surfaces of both ends of the resistor 22 as shown in FIG.

  Next, as shown in FIG. 1, a plurality of source electrodes 14 and source electrode connection portions 18 are integrally formed on the compound semiconductor substrate 11 by patterning. At this time, the plurality of source electrodes 14 are formed, for example, in the form of an air bridge at a position intersecting with the gate bus line 19, and the source electrode connecting portion 18 is similarly disposed at a position intersecting with the plurality of lead lines 20, for example. It is formed in the shape of an air bridge. The method for forming the air bridge is not limited. For example, as is generally known, a resist film or the like is formed on a part of the gate bus line 19 or a part of the plurality of lead lines 20, and the resist film or the like. After forming the plurality of source electrodes 14 and the source electrode connection portions 18 on the surface, the resist or the like may be removed.

  Next, as shown in FIG. 5, a protective film 24 is formed on the entire surface of the compound semiconductor substrate 11 by, eg, CVD.

  Next, as shown in part in FIG. 6, a compound semiconductor between each electrode connection portion 17, 18, 21, on the protection pattern 23, and between the gate electrode connection portion 21 and the resistor 22 by a photolithography process. A photoresist film 29 having an opening 28 is formed at a position on the substrate 11.

Next, as shown in FIG. 7, the protective film 24 is etched using the photoresist film 29 as a mask. Etching is performed, for example, by dry etching. Here, for example, when the resistor 22 is made of a silicided metal silicide and the protective film 24 is made of silicon nitride, in dry etching, as etching gas, fluorine such as CF ₄ that is highly corrosive to the protective film 24 is used. System gases are used. On the other hand, since the resistor 22 is a silicided metal silicide and is a Si-based material like the protective film 24, the resistor 22 is etched simultaneously with the protective film 24 in the conventional method. However, a protective pattern 23 made of the same material as the drain electrode 13 made of ohmic metal is formed on the resistor 22. This material is a material that is less corrosive to the etching gas described above. Therefore, the resistor 22 is not etched together with the protective film 24 in this etching process.

  Next, after removing the photoresist film 29 by, for example, ashing, electrode pads 25, 26, and 27 are formed in the openings formed in the protective film 24. As a result, as shown in FIGS. 1 and 2, the drain pad 25 and the source pad are formed on the drain electrode connection portion 17 and the source electrode connection portion 18, respectively, and from above the gate electrode connection portion 21. A gate pad 27 is formed at a position including on the protective pattern 23 adjacent to the connection portion 21, and the semiconductor device of this embodiment is formed.

  As described above, according to the method for manufacturing a semiconductor device of this embodiment, since the protective pattern 23 is formed on the resistor 22, the resistor is simultaneously formed with the protective film 24 in the step of etching the protective film 24. 22 is not etched. Therefore, the gate pad 27 can be favorably electrically connected to the resistor 22 through the protective pattern 23. This improves the characteristics of the semiconductor device due to poor electrical connection between the gate pad 27 and the resistor 22.

  The semiconductor device and the manufacturing method thereof according to the present embodiment have been described above. However, the semiconductor device according to the present invention is not limited to the above-described embodiment. For example, the electrode connection part to be divided is not limited to the gate electrode connection part 21, and the drain electrode connection part 17 may be divided as shown below. Furthermore, both the gate electrode connection portion 21 and the drain electrode connection portion 17 may be divided.

  FIG. 8 is a top view showing the semiconductor device according to the first modification of the present invention, in which the drain electrode connection portion 17 is divided. As shown in FIG. 8, in the semiconductor device according to the first modified example, only the drain electrode connection portion 17 is divided into a plurality. Therefore, the resistor 22 in the semiconductor device according to the above-described embodiment is formed between the drain electrode connection portions 17 divided into a plurality. A protective pattern 23 is formed on the resistor 22, and each drain pad 25 is electrically connected to the drain electrode connecting portion 17 and the protective pattern 23 adjacent to the connecting portion 17. Is formed.

  FIG. 9 is a top view showing a semiconductor device according to a second modification of the present invention, in which the gate electrode connection portion 21 and the drain electrode connection portion 17 are both divided. As shown in FIG. 9, in the semiconductor device according to the second modification, the gate bus line 19 and the gate electrode connection portion 21 are divided into a plurality, and the drain electrode connection portion 17 is also divided into a plurality. Therefore, the resistor 22 is formed between the gate electrode connecting portions 21 divided into a plurality of parts and also formed between the drain electrode connecting portions 17 divided into a plurality of parts. A protective pattern 23 is formed on each resistor 22, and each gate pad 27 and drain pad 25 are adjacent to the corresponding electrode connection parts 21, 17 and these connection parts 21, 17. The protective pattern 23 is formed so as to be electrically connected.

  Further, in the semiconductor device according to the above-described embodiment and each modified example, the portions where the protective film 24 is removed by etching are on the electrode connection portions 17, 18, 21, the protective pattern 23, and the compounds between them. It was on the semiconductor substrate 11. However, the location where the protective film 24 is etched is not necessarily as described above. 10 shows a semiconductor device according to a third modification of the present invention in which the protective film 24 is formed at a different position compared to the semiconductor device shown in FIGS. It is sectional drawing shown along A '. As shown in part in FIG. 10, the protective film 24 may be removed only on the electrode connection portions 17, 18, and 21 and the protective pattern 23. That is, the drain pad 25 or the gate pad 27 may be formed so that the electrode connection portions 17 and 21 and the protective pattern 23 adjacent thereto are electrically connected. The protective film 24 on the compound semiconductor substrate 11 between them is not necessarily removed.

  In the semiconductor device according to the above-described embodiment and each modification, a plurality of source pads 26 are formed at equal intervals so that a part thereof is in contact with the source electrode connection portion 18. However, the source pad 26 is not necessarily formed in this manner, and although not shown, it may be formed on the source electrode connection portion 18 in the same manner as the drain pad 25 or the gate pad 27.

  Note that the above-described method for manufacturing a semiconductor device such as the semiconductor device according to the first to third modifications differs only in the number and position of the resistors 22 and the like, or the location where the protective film 24 is etched. Therefore, the description is omitted.

  Even in the above-described method for manufacturing a semiconductor device such as a semiconductor device according to the first to third modifications, since the protective pattern 23 is formed on the resistor 22, in the step of etching the protective film 23, The resistor 22 is not etched simultaneously with the protective film 24. Therefore, the gate pad 27 or the drain pad 25 can be favorably electrically connected to the resistor 22 via the protective pattern 23. Thereby, the characteristics of the semiconductor device due to poor electrical connection between the gate pad 27 or the drain pad 25 and the resistor 22 are improved.

  Further, the method for manufacturing a semiconductor device according to the present invention is not limited to the above-described embodiment. That is, in the semiconductor device manufacturing method according to the present invention, a plurality of transistors such as FETs 12 are formed in parallel on the compound semiconductor substrate 11, and at least one of the gate pad 27 and the drain pad 25 is divided into a plurality of semiconductors. A method of manufacturing an apparatus, the step of forming a resistor 22 on a compound semiconductor substrate 11, the step of forming a protective pattern 23 on the resistor 22, and a protective film 24 on the compound semiconductor substrate 11 including the protective pattern 23. This includes all the manufacturing methods in which the forming step and the step of forming the opening on at least the protective pattern 23 in the protective film 243 are performed in this order.

  Therefore, when the protective pattern 23 is formed of a material different from that of the drain electrode 13 and the source electrode 14, the drain electrode 13 and the drain electrode connection portion 17, the source electrode 14 and the source electrode connection portion 18, the gate electrode 15, and the gate bus line 19, the lead line 20 and the gate electrode connecting portion 21 may be formed at predetermined positions at least before the step of forming the protective film 24, and the order of forming them is not limited. However, when the protective pattern 23 is formed together with the drain electrode 13 as described above, or when formed together with the source electrode 14, these electrodes 13, 14, etc. are at least on the compound semiconductor substrate 11. It needs to be formed after the body 22 is formed.

DESCRIPTION OF SYMBOLS 11 ... Compound semiconductor substrate 12 ... Field effect transistor 13 ... Drain electrode 14 ... Source electrode 15 ... Gate electrode 16 ... Element region 17 ... Drain electrode connection part 18 ... Source electrode connection portion 19 ... Gate bus line 20 ... Lead line 21 ... Gate electrode connection portion 22 ... Resistor 23 ... Protection pattern 24 ... Protection film 25 ... Drain pad 26 ... Source pad 27 ... Gate pad 28 ... Opening 29 ... Photoresist film

Claims (7)

A plurality of transistors arranged in parallel to each other, and a plurality of drain electrodes, a plurality of source electrodes, and a plurality of gate electrodes that constitute these transistors, respectively, a drain electrode connection portion, a source electrode connection portion, and a gate electrode A connecting portion is formed on the compound semiconductor substrate, and at least one of the drain electrode connecting portion and the gate electrode connecting portion is divided into a plurality of portions, and the divided electrode connecting portion is interposed between them. A manufacturing method of a semiconductor device electrically connected to each other by a formed resistor,
Forming the strip-shaped resistors at positions between the divided electrode connecting portions; and
Forming a protective pattern for protecting the resistors on the surfaces of both ends of the resistors,
Forming the protective film on the compound semiconductor substrate on which the plurality of transistors, each of the electrode connection portions, the resistor, and the protective pattern are respectively formed;
Removing the protective film formed on the protective pattern and on each electrode connecting portion by etching; and
A first electrode pad is formed on the electrode connection portion that is not divided, and a plurality of first pads are formed on the divided electrode connection portion so as to be in contact with the protective pattern adjacent to the divided electrode connection portion. Forming a second electrode pad;
A method for manufacturing a semiconductor device, comprising:   The step of forming the protective pattern further includes the step of forming the plurality of drain electrodes or the plurality of source electrodes, and the protective pattern is formed simultaneously with the plurality of drain electrodes or the plurality of source electrodes. The method of manufacturing a semiconductor device according to claim 1, wherein:   The method for manufacturing a semiconductor device according to claim 2, wherein the protective pattern, the plurality of drain electrodes, and the plurality of source electrodes are made of an ohmic metal.   The semiconductor device according to claim 1, wherein the resistor is made of a silicided metal silicide or tantalum nitride, and the protective film is made of silicon nitride or silicon oxide. Method. A plurality of transistors arranged in parallel with each other on a compound semiconductor substrate, a plurality of drain electrodes, a plurality of source electrodes, and a plurality of gate electrodes that are electrically connected to each other, and a source An electrode connection portion and a gate electrode connection portion are formed, respectively, and at least one of the drain electrode connection portion and the gate electrode connection portion is divided into a plurality of semiconductor devices,
A strip-shaped resistor formed between the electrode connection portions divided into a plurality of portions;
Protective patterns that are formed on the surfaces of both ends of the resistor and protect the resistor,
A protective film formed on the compound semiconductor substrate so as to expose each of the electrode connection portions and the protective pattern;
A first electrode pad formed on the electrode connection portion that is not divided;
A plurality of second electrode pads formed on the divided electrode connection portions so as to be in contact with the protective pattern adjacent to the divided electrode connection portions;
A semiconductor device comprising:   The semiconductor device according to claim 5, wherein the protective pattern, the plurality of drain electrodes, and the plurality of source electrodes are made of an ohmic metal.   7. The semiconductor device according to claim 5, wherein the resistor is made of a silicided metal silicide or tantalum nitride, and the protective film is made of silicon nitride or silicon oxide.

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