JP2011119612A - Semiconductor device manufacturing method, and semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor device having a rod-like structure and ensuring high efficiency of light emission by increasing a light-emission area. <P>SOLUTION: The method of manufacturing a semiconductor device is configured as follows. A p-type semiconductor layer 10 is formed not only on the tip surface 7A of an n-type semiconductor core 7 but also on the side 7B, thereby improving the efficiency of light emission by increasing a light-emission area due to an increase in pn-junction area. The n-type semiconductor core 7 is formed by using a catalytic metal 6, thereby increasing a growth speed of the n-type semiconductor core 7. Consequently, the semiconductor core 7 can be elongated so as to further increase the light-emission area proportionate to the length of the n-type semiconductor core 7. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a semiconductor element manufacturing method and a semiconductor element that can be used as, for example, a light emitting element.

  Conventionally, as a method of manufacturing a semiconductor element having a rod-like structure, there is one described in Japanese translations of PCT publication No. 2008-544567 (Patent Document 1). In this manufacturing method, as shown in FIG. 36, first, an n-type GaN buffer layer 120 is formed on a sapphire substrate 110, and n-type GaN nanorods 131, InGaN quantum wells 133, p are formed on the n-type GaN buffer layer 120. The type GaN nanorods 135 are sequentially grown in the vertical direction. Next, a transparent insulator 140 that fills the space between the core nanorods 130 composed of the n-type GaN nanorod 131, the InGaN quantum well 133, and the p-type GaN nanorod 135 is formed, and a transparent electrode is formed on the transparent insulator 140. 160 and electrode pad 170 are formed, and electrode pad 150 is formed on n-type GaN buffer layer 120. The core nanorod 130 emits light at a pn junction between the n-type GaN nanorod 131 and the p-type GaN nanorod 135.

  However, since the pn junction is formed only between the end face of the n-type GaN nanorod 131 and the end face of the p-type GaN nanorod 135, the core nanorod 130 has a problem that the light emitting area is small.

Special table 2008-544567 gazette

  SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing a semiconductor device having a rod-like structure with a large light emitting area and high light emission efficiency, and a semiconductor device having the rod-like structure.

In order to solve the above problems, a method for manufacturing a semiconductor element according to the present invention includes a catalyst metal forming step of forming a catalyst metal on a substrate,
Forming a semiconductor core of a first conductivity type on the substrate and under the catalyst metal; and
A semiconductor layer forming step of forming a second conductivity type semiconductor layer on a front end surface and a side surface of the first conductivity type semiconductor core.

  According to the semiconductor element manufacturing method of the present invention, the second conductivity type semiconductor layer is formed not only on the front end surface of the first conductivity type semiconductor core but also on the side surface of the semiconductor core. The light emission area can be increased and the light emission efficiency can be improved. In addition, since the first conductive type semiconductor core is formed using the catalyst metal, the growth rate of the first conductive type semiconductor core can be increased. Therefore, the semiconductor core can be lengthened, and the light emitting area that is proportional to the length of the first conductive type semiconductor core can be further increased. In addition, since the front end surface and the side surface of the first conductivity type semiconductor core are covered with the second conductivity type semiconductor layer, an electrode for the second conductivity type semiconductor layer is formed on the first conductivity type semiconductor core. A short circuit can be prevented.

In one embodiment of the method for manufacturing a semiconductor element, in the semiconductor layer forming step,
A second conductivity type semiconductor layer is formed on the tip and side surfaces of the first conductivity type semiconductor core with the catalyst metal left.

  According to the method for manufacturing a semiconductor device of this embodiment, the second conductive type semiconductor layer is formed in a state where the catalytic metal is left. Therefore, the formation of the first conductive type semiconductor core and the second conductive type semiconductor layer are formed. The formation of the semiconductor layer can be performed continuously in the same manufacturing apparatus. Therefore, process reduction and manufacturing time can be shortened. In addition, since it is not necessary to remove the semiconductor core from the manufacturing apparatus after forming the first conductive type semiconductor core, contamination can be prevented from adhering to the surface of the first conductive type semiconductor core. Can improve. In addition, since the formation of the first conductive type semiconductor core and the formation of the second conductive type semiconductor layer can be performed continuously, the crystallinity is improved by avoiding a large temperature change or stop of growth. And device characteristics can be improved. In addition, the etching of removing the catalyst metal is not performed immediately after the formation of the first conductive type semiconductor core, so that the surface of the first conductive type semiconductor core (that is, the second conductive type semiconductor layer and Can be eliminated, and the device characteristics can be improved.

In one embodiment of the method for manufacturing a semiconductor element, in the semiconductor layer forming step,
After removing the catalyst metal, a second conductivity type semiconductor layer is formed on the front end surface and the side surface of the first conductivity type semiconductor core.

  According to the method for manufacturing a semiconductor device of this embodiment, since the second conductive type semiconductor layer is formed after removing the catalyst metal, the light emitting region (the first conductive type semiconductor core and the second conductive type semiconductor is formed). It is possible to prevent the catalyst metal from being mixed into the interface with the layer.

In one embodiment of the method for manufacturing a semiconductor element, in the semiconductor layer forming step,
After removing the catalyst metal, a first conductivity type semiconductor layer is formed on the front end surface and side surfaces of the first conductivity type semiconductor core, and then the second conductivity type semiconductor layer is formed.

  According to this embodiment, the first conductivity type semiconductor layer having good crystallinity is formed by isotropically forming the first conductivity type semiconductor layer on the front end surface and the side surface of the first conductivity type semiconductor core. In addition, a junction (quantum well layer) with few defects can be obtained between the first conductive type semiconductor layer and the second conductive type semiconductor layer.

  The method for manufacturing a semiconductor device according to an embodiment includes a separation step of separating the first conductive type semiconductor core from the substrate together with the second conductive type semiconductor layer.

  According to the method for manufacturing a semiconductor element of this embodiment, the light emitting element having a rod-like structure composed of the first conductive type semiconductor core and the second conductive type semiconductor layer is separated from the substrate by the separation step. In addition to manufacturing a light-emitting element having a rod-like structure with a high degree of freedom in mounting, the substrate can be reused. In addition, the light emitting element having the rod-like structure can reduce the amount of semiconductor to be used, reduce the thickness and weight of the device using the light emitting element, and can emit light from the entire circumference of the semiconductor core covered with the semiconductor layer. Since the light emitting region is widened by releasing the light, a backlight, a lighting device, a display device, and the like with high light emission efficiency and power saving can be realized. The light-emitting element having the rod-like structure can be manufactured as a micro-order size having a diameter of 1 μm and a length of 10 μm, or a nano-order size element having a diameter or length of less than 1 μm.

In one embodiment of the method for manufacturing a semiconductor element, the semiconductor layer of the second conductivity type formed in the semiconductor layer forming step is
The thickness of the portion covering the tip surface of the first conductivity type semiconductor core is thicker than the thickness of the portion covering the side surface of the first conductivity type semiconductor core.

  According to the semiconductor element manufacturing method of this embodiment, the contact surface between the catalyst metal and the second conductivity type semiconductor layer can be separated from the PN junction between the semiconductor core and the semiconductor layer at the front end surface of the semiconductor core. As a result, damage and defects on the metal removal surface hardly affect the PN junction. Further, it is possible to prevent the semiconductor core from being exposed from the semiconductor layer during etching.

In one embodiment of the method for manufacturing a semiconductor device, the substrate is a first conductivity type semiconductor substrate,
An anisotropic etching is performed to leave a covering portion that covers the tip surface of the first conductivity type semiconductor core and the side surface of the semiconductor core in the second conductivity type semiconductor layer, and the second conductivity type. The extending portion extending along the semiconductor substrate is removed from the portion of the semiconductor layer covering the side surface of the semiconductor core, and the semiconductor substrate under the extending portion is removed by a certain depth dimension. Then, the step portion of the semiconductor substrate that continues below the covering portion of the semiconductor core and the semiconductor layer is left.

  According to the method for manufacturing a semiconductor element of this embodiment, a semiconductor element that can be easily contacted with the semiconductor core of the first conductivity type by the step portion of the semiconductor substrate of the first conductivity type can be manufactured. . In addition, the first conductive type semiconductor core can be obtained as a semiconductor element having a structure that is covered with the second conductive type semiconductor layer on the side surface and the tip other than the substrate side and is not exposed from the semiconductor layer.

Moreover, the manufacturing method of the semiconductor element of one embodiment is the above-described separation step.
The semiconductor core is separated from the semiconductor substrate together with the covering portion of the semiconductor layer that covers the front end surface and the side surface of the semiconductor core and the stepped portion of the semiconductor substrate that continues below the semiconductor core.

  According to the method for manufacturing a semiconductor element of this embodiment, a light emitting element constituted by the stepped part separated from the semiconductor substrate, the semiconductor core, and the semiconductor layer can be obtained.

In one embodiment of the method for producing a semiconductor element, the catalyst metal forming step includes:
Forming a growth mask having a growth hole on the substrate;
Forming a catalytic metal on the substrate in the growth hole,
In the semiconductor core forming step, a first conductivity type semiconductor core protruding on the growth mask is formed on the substrate in the growth hole and below the catalyst metal,
In the semiconductor formation step, a second conductivity type semiconductor layer is formed on the surface of the first conductivity type semiconductor core protruding above the growth mask while leaving the catalyst metal,
Furthermore, it has the process of removing the said growth mask and exposing the side surface of the said semiconductor core after the said semiconductor formation process.

  According to the method for manufacturing a semiconductor device of this embodiment, the growth mask is removed to expose the side surface of the semiconductor core. As a result, the etching amount of the second conductivity type semiconductor layer can be reduced (or eliminated), the need for etching the substrate can be eliminated, and the semiconductor core is exposed from the semiconductor layer only at one end side. A semiconductor element can be manufactured more easily.

  In one embodiment, the method of manufacturing a semiconductor device includes a step of forming a quantum well layer that covers the first conductive type semiconductor core and is covered with the second conductive type semiconductor layer.

  According to the method for manufacturing a semiconductor device of this embodiment, a light emitting device having high light emission efficiency can be produced by the quantum well layer.

According to one embodiment, a semiconductor element includes a first conductivity type semiconductor core,
A second conductive type semiconductor layer that covers the end face and side face on one end side of the first conductive type semiconductor core and exposes the end face and side face on the other end side of the semiconductor core;
The semiconductor layer of the second conductivity type is
The thickness of the portion covering the end surface on the one end side of the semiconductor core is thicker than the thickness of the portion covering the side surface of the semiconductor core.

  According to the semiconductor element of this embodiment, a semiconductor element having a high dimensional aspect ratio can be obtained. In addition, in the second conductivity type semiconductor layer, the thickness of the portion covering the end face on the one end side of the semiconductor core is larger than the thickness of the portion covering the side face of the semiconductor core. And the exposure of one end of the semiconductor core can be prevented. Further, when the light emitting element has a rod-like structure separated from the substrate, the degree of freedom of mounting on the device is increased.

  In one embodiment, the backlight includes the semiconductor element. According to the backlight of this embodiment, by using the semiconductor element as a rod-shaped structure light emitting element, it is possible to realize a backlight that can be reduced in thickness and weight, has high luminous efficiency, and saves power.

  Moreover, in the illuminating device of one Embodiment, the said semiconductor element was provided. According to the illuminating device of this embodiment, by using the semiconductor element as a rod-shaped structure light emitting device, it is possible to realize a illuminating device that can be reduced in thickness and weight, has high luminous efficiency, and saves power.

  Moreover, the display device of one embodiment includes the semiconductor element. According to the display device of this embodiment, by using the semiconductor element as a rod-shaped structure light emitting element, a display device that can be reduced in thickness and weight and has high luminous efficiency and low power consumption can be realized.

  According to the method for manufacturing a semiconductor element of the present invention, the second conductivity type semiconductor layer is formed not only on the front end surface of the first conductivity type semiconductor core but also on the side surface of the semiconductor core, so that the area of the pn junction is increased. In addition, the light emission area can be increased and the light emission efficiency can be improved. In addition, since the first conductive type semiconductor core is formed using a catalytic metal, the growth rate of the first conductive type semiconductor core can be increased, the semiconductor core can be lengthened, and the first conductive type semiconductor core is formed. The light emitting area that is proportional to the length of the core can be further increased. In addition, since the front end surface and the side surface of the first conductivity type semiconductor core are covered with the second conductivity type semiconductor layer, an electrode for the second conductivity type semiconductor layer is formed on the first conductivity type semiconductor core. A short circuit can be prevented.

It is process drawing of 1st Embodiment of the manufacturing method of the semiconductor element of this invention. It is process drawing of the said 1st Embodiment. It is process drawing of the said 1st Embodiment. It is process drawing of the said 1st Embodiment. It is process drawing of the said 1st Embodiment. It is process drawing of the said 1st Embodiment. It is process drawing of the said 1st Embodiment. It is process drawing of the said 1st Embodiment. It is process drawing of the said 1st Embodiment. It is process drawing of the said 1st Embodiment. It is process drawing of the said 1st Embodiment. It is process drawing of the said 1st Embodiment. It is process drawing of the said 1st Embodiment. It is process drawing of the said 1st Embodiment. It is process drawing of 2nd Embodiment of the manufacturing method of the semiconductor element of this invention. It is process drawing of the said 2nd Embodiment. It is process drawing of the said 2nd Embodiment. It is process drawing of the said 2nd Embodiment. It is process drawing of the said 2nd Embodiment. It is process drawing of the said 2nd Embodiment. It is process drawing of 3rd Embodiment of the manufacturing method of the semiconductor element of this invention. It is process drawing of the said 3rd Embodiment. It is process drawing of the said 3rd Embodiment. It is process drawing of the said 3rd Embodiment. It is process drawing of the said 3rd Embodiment. It is a schematic diagram which shows an example of arrangement | positioning on the board | substrate of the rod-shaped light emitting element produced in the said 3rd Embodiment. It is process drawing of 4th Embodiment of the manufacturing method of the semiconductor element of this invention. It is process drawing of the said 4th Embodiment. It is process drawing of the said 4th Embodiment. It is process drawing of the said 4th Embodiment. It is process drawing of the said 4th Embodiment. It is process drawing of 5th Embodiment of the manufacturing method of the semiconductor element of this invention. It is process drawing of the said 5th Embodiment. It is process drawing of the said 5th Embodiment. It is process drawing of the said 5th Embodiment. It is process drawing of the said 5th Embodiment. It is a top view of the insulating board | substrate used for the light-emitting device provided with the rod-shaped structure light emitting element of 6th Embodiment of this invention, a backlight, an illuminating device, and a display apparatus. It is the cross-sectional schematic diagram seen from the XXV-XXV line | wire of FIG. It is a figure explaining the principle which arrange | positions the said rod-shaped structure light emitting element. It is a figure explaining the electric potential given to an electrode, when arranging the said rod-shaped structure light emitting element. It is a top view of the insulating board | substrate which arranged the said rod-shaped structure light emitting element. It is a top view of the said display apparatus. It is a circuit diagram of the principal part of the display part of the said display apparatus. It is a figure explaining the manufacturing method of the conventional semiconductor element.

  Hereinafter, the present invention will be described in detail with reference to the illustrated embodiments.

(First embodiment)
1 to 14 are process diagrams sequentially showing a method of manufacturing a semiconductor device according to the first embodiment of the present invention. In this embodiment, Si-doped n-type GaN and Mg-doped p-type GaN are used, but the impurities doped in GaN are not limited thereto.

In the first embodiment, first, as shown in FIG. 1, a sapphire substrate 1 is prepared and the substrate 1 is cleaned. Next, as shown in FIG. 2, an n-GaN film 2 is formed on the substrate 1. Next, as shown in FIG. 3, a mask layer 3 is formed on the n-GaN film 2 by deposition. The mask layer 3 is made of, for example, SiN or SiO ₂ .

  Next, a resist layer 5 is applied on the mask layer 3, exposed and developed (developed), and further dry-etched to form holes in the resist layer 5 and the mask layer 3 as shown in FIG. 5A and 3A are formed. A part 2A of the n-GaN film 2 is exposed through the holes 5A and 3A. The mask layer 3 serves as a growth mask, and the hole 3A formed in the mask layer 3 forms a growth hole.

  Next, in the catalyst metal formation step, as shown in FIG. 5, a catalyst metal 6 is deposited (deposited) on the resist layer 5 and on a part 2A of the n-GaN film 2 exposed in the hole 3A. As this catalytic metal 6, for example, Ni, Fe or the like can be adopted.

  Next, the resist layer 5 and the catalyst metal 6 on the resist layer 5 are removed by lift-off, leaving the catalyst metal 6 on the part 2A of the n-GaN film 2 as shown in FIG. Wash.

Next, in the semiconductor core formation step, as shown in FIG. 7, using an MOCVD (Metal Organic Chemical Vapor Deposition) apparatus, n-type GaN is crystal-grown in the presence of the catalytic metal 6. A rod-shaped semiconductor core 7 is formed. The rod-shaped semiconductor core 7 is grown to a length of 25 μm, for example. The growth temperature is set to about 800 ° C., trimethylgallium (TMG) and ammonia (NH ₃ ) are used as growth gases, silane (SiH ₄ ) is used for supplying n-type impurities, and hydrogen (H ₂ ) is used as a carrier gas. By supplying this, an n-type GaN semiconductor core having Si as an impurity can be grown. Here, the n-type GaN has a hexagonal crystal growth, and a hexagonal columnar semiconductor core is obtained by growing the n-type GaN with the direction perpendicular to the surface of the substrate 1 being the c-axis direction. A plurality of holes 5A in the resist layer 5 and a plurality of holes 3A in the mask layer 3 are formed, and catalyst metal 6 is applied to a part 2A of the n-GaN films 2 at a plurality of positions exposed in the plurality of holes 5A and 3A. A plurality of rod-shaped semiconductor cores 7 may be formed.

Next, as shown in FIG. 8, a quantum well layer 8 made of p-type InGaN is formed by MOCVD so as to cover the n-type GaN semiconductor core 7 and the mask layer 3. The quantum well layer 8 has a set temperature of 750 ° C. according to the emission wavelength, and supplies nitrogen (N ₂ ) as a carrier gas, TMG, NH ₃ , and trimethylindium (TMI) as a growth gas, whereby n-type GaN A p-type InGaN quantum well layer 8 can be formed on the semiconductor core 7 and the mask layer 3. In this quantum well layer, a p-type AlGaN layer may be inserted as an electron blocking layer between the InGaN layer and the p-type GaN layer. Alternatively, a multiple quantum well structure in which GaN barrier layers and InGaN quantum well layers are alternately stacked may be employed.

Next, in the semiconductor layer forming step, as shown in FIG. 8, a p-GaN semiconductor layer 10 is formed on the entire surface of the quantum well layer 8 by MOCVD. The p-GaN semiconductor layer 10 is formed at a preset temperature of 900 ° C., using TMG and NH ₃ as growth gases, and using Cp ₂ Mg for supplying p-type impurities, thereby forming the semiconductor layer 10 made of p-type GaN. it can.

  In the growth of the quantum well layer 8 and the p-GaN semiconductor layer 10 by the MOCVD, since the film is formed with the catalyst metal 6 attached, compared with the growth rate of the portion covering the side surface 7B of the n-type GaN semiconductor core 7. The growth rate of the portion between the catalyst metal 6 and the tip surface 7A of the n-type GaN semiconductor core 7 is fast, for example, 10 to 100 times. As a specific example, the growth rate of GaN at the location where the catalyst metal 6 is adhered is 50 to 100 μm / hour, whereas the growth rate of GaN at the location where the catalyst metal is not adhered is 1 to 2 μm / hour. . Therefore, the quantum well layer 8 and the p-GaN semiconductor layer 10 have the tip portions 8A and 10A that are thicker than the side portions 8B and 10B.

  Next, as shown in FIG. 9, in the catalytic metal removal step, the catalytic metal 6 on the n-type GaN semiconductor core 7 is removed by etching, cleaning is performed, and the p-GaN semiconductor layer 10 is activated by annealing. Here, the quantum well layer 8 covering the front end surface 7A of the semiconductor core 7 and the thickness of the front end portions 8A and 10A of the p-GaN semiconductor layer 10 have a thickness of the quantum well layer 8 and p-GaN covering the side surface 7B of the semiconductor core 7. Since it is thicker than the thickness of the side portions 8B and 10B of the semiconductor layer 10, damage and defects on the metal removal surface are less likely to adversely affect the PN junction. In addition, the semiconductor core 7 can be prevented from being exposed from the semiconductor layer 10 during etching.

  Next, as shown in FIG. 10, a conductive film 11 is formed on the entire surface of the p-GaN semiconductor layer 10. Polysilicon, ITO (tin-added indium oxide) or the like can be used as the material of the conductive film 11. The film thickness of the conductive film 11 is, for example, 200 nm. Then, after the conductive film 11 is formed, the contact resistance between the semiconductor layer 10 made of p-type GaN and the conductive film 11 can be lowered by performing heat treatment at 500 to 600 ° C. The conductive film 11 is not limited to this. For example, a 5 nm thick Ag / Ni or Au / Ni translucent metal film may be used. Vapor deposition or sputtering can be used to form this laminated metal film. Further, in order to further reduce the resistance of the conductive layer, a laminated metal film of Ag / Ni or Au / Ni may be laminated on the conductive film made of ITO.

  Next, as shown in FIG. 11, the portion of the conductive film 11 extending in the lateral direction on the semiconductor core 7 and the mask layer 3 is removed by dry etching RIE (reactive ion etching). Further, the tip portion 10A of the p-type GaN semiconductor layer 10 covering the tip surface 7A of the semiconductor core 7 is removed by a certain thickness by the RIE. Also, the p-type GaN semiconductor layer 10 in the region extending laterally beyond the conductive film 11 on the mask layer 3 is removed by the RIE. Further, the quantum well layer 8 in the region extending laterally beyond the conductive film 11 on the mask layer 3 is removed by the RIE.

  As described above, before the RIE, the film thickness of the tip 8A of the quantum well layer 8 is sufficiently thicker than the film thickness of the side surface 8B, and the film thickness of the tip 10A of the p-GaN semiconductor layer 10 is. Is sufficiently thicker than the thickness of the side surface portion 10B, the semiconductor core 7 is not exposed at the tip after the RIE. Therefore, the quantum well layer 8 and the p-GaN semiconductor layer 10 covering the front end surface of the semiconductor core 7 and the quantum well layer 8, the p-GaN semiconductor layer 10 and the conductive film covering the side surfaces of the semiconductor core 7 by the RIE. 11 remains.

Next, as shown in FIG. 12, the mask layer 3 is removed by etching. When the mask layer 3 is made of silicon oxide (SiO ₂ ) or silicon nitride (Si ₃ N ₄ ), the semiconductor core 7 and the semiconductor core 7 can be easily obtained by using a solution containing hydrofluoric acid (HF). The mask layer 3 can be etched without affecting the portions of the semiconductor layer 10 and the conductive film 11 covering the film. Further, by dry etching using CF ₄ or XeF ₂ , the mask layer 3 can be easily etched without affecting the semiconductor core 7, the semiconductor layer 10 covering the semiconductor core 7, and the conductive film 11. As a result, the semiconductor core 7 is exposed at the portion 7C on the substrate 1 side.

  Next, as shown in FIG. 13, the underlying n-GaN film 2 is etched by RIE (reactive ion etching) to expose the surface of the substrate 1. As a result, the n-GaN step portion 2A connected to the semiconductor core 7 is formed. Here, since the thickness of the p-GaN semiconductor layer 10 and the quantum well layer 8 on the front end face 7A is sufficiently thicker than the thickness of the underlying n-GaN film 2, the above RIE The front end surface 7A of the semiconductor core 7 can be prevented from being exposed.

  As a result, a light emitting element having a rod-like structure composed of the n-type GaN semiconductor core 7, the p-type InGaN quantum well layer 8, the p-GaN semiconductor layer 10, the conductive film 11, and the n-GaN step portion 2A is formed on the substrate 1. It is formed.

  According to the method for manufacturing a semiconductor element of this embodiment, since the p-type semiconductor layer 10 is formed not only on the front end surface 7A of the n-type semiconductor core 7 but also on the side surface 7B, the area of the pn junction can be increased. The light emission area can be increased and the light emission efficiency can be improved. Further, since the n-type semiconductor core 7 is formed using the catalyst metal 6, the growth rate of the n-type semiconductor core 7 can be increased. For this reason, the semiconductor core 7 can be lengthened in a short time compared to the conventional case, and the light emitting area that is proportional to the length of the n-type semiconductor core 7 can be further increased. Further, since the tip surface 7A and the side surface of the n-type semiconductor core are covered with the p-type semiconductor layer 10, the electrode for the p-type semiconductor layer 10 is prevented from being short-circuited to the n-type semiconductor core 7. it can.

  Further, according to the method of manufacturing a semiconductor device of this embodiment, the p-type InGaN quantum well layer 8 and the p-type semiconductor layer 10 are formed with the catalyst metal 6 left, so that the n-type semiconductor core 7 is formed. And the p-type quantum well layer 8 and the p-type semiconductor layer 10 can be continuously formed in the same manufacturing apparatus. Therefore, process reduction and manufacturing time can be shortened. In addition, after the n-type semiconductor core 7 is formed, it is not necessary to take the semiconductor core 7 out of the manufacturing apparatus. Therefore, contamination can be prevented from adhering to the surface of the n-type semiconductor core 7 and the element characteristics can be improved. it can. In addition, since the formation of the n-type semiconductor core 7 and the formation of the p-type quantum well layer 8 and the p-type semiconductor layer 10 can be performed continuously, it is possible to avoid a large temperature change or stop of growth. Thus, crystallinity can be improved and device characteristics can be improved. Further, the etching of removing the catalytic metal 6 immediately after the formation of the n-type semiconductor core 7 is not performed, so that the surface of the n-type semiconductor core 7 (that is, the interface with the p-type semiconductor layer 10). ) Can be eliminated, and the device characteristics can be improved.

  In this embodiment, since the n-type semiconductor core 7 and the p-type semiconductor layer 10 are formed in this order while the catalyst metal 6 is attached to the substrate 1, the growth rate of the portion in contact with the catalyst metal 6 is the above catalyst. Compared to the growth rate of the portion not in contact with the metal 6, the growth rate is significantly faster (for example, 10 to 100 times). Therefore, a semiconductor element having a high dimension aspect ratio can be manufactured. In the first embodiment, as an example, the rod-shaped structure light emitting element 12 has a diameter of 1 μm and a length of 25 μm. In addition, since the n-type semiconductor core 7 and the p-type semiconductor layer 10 can be continuously stacked under the catalyst metal 6, defects at the PN junction can be reduced.

  Further, according to the manufacturing method of this embodiment, the mask layer 3 is removed to expose the portion 7C on the substrate 1 side of the semiconductor core 7, so that the etching amount of the semiconductor layer 10 can be reduced. Further, the rod-shaped structure light emitting element 12 can be easily contacted to the semiconductor core 7 by the n-GaN step portion 2 </ b> A connected to the semiconductor core 7. Further, the rod-shaped structure light emitting element 12 can improve the light emission efficiency by the quantum well layer 8.

  In the above embodiment, the light emitting element 12 having the rod-shaped structure is not separated from the substrate 1. However, a step of separating the light emitting element 12 having the rod-shaped structure from the substrate 1 may be included. In this case, in the separation step, the substrate is immersed in an isopropyl alcohol (IPA) aqueous solution, and the base substrate 1 is vibrated along the plane of the substrate using ultrasonic waves (for example, several tens of kHz) to stand on the base substrate 1. Stress is applied to the semiconductor core 7 covered with the quantum well layer 8, the semiconductor layer 10, and the conductive film 11 so as to bend the semiconductor core 7 to be provided, and as shown in FIG. 14, the quantum well layer 8 and the semiconductor The semiconductor core 7 covered with the layer 10 and the conductive film 11 is separated from the substrate 1. In this case, the fine rod-shaped structure light-emitting element 12 separated from the base substrate 1 can be manufactured. Therefore, in this case, the fine rod-shaped structure light emitting element 12 having a high degree of freedom of mounting on the device can be manufactured. Further, the substrate 1 can be reused. Further, the rod-shaped structure light emitting element 12 can reduce the amount of semiconductor to be used, can reduce the thickness and weight of the device using the light emitting element, and can also reduce the entire circumference of the semiconductor core 7 covered with the semiconductor layer 10. Since the light emitting region is widened by emitting light from the light emitting device, a light emitting device, a backlight, a lighting device, a display device, and the like with high luminous efficiency and power saving can be realized. Further, as shown in FIG. 13, the base n-GaN film 2 is etched by RIE (reactive ion etching) to form the stepped portion 2A. However, the step of etching the base n-GaN film 2 is omitted. The semiconductor core 7 may be separated from the base n-GaN film 2 without the portion 2A to produce a rod-shaped structure light emitting element that does not have the stepped portion 2A.

  In the above embodiment, the n-GaN film 2 is formed on the substrate 1. However, the mask layer 3 is directly formed on the substrate 1 without the step of forming the n-GaN film 2 on the substrate 1. It may be formed. In the above embodiment, in the catalyst metal removal step, the catalyst metal 6 on the n-type GaN semiconductor core 7 is removed by etching. However, this catalyst metal removal step is eliminated and the conductive film 11 is left with the catalyst metal 6 left. May be formed. In the above embodiment, as shown in FIG. 11, the conductive film 11, the p-type GaN semiconductor layer 10, and the quantum well layer 8 are etched by RIE. However, this etching process by RIE is eliminated, and the next mask layer 3 is removed. In the step of removing the mask layer 3, the mask layer 3 may be removed by simultaneous lift-off of each layer.

(Second embodiment)
15 to 20 are process diagrams sequentially showing a method for manufacturing a semiconductor device according to the second embodiment of the present invention. In the second embodiment, first, in the catalyst metal formation step, the catalyst metal 22 is deposited (deposited) on the n-GaN substrate 21 as shown in FIG. As the catalyst metal 22, for example, Ni, Fe, or the like can be adopted.

Next, in the semiconductor core formation step, as shown in FIG. 16, a rod-shaped semiconductor core 23 is formed by crystal growth of n-type GaN using an MOCVD (metal organic chemical vapor deposition) apparatus. The rod-shaped semiconductor core 23 is grown to a length of 25 μm, for example. The growth temperature is set to about 800 ° C., trimethylgallium (TMG) and ammonia (NH ₃ ) are used as growth gases, silane (SiH ₄ ) is used for supplying n-type impurities, and hydrogen (H ₂ ) is used as a carrier gas. By supplying this, an n-type GaN semiconductor core having Si as an impurity can be grown. Here, n-GaN has a hexagonal crystal growth, and a hexagonal columnar semiconductor core can be obtained by growing the substrate perpendicular to the surface of the substrate 21 in the c-axis direction. The catalytic metal 22 may be formed at a plurality of different locations on the substrate 21 to form a plurality of rod-shaped semiconductor cores 23.

Next, in the semiconductor layer forming step, as shown in FIG. 17, a p-GaN semiconductor layer 25 is formed on the entire surface of the n-GaN semiconductor core 23 and the n-GaN substrate 21 by MOCVD. The p-GaN semiconductor layer 25 is formed at a set temperature of 900 ° C., uses TMG and NH ₃ as growth gases, and uses Cp ₂ Mg for supplying p-type impurities to form a semiconductor layer 25 made of p-type GaN. it can.

  In the growth of the p-GaN semiconductor layer 25 by the MOCVD, since the film is formed with the catalyst metal 22 attached, the catalyst metal 22 is compared with the growth rate of the portion covering the side surface 23B of the n-type GaN semiconductor core 23. And the growth rate of the portion between the tip surface 23A of the n-type GaN semiconductor core 23 is fast, for example, 10 to 100 times. Therefore, in the p-GaN semiconductor layer 25, the film thickness of the tip portion 25A is larger than the film thickness of the side surface portion 25B.

  Next, as shown in FIG. 18, the catalytic metal 22 on the p-GaN semiconductor layer 25 is removed by etching, cleaning is performed, and the p-GaN semiconductor layer 25 is activated by annealing. Here, the thickness of the tip portion 25A of the p-GaN semiconductor layer 25 covering the tip surface 23A of the semiconductor core 23 is larger than the thickness of the side surface portion 25B of the p-GaN semiconductor layer 25 covering the side surface 23B of the semiconductor core 23. Since it is thick, damage and defects on the metal removal surface are less likely to adversely affect the PN junction. Further, it is possible to prevent the semiconductor core 23 from being exposed from the semiconductor layer 25 during etching.

  Next, as shown in FIG. 19, the tip portion 25A of the p-GaN semiconductor layer 25 on the semiconductor core 23 is removed by a certain thickness by dry etching RIE (reactive ion etching). Further, the p-type GaN semiconductor layer 25 in the region extending in the lateral direction on the n-GaN substrate 21 is removed by the RIE. Further, the n-GaN substrate 21 is removed by a certain depth by the RIE. As a result, as shown in FIG. 19, the p-type GaN semiconductor layer 25 has a covering portion 25 </ b> C that covers the tip surface 23 </ b> A of the semiconductor core 23 and the side surface 23 </ b> B of the semiconductor core 23. Further, as shown in FIG. 19, a stepped portion 21 </ b> A connected to the semiconductor core 23 and the covering portion 25 </ b> C is formed on the n-GaN substrate 21.

  As a result, a light emitting element having a rod-like structure composed of the n-type GaN semiconductor core 23, the p-GaN semiconductor layer 25, and the n-GaN step portion 21A is formed on the n-GaN substrate 21.

  According to the semiconductor element manufacturing method of this embodiment, the p-type semiconductor layer 25 is formed not only on the tip surface 23A of the n-type semiconductor core 23 but also on the side surface 23B, so that the area of the pn junction can be increased, The light emission area can be increased and the light emission efficiency can be improved. Further, since the n-type semiconductor core 23 is formed using the catalyst metal 22, the growth rate of the n-type semiconductor core 23 can be increased. For this reason, the semiconductor core 23 can be lengthened in a short time compared to the conventional case, and the light emitting area that is proportional to the length of the n-type semiconductor core 23 can be further increased. In addition, since the tip surface 23A and the side surface 23B of the n-type semiconductor core 23 are covered with the p-type semiconductor layer 25, the electrode for the p-type semiconductor layer 25 is short-circuited to the n-type semiconductor core 23. Can be prevented.

  Also, according to the method for manufacturing a semiconductor element of this embodiment, the p-type semiconductor layer 25 is formed with the catalyst metal 22 left, so that the formation of the n-type semiconductor core 23 and the p-type semiconductor layer are formed. 25 can be continuously performed in the same manufacturing apparatus. Therefore, process reduction and manufacturing time can be shortened. In addition, after forming the n-type semiconductor core 23, it is not necessary to take the semiconductor core 23 out of the manufacturing apparatus. Therefore, contamination can be prevented from adhering to the surface of the n-type semiconductor core 23, thereby improving the element characteristics. it can. In addition, since the formation of the n-type semiconductor core 23 and the formation of the p-type semiconductor layer 25 can be performed continuously, the crystallinity can be improved by avoiding a large temperature change or growth stop, and the like. The characteristics can be improved. Further, the etching of removing the catalytic metal 22 is not performed immediately after the n-type semiconductor core 23 is formed, so that the surface of the n-type semiconductor core 23 (that is, the interface with the p-type semiconductor layer 25). ) Can be eliminated, and the device characteristics can be improved.

  Further, according to the manufacturing method of this embodiment, the n-type semiconductor core 23 and the p-type semiconductor layer 25 are formed in this order while the catalyst metal 22 is attached to the substrate 21, so that the portion in contact with the catalyst metal 22 is formed. The growth rate is remarkably faster (for example, 10 to 100 times) than the growth rate of the portion not in contact with the catalyst metal 22. Therefore, a semiconductor element having a high dimension aspect ratio can be manufactured. In the second embodiment, as an example, the rod-shaped structure light emitting element 26 has a diameter of 1 μm and a length of 25 μm. In addition, since the n-type semiconductor core 23 and the p-type semiconductor layer 25 can be successively stacked under the catalyst metal 22, defects in the PN junction can be reduced. In addition, according to the rod-shaped structure light emitting device 26 manufactured in this embodiment, the semiconductor core 23 and the semiconductor core 23 can be easily contacted by the n-GaN step portion 21A connected under the covering portion 25C. Can do.

  In the embodiment, the light emitting element having the rod-shaped structure is not separated from the substrate 1. However, a step of separating the light emitting element having the rod-shaped structure from the substrate 21 may be included. In this case, in the separation step, the substrate is immersed in an isopropyl alcohol (IPA) aqueous solution, and the underlying substrate 21 is vibrated along the substrate plane using ultrasonic waves (for example, several tens of kHz), whereby the underlying n-GaN substrate 21. Stress is applied to the semiconductor core 23 covered with the p-type GaN semiconductor layer 25 so as to bend the semiconductor core 23 standing upright, and the semiconductor core covered with the semiconductor layer 25 as shown in FIG. 23 and the stepped portion 21A connected to the semiconductor core 23 are separated from the substrate 21. In this way, the fine rod-shaped structure light emitting element 26 separated from the base substrate 21 can be manufactured. Therefore, in this case, the fine rod-shaped structure light emitting element 26 having a high degree of freedom in mounting on the device can be manufactured. Further, the substrate 21 can be reused. Further, the rod-shaped structure light emitting element 26 can reduce the amount of semiconductor used, can reduce the thickness and weight of the device using the light emitting element, and can also reduce the entire circumference of the semiconductor core 23 covered with the semiconductor layer 25. Since the light emitting region is widened by emitting light from the light emitting device, a light emitting device, a backlight, a lighting device, a display device, and the like with high luminous efficiency and power saving can be realized.

  In the second embodiment, a quantum well layer or a multiple quantum well layer that covers the rod-shaped semiconductor core 23 and is covered with the p-GaN semiconductor layer 25 may be formed. In this case, the luminous efficiency can be improved.

(Third embodiment)
21 to 25 are process diagrams sequentially showing a method for manufacturing a semiconductor device according to the third embodiment of the present invention. In the third embodiment, first, in a catalytic metal forming step, as shown in FIG. 21, a mask layer 32 having a growth hole 32A is formed on a substrate 31 made of n-type GaN. The mask layer 32 may be made of a material that can be selectively etched with respect to the semiconductor core and the semiconductor layer, such as silicon oxide (SiO ₂ ) or silicon nitride (Si ₃ N ₄ ). The growth hole 32A can be formed by a known lithography method and dry etching method used in a normal semiconductor process. At this time, the diameter of the growing semiconductor core depends on the size of the growth hole 32 </ b> A of the mask 32.

  Next, a catalytic metal 33 is formed on a part 31 </ b> A of the substrate 31 exposed in the growth hole 32 </ b> A of the mask 32. As the catalyst metal 33, for example, Ni, Fe or the like can be adopted.

Next, in the semiconductor core formation step, as shown in FIG. 22, a rod-shaped semiconductor core 35 is formed in the presence of the catalytic metal 33 by crystal growth of n-type GaN using an MOCVD (metal organic chemical vapor deposition) apparatus. Form. The rod-shaped semiconductor core 35 is grown to a length of 25 μm, for example. The growth temperature is set to about 800 ° C., trimethylgallium (TMG) and ammonia (NH ₃ ) are used as growth gases, silane (SiH ₄ ) is used for supplying n-type impurities, and hydrogen (H ₂ ) is used as a carrier gas. The n-type GaN semiconductor core 35 with Si as an impurity can be grown. Here, the n-type GaN has a hexagonal crystal growth, and a hexagonal columnar semiconductor core 35 is obtained by growing the n-type GaN with the direction perpendicular to the surface of the substrate 31 as the c-axis direction. A plurality of growth holes 32A are formed in the mask layer 32, and a plurality of catalytic metals 33 are formed on a portion 31A of the n-GaN substrate 31 at a plurality of locations exposed in the plurality of growth holes 32A. A rod-shaped semiconductor core 35 may be formed.

Next, in the semiconductor layer forming step, as shown in FIG. 23, a p-GaN semiconductor layer 36 that covers the n-GaN semiconductor core 35 and the mask 32 is formed by MOCVD. The p-GaN semiconductor layer 36 is formed at a set temperature of 900 ° C., using TMG and NH ₃ as growth gases, and using Cp ₂ Mg for supplying p-type impurities, thereby forming a semiconductor layer 36 made of p-type GaN. it can.

  In the growth of the p-GaN semiconductor layer 36 by the MOCVD, since the film is formed with the catalyst metal 33 attached, the catalyst metal 33 is compared with the growth rate of the portion covering the side surface 35B of the n-type GaN semiconductor core 35. And the growth rate of the portion between the n-type GaN semiconductor core 35 and the tip surface 35A of the n-type GaN semiconductor core 35 is increased (for example, 10 to 100 times). Therefore, in the p-GaN semiconductor layer 36, the thickness of the tip portion 36A is thicker than the thickness of the side surface portion 36B.

  Next, as shown in FIG. 24, the catalytic metal 33 on the p-GaN semiconductor layer 36 is removed by etching, cleaning is performed, and the p-GaN semiconductor layer 36 is activated by annealing. Here, the thickness of the tip portion 36A of the p-GaN semiconductor layer 36 covering the tip surface 35A of the semiconductor core 35 is larger than the thickness of the side surface portion 36B of the p-GaN semiconductor layer 36 covering the side surface 35B of the semiconductor core 35. Since it is thick, damage and defects on the metal removal surface are less likely to adversely affect the PN junction. Further, it is possible to prevent the semiconductor core 35 from being exposed from the semiconductor layer 36 during etching.

Next, as shown in FIG. 24, the mask layer 32 is removed by etching. When the mask layer 32 is made of silicon oxide (SiO ₂ ) or silicon nitride (Si ₃ N ₄ ), the semiconductor core 35 and the semiconductor core 35 can be easily obtained by using a solution containing hydrofluoric acid (HF). The mask layer 32 can be etched without affecting the portion of the semiconductor layer 36 that covers the substrate. Further, the mask layer 32 can be easily etched without affecting the semiconductor core 35 and the semiconductor layer 36 covering the semiconductor core 35 by dry etching using CF ₄ or XeF ₂ . As a result, the semiconductor core 35 is exposed at the portion 35C on the substrate 31 side.

  As a result, a light emitting element 37 having a rod-like structure composed of the n-type GaN semiconductor core 35 and the p-GaN semiconductor layer 36 is formed on the substrate 31.

  According to the semiconductor element manufacturing method of this embodiment, the p-type semiconductor layer 36 is formed not only on the tip surface 35A of the n-type semiconductor core 35 but also on the side surface 35B, so that the area of the pn junction can be increased, The light emission area can be increased and the light emission efficiency can be improved. Further, since the n-type semiconductor core 35 is formed using the catalyst metal 33, the growth rate of the n-type semiconductor core 35 can be increased. For this reason, the semiconductor core 35 can be lengthened in a shorter time than the conventional one, and the light emitting area that is proportional to the length of the n-type semiconductor core 35 can be further increased. In addition, since the tip surface 35A and the side surface 35B of the n-type semiconductor core 35 are covered with the p-type semiconductor layer 36, the electrode for the p-type semiconductor layer 36 is short-circuited to the n-type semiconductor core 35. Can be prevented.

  Further, according to the method for manufacturing a semiconductor element of this embodiment, the p-type semiconductor layer 36 is formed with the catalyst metal 33 left, so that the formation of the n-type semiconductor core 35 and the p-type semiconductor layer are performed. The formation of 36 can be performed continuously in the same manufacturing apparatus. Therefore, process reduction and manufacturing time can be shortened. In addition, after forming the n-type semiconductor core 35, it is not necessary to take the semiconductor core 35 out of the manufacturing apparatus. Therefore, contamination can be prevented from adhering to the surface of the n-type semiconductor core 35, thereby improving the element characteristics. it can. In addition, since the formation of the n-type semiconductor core 35 and the formation of the p-type semiconductor layer 36 can be performed continuously, the crystallinity can be improved by avoiding a large temperature change or growth stop, and the like. The characteristics can be improved. Further, the etching of removing the catalytic metal 33 is not performed immediately after the formation of the n-type semiconductor core 35, so that the surface of the n-type semiconductor core 35 (that is, the interface with the p-type semiconductor layer 35). ) Can be eliminated, and the device characteristics can be improved.

  Further, according to the manufacturing method of this embodiment, the n-type semiconductor core 35 and the p-type semiconductor layer 36 are formed in this order while the catalyst metal 33 is attached on the substrate 31, so that the portion in contact with the catalyst metal 33 is formed. The growth rate is remarkably faster (for example, 10 to 100 times) than the growth rate of the portion not in contact with the catalyst metal 33. Therefore, a semiconductor element having a high dimension aspect ratio can be manufactured. In the third embodiment, as an example, the rod-shaped structure light emitting element 37 has a diameter of 1 μm and a length of 25 μm. In addition, since the n-type semiconductor core 35 and the p-type semiconductor layer 36 can be continuously stacked under the catalyst metal 33, defects at the PN junction can be reduced.

  Further, according to the manufacturing method of this embodiment, the mask layer 32 is removed and the portion 35C on the substrate 31 side of the semiconductor core 35 is exposed, so that the etching amount of the semiconductor layer 36 can be reduced. Further, according to the rod-shaped structure light emitting element 37 manufactured in this embodiment, the semiconductor core 35 can be easily contacted with the semiconductor core 35 by the portion 35 </ b> C exposed from the semiconductor layer 36.

  Further, in the third embodiment, a quantum well layer or a multiple quantum well layer that covers the rod-shaped semiconductor core 35 and is covered with the p-GaN semiconductor layer 36 is formed to improve luminous efficiency. Also good.

In the above embodiment, the light emitting element 37 having the rod-shaped structure is not separated from the substrate 31. However, a step of separating the light emitting element 12 having the rod-shaped structure from the substrate 1 may be included. In this case, in the separation step, the substrate is immersed in an isopropyl alcohol (IPA) aqueous solution, and the underlying substrate 31 is vibrated along the substrate plane using ultrasonic waves (for example, several tens of kHz), whereby the underlying n-GaN substrate 31 is obtained. Stress is applied to the semiconductor core 35 covered with the p-type GaN semiconductor layer 35 so as to bend the semiconductor core 35 standing upright, and the semiconductor core 35 and the semiconductor core 35 are covered as shown in FIG. The rod-shaped structure light emitting element 37 constituted by the semiconductor layer 36 is separated from the substrate 31. Thus, the fine rod-shaped structure light emitting element 37 separated from the base substrate 31 can be manufactured. Therefore, in this case, the fine rod-shaped structure light emitting element 37 having a high degree of freedom of mounting on the device can be manufactured. Further, the rod-shaped structure light emitting element 37 can reduce the amount of semiconductor used, can reduce the thickness and weight of the device using the light emitting element, and can also reduce the entire circumference of the semiconductor core 35 covered with the semiconductor layer 36. Since the light emitting region is widened by emitting light from the light emitting device, a light emitting device, a backlight, a lighting device, a display device, and the like with high luminous efficiency and power saving can be realized. As shown in FIG. 25, the rod-like light emitting element 37 separated from the substrate 31 is covered with a p-type semiconductor layer 36 on the tip surface 35 </ b> A and the side surface 35 </ b> B of the n-type semiconductor core 35. Therefore, when this rod-like light emitting element 37 is connected to the p-side electrode 42 and the n-side electrode 43 formed on the substrate 41 as shown in FIG. 26, the p-side electrode 42 for the p-type semiconductor layer 36 is used. Can be prevented from being short-circuited to the n-type semiconductor core 35. In FIG. 26, 45 is a transparent insulator formed of SOG, SiO ₂ , epoxy, silicon or the like.

  In addition, when it has the said cutting-off process in the said 1st-3rd embodiment, although the rod-shaped structure light emitting element was cut off from the board | substrate using the ultrasonic wave, it is not restricted to this, A semiconductor core is board | substrate using a cutting tool. May be separated by mechanical bending. In this case, a plurality of fine rod-shaped light emitting elements provided on the substrate can be separated in a short time by a simple method.

(Fourth embodiment)
27A to 27E are process diagrams sequentially illustrating a method for manufacturing a semiconductor device according to the fourth embodiment of the present invention. In the fourth embodiment, first, as shown in FIG. 27A, the catalyst metal 52 is deposited (deposited) on the n-GaN substrate 51 in the catalyst metal formation step. As the catalyst metal 52, for example, Ni, Fe or the like can be adopted.

Next, in the semiconductor core formation step, as shown in FIG. 27B, a rod-shaped semiconductor core 53 is formed by crystal growth of n-type GaN using an MOCVD (metal organic chemical vapor deposition) apparatus. The rod-shaped semiconductor core 53 is grown to a length of 25 μm, for example. The growth temperature is set to about 800 ° C., trimethylgallium (TMG) and ammonia (NH ₃ ) are used as growth gases, silane (SiH ₄ ) is used for supplying n-type impurities, and hydrogen (H ₂ ) is used as a carrier gas. The n-type GaN semiconductor core 53 with Si as an impurity can be grown. Here, n-GaN has a hexagonal crystal growth, and a hexagonal columnar semiconductor core can be obtained by growing the substrate perpendicular to the surface of the substrate 51 in the c-axis direction. The catalytic metal 52 may be formed at a plurality of different locations on the substrate 51 to form a plurality of rod-shaped semiconductor cores 53.

  Next, as shown in FIG. 27C, the catalyst metal 52 on the tip surface 53A of the n-type GaN semiconductor core 53 is removed by etching, cleaning is performed, and the n-type GaN semiconductor core 53 is activated by annealing.

Next, as shown in FIG. 27D, a p-GaN semiconductor layer 55 is formed on the entire surface of the n-GaN semiconductor core 53 and the n-GaN substrate 51 by MOCVD. The p-GaN semiconductor layer 55 is formed at a preset temperature of 900 ° C., using TMG and NH ₃ as growth gases, and using Cp ₂ Mg for supplying p-type impurities, thereby forming a semiconductor layer 55 made of p-type GaN. it can.

  Next, as shown in FIG. 27E, a transparent electrode 56 is formed so as to fill a space between the plurality of rod-shaped light emitting elements 57 formed by the n-GaN semiconductor core 53 and the p-type GaN semiconductor layer 55. Thereby, a light-emitting device in which a plurality of rod-shaped structured light-emitting elements 57 are erected on the substrate 51 can be manufactured. In this embodiment, as an example, the rod-shaped structure light emitting element 57 has a diameter of 1 μm and a length of 10 μm.

  According to the semiconductor element manufacturing method of this embodiment, the p-type semiconductor layer 55 is formed not only on the tip surface 53A of the n-type semiconductor core 53 but also on the side surface 53B, so that the area of the pn junction can be increased, The light emission area can be increased and the light emission efficiency can be improved. Further, since the n-type semiconductor core 53 is formed using the catalyst metal 52, the growth rate of the n-type semiconductor core 53 can be increased. For this reason, the semiconductor core 53 can be lengthened in a short time compared to the conventional case, and the light emitting area that is proportional to the length of the n-type semiconductor core 53 can be further increased. Further, since the tip surface 53A and the side surface 53B of the n-type semiconductor core 53 are covered with the p-type semiconductor layer 55, the transparent electrode 56 for the p-type semiconductor layer 55 is short-circuited to the n-type semiconductor core 53. Can be prevented.

  Also, according to the method for manufacturing a semiconductor device of this embodiment, the p-type semiconductor layer 55 is formed after removing the catalytic metal 52, so that the light emitting region (the n-type semiconductor core 53 and the p-type semiconductor layer is formed). It is possible to prevent the catalyst metal 52 from entering the interface 55.

(Fifth embodiment)
28A to 28E are process diagrams sequentially showing a method for manufacturing a semiconductor device according to the fifth embodiment of the present invention. In the fifth embodiment, first, in the catalyst metal formation step, as shown in FIG. 28A, the catalyst metal 62 is deposited on the n-GaN substrate 61 (deposition). As the catalyst metal 62, for example, Ni, Fe or the like can be adopted.

Next, in the semiconductor core formation step, as shown in FIG. 28B, a rod-shaped semiconductor core 63 is formed by crystal growth of n-type GaN using a MOCVD (metal organic chemical vapor deposition) apparatus. The rod-shaped semiconductor core 63 is grown to a length of 25 μm, for example. The growth temperature is set to about 800 ° C., trimethylgallium (TMG) and ammonia (NH ₃ ) are used as growth gases, silane (SiH ₄ ) is used for supplying n-type impurities, and hydrogen (H ₂ ) is used as a carrier gas. The n-type GaN semiconductor core 63 with Si as an impurity can be grown. Here, n-GaN has a hexagonal crystal growth, and a hexagonal columnar semiconductor core can be obtained by growing the substrate perpendicular to the surface of the substrate 51 in the c-axis direction. The catalytic metal 62 may be formed at a plurality of different locations on the substrate 61 to form a plurality of rod-shaped semiconductor cores 53.

  Next, as shown in FIG. 28C, the catalyst metal 62 on the tip surface 53A of the n-type GaN semiconductor core 63 is removed by etching, cleaning is performed, and the n-type GaN semiconductor core 63 is activated by annealing.

Next, as shown in FIG. 28D, an n-GaN semiconductor layer 65 is formed on the entire surface of the n-GaN semiconductor core 63 and the n-GaN substrate 61 by MOCVD. The n-GaN semiconductor layer 65 has a set temperature of 800 ° C., uses trimethyl gallium (TMG) and NH ₃ as growth gases, silane (SiH ₄ ) for supplying n-type impurities, and hydrogen ( By supplying H ₂ ), an n-type GaN semiconductor layer 65 with Si as an impurity can be grown.

Next, as shown in FIG. 28E, a p-GaN semiconductor layer 66 is formed on the entire surface of the n-GaN semiconductor layer 65 by MOCVD. The p-GaN semiconductor layer 66 is formed at a set temperature of 900 ° C., using TMG and NH ₃ as growth gases, and using Cp ₂ Mg for supplying p-type impurities, thereby forming a semiconductor layer 66 made of p-type GaN. it can. As a result, a light emitting device in which a plurality of rod-shaped structured light emitting elements 67 are erected on the substrate 61 can be manufactured. In this embodiment, as an example, the rod-shaped structure light emitting element 67 has a diameter of 1 μm and a length of 25 μm.

  According to the semiconductor element manufacturing method of this embodiment, since the p-type semiconductor layer 66 is formed not only on the tip surface 63A of the n-type semiconductor core 63 but also on the side surface 63B, the area of the pn junction can be increased. The light emission area can be increased and the light emission efficiency can be improved. Further, since the n-type semiconductor core 63 is formed using the catalyst metal 62, the growth rate of the n-type semiconductor core 63 can be increased. For this reason, the semiconductor core 63 can be lengthened in a short time compared to the conventional case, and the light emitting area that is proportional to the length of the n-type semiconductor core 63 can be further increased. Further, since the tip surface 63A and the side surface 63B of the n-type semiconductor core 63 are covered with the p-type semiconductor layer 66, the electrode is short-circuited to the n-type semiconductor core 63 because of the p-type semiconductor layer 66. Can be prevented.

  In addition, according to this embodiment, the n-type semiconductor layer 65 having good crystallinity is formed by isotropically forming the n-type semiconductor layer 65 on the tip surface 63A and the side surface 63B of the n-type semiconductor core 63. A junction (light emitting portion) with few defects can be obtained between the n-type semiconductor layer 65 and the p-type semiconductor layer 66.

  Also, according to the method for manufacturing a semiconductor device of this embodiment, the p-type semiconductor layer 66 is formed after removing the catalytic metal 62, so that the light emitting region (the n-type semiconductor core 63 and the p-type semiconductor layer is formed). It is possible to prevent the catalyst metal 62 from being mixed into the interface with 66.

  Further, according to the method for manufacturing a semiconductor element of this embodiment, the formation of the n-type semiconductor layer 65 and the formation of the p-type semiconductor layer 66 can be performed continuously in the same manufacturing apparatus. Therefore, there is no need to take the semiconductor layer 65 out of the manufacturing apparatus after the n-type semiconductor layer 65 is formed. Therefore, contamination can be prevented from adhering to the surface of the n-type semiconductor layer 65 and the device characteristics can be improved. it can. In addition, since the formation of the n-type semiconductor layer 65 and the formation of the p-type semiconductor layer 66 can be continuously performed, crystallinity can be improved by avoiding a large temperature change or stop of growth, and the like. The characteristics can be improved.

(Sixth embodiment)
Next, a light emitting device, a backlight, a lighting device, and a display device each including a rod-shaped structure light emitting element according to a sixth embodiment of the present invention will be described. In the sixth embodiment, the rod-shaped structure light emitting elements produced in the first to third embodiments having the separation step are arranged on an insulating substrate. The arrangement of the rod-shaped structure light-emitting elements is the same as that disclosed in Japanese Patent Application No. 2007-102848 (Japanese Patent Application Laid-Open No. 2008-260073), “Microstructure Arrangement Method, Substrate Arranged with Fine Structure, and Integrated Circuit Device” And display device ".

  FIG. 29 shows a plan view of an insulating substrate used in the light emitting device, backlight, illumination device and display device of the sixth embodiment. As shown in FIG. 29, metal electrodes 601 and 602 are formed on the surface of the insulating substrate 600. The insulating substrate 600 is an insulating material such as glass, ceramic, aluminum oxide, or resin, or a substrate in which a silicon oxide film is formed on a semiconductor surface such as silicon and the surface is insulative. When a glass substrate is used, it is desirable to form a base insulating film such as a silicon oxide film or a silicon nitride film on the surface.

  The metal electrodes 601 and 602 are formed in a desired electrode shape using a printing technique. The metal film and the photosensitive film may be uniformly laminated, and a desired electrode pattern may be exposed and etched.

  Although omitted in FIG. 29, pads are formed on the metal electrodes 601 and 602 so that potentials can be applied from the outside. A rod-shaped structure light emitting element is arranged in a portion (arrangement region) where the metal electrodes 601 and 602 face each other. In FIG. 29, 2 × 2 arrangement regions for arranging the rod-shaped structure light emitting elements are arranged, but any number may be arranged.

  30 is a schematic sectional view taken along line XXV-XXV in FIG.

  First, as shown in FIG. 30, isopropyl alcohol (IPA) 611 including a rod-shaped structure light emitting element 610 is thinly applied on an insulating substrate 600. In addition to IPA 611, ethylene glycol, propylene glycol, methanol, ethanol, acetone, or a mixture thereof may be used. Alternatively, the IPA 611 can use a liquid made of another organic material, water, or the like.

  However, if a large current flows between the metal electrodes 601 and 602 through the liquid, a desired voltage difference cannot be applied between the metal electrodes 601 and 602. In such a case, an insulating film of about 10 nm to 30 nm may be coated on the entire surface of the insulating substrate 600 so as to cover the metal electrodes 601 and 602.

The thickness of applying the IPA 611 including the rod-shaped structure light emitting device 610 is such that the rod-shaped structure light emitting device 610 can move in the liquid so that the rod-shaped structure light emitting device 610 can be arranged in the next step of arranging the rod-shaped structure light emitting device 610. That's it. Therefore, the thickness of applying the IPA 611 is equal to or greater than the thickness of the rod-shaped structure light emitting element 610, and is, for example, several μm to several mm. If the applied thickness is too thin, the rod-like structure light emitting element 610 is difficult to move, and if it is too thick, the time for drying the liquid becomes long. Further, the amount of the rod-shaped structure light emitting element 610 is preferably 1 × 10 ⁴ pieces / cm ³ to 1 × 10 ⁷ pieces / cm ³ with respect to the amount of IPA.

  In order to apply the IPA 611 including the rod-shaped structure light-emitting element 610, a frame is formed around the outer periphery of the metal electrode on which the rod-shaped structure light-emitting element 610 is arranged. It may be filled so that However, when the IPA 611 including the rod-shaped structure light emitting element 610 is viscous, it can be applied to a desired thickness without the need for a frame.

  A liquid made of IPA, ethylene glycol, propylene glycol,..., Or a mixture thereof, or other organic substances, or a liquid such as water is desirable for the alignment process of the rod-shaped structure light emitting device 610 to have a low viscosity. It is desirable that it evaporates easily when heated.

  Next, a potential difference is applied between the metal electrodes 601 and 602. In the sixth embodiment, a potential difference of 1V was appropriate. The potential difference between the metal electrodes 601 and 602 can be 0.1 to 10 V. However, if the voltage difference is 0.1 V or less, the arrangement of the rod-like structure light emitting elements 610 is poor, and if it is 10 V or more, insulation between the metal electrodes becomes a problem. start. Therefore, it is preferably 1 to 5V, and more preferably about 1V.

  FIG. 31 shows the principle in which the rod-shaped structure light emitting elements 610 are arranged on the metal electrodes 601 and 602. As shown in FIG. 31, when a potential VL is applied to the metal electrode 601 and a potential VR (VL <VR) is applied to the metal electrode 602, a negative charge is induced in the metal electrode 601 and a positive charge is applied to the metal electrode 602. Is induced. When the rod-shaped structure light emitting element 610 approaches the positive electrode, a positive charge is induced on the side close to the metal electrode 601 and a negative charge is induced on the side close to the metal electrode 602. The charge is induced in the rod-like structure light emitting element 610 by electrostatic induction. In other words, the rod-shaped structure light emitting element 610 placed in an electric field is caused by the charge being induced on the surface until the internal electric field becomes zero. As a result, an attractive force is generated between each electrode and the rod-shaped structure light emitting element 610 by electrostatic force, and the rod-shaped structure light emitting element 610 follows the electric lines of force generated between the metal electrodes 601 and 602, and each rod-shaped structure light emitting element 610. Since the charges induced in the are substantially equal, the repulsive force caused by the charges causes the charges to be regularly arranged in a fixed direction at almost equal intervals. However, for example, in the rod-shaped structure light emitting element 12 shown in FIG. 14 manufactured in the first embodiment, the direction of the exposed portion 7C side of the semiconductor core 7 covered with the semiconductor layer 10 is not constant, and is random (others The same applies to the rod-shaped structure light emitting device of the embodiment).

  As described above, the rod-shaped light-emitting element 610 generates electric charges in the bar-shaped structured light-emitting element 610 by the external electric field generated between the metal electrodes 601 and 602, and the metal electrodes 601 and 602 have the rod-shaped structure light-emitting element 610 by attractive force. Therefore, the size of the rod-shaped structure light emitting element 610 needs to be a size that can move in the liquid. Therefore, the size of the rod-shaped structure light emitting element 610 varies depending on the application amount (thickness) of the liquid. When the liquid application amount is small, the rod-like structure light emitting element 610 must have a nano-order size, but when the liquid application amount is large, it may be a micro-order size.

  When the rod-shaped structure light-emitting element 610 is not electrically neutral and is charged positively or negatively, the rod-shaped structure light-emitting element 610 can be formed only by giving a static potential difference (DC) between the metal electrodes 601 and 602. It cannot be arranged stably. For example, when the rod-shaped structure light emitting element 610 is positively charged as a net, the attractive force with the metal electrode 602 in which the positive charge is induced becomes relatively weak. Therefore, the arrangement of the rod-shaped structure light emitting elements 610 is not targeted.

  In such a case, it is preferable to apply an AC voltage between the metal electrodes 601 and 602 as shown in FIG. In FIG. 32, a reference potential is applied to the metal electrode 602, and an AC voltage having an amplitude VPPL / 2 is applied to the metal electrode 601. By doing so, even when the rod-shaped structure light emitting element 610 is charged, the array can be kept as a target. In this case, the frequency of the AC voltage applied to the metal electrode 602 is preferably 10 Hz to 1 MHz, and more preferably 50 Hz to 1 kHz because the arrangement is most stable. Furthermore, the AC voltage applied between the metal electrodes 601 and 602 is not limited to a sine wave, but may be any voltage that varies periodically, such as a rectangular wave, a triangular wave, and a sawtooth wave. VPPL was preferably about 1V.

  Next, after arranging the rod-shaped structure light emitting elements 610 on the metal electrodes 601 and 602, the insulating substrate 600 is heated to evaporate and dry the liquid, so that the rod-shaped structure light emitting elements 610 are attached to the metal electrodes 601 and 601. Along the lines of electric force between 602, they are arranged at equal intervals and fixed.

  FIG. 33 is a plan view of an insulating substrate 600 on which the rod-shaped structure light emitting elements 610 are arranged. By using the insulating substrate 600 on which the rod-shaped structure light emitting elements 610 are arranged for a backlight of a liquid crystal display device or the like, it is possible to realize a backlight that can be reduced in thickness and weight, has high luminous efficiency, and saves power. it can. In addition, by using the insulating substrate 600 on which the rod-shaped structure light emitting elements 610 are arranged as a lighting device, it is possible to realize a lighting device that can be reduced in thickness and weight, has high luminous efficiency, and saves power.

  FIG. 34 is a plan view of a display device using an insulating substrate on which the rod-shaped structure light emitting elements 610 are arranged. As illustrated in FIG. 34, the display device 700 includes a display portion 701, a logic circuit portion 702, a logic circuit portion 703, a logic circuit portion 704, and a logic circuit portion 705 on an insulating substrate 710. In the display portion 701, rod-like structure light emitting elements 610 are arranged in pixels arranged in a matrix.

  FIG. 35 is a circuit diagram of a main part of the display unit 701 of the display device 700. As shown in FIG. 35, the display unit 701 of the display device 700 has a plurality of scanning signal lines GL (see FIG. 32, only one line is shown) and a plurality of data signal lines SL (only one line is shown in FIG. 35), and two adjacent scanning signal lines GL and two adjacent data signal lines SL are provided. Pixels are arranged in a matrix in a portion surrounded by. This pixel has a switching element Q1 having a gate connected to the scanning signal line GL and a source connected to the data signal line SL, a switching element Q2 having a gate connected to the drain of the switching element Q1, and the switching element Q2. And a plurality of light emitting diodes D1 to Dn (bar-shaped structure light emitting element 610) driven by the switching element Q2.

  The pn polarities of the rod-shaped structure light emitting elements 610 are not aligned on one side, but are randomly arranged. For this reason, during driving, the rod-shaped structure light emitting elements 610 having different polarities emit light alternately by being driven by an AC voltage.

  Further, according to the display device, by using the rod-shaped structure light emitting element, it is possible to realize a display device that can be reduced in thickness and weight, has high luminous efficiency, and saves power.

  In addition, according to the manufacturing method of the light emitting device, the backlight, the lighting device, and the display device, the insulating substrate 600 in which the array region having the unit of two metal electrodes 601 and 602 to which independent potentials are respectively applied is formed. The liquid containing the light emitting element 610 having a rod-like structure of nano-order size or micro-order size is applied on the insulating substrate 600. Thereafter, independent voltages are applied to the two metal electrodes 601 and 602, respectively, so that the fine rod-shaped light emitting elements 610 are arranged at positions defined by the two metal electrodes 601 and 602. Thereby, the rod-shaped structure light emitting element 610 can be easily arranged on the predetermined insulating substrate 600.

  Moreover, in the manufacturing method of the light emitting device, the backlight, the lighting device, and the display device, the light emitting device, the backlight, the lighting device, and the display device that can reduce the amount of semiconductors used and can be reduced in thickness and weight are manufactured. can do. In addition, since the light emitting region is widened by emitting light from the entire side surface of the semiconductor core covered with the semiconductor layer, the rod-shaped structure light emitting element 610 has a high light emission efficiency and saves power. A device and a display device can be realized.

  In the first to sixth embodiments, a semiconductor having GaN as a base material is used for the semiconductor core and the semiconductor layer, but GaAs, AlGaAs, GaAsP, InGaN, AlGaN, GaP, ZnSe, AlGaInP, etc. The present invention may be applied to a light emitting element using a semiconductor. Further, although the semiconductor core is n-type and the semiconductor layer is p-type, the present invention may be applied to a rod-shaped structure light-emitting element having a reverse conductivity type. Moreover, although the rod-shaped structure light emitting element having a hexagonal columnar semiconductor core has been described, the present invention is not limited to this, and the cross section may be a circular or elliptical rod shape, or the cross section may be other polygonal rod shape such as a triangle. You may apply this invention to the rod-shaped structure light emitting element which has a semiconductor core.

  In the first embodiment, the substrate 1 is a sapphire substrate, and in the second to fifth embodiments, an n-GaN substrate is used. However, Si or the like can be used as the material of the substrate.

  Moreover, in the said 1st-6th embodiment, although the diameter of the rod-shaped structure light emitting element was 1 micrometer and the length was made into the micro order size of 10 micrometers-30 micrometers, nano order with at least a diameter less than 1 micrometer among diameters or lengths. A size element may be used. The diameter of the semiconductor core of the rod-shaped structure light emitting element is preferably 500 nm or more and 100 μm or less, and variation in the diameter of the semiconductor core can be suppressed as compared with the rod-shaped structure light emitting element of several tens nm to several hundred nm, and the light emission area, that is, the light emission characteristics. Variation can be reduced and yield can be improved.

  In the first to fifth embodiments, the semiconductor core and the semiconductor layer are crystal-grown using the MOCVD apparatus. However, the semiconductor core and the semiconductor are grown using another crystal growth apparatus such as an MBE (molecular beam epitaxial) apparatus. A layer may be formed.

  In the sixth embodiment, a potential difference is given to the two metal electrodes 601 and 602 formed on the surface of the insulating substrate 600, and the rod-shaped structure light emitting elements 600 are arranged between the metal electrodes 601 and 602. Not limited to this, a third electrode is formed between two electrodes formed on the surface of the insulating substrate, and an independent voltage is applied to each of the three electrodes. You may arrange in the position.

DESCRIPTION OF SYMBOLS 1 Substrate 2 n-GaN layer 3, 32 Mask layer 5 Resist layer 6, 22, 33 Catalytic metal 7, 23, 35 n-GaN semiconductor core 8 Multiple quantum well layer 10, 25, 36 p-GaN semiconductor layer 11 Conductive film 12 Light-emitting element 21, 31 n-GaN substrate 26, 37 Bar-shaped structure light-emitting element 32A Growth hole 600 Insulating substrate 601, 602 Metal electrode 610 Bar-shaped structure light-emitting element 611 IPA
700 Display Device 701 Display Unit 702, 703, 704, 705 Logic Circuit Unit 710 Insulating Substrate

Claims (14)

A catalyst metal forming step of forming a catalyst metal on the substrate;
Forming a semiconductor core of a first conductivity type on the substrate and under the catalyst metal; and
And a semiconductor layer forming step of forming a second conductivity type semiconductor layer on a front end surface and a side surface of the first conductivity type semiconductor core. In the manufacturing method of the semiconductor device according to claim 1,
In the semiconductor layer forming step,
A method of manufacturing a semiconductor device, comprising forming a second conductivity type semiconductor layer on a front end surface and a side surface of the first conductivity type semiconductor core with the catalyst metal left. In the manufacturing method of the semiconductor device according to claim 1,
In the semiconductor layer forming step,
A method of manufacturing a semiconductor device, comprising: removing a catalyst metal; and forming a second conductivity type semiconductor layer on a front end surface and a side surface of the first conductivity type semiconductor core. In the manufacturing method of the semiconductor device according to claim 3,
In the semiconductor layer forming step,
After the catalyst metal is removed, a first conductivity type semiconductor layer is formed on the front end surface and the side surface of the first conductivity type semiconductor core, and then the second conductivity type semiconductor layer is formed. A method for manufacturing a semiconductor device. In the manufacturing method of the semiconductor element according to any one of claims 1 to 4,
A method for manufacturing a semiconductor element, comprising: a separation step of separating the first conductive type semiconductor core from the substrate together with the second conductive type semiconductor layer. In the manufacturing method of the semiconductor device according to any one of claims 1 to 5,
The semiconductor layer of the second conductivity type formed in the semiconductor layer forming step is
A method of manufacturing a semiconductor element, wherein a thickness of a portion covering a tip surface of the first conductivity type semiconductor core is thicker than a thickness of a portion covering a side surface of the first conductivity type semiconductor core. In the manufacturing method of the semiconductor device according to any one of claims 1 to 5,
The substrate is a first conductivity type semiconductor substrate,
An anisotropic etching is performed to leave a covering portion that covers the tip surface of the first conductivity type semiconductor core and the side surface of the semiconductor core in the second conductivity type semiconductor layer, and the second conductivity type. The extending portion extending along the semiconductor substrate is removed from the portion of the semiconductor layer covering the side surface of the semiconductor core, and the semiconductor substrate under the extending portion is removed by a certain depth dimension. Then, the step of the semiconductor substrate that continues below the semiconductor core and the covering portion of the semiconductor layer is left. In the manufacturing method of the semiconductor device according to claim 5,
In the above separation process,
A method of manufacturing a semiconductor element, wherein the semiconductor core is separated from the semiconductor substrate together with a covering portion of the semiconductor layer that covers a front end surface and a side surface of the semiconductor core and a step portion of the semiconductor substrate that is continuous under the semiconductor core. . In the manufacturing method of the semiconductor element according to claim 1 or 2,
The catalyst metal forming step includes
Forming a growth mask having a growth hole on the substrate;
Forming a catalytic metal on the substrate in the growth hole,
In the semiconductor core forming step, a first conductivity type semiconductor core protruding on the growth mask is formed on the substrate in the growth hole and below the catalyst metal,
In the semiconductor formation step, a second conductivity type semiconductor layer is formed on the surface of the first conductivity type semiconductor core protruding above the growth mask while leaving the catalyst metal,
And a step of removing the growth mask and exposing a side surface of the semiconductor core after the semiconductor forming step. In the manufacturing method of the semiconductor device according to any one of claims 1 to 9,
A method for manufacturing a semiconductor device, comprising: forming a quantum well layer that covers the first conductive type semiconductor core and is covered with the second conductive type semiconductor layer. A semiconductor core of a first conductivity type;
A second conductive type semiconductor layer that covers the end face and side face on one end side of the first conductive type semiconductor core and exposes the end face and side face on the other end side of the semiconductor core;
The semiconductor layer of the second conductivity type is
A semiconductor element characterized in that a thickness of a portion covering an end face on one end side of the semiconductor core is larger than a thickness of a portion covering a side surface of the semiconductor core.   A backlight comprising the semiconductor element according to claim 11.   An illumination device comprising the semiconductor element according to claim 11.   A display device comprising the semiconductor element according to claim 11.

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