JP2011119460A - Semiconductor device and method of manufacturing the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device with an improved heat radiation property, and a method of manufacturing the same. <P>SOLUTION: The semiconductor device includes: a semiconductor substrate 10 having a first surface with a first side; an electrode 14 arranged on the semiconductor substrate; a first insulating layer 16 having a first opening part 24 positioned on the electrode; a resin layer 20 arranged on the first insulating layer avoiding at least a part of the electrode; a conductive layer having a first part 31 arranged on the resin layer, a second part 32 electrically connecting the first part to the electrode, and a third part 33 electrically connecting the first part to the second part; and a second insulating layer 40 arranged to cover the second part of the conductive layer, having a second opening part 41 positioned above at least a part of the first part of the conductive layer, and avoiding the third part of the conductive layer. The third part of the conductive layer is positioned between the first side of the first surface and the second insulating layer. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a semiconductor device and a manufacturing method thereof.

  For example, a semiconductor device employing a package technology called WCSP (wafer level chip size package) that forms wiring and external terminals on a resin layer formed on a semiconductor substrate is known (Patent Document 1). . In a semiconductor device adopting WCSP, wiring is sealed with, for example, a solder resist in order to form solder balls serving as external terminals.

  Since such a package does not have an effective heat dissipation path other than the external terminals, the heat dissipation is lower than other packages. Therefore, improvement in heat dissipation of a semiconductor device employing such a package is desired.

Japanese Patent No. 4305673

  One aspect of the present invention is to provide a semiconductor device with improved heat dissipation.

  One aspect of the present invention is to provide a method for manufacturing a semiconductor device with improved heat dissipation.

(1) A semiconductor device which is one aspect of the present invention is:
A semiconductor substrate having a first surface having a first side;
An electrode provided on the first surface of the semiconductor substrate;
A first insulating layer provided on the first surface of the semiconductor substrate and having a first opening located on the electrode;
A second surface on the first insulating layer and avoiding at least a part of the electrode, and a second surface on the first insulating layer side and a third surface on the opposite side to the second surface A resin layer having a surface;
A first portion provided on the third surface of the resin layer; a second portion that electrically connects the first portion and the electrode; and the first portion or the first portion. A third portion electrically connected to the two portions; and a conductive layer having
A second opening provided on the third surface of the resin layer so as to cover the second portion of the conductive layer and positioned on at least a part of the first portion of the conductive layer And a second insulating layer provided to avoid the third portion of the conductive layer,
An external terminal provided in the second opening of the second insulating layer and electrically connected to the conductive layer;
Have
The third portion of the conductive layer is located between the first side of the first surface and the second insulating layer.

  In the description according to the present invention, the word “above” is used to form, for example, “above” a “specific thing” (hereinafter referred to as “A”) and another specific thing (hereinafter referred to as “B”). And so on. In the description according to the present invention, in the case of this example, the case where B is directly formed on A and the case where B is formed on A via another are included. , The word “above” is used. Similarly, the term “under” includes a case where B is directly formed under A and a case where B is formed under A via another.

  Further, in the description according to the present invention, the term “outside periphery” is constituted by “the outermost portion (outer peripheral portion) of the planar shape when viewed from the normal direction of the first surface of the semiconductor substrate. Used to mean “side”. For example, the phrase “outer periphery of A” means the outer peripheral side of the planar shape of configuration A when viewed from the normal direction of the first surface of the semiconductor substrate. Further, for example, when the outer peripheral portion of the configuration A is a surface and is a surface having an oblique inclination with respect to the normal of the first surface of the semiconductor substrate, the surface and the first surface of the semiconductor substrate Is used to mean “outer periphery of A”. Further, the term “outer peripheral surface of” is used to mean “a surface located on the outermost side of the planar shape when viewed from the normal direction of the first surface 11”. For example, in the case of the term “peripheral surface of A”, it means a surface located on the outermost side from the center of the configuration A among the surfaces of the configuration A when viewed from the normal direction of the first surface 11. .

  According to the present invention, the third portion of the conductive layer can be exposed to the atmosphere. According to this, a semiconductor device having a heat dissipation path from the third portion can be provided. Therefore, a semiconductor device with improved heat dissipation can be provided.

(2) In one aspect of the present invention,
The resin layer has a fourth surface that connects the second surface of the resin layer and the third surface of the resin layer and is an outer peripheral surface of the resin layer;
The third portion of the conductive layer may be located on the fourth surface.

  According to this, since the surface area of the 3rd part used as a thermal radiation part can be taken more, heat dissipation can be improved more.

(3) In one aspect of the present invention,
The first insulating layer has an outer periphery located between the resin layer and the first side of the first surface;
The third portion of the conductive layer may be formed so as not to contact the outer periphery of the first insulating layer.

  According to this, since the surface area of the 3rd part used as a thermal radiation part can be taken more, heat dissipation can be improved more.

(4) In one aspect of the present invention,
The first insulating layer has an outer periphery located between the resin layer and the first side of the first surface;
The third portion of the conductive layer may be formed in contact with the outer periphery of the first insulating layer and the first surface of the semiconductor substrate.

  According to this, since the surface area of the 3rd part used as a thermal radiation part can be taken more, heat dissipation can be improved more.

(5) In one aspect of the present invention,
The resin layer has a fourth surface that connects the second surface of the resin layer and the third surface of the resin layer and is an outer peripheral surface of the resin layer;
The electrode may be located between the fourth surface of the resin layer and the first side of the first surface.

(6) In one aspect of the present invention,
The conductive layer includes a first conductive film and a second conductive film formed on the first conductive film,
The second conductive film may have higher corrosion resistance than the first conductive film.

  According to this, the reliability of the semiconductor device can be improved.

(7) In one aspect of the present invention,
The conductive layer has a first conductive film formed on the resin layer, and a second conductive film formed to cover the first conductive film,
The second conductive film may have higher corrosion resistance than the first conductive film.

  According to this, the reliability of the semiconductor device can be improved.

(8) In one aspect of the present invention,
The conductive layer includes a first conductive film formed on the resin layer, and a second conductive film formed on the first conductive film,
The second conductive film has higher corrosion resistance than the first conductive film,
The second conductive film may be formed only in the first portion and the third portion of the conductive layer.

  According to this, the reliability of the semiconductor device can be improved.

(9) A method for manufacturing a semiconductor device according to one aspect of the present invention includes:
A semiconductor substrate having a first surface having a first side; an electrode provided on the first surface of the semiconductor substrate; provided on the first surface of the semiconductor substrate; Preparing a structure having a first insulating layer having an opening located on the electrode;
A second surface on the first insulating layer and avoiding at least a part of the electrode, and a second surface on the first insulating layer side and a third surface on the opposite side to the second surface A step of forming a resin layer having a surface;
A first portion provided on the second surface of the resin layer; a second portion that electrically connects the first portion and the electrode; and the first portion or the first portion. Forming a conductive layer having a third portion electrically connected to the second portion;
An opening is provided on the third surface of the resin layer so as to cover the second portion of the conductive layer and is located on at least a part of the first portion of the conductive layer. And forming a second insulating layer avoiding a third portion of the conductive layer;
Forming an external terminal provided inside the opening of the second insulating layer and electrically connected to the conductive layer;
Have
The third portion of the conductive layer is formed to be located between the first side of the first surface and the second insulating layer.

  According to the present invention, a semiconductor device with improved heat dissipation can be provided.

FIG. 2 is a plan view schematically showing the semiconductor device according to the first embodiment. Sectional drawing which shows typically the principal part of the II-II sectional view of the semiconductor device shown in FIG. Sectional drawing which shows the modification of the semiconductor device which concerns on 1st Embodiment typically. Sectional drawing which shows the modification of the semiconductor device which concerns on 1st Embodiment typically. Sectional drawing which shows the modification of the semiconductor device which concerns on 1st Embodiment typically. Sectional drawing which shows the modification of the semiconductor device which concerns on 1st Embodiment typically. The top view which shows typically the semiconductor device which concerns on 2nd Embodiment. FIG. 5 is a cross-sectional view schematically showing a main part of a cross section taken along line VV of the semiconductor device shown in FIG. Sectional drawing which shows typically an example of the manufacturing method of the semiconductor device which concerns on 1st Embodiment.

  An example of an embodiment to which the present invention is applied will be described below with reference to the drawings. However, the present invention is not limited only to the following embodiments. The present invention includes any combination of the following embodiments and modifications thereof.

1. 1. Semiconductor Device 1.1 First Embodiment Hereinafter, a semiconductor device according to a first embodiment will be described with reference to the drawings.

  FIG. 1 is a plan view schematically showing a semiconductor device 100 according to the present embodiment. 2 is a cross-sectional view schematically showing a part of a cross section taken along line II-II of the semiconductor device 100 shown in FIG.

  As shown in FIG. 1, the semiconductor device 100 includes a semiconductor substrate 10. The semiconductor substrate 10 may have a chip shape as shown in FIG. That is, the semiconductor substrate 10 may be a semiconductor chip. Alternatively, the semiconductor substrate 10 may have a wafer shape including a plurality of semiconductor substrates 10 (not shown). For example, the conductive substrate 10 may be a silicon substrate. As shown in FIG. 2, the integrated circuit 1 is formed on the semiconductor substrate 10. The integrated circuit 1 is formed on the surface layer of one surface of the semiconductor substrate 10. The configuration of the integrated circuit 1 is not particularly limited, and may include, for example, active elements such as transistors and passive elements such as resistors, coils, and capacitors.

  When the semiconductor substrate 10 has a chip shape, as shown in FIGS. 1 and 2, the semiconductor substrate 10 has a first surface 11 and a surface 12 that is a surface opposite to the first surface 11. As shown in FIGS. 1 and 2, the first surface 11 may be a surface on which the integrated circuit 1 is formed on the surface layer.

  As shown in FIG. 1, the first surface 11 has a first outer periphery 13. For example, as shown in FIG. 1, the first outer periphery 13 is constituted by a first side 13a extending in one direction. The first outer periphery 13 is a continuous side that constitutes the outer periphery of the first surface 11 when the semiconductor substrate is viewed from the normal direction of the first surface. The first outer periphery 13 may be formed by connecting a plurality of sides (first side 13a). Therefore, when the planar shape of the semiconductor substrate 10 (planar shape viewed from the normal direction of the first surface 11) is a rectangle, the first outer periphery 13 can be a rectangle. Although not shown, when the semiconductor substrate 10 has a wafer shape, the first outer periphery 13 may be a cutting line (scribe line) cut by a cutter or a scriber.

  As shown in FIGS. 1 and 2, the semiconductor device 100 has an electrode 14 on the first surface 11. The electrode 14 may be electrically connected to the integrated circuit 1 formed inside the semiconductor substrate 10 by an internal wiring (not shown). The electrode 14 may be a part of the internal wiring of the semiconductor substrate 10. The region where the electrode 14 is formed is not particularly limited as long as it is on the first surface 11. The electrode 14 may be formed above a region where the integrated circuit 1 is formed. Alternatively, the electrode 14 may be formed outside the region where the integrated circuit 1 is formed. As shown in FIG. 1, a plurality of electrodes 14 may be formed. The electrode 14 may be disposed along the first outer periphery 13 of the semiconductor substrate 10. Further, the electrode 14 may be formed in the central portion of the semiconductor substrate 10.

  The material of the electrode 14 is not particularly limited as long as it has conductivity. For example, the electrode 14 may be formed of a metal such as aluminum (Al) or copper (Cu). The electrode 14 may be a single conductive layer or a plurality of conductive layers including a barrier layer formed of a metal such as titanium (Ti) or titanium tungsten (TiW) that prevents metal diffusion such as aluminum. The laminated body may be sufficient.

  As shown in FIGS. 1 and 2, the semiconductor device 100 includes a first insulating layer 16. The first insulating layer 16 may be a passivation film. The first insulating layer 16 may be formed on the first surface 11 so as to expose at least a part of the electrode 14. That is, the first insulating layer 16 may have an opening 16 a that overlaps at least a part of the electrode 14. As shown in FIGS. 1 and 2, the first insulating layer 16 may be formed so as not to cover the first outer periphery 13 of the first surface 11. As shown in FIG. 1, the first insulating layer 16 is more than the first surface 11 in a plan view when viewed from the normal direction of the first surface 11 (hereinafter also referred to as “plan view”). May be formed to have a small area. As shown in FIG. 2, the first insulating layer 16 may have a third outer periphery 16 b that is an outer periphery of the first insulating layer 16 on the first surface 11. The third outer periphery 16b is a side that forms the outer periphery of the first insulating layer 16 in plan view. The third outer periphery 16b may be formed by connecting a plurality of sides. As shown in FIG. 1, the third outer periphery 16 b may be formed along the first outer periphery 13 of the semiconductor substrate 10.

The material of the first insulating layer 16 is not particularly limited as long as it has electrical insulation. For example, the first insulating layer 16 may be an inorganic insulating layer such as SiO ₂ or SiN. Alternatively, the first insulating layer 16 may be an organic insulating layer such as a polyimide resin.

  As shown in FIG. 2, the semiconductor device 100 includes a resin layer 20 on the first insulating layer 16. As shown in FIG. 2, the resin layer 20 is provided to avoid at least a part of the electrode 14, and the second surface 21 on the first insulating layer 16 side and the third surface on the opposite side of the second surface 21. , And a fourth surface 23 that is an outer peripheral surface connecting the second surface 21 and the third surface 22. The fourth surface 23 may be a continuous surface farthest from the center of the resin layer 20 among the surfaces of the resin layer 20 in plan view. The resin layer 20 may be a stress relaxation layer. As shown in FIG. 1, the resin layer 20 has an area smaller than that of the first insulating layer 16 in plan view. As shown in FIG. 2, the resin layer 20 may have a fourth surface 23 that is an outer peripheral surface on the first insulating layer 16. As shown in FIG. 1, the fourth surface 23 of the resin layer 20 includes a second outer periphery 42 of a second insulating layer 40 to be described later and a first outer periphery 13 of the semiconductor substrate 10 in plan view. It may be located between. Further, the fourth surface 23 may be formed along the first outer periphery 13 of the semiconductor substrate 10 as shown in FIG.

  As shown in FIG. 2, the resin layer 20 has an opening 24 located on at least a part of the electrode 14. Thereby, at least a part of the electrode 14 is not covered with the resin layer 20. The size of the opening 24 may be designed to be small as long as the conductivity with the electrode 14 can be secured in consideration of the number of external terminals of the semiconductor device. Moreover, in order to ensure electrical conductivity with the electrode 14, the opening part 24 may be larger than the opening part 16a.

  The resin layer 20 may be formed of, for example, a resin such as a polyimide resin, a silicone-modified polyimide resin, an epoxy resin, a silicone-modified epoxy resin, benzocyclobutene (BCB), polybenzoxazole (PBO), or the like. .

  As shown in FIG. 2, a conductive layer 30 that is electrically connected to the electrode 14 is formed in the opening 24. As shown in FIG. 2, the conductive layer 30 electrically connects the first portion 31 (land portion 31) provided on the second surface 21 of the resin layer 20, the first portion 31, and the electrode 14. A second portion 32 that is electrically connected, and a third portion 33 that is electrically connected to the first portion 31 or the second portion 32. The third portion 33 may be directly connected to the first portion 31 or the second portion 32, or may be indirectly connected via a conductive layer. That is, as shown in FIG. 2, the third portion 33 may be electrically connected to the first portion 31 or the second portion 32 via the fourth portion 34.

  As shown in FIG. 2, the first portion 31 (land portion 31) of the conductive layer 30 is a part of the conductive layer 30 provided on the third surface 22 of the resin layer 20, and will be described later. The external terminal 50 is a part formed upward. The land portion 31 may be a portion where an opening 41 of the second insulating layer 40 described later is formed above. The shape of the land portion 31 is not particularly limited, and is appropriately determined according to the external terminal 50.

  As shown in FIG. 2, the second portion 32 of the conductive layer 30 is a part of the conductive layer 30 that electrically connects the electrode 14 and the land portion 31, and the second portion 32 of the resin layer 20 from within the opening 24. It may be formed so as to reach the third surface 22. As shown in FIG. 1, the shape of the second portion 32 is not particularly limited as long as the electrode 14 and the land portion 31 can be electrically connected, and may be a straight line or may be appropriately bent. Good.

  The third portion 33 of the conductive layer 30 is a part of the conductive layer 30 extending from the electrode 14 toward the first outer periphery 13 of the semiconductor substrate 10 as shown in FIG. This portion is not covered with the insulating layer 40. The fourth portion 34 is a portion that electrically connects the third portion 34 and the first portion 31 or the second portion 32 and is a portion that is covered by a second insulating layer 40 described later. It is. The third portion 33 may be electrically connected to the electrode 14 via the fourth portion 34 and extend toward the first outer periphery 13 of the semiconductor substrate 10. The fourth portion 34 may extend from the opening 24 so as to reach the third surface 22, and may be connected to the third portion 33. Further, the third portion 33 may be formed so as to reach the first insulating layer 16 from the third surface 22 through the fourth surface 23.

  The third portion 33 may be an exposed portion of the conductive layer 30 that is not covered by the second insulating layer 40. As shown in FIGS. 1 and 2, the third portion 33 is exposed from a second insulating layer 40 described later. The third portion 33 is formed outside the second outer periphery 42 of the second insulating layer 40 and inside the first outer periphery 13 (first side 13 a) of the semiconductor substrate 10. The That is, the third portion 33 is formed between the first outer periphery 13 (first side 13 a) of the semiconductor substrate 10 and the second outer periphery 42 of the second insulating layer 40. In other words, in the region from the center of the semiconductor substrate 10 to the first outer periphery 13, the third portion 33 is between the first side 13 a constituting the first outer periphery 13 and the second insulating layer 40. Is located. As shown in FIG. 2, the third portion 33 may extend from the fourth surface 23 of the resin layer 20 toward the first outer periphery 13. As shown in FIG. 2, the third portion 33 may be formed so as not to reach the third outer periphery 16 b of the first insulating layer 16. In other words, the third portion 33 may be formed so as not to contact the outer periphery 16b.

  As shown in FIG. 1, the shape of the third portion 33 in plan view is not particularly limited as long as the plurality of adjacent third portions 33 are arranged apart from each other so as to maintain insulation. For example, the third portion 33 may extend along the first outer periphery 13. For example, the third portion 33 may be formed along a corner of the semiconductor substrate 10.

  Here, as shown in FIG. 2, the conductive layer 30 may include a first conductive layer 30a and a second conductive layer 30b. The first conductive layer 30 a is a layer formed on the resin layer 20 and may be a lower layer of the conductive layer 30. The second conductive layer 30b is a layer formed on the first conductive layer 30a and may be an upper layer of the conductive layer 30. The material of the conductive layer 30 is not particularly limited as long as it has conductivity.

  For example, the first conductive layer 30a may be a single-layer body including any one of copper (Cu), titanium (Ti), titanium tungsten (TiW), and chromium (Cr). Alternatively, the first conductive layer 30a may be a stacked body including at least one of copper (Cu), titanium (Ti), titanium tungsten (TiW), and chromium (Cr).

  The material of the second conductive layer 30b is not particularly limited as long as it has higher corrosion resistance than the conductive material of the first conductive layer 30a. For example, the second conductive layer 30b may be a single layer body including any one of gold (Au) and nickel (Ni). Further, for example, the second conductive layer 30b may be a stacked body including gold (Au) and nickel (Ni).

  As shown in FIG. 2, the second insulating layer 40 is formed on the conductive layer 30. As shown in FIG. 2, the second insulating layer 40 is provided on the third surface 22 of the resin layer 20 so as to cover the second portion 32 of the conductive layer 30. Further, as shown in FIG. 2, the second insulating layer 40 may have an opening 41 positioned on at least a part of the first portion 31 (land portion 31) of the conductive layer 30. . In addition, as shown in FIG. 2, the second insulating layer 40 may have a second outer periphery 42 located so that the third portion 33 of the conductive layer 30 is exposed. That is, even if the second outer periphery 42 of the second insulating layer 40 is located on the third surface 22 of the resin layer 20 so as to form the third portion 33 of the conductive layer 30. Good. In other words, the second insulating layer 40 may be formed so as to avoid the third portion 33.

  The material of the second insulating layer 40 is not particularly limited as long as it has insulating properties and a part of the conductive layer 30 can be sealed. For example, the second insulating layer 40 may be a known resin. For example, the second insulating layer 40 may be a known solder resist. Specifically, the second insulating layer 40 is made of polyimide resin, silicone-modified polyimide resin, epoxy resin, silicone-modified epoxy resin, benzocyclobutene (BCB), polybenzoxazole (PBO), phenol resin, or the like. It may be formed of the resin.

  As shown in FIG. 2, the external terminal 50 is provided in the opening 41 of the second insulating layer 40. The external terminal 50 is electrically connected to the land portion 31 of the conductive layer 30. As a result, the external terminal 50 can be electrically connected to the electrode 14 via the conductive layer 30. The external terminal 50 is not particularly limited as long as it is a conductive material, and may be, for example, a solder bump (solder ball) formed from a solder paste.

  The semiconductor device 100 according to the present embodiment can be configured by any of the above configurations.

  The semiconductor device 100 according to the present embodiment has the following features, for example.

  According to the present invention, a part of the third portion 33 of the conductive layer 30 is formed between the second outer periphery 42 of the second insulating layer 40 and the first outer periphery 13 of the semiconductor substrate 10. The provided semiconductor device 100 can be provided. According to this, the heat of the semiconductor device 100 can be radiated to the atmosphere from the third portion 33 of the conductive layer 30 separately from the external terminal 50. Therefore, a semiconductor device with improved heat dissipation can be provided. This feature is the same in the modification described below.

  A modification of the semiconductor device 100 according to the present embodiment will be described with reference to FIGS.

(First modification)
As shown in FIG. 3A, in an example of the semiconductor device 100 according to this modification, the conductive layer 30 includes a first conductive layer 30a formed on the resin layer 20, and a first conductive layer. And a second conductive layer 30b formed so as to cover 30a. In the conductive layer 30 of the semiconductor device 100 according to this modification, the second conductive layer 30b may cover a surface other than the surface facing the first insulating layer 16 of the conductive layer 30a.

  According to this modification, the first conductive layer 30a is not exposed to the atmosphere in the third portion 33, and is covered with the second conductive layer 30b made of a stable metal material. Therefore, the reliability of the conductive layer 30 can be improved.

(Second modification)
As shown in FIG. 3B, in the example of the semiconductor device 100 according to this modification, the second conductive layer 30b is formed only in the land portion 31 and the third portion 33 of the first conductive layer 30a. May be.

  According to this modification, by forming the second conductive layer 30b, the bonding strength between the conductive layer 30 and the external terminal 50 can be increased, and the mechanical strength of the semiconductor device 100 can be improved.

  Moreover, according to this modification, the usage-amount of the 2nd conductive layer 30b can be reduced, and productivity can be improved.

(Third Modification)
As shown in FIG. 3C, in the example of the semiconductor device 100 according to this modification, the third portion 33 of the conductive layer 30 extends from the fourth surface 23 of the resin layer 20 to the first outer periphery 13. The first insulating layer 16 is formed so as to cover the third outer periphery 16 b and to be in contact with the first surface 11 of the semiconductor substrate 10. As shown in FIG. 3C, only the first conductive layer 30 a may be formed in contact with the first surface 11.

  According to the present modification, the third portion 33 of the conductive layer 30 serving as a heat dissipation portion can be formed with the maximum size, so that the heat dissipation of the semiconductor device 100 can be further improved.

  Further, as shown in FIG. 3D, the first conductive layer 30a and the second conductive layer 30b may be formed in contact with the first surface 11.

  According to this modification, the third portion 33 of the conductive layer 30 serving as a heat dissipation portion can be formed with the maximum size, and the first conductive layer 30a is reliably formed into the second conductive layer 30b. The semiconductor device 100 that can be protected by the above can be provided.

(Fourth modification)
Although not shown, the second modification may be applied to the third modification. In other words, the second conductive layer 30b according to the third modification may be formed only in the land portion 31 and the third portion 33 of the first conductive layer 30a.

1.2 Second Embodiment Hereinafter, a semiconductor device 200 according to a second embodiment will be described with reference to the drawings. The semiconductor device 200 according to the second embodiment differs from the semiconductor device 100 according to the first embodiment in the structure of the resin layer 20, the conductive layer 30, and the second insulating layer 40. Therefore, the same reference numerals are given to the same configurations as those in the first embodiment, and the description thereof is omitted.

  FIG. 4 is a plan view schematically showing the semiconductor device 200 according to the present embodiment. FIG. 5 is a cross-sectional view schematically showing the main part of the VV line of the semiconductor device 200 shown in FIG.

  As shown in FIGS. 4 and 5, the resin layer 120 is provided avoiding the electrode 14. As in the first embodiment, the resin layer 120 includes the second surface 121 on the first insulating layer 16 side, the third surface 122 on the opposite side of the second surface 121, and the second surface 121. And a fourth surface 123 that connects the third surface 122. However, the resin layer 120 according to the present embodiment does not have an opening located on the electrode 14. Therefore, as shown in FIG. 5, in the resin layer 120 according to the present embodiment, the electrode 14 is formed between the fourth surface 123 that is the outer peripheral surface of the resin layer 120 and the first outer periphery 13 of the semiconductor substrate 10. It is formed so as to be located between them. That is, the resin layer 120 only needs to be formed on the center side of the semiconductor substrate 10 with respect to the electrode 14.

  Next, the conductive layer 130 is electrically connected to the electrode 14 in the opening 16 a of the first insulating layer 16. The conductive layer 130 extends from above the electrode 14 to the second surface 120 of the resin layer 120, and is electrically connected to the land portion 131 (first portion) on the third surface 122. The second portion 132, the first portion 131 or the second portion 132, and the fourth portion 134 are electrically connected to each other and extend toward the first outer periphery 13 of the semiconductor substrate 10. 3 portions 133 may be included. Here, the third portion 133 may be provided on the first insulating layer 16.

  Next, as in the first embodiment, the second insulating layer 140 has a second outer periphery 142 located so that the third portion 133 of the conductive layer 130 is exposed. In other words, the second outer periphery 142 is provided to avoid the third portion 133. Accordingly, as shown in FIG. 5, the conductive layer 130 can have a third portion 133 that is an exposed portion.

  The semiconductor device 200 according to the present embodiment can be configured with any of the above configurations.

  The semiconductor device 200 according to this embodiment can have the same features as those of the first embodiment. In addition, although not illustrated, the semiconductor device 200 according to the present embodiment can also apply the modifications according to the first to fourth modifications according to the first embodiment.

2. Semiconductor Device Manufacturing Method Hereinafter, an example of a semiconductor device manufacturing method according to the present embodiment will be described with reference to the drawings. Therefore, the manufacturing method of the semiconductor device according to the present embodiment is not limited to the following.

  FIG. 6A to FIG. 6D are cross-sectional views of main parts for schematically explaining an example of the method for manufacturing the semiconductor device according to the present embodiment.

  First, as shown in FIG. 6A, a semiconductor substrate 10 having a first surface 11 having a first outer periphery 13 and a second surface 12 opposite to the first surface 11, A first insulation having an electrode 14 provided on the first surface 11 of the semiconductor substrate 10 and an opening 16 a provided on the first surface 11 of the semiconductor substrate 10 and located on the electrode 14. A structure having a layer 16 is prepared. In addition, the description which concerns on the semiconductor substrate 10, the electrode 14, and the 1st insulating layer 16 applies the description mentioned above, and abbreviate | omits.

  Next, as illustrated in FIG. 6B, a resin layer 20 is formed in a desired region of the first insulating layer 16 of the semiconductor substrate 10. Here, as shown in FIG. 6B, the second surface 21 on the first insulating layer 16 is provided so as to avoid at least a part of the electrode 14 and on the first insulating layer 16 side. And the third surface 22 opposite to the second surface 21 and the fourth surface 23 connecting the second surface 21 and the third surface 22 can be formed. . In addition, the description which concerns on the resin layer 20 applies the description mentioned above, and abbreviate | omits. The resin layer 20 may be formed by any known method. Here, the step of forming the resin layer 20 may include a step of forming the opening 24 located on at least a part of the electrode 14. For example, after forming a photosensitive resin layer on the first insulating layer 16 of the semiconductor substrate 10, the resin layer 20 is exposed by a known photolithography technique so that the fourth surface 23 and the opening 24 are formed. Patterning may be performed (not shown).

  Next, as shown in FIG. 6C, a conductive layer 30 is formed. Here, as shown in FIG. 6C, the land portion 31 (first portion) provided on the third surface 22 of the resin layer 20, and the land portion 31 and the electrode 14 are electrically connected. The second portion 32 to be connected, the first portion 31 or the second portion 32, and the fourth portion 34 are electrically connected and extend toward the first outer peripheral portion 13 of the semiconductor substrate 10. The conductive layer 30 having the third portion 33 can be formed. The description related to the conductive layer 30 is omitted by applying the above description.

  The manufacturing method of the conductive layer 30 is not specifically limited, You may form using the well-known film-forming technique. For example, although not shown, after forming a conductive film made of copper (Cu) by sputtering, a resist is formed so that the conductive layer 30 has a desired wiring pattern, and plating growth is performed by electroplating, A conductive layer to be the first conductive layer 30a is formed. Next, the second conductive layer 30b having higher corrosion resistance than the first conductive layer 30a is formed on the first conductive layer 30a by, for example, an electroplating method. Next, the resist is removed, etching is performed using the second conductive layer 30b as a mask, and the first conductive layer 30a is patterned. As described above, the conductive layer 30 including the first conductive layer 30a and the second conductive layer 30b can be patterned into a desired shape. Here, the step of forming the conductive layer 30 includes the step of forming the third portion 33 on the fourth surface 23 of the resin layer 20 as shown in FIG.

  Here, although not shown, after the first conductive layer 30a is formed, the resist is removed, and the second conductive layer 30b is formed so as to cover the first conductive layer 30a by, for example, sputtering. (See FIG. 3A).

  Although not shown, after forming a second insulating film 40 to be described later on the second conductive layer 30b, for example, electroless plating is applied to the first conductive layer 30a exposed from the second insulating film 40. By performing this, the second conductive layer 30b may be formed only in the land portion 31 and the third portion 33 of the conductive layer 30 (see FIG. 3B).

  Next, as shown in FIG. 6D, a second insulating layer 40 is formed. Here, as shown in FIG. 6D, the second portion 32 of the conductive layer 30 is provided on the third surface 22 of the resin layer 20 so as to cover at least the land portion 31 of the conductive layer 30. A second insulating layer 40 having an opening 41 located above a portion and having a second outer periphery 42 located so that at least a portion of the third portion 33 of the conductive layer 30 is exposed. Can be formed. The description of the second insulating layer 40 is omitted by applying the above description. The second insulating layer 40 may be formed by any known method. The second insulating layer 40 is formed, for example, by forming a photosensitive resin layer on the resin layer 20 and the conductive layer 30 and then performing exposure processing by a known photolithography technique to form the second outer periphery 42 or the opening portion. 41 may be patterned (not shown).

  Next, the external terminal 50 may be formed on the land portion 31 in the opening 41 of the second insulating layer 40 (see FIG. 2). The external terminal 50 is not particularly limited as long as it is a conductive material, and may be, for example, a solder bump (solder ball) formed from a solder paste.

  The semiconductor device manufacturing method according to the present embodiment can take any of the above-described configurations.

  According to the method for manufacturing a semiconductor device according to this embodiment, a method for manufacturing a semiconductor device with improved heat dissipation can be provided.

  As described above, the embodiments of the present invention have been described in detail. However, it will be easily understood by those skilled in the art that many modifications can be made without departing from the novel matters and effects of the present invention. . Accordingly, all such modifications are intended to be included in the scope of the present invention.

DESCRIPTION OF SYMBOLS 1 Integrated circuit, 10 Semiconductor substrate, 11 1st surface, 12 surface,
13 first outer periphery, 13a first side, 14 electrodes, 16 first insulating layer,
16a opening, 16b third outer periphery, 20 resin layer, 21 second surface,
22 3rd surface, 23 4th surface, 24 opening part, 30 conductive layer,
30a 1st conductive layer, 30b 2nd conductive layer, 31 1st part, 32 2nd part,
33 3rd part, 34 4th part, 40 2nd insulating layer, 41 opening part,
42 second outer periphery, 50 external terminals, 100 semiconductor device, 120 resin layer,
121 2nd surface, 122 3rd surface, 123 4th surface, 130 conductive layer,
130a conductive layer, 130b second conductive layer, 131 first portion,
132 second part, 133 third part, 134 fourth part,
140 second insulating layer, 141 opening, 142 second outer periphery,
200 Semiconductor device

Claims (9)

A semiconductor substrate having a first surface having a first side;
An electrode provided on the first surface of the semiconductor substrate;
A first insulating layer provided on the first surface of the semiconductor substrate and having a first opening located on the electrode;
A second surface on the first insulating layer and avoiding at least a part of the electrode, and a second surface on the first insulating layer side and a third surface on the opposite side to the second surface A resin layer having a surface;
A first portion provided on the third surface of the resin layer; a second portion that electrically connects the first portion and the electrode; and the first portion or the first portion. A third portion electrically connected to the two portions; and a conductive layer having
A second opening provided on the third surface of the resin layer so as to cover the second portion of the conductive layer and positioned on at least a part of the first portion of the conductive layer And a second insulating layer provided to avoid the third portion of the conductive layer,
An external terminal provided in the second opening of the second insulating layer and electrically connected to the conductive layer;
Have
The semiconductor device, wherein the third portion of the conductive layer is located between the first side of the first surface and the second insulating layer. The semiconductor device according to claim 1,
The resin layer has a fourth surface that connects the second surface of the resin layer and the third surface of the resin layer and is an outer peripheral surface of the resin layer;
The semiconductor device wherein the third portion of the conductive layer is located on the fourth surface. The semiconductor device according to claim 2,
The first insulating layer has an outer periphery located between the resin layer and the first side of the first surface;
The semiconductor device, wherein the third portion of the conductive layer is formed so as not to contact the outer periphery of the first insulating layer. The semiconductor device according to claim 2,
The first insulating layer has an outer periphery located between the resin layer and the first side of the first surface;
The semiconductor device, wherein the third portion of the conductive layer is formed in contact with the outer periphery of the first insulating layer and the first surface of the semiconductor substrate. The semiconductor device according to claim 1,
The resin layer has a fourth surface that connects the second surface of the resin layer and the third surface of the resin layer and is an outer peripheral surface of the resin layer;
The electrode is a semiconductor device positioned between the fourth surface of the resin layer and the first side of the first surface. The semiconductor device according to any one of claims 1 to 5,
The conductive layer includes a first conductive layer and a second conductive layer formed on the first conductive layer,
The semiconductor device, wherein the second conductive layer has higher corrosion resistance than the first conductive layer. In any one of Claim 1 to 5,
The conductive layer has a first conductive layer formed on the resin layer, and a second conductive layer formed to cover the first conductive layer,
The semiconductor device, wherein the second conductive layer has higher corrosion resistance than the first conductive layer. In any one of Claim 1 to 5,
The conductive layer includes a first conductive layer formed on the resin layer, and a second conductive layer formed on the first conductive layer,
The second conductive layer has higher corrosion resistance than the first conductive layer;
The semiconductor device, wherein the second conductive layer is formed only in the first portion and the third portion of the conductive layer. A semiconductor substrate having a first surface having a first side; an electrode provided on the first surface of the semiconductor substrate; provided on the first surface of the semiconductor substrate; Preparing a structure having a first insulating layer having an opening located on the electrode;
A second surface on the first insulating layer and avoiding at least a part of the electrode, and a second surface on the first insulating layer side and a third surface on the opposite side to the second surface A step of forming a resin layer having a surface;
A first portion provided on the second surface of the resin layer; a second portion that electrically connects the first portion and the electrode; and the first portion or the first portion. Forming a conductive layer having a third portion electrically connected to the second portion;
An opening is provided on the third surface of the resin layer so as to cover the second portion of the conductive layer and is located on at least a part of the first portion of the conductive layer. And forming a second insulating layer avoiding a third portion of the conductive layer;
Forming an external terminal provided inside the opening of the second insulating layer and electrically connected to the conductive layer;
Have
The method of manufacturing a semiconductor device, wherein the third portion of the conductive layer is formed so as to be positioned between the first side of the first surface and the second insulating layer.

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