JP2011118922A - Reading/writing method for semiconductor storage device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor storage device, which can perform high-speed transfer and high-speed read/write processing at a reduced manufacturing cost by reducing the size of each buffer RAM to a one-sector size. <P>SOLUTION: The capacity size per block of a flash memory (2) is two or more times the one-sector size that is a processing unit of an external host, and each of first and second buffer RAMs intermediating data transfer between the external host and the flash memory (2) has a capacity corresponding to the one-sector size of the flash memory (2). The data transfer between the external host and the buffer RAMs and the data transfer between the flash memory and the buffer RAMs are performed respectively by alternately selecting different buffer RAMs of the first and second buffer RAMs, and the data exchange between the buffer RAMs and the external host and the data exchange between the buffer RAMs and the flash memory are simultaneously performed in parallel. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a semiconductor memory device, and more particularly to a high-capacity semiconductor memory device such as a semiconductor disk device using a flash memory that is read, written, and erased in units of blocks, and uses a large-capacity memory as a non-volatile semiconductor memory. In addition, the present invention relates to a semiconductor memory device that realizes a reduction in manufacturing cost.

  Conventionally, for example, M5M29F25611VP manufactured by Mitsubishi Electric Co., Ltd. and HN29W25611 manufactured by Hitachi, Ltd. are used as nonvolatile semiconductor memories, and these are flash memories that perform read / write processing in units of 2 kbyte blocks. . In the case of a semiconductor memory device equipped with this flash memory, in order to perform parallel processing of data transfer with the host terminal and data transfer with the flash memory, the flash memory has a plurality of blocks each having 2 kbytes as shown in FIG. Each of the two buffer RAMs (R1, R2) has a capacity size of one block.

  As described above, in the conventional semiconductor memory device shown in FIG. 7, the capacity of each buffer RAM is equivalent to the capacity size of one block, that is, a multiple of one sector size (for example, equivalent to four sector sizes).

  Data transfer between the host terminal and the buffer RAM, and data transfer between the flash memory and the buffer RAM are performed by selecting different buffer RAMs from the two buffer RAMs (R1, R2), and one buffer RAM (for example, When R1) is transmitting / receiving data to / from the host terminal, the other buffer RAM (for example, R2) is configured to transmit / receive data to / from the flash memory.

  Here, the data transfer between the buffer RAM and the host terminal and between the buffer RAM and the flash memory is configured to transfer data for a plurality of sectors corresponding to one block at a time. This is implemented in units of blocks (4 sectors).

  7A is a schematic diagram showing a conventional data read operation from the flash memory to the host terminal, and FIG. 7B is a schematic diagram showing a data write operation from the host terminal to the flash memory. Indicates a case where one block size is composed of 2 kbytes (4 sector sizes).

  In the data reading operation from the flash memory shown in FIG. 7A, in the data transfer indicated by the broken line arrow, one block of data from the flash memory is stored in the buffer RAM (R1) in advance, and then 2 indicated by the solid line arrow. It shows that two data transfers are performed simultaneously. That is, when the data previously stored in the buffer RAM (R1) is read from the buffer RAM (R1) and transferred to the host, the next block of data is read from the flash memory and the other buffer RAM (R2) is read. Transfer to and store.

  Similarly, in the data write operation from the host terminal to the flash memory shown in FIG. 7B, in the data transfer indicated by the broken line arrow, data for one block from the host is stored in the buffer RAM (R1) in advance, and then the solid line Two data transfers indicated by arrows are performed simultaneously. That is, at the same time when the data previously stored in the buffer RAM (R1) is read and transferred to the flash memory, the data for the next block is transferred from the host terminal to the buffer RAM (R2) and stored.

  In Japanese Patent Laid-Open No. 64-74649 (Patent Document 1), a magnetic disk device has two buffer memories each having a capacity for a plurality of sectors, and reads and stores data for one sector. A technique is disclosed in which another sector of data is read and stored in the other buffer memory while the data is being transferred. Here, the provision of two buffer memories each having a capacity for a plurality of sectors is to facilitate failure analysis by leaving a history of transfer data.

  As described above, since each buffer RAM has a capacity corresponding to a plurality of sectors in the prior art, the capacity of the buffer memory is increased, the capacity of the flash memory is further increased in the future, and the block size is, for example, 4 kbytes. In the conventional technical configuration, the buffer RAM must be configured to be large as well. For this reason, it is inevitable that the cost of the entire apparatus including the controller and the like is also increased.

  Also, if a read command or write command is executed for each buffer size while the buffer size is small, the command execution overhead is added, resulting in inefficiency and slow writing / reading speed as viewed from the host terminal side. There was a problem.

JP-A-64-74649

  The present invention has been made to solve the above-described problems. The size of each buffer RAM is reduced to one sector size, the manufacturing cost is low, high-speed transfer is possible, and high-speed processing of writing and reading is performed. An object of the present invention is to provide a semiconductor memory device capable of performing the above and a reading / writing method thereof.

  Another object of the present invention is to provide a semiconductor memory device having the above-described performance and capable of improving data reliability by error correction.

In order to achieve the above object, a semiconductor memory device according to the present invention is connected to an external host terminal via a system bus so that data can be transferred.
A non-volatile semiconductor memory having a plurality of block configurations, in which read / write commands are executed in units of blocks, and the capacity size of one block is one sector size that an external host terminal uses as a data read / write unit Non-volatile semiconductor memory that is multiple times,
Two buffer memories for mediating data transfer between the external host terminal and the nonvolatile semiconductor memory, each having a capacity corresponding to one sector size of the nonvolatile semiconductor memory Memory,
The data transfer between the external host terminal and the buffer memory and the data transfer between the nonvolatile semiconductor memory and the buffer memory select different buffer memories from the first and second buffer memories, respectively, When the buffer memory exchanges data for one sector with the external host terminal, the other buffer memory exchanges data for another sector with the nonvolatile semiconductor memory. And control means for controlling as described above.

  The control means applies a read / write command to the block of the non-volatile semiconductor memory in response to a data read / write request from an external host terminal, and sequentially applies external data via the buffer memory for each sector data. Data is exchanged between the host terminal and the nonvolatile semiconductor memory.

  Further, the control means holds the control level to the nonvolatile semiconductor memory so that the transfer of the next sector data can be continued after the transfer of one sector data, and performs the simultaneous parallel processing of the data transfer.

  With the above configuration, the capacity of the buffer memory can be reduced, so that it can be manufactured at low cost and parallel processing of transfer can be performed, so that high-speed transfer can be realized as viewed from the host terminal. Further, since the flash memory is processed in units of blocks, high-speed writing / reading is possible, and the processing time can be shortened.

A semiconductor memory device according to another aspect of the present invention further includes error correction means for correcting and controlling an error of data stored in the nonvolatile semiconductor memory, and the redundant data for error correction is a sector for each sector data. It can also be stored immediately after the data.
When reading data from the non-volatile semiconductor memory to the buffer memory, the error correction means transfers sector data and redundant data to the error correction means in parallel with this to detect correctable errors. In this case, the data in the buffer memory is corrected, and when writing from the buffer memory to the nonvolatile semiconductor memory, sector data is transferred to the error correction means in parallel with this, and redundant data is transferred. And the generated redundant data can be transferred to the nonvolatile semiconductor memory.

  As a result, the data error correction control means is added, so that the reliability of the data can be improved in addition to the above-described effects.

Furthermore, the data reading method of the nonvolatile semiconductor memory according to the present invention includes:
Acquiring a start block address, a start sector number, and a transfer sector number by initialization of read control;
Reading out the first sector data, storing it in the buffer memory, and performing read transfer to the host terminal;
Determining whether data is being transferred from the buffer RAM to the host terminal or the transfer is completed after counting the number of transfer sectors by 1;
A step of issuing a data transfer request to the host terminal upon completion of data transfer to the host terminal, and starting data transfer from the buffer memory to the host terminal;
Determining whether the number of transfer sectors to be processed is 0,
When the number of transfer sectors is 0, block processing is completed. When the number of transfer sectors is greater than 0, the buffer memory is switched, the target sector number is incremented by 1, and reading from the next sector is performed. When one buffer memory is exchanging data for one sector with the external host terminal, the other buffer memory is another sector of data with the nonvolatile semiconductor memory. It is characterized by giving and receiving.

In addition, a method for writing data to the nonvolatile semiconductor memory according to the present invention includes:
Obtaining a start block address, a start sector number and a transfer sector number by initializing the write control;
Issuing a data transfer request from the host and starting data transfer to the buffer memory;
A process of applying a write command / block address upon completion of flash memory programming; and
Waiting for completion of data transfer from the host terminal, counting the number of transfer sectors by 1, and determining whether the number of transfer sectors to be processed is 0 or not.
When the number of transfer sectors is 0, after the write sector write transfer process, the block process is completed,
If the number of transfer sectors is greater than 0, the buffer memory is switched, a data transfer request is issued from the host terminal, data transfer to the buffer memory is started, write sector write transfer is performed, and the target sector number is set. When one buffer memory increments by 1 and writes to the next sector, and one buffer memory exchanges data for one sector with the external host terminal, the other buffer memory is non-volatile. It is characterized in that data for another sector is exchanged with a semiconductor memory.

  According to the data read / write method of the nonvolatile semiconductor memory described above, the capacity of the buffer memory can be reduced, so that it can be manufactured at a low cost and the parallel processing of the transfer can be performed, so that a high-speed transfer is realized from the viewpoint of the host terminal. it can. Further, since the flash memory is processed in units of blocks, high-speed writing / reading is possible, and the processing time can be shortened.

  As described above, according to the present invention, since the capacity of the buffer RAM can be reduced, manufacturing at low cost is possible, and parallel processing of transfer can be performed, so that high-speed transfer can be realized from the viewpoint of the host. Further, since the flash memory is processed in units of blocks, high-speed writing / reading is possible. Furthermore, data reliability can be improved by error correction without impairing the above effects.

1 is a block diagram of a semiconductor memory device according to a first embodiment of the invention. (A), (b) is a schematic diagram of data transfer in the read / write operation of the semiconductor memory device according to the present invention, respectively. (A) and (b) are timing charts of flash memory control signals in read / write operations of the semiconductor memory device according to the present invention, respectively. Flowchart of read operation of semiconductor memory device according to the present invention. Flowchart of write operation of semiconductor memory device according to the present invention. Block diagram of a second embodiment of a semiconductor memory device according to the present invention (A), (b) is a schematic diagram of the data transfer in the read-write operation of the conventional semiconductor memory device, respectively.

Example 1
A first embodiment of the present invention will be described with reference to FIGS. In addition, the same code | symbol is attached | subjected to the element which is common in each figure, and the overlapping description is abbreviate | omitted.

  FIG. 1 shows a block configuration of an embodiment of a semiconductor memory device configured using a nonvolatile semiconductor memory according to the present invention. In the figure, the semiconductor memory device includes a control signal generation sequencer (SEQ) 1 having a function as a control signal generation means, a flash memory 2 having a plurality of block hierarchical structures, and two buffer RAMs (R1, R2). The bidirectional buffer 3 and four selectors (S1, S2, S3, S4) are provided. The buffer RAMs (R1, R2) are connected to the host interface unit 4 via selectors (S1, S2, S3) via a data bus so that data can be read / written from the host terminal. Similarly, the buffer RAM (R1, R2) is connected to the flash memory 2 via the selector (S2, S3, S4) and the bidirectional buffer 3 by a data bus so that data can be read from and written to the flash memory 2. Then, the data bus connected by each selector is selected.

  Here, the control signal generation sequencer (SEQ) 1 gives a control signal to each block at an appropriate timing to implement various data transfers, and controls the switching of each selector to the buffer RAM (R1, R2). The control signal, block address, and control signal to the flash memory 2 are all generated by a control signal generation sequencer (SEQ) 1 (to be described later with reference to FIG. 3).

  In the semiconductor memory device shown in FIG. 1, the read, write, and erase processing of the flash memory is performed in units of blocks, and the capacity size of one block is an integral multiple of one sector size that is processed by the host terminal. In the embodiment, a configuration example in which one block size is 4 sector size is shown.

  In the present invention, the two buffer RAMs (R1, R2) provided to mediate data transfer between the host terminal and the flash memory have a one-sector size in which each storage capacity is a processing unit of the host terminal. The same capacity size is used. Therefore, data transfer between the host terminal and the buffer RAM, and data transfer between the flash memory and the buffer RAM are performed by selecting different buffer RAMs from the two buffer RAMs (R1, R2). When (for example, R1) is transmitting / receiving data to / from the host terminal, the other buffer RAM (for example, R2) is configured to transmit / receive data to / from the flash memory.

  In response to a read / write request from the host terminal, the control signal generation sequencer (SEQ) 1 applies a read command / write command to the addressed block of the flash memory, and sequentially executes a buffer RAM for each sector unit. Data is exchanged between the host terminal and the flash memory via the terminal, and this is repeated for each block to execute a read command and a write command. Here, the level of the control signal to the flash memory is maintained so that the transfer of the next sector data can be continued after the transfer of one sector data.

  FIG. 2A is a schematic diagram showing a data read operation from the flash memory to the host terminal, and FIG. 2B is a schematic diagram showing a data write operation from the host terminal to the flash memory. In this example, the block size is 2 kbytes (4 sector size).

  In the data read operation from the flash memory shown in FIG. 2 (a), the data transfer Dtr1 indicated by the dashed arrow indicates that, for example, data of sector 1 from the flash memory is stored in the buffer RAM (R1) in advance in the previous processing step. It shows that. Next, two data transfers Dtr2 and Dtr3 indicated by solid arrows are performed simultaneously. That is, the sector 1 data previously stored in the buffer RAM (R1) is read from the buffer RAM (R1) and transferred to the host (Dtr3). Simultaneously, the next sector 2 data is read from the flash memory. Transfer (Dtr2) and store in the other buffer RAM (R2). When the sector 2 data stored in the buffer RAM (R2) is read and transferred to the host, at the same time, the next sector 3 data is read from the flash memory and transferred to the other buffer RAM (R1) for storage. To do.

  Similarly, in the data write operation from the host to the flash memory shown in FIG. 2B, in the data transfer Dtw1 indicated by the dashed arrow, for example, data for the sector 1 from the host terminal is stored in the buffer RAM (R1) in advance. It is shown that. Next, two data transfers Dtw2 and Dtw3 indicated by solid arrows are performed simultaneously. That is, the data for the sector 1 previously stored in the buffer RAM (R1) is read and transferred to the flash memory (Dtw3). Simultaneously, the data for the next sector 2 is transferred from the host terminal to the buffer RAM (R2). (Dtw2) and store.

  FIG. 3A shows a timing waveform diagram of the control signal from the control signal generation sequencer (SEQ) 1 in the data read operation from the flash memory, and FIG. 3B shows the control signal in the data write operation to the flash memory. A timing waveform diagram is shown.

Since commands to the flash memory are executed in units of blocks (4 sectors), each command is executed in the command block address application step (read open, write open) and sector transfer (read / write) steps (read sector, write sector) and block processing completion step (read close, write Close) and control. Since the control signal level is maintained as it is after each step is completed, the command to the flash memory can be continued as it is even if there is a time interval until the next step.

At the control timing in the data read operation shown in FIG. 3A, / CE indicates a chip enable input, and returns to the standby state at the rise of / CE. The chip enable state is started by applying the command and address, and the block processing completion step (read The level is held until close). In the figure, signals / CE, / WE, / OE with superscript lines indicate LOW active signals, and tA indicates access time. / OE indicates an output enable signal. Data is output from the flash memory while / OE = L level, and is started from the / OE = H level (output disabled) state before command input.

  When the control enable state is established by application of the command address, the write enable signal / WE to the buffer RAM is initialized, data for one sector from the flash memory is stored in advance in one buffer RAM (R1) (WE0), and the next After a predetermined time, the sector data stored in the buffer RAM (R1) is read and transferred to the host (OE0). At the same time, the next sector data is read from the flash memory, transferred to the other buffer RAM (R2), and stored (WE1). When the data transfer for one sector is completed, the process shifts to the next sector, and the read transfer sector is sequentially designated (SC) from sector 0 to sector 4 for each sector unit. Data is exchanged between the machine and the flash memory, and this is repeated for each block to execute a read command. Here, SC indicates a serial clock input signal for counting the transfer data amount for each sector and acquiring the transfer sector, and the read data is latched at the rising edge of SC.

The control timing in the data write operation shown in FIG. 3B is almost the same as the control timing shown in FIG. 3A, and the output disable state is always set while / OE = H level. write “Confirmation” at close indicates that a confirmation command is entered when writing to the flash memory. Since other operations are the same as those in FIG. 3A, the description thereof is omitted here.

FIG. 4 shows a flowchart of the internal operation for the read operation of the semiconductor memory device of this embodiment. First, in step # 401, a start block address (BA), a start sector number (i), and a transfer sector number (SC) are acquired by initialization of read control. In step # 402, read command block address application (read After the open process has been performed, read sector transfer (read) (read) is performed at step # 403. The first sector data is read, stored in the buffer RAM, and transferred to the host terminal. After the transfer sector number (SC) is decremented by 1 in step # 404, it is determined in step # 405 whether data is being transferred from the buffer RAM to the host terminal or transfer is complete. If data transfer to the host terminal is in progress, wait for transfer completion (step # 406). If transfer is completed, issue a data transfer request to the host terminal in step # 407 and send data from the buffer RAM to the host. The transfer is started (step # 408).

Next, in step # 409, it is determined whether or not the number of transfer sectors (SC) is 0 (no untransferred sector) (with no transfer sector). If there is no transfer sector (SC = 0), block processing is completed. Step (read close) Move to # 410. If there is an untransferred sector (SC> 0), the buffer RAM is switched in step # 411, the target sector number is incremented by 1, and the process proceeds to reading from the next sector (step # 412).

In step # 413, it is determined whether or not the target sector number (i) is the upper limit value. If the target sector number (i) is equal to or lower than the upper limit value, the process returns to step # 403. close) After the processing in # 414, the block address (BA) is shifted to the next block in step # 415, the target sector number (i) is set to i = 0, and the processing steps from step # 402 are performed again. repeat.

  Here, in this embodiment, the upper limit value of the sector number (i) is 4 (sectors), but the present invention is not limited to this, and the sector size of one block is arbitrary.

FIG. 5 shows a flowchart of the internal operation for the write operation of the semiconductor memory device of this embodiment. As in the case of the read operation of FIG. 4, first, in step # 501, the start block address (BA), the start sector number (i), and the transfer sector number (SC) are acquired by the initialization of the write control. Next, in step # 502, a data transfer request is issued from the host, and data transfer to the buffer RAM is started (step # 503). After waiting for completion of the flash memory program in step # 504, write command block address application (write) in step # 505 open) processing is performed.

Waiting for the completion of data transfer from the host terminal (step # 506), the transfer sector number (SC) is decremented by 1 in step # 507, and then the transfer sector number (SC) is 0 (untransferred) in step # 508. It is determined whether there is no sector) or not (there is an untransferred sector). If there is no untransferred sector (SC = 0), write sector transfer (write) (write) in step # 509 (write) sector) and block processing completion step (write close) After step # 510, the program waits for completion of the flash memory program in step # 511 and ends.

If there is an untransferred sector (SC> 0), the buffer RAM is switched in step # 512, a data transfer request is issued from the host in step # 513, and data transfer to the buffer RAM is started ( Step # 514). Next, in step # 515, write sector transfer (write) (write) sector) processing is performed, the target sector number is incremented by 1, and the process proceeds to writing to the next sector (step # 516).

In step # 517, it is determined whether or not the target sector number (i) is the upper limit value. If the target sector number (i) is equal to or lower than the upper limit value, the process returns to step # 506. close) After the processing at # 518, the block address (BA) is shifted to the next block at step # 519, the target sector number (i) is set to i = 0, and the processing steps from step # 504 are performed again. repeat.

  According to the present embodiment, the capacity of the buffer RAM can be remarkably reduced as compared with the equivalent of a plurality of sectors of the prior art, so that it is possible to manufacture at a low cost, and parallel processing of transfer can be performed. Transfer can be realized. Further, since the flash memory is processed in units of blocks, high-speed writing / reading is possible.

(Example 2)
A second embodiment of the present invention will be described with reference to FIG. The difference from the configuration of the first embodiment shown in FIG. 1 is that an error correction control means (ECC) 5 is added in the second embodiment. As shown in FIG. 6, an error correction control means (ECC) 5 is interposed between the selector S4 and the bidirectional buffer 3 to read data from the flash memory 2 to the buffer RAM (R1, R2). In parallel with this, sector data and redundant data for error correction are transferred to the error correction control means (ECC) 5, and when a correctable error is detected, the data in the buffer RAM is corrected. To.

  In writing data from the buffer RAM to the flash memory, in parallel with this, sector data is transferred to the error correction control means (ECC) 5 to generate redundant data, and the generated redundant data is stored in the flash memory 2. Forward. Redundant data for error correction is configured to be stored immediately after sector data for each sector data. Since the elements other than the above are the same as those in the first embodiment, the description thereof is omitted here.

  With the above configuration, in addition to the effect obtained in the first embodiment, the effect that the reliability of the processed data can be improved by error correction can be obtained.

1 Control Signal Generation Sequencer 2 Flash Memory 3 Bidirectional Buffer 4 Host Interface R1, R2 Buffer RAM
S1 to S4 Selector 5 ECC circuit

Claims (2)

A method for reading data from a non-volatile semiconductor memory connected to an external host terminal via two buffer memories connected on a system bus so as to be able to transfer data,
Acquiring a start block address, a start sector number, and a transfer sector number by initialization of read control;
Reading out the first sector data, storing it in the buffer memory, and performing read transfer to the host terminal;
Determining the number of transfer sectors by 1 and then determining whether data is being transferred from the buffer memory to the host terminal or transfer is complete;
A step of issuing a data transfer request to the host terminal upon completion of data transfer to the host terminal, and starting data transfer from the buffer memory to the host terminal;
Determining whether the number of transfer sectors to be processed is 0,
When the number of transfer sectors is 0, block processing is completed. When the number of transfer sectors is greater than 0, the buffer memory is switched, the target sector number is incremented by 1, and reading from the next sector is performed. When one buffer memory is exchanging data for one sector with the external host terminal, the other buffer memory is another sector of data with the nonvolatile semiconductor memory. A method for reading data from a nonvolatile semiconductor memory, wherein: A method for writing data to a non-volatile semiconductor memory connected to an external host terminal via two buffer memories connected on a system bus so that data can be transferred.
Obtaining a start block address, a start sector number and a transfer sector number by initializing the write control;
Issuing a data transfer request from the host and starting data transfer to the buffer memory;
A process of applying a write command / block address upon completion of flash memory programming; and
Waiting for completion of data transfer from the host terminal, counting the number of transfer sectors by 1, and determining whether the number of transfer sectors to be processed is 0 or not.
When the number of transfer sectors is 0, after the write sector write transfer process, the block process is completed,
If the number of transfer sectors is greater than 0, the buffer memory is switched, a data transfer request is issued from the host terminal, data transfer to the buffer memory is started, write sector write transfer is performed, and the target sector number is set. When one buffer memory increments by 1 and writes to the next sector, and one buffer memory exchanges data for one sector with the external host terminal, the other buffer memory is non-volatile. A method for writing data to a nonvolatile semiconductor memory, wherein data for another sector is exchanged with the semiconductor memory.

Images