JP2011118086A - Display and display drive method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve uniformity by preventing shading in a unit, while securing threshold correction time by threshold correction of a device unit. <P>SOLUTION: In a display, a plurality of horizontal lines are regarded as a single unit, to simultaneously perform threshold correction operation in each pixel circuit of the inside of the same unit. Each pixel circuit of the inside of the unit generates potential fluctuation of a gate and a source of a drive transistor of each pixel circuit of the inside of the unit generated via a common electrode line (cathode line) in emission start of a front stage unit, and the voltage between the gate and the source of the drive transistor of each pixel circuit is adjusted so as not to be represented as a difference of emission luminance of the pixel circuit of each line of the inside of the unit. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a display device having a pixel array in which pixel circuits are arranged in a matrix and a display driving method thereof, for example, a display device using an organic electroluminescence element (organic EL element) as a light emitting element.

JP 2007-133282 A JP 2003-255856 A JP 2003-271095 A

For example, as can be seen in Patent Documents 2 and 3, image display apparatuses using organic EL elements as pixels have been developed. Since the organic EL element is a self-luminous element, it has advantages such as higher image visibility than a liquid crystal display, no need for a backlight, and high response speed. Further, the luminance level (gradation) of each light emitting element can be controlled by the value of the current flowing therethrough (so-called current control type).
In the organic EL display, similarly to the liquid crystal display, there are a simple matrix method and an active matrix method as driving methods. Although the former has a simple structure, there is a problem that it is difficult to realize a large-sized and high-definition display. Therefore, the active matrix method is actively developed at present. In this method, a current flowing through a light emitting element in each pixel circuit is controlled by an active element (generally a thin film transistor: TFT) provided in the pixel circuit.

By the way, as a pixel circuit configuration using an organic EL element, improvement in display quality by eliminating luminance unevenness for each pixel, high luminance, high definition, and high frame rate (high frequency) are strongly demanded. Yes. Development of larger panels is also underway.
From these viewpoints, various configurations are being studied. For example, as in Patent Document 1, various pixel circuit configurations and operations have been proposed in which variations in the threshold voltage and mobility of the drive transistor for each pixel are canceled to eliminate luminance unevenness for each pixel.
An object of the present invention is to realize a pixel circuit operation suitable for high frequency and large panel as a display device using an organic EL element.

The display device of the present invention is electrically connected to a light emitting element and a driving transistor that applies a current corresponding to a gate-source voltage to the light emitting element by applying a driving voltage between the drain and the source. A sampling transistor that inputs a signal line voltage to the gate of the drive transistor, and a storage capacitor that is connected between the gate and source of the drive transistor and holds the threshold voltage of the drive transistor and the input video signal voltage. And a pixel array in which one end of the light emitting element is a common electrode line. Further, when a plurality of horizontal lines are taken as one unit for each pixel circuit of the pixel array, each signal arranged in a row on the pixel array in a plurality of horizontal periods corresponding to the number of horizontal lines of one unit. A signal selector for supplying a threshold correction reference voltage and a video signal voltage for each of the pixel circuits in the unit as the signal line voltage to the line, and a power pulse to each power control line arranged in a row on the pixel array And a drive control scanner for applying a drive voltage to the drive transistor of the pixel circuit, and a scan pulse for each write control line arranged in a row on the pixel array, The sampling transistor is controlled and the scanning pulse for each pixel circuit in one unit is the same within one light emission cycle of each pixel circuit. The scanning for controlling the sampling transistor to input the threshold voltage correction reference voltage to each pixel circuit so that the threshold value correcting operation is performed, and then sequentially inputting the video signal voltage to each pixel circuit in the unit. And a writing scanner for outputting a pulse. Then, the potential fluctuation of the gate and source of the drive transistor of each pixel circuit in the unit that occurs through the common electrode line at the start of light emission of the preceding unit does not appear as a difference in light emission luminance of the pixel circuit of each line in the unit. Thus, the gate-source voltage adjustment operation for adjusting the gate-source voltage of the drive transistor of each pixel circuit is performed.
Here, in the gate-source voltage adjustment operation, in the plurality of horizontal periods, the signal selector applies a threshold correction reference voltage, an adjustment voltage, and each signal in the unit to each signal line as the signal line voltage. A video signal voltage is supplied to each of the pixel circuits, and the writing scanner drives each of the adjustment voltages during a threshold correction operation before inputting the video signal voltage to each pixel circuit in the unit. This is performed by outputting the scan pulse so as to be input to the gate of the transistor. The adjustment voltage is higher than the threshold correction reference voltage.
Alternatively, the gate-source voltage adjustment operation may be performed after the plurality of horizontal periods when the write scanner ends the threshold correction operation for each pixel circuit in the unit after the threshold correction operation ends. In the plurality of horizontal periods, the scanning pulse for inputting the video signal voltage is sequentially output for each pixel circuit in the unit.
In addition, the gate-source voltage adjustment operation is performed in such a manner that the writing scanner performs a threshold correction operation on each pixel circuit in the unit after the potential fluctuation of the source of the drive transistor returns to the state before the change. It is executed by outputting the scanning pulse so as to be executed.
The writing scanner outputs the scan pulse so that each pixel circuit performs the threshold correction operation a plurality of times within one light emission cycle.

  In the display driving method according to the present invention, when the signal selector sets a plurality of horizontal lines as one unit for each pixel circuit of the pixel array, the pixel array includes a plurality of horizontal periods corresponding to the number of horizontal lines of one unit. A threshold correction reference voltage and a video signal voltage for each of the pixel circuits in the unit are supplied to each signal line arranged in a row as the signal line voltage, and the writing scanner is provided in one unit. As the scan pulse for each pixel circuit, the threshold correction reference voltage is input to each pixel circuit so that the threshold correction operation is simultaneously performed within the period of one light emission cycle of each pixel circuit. The scanning pulse for controlling the sampling transistor is output so that the video signal voltage is sequentially input for each circuit. Each pixel circuit so that the potential fluctuation of the gate and source of the drive transistor of each pixel circuit in the unit that occurs through the common electrode line at the start of light does not appear as a difference in light emission luminance of the pixel circuits in each line in the unit The gate-source voltage adjustment operation for adjusting the gate-source voltage of the driving transistor is performed.

In the present invention, an STC (Simultaneous Threshold Cancel) driving method is adopted in which a plurality of horizontal lines are set as one unit, and each pixel circuit in the same unit performs a threshold correction operation simultaneously. For example, if three horizontal lines are taken as one unit, each pixel of the three lines simultaneously performs a threshold value correcting operation. With this STC drive, the threshold correction operation period can be extended even when a high frame rate is achieved.
In this case, the signal selector supplies the threshold correction reference voltage to the signal line in order to use the gate of the driving transistor as the threshold correction reference voltage during the threshold correction operation. Further, in order to sequentially apply the video signal voltage to each pixel circuit (drive transistor) in the unit, the signal selector sequentially supplies the video signal voltage to each pixel circuit to the signal line. For example, when one unit has three lines, in three horizontal periods, the threshold correction reference voltage, the video signal voltage for the pixel circuit on the first line in the unit, the video signal voltage for the pixel circuit on the second line, A video signal voltage is supplied to the pixel circuit on the third line.
Here, in the pixel array, one end of the light emitting element is a common electrode line (cathode electrode line). Then, in each unit, potential fluctuations of the gate and source of the driving transistor of each pixel circuit in the unit occur through the common electrode line at the start of light emission of the preceding unit (that is, the unit that emits light immediately before). That is, the potential of the common electrode line fluctuates due to the potential fluctuation at the time of light emission of the previous unit, and this affects the potential in the next unit. The degree of the influence of this potential variation differs for each line in the unit. For this reason, a fluctuation difference in the voltage between the gate and the source is generated in the pixel circuit of each line in the unit. This causes shading within the unit when displayed. Therefore, in the present invention, the gate-source voltage adjustment operation of each drive transistor is performed with respect to this potential fluctuation, and the influence of the potential fluctuation generated via the cathode electrode line is eliminated.

  According to the present invention, in STC driving, when potential fluctuations of the gate and source of the driving transistor occur at the start of light emission of the preceding unit in each pixel circuit of each line in the unit, the gate that eliminates the influence of the potential fluctuation • The source voltage adjustment operation is performed. As a result, it is possible to avoid variations in emission luminance for each line in the unit, and to prevent shading in the same unit. That is, a STC drive suitable for a high frame rate is adopted, and a display device with good uniformity (uniformity) can be realized.

It is explanatory drawing of a structure of the display apparatus of embodiment of this invention. It is a circuit diagram of a pixel circuit of an embodiment. It is explanatory drawing of pixel circuit operation | movement in the case of performing division | segmentation threshold value correction | amendment. It is explanatory drawing of pixel circuit operation | movement in the case of performing STC drive. It is explanatory drawing of the threshold value correction period by STC drive. It is explanatory drawing of the coupling via a cathode electrode line. It is explanatory drawing of the gate-source voltage fluctuation | variation by the coupling in STC drive. It is explanatory drawing of the shading at the time of STC drive. It is explanatory drawing of the STC drive of 1st Embodiment. It is explanatory drawing of the shading prevention in 1st Embodiment. It is explanatory drawing of the STC drive of 2nd Embodiment. It is explanatory drawing of the shading prevention in 2nd Embodiment. It is explanatory drawing of the STC drive of 3rd Embodiment. It is explanatory drawing of the shading prevention in 3rd Embodiment.

Hereinafter, embodiments of the present invention will be described in the following order.
[1. Configuration of Display Device and Pixel Circuit]
[2. Pixel circuit operation considered in the process leading to the present invention: division threshold correction]
[3. Pixel circuit operation considered in the process leading to the present invention: STC driving]
[4. Pixel Circuit Operation of First Embodiment]
[5. Pixel Circuit Operation of Second Embodiment]
[6. Pixel Circuit Operation of Third Embodiment]

[1. Configuration of Display Device and Pixel Circuit]

FIG. 1 shows a configuration of an organic EL display device according to an embodiment.
This organic EL display device includes a pixel circuit 10 that uses an organic EL element as a light emitting element and performs light emission driving by an active matrix method.
As illustrated, the organic EL display device includes a pixel array 20 in which a large number of pixel circuits 10 are arranged in a matrix in the column direction and the row direction (m rows × n columns). Each of the pixel circuits 10 is a light emitting pixel of any one of R (red), G (green), and B (blue), and a color display device is configured by arranging the pixel circuits 10 of each color according to a predetermined rule. .

As a configuration for driving each pixel circuit 10 to emit light, a horizontal selector 11, a drive scanner 12, and a write scanner 13 are provided.
Also, signal lines DTL1, DTL2,... DTL (n), which are selected by the horizontal selector 11 and supply a voltage corresponding to the signal value (gradation value) of the luminance signal as display data to the pixel circuit 10, are on the pixel array. It is arranged in the column direction. The signal lines DTL1, DTL2,... DTL (n) are arranged by the number of columns (n columns) of the pixel circuits 10 arranged in a matrix in the pixel array 20.

  On the pixel array 20, write control lines WSL1, WSL2,... WSL (m) and power supply control lines DSL1, DSL2,. These write control lines WSL and power supply control lines DSL are arranged by the number of rows (m rows) of the pixel circuits 10 arranged in a matrix in the pixel array 20, respectively.

Write control lines WSL (WSL1 to WSL (m)) are driven by the write scanner 13.
The write scanner 13 sequentially supplies scanning pulses WS (WS1, WS2,... WS (m)) to each of the write control lines WSL1 to WSL (m) arranged in rows at a predetermined timing set. Then, the pixel circuit 10 is line-sequentially scanned in units of rows.

The power supply control lines DSL (DSL1 to DSL (m)) are driven by the drive scanner 12. The drive scanner 12 supplies power pulses DS (DS1, DS2,... DS (m)) to the power supply control lines DSL1 to DSL (m) arranged in a row in accordance with the line sequential scanning by the write scanner 13. To do. The power supply pulse DS (DS1, DS2,... DS (m)) is a pulse voltage that switches to a binary value of the drive voltage Vcc and the initial voltage Vini.
The drive scanner 12 and the write scanner 13 set the timing of the scanning pulse WS and the power supply pulse DS based on the clock ck and the start pulse sp.

The horizontal selector 11 supplies a signal line voltage as an input signal to the pixel circuit 10 to the signal lines DTL1, DTL2,... Arranged in the column direction in accordance with the line sequential scanning by the write scanner 13.
In the first embodiment to be described later, the horizontal selector 11 supplies a threshold correction reference voltage Vofs, a video signal voltage Vsig, and an adjustment voltage V1 as signal line voltages to each signal line. In the second and third embodiments, the horizontal selector 11 supplies a threshold correction reference voltage Vofs and a video signal voltage Vsig as signal line voltages to each signal line.

By the way, in each embodiment, the pixels are driven to emit light by the STC driving method described in detail later. For example, 3 horizontal lines are defined as 1 unit.
As illustrated, in the m horizontal lines, an operation for light emission is performed for each unit as units U1 to U (z) in units of three lines. The pixel circuits in the same unit are simultaneously subjected to threshold correction operation.
As will be described later, in the case of the first embodiment, the horizontal selector 11 uses the threshold correction reference voltage Vofs, the adjustment voltage V1, and the first voltage in the unit as signal line voltages for each signal line within three horizontal periods. The video signal voltage Vsig for one line, the video signal voltage Vsig for the second line, and the video signal voltage Vsig for the third line are supplied.
Further, in the case of the second and third embodiments, the horizontal selector 11 applies the threshold correction reference voltage Vofs, the video signal voltage Vsig for the first line in the unit, the second, within three horizontal periods for each signal line. The video signal voltage Vsig for the line and the video signal voltage Vsig for the third line are supplied.

  In the display device of this embodiment, an example of a signal selector referred to in the present invention is the horizontal selector 11, an example of a drive control scanner is a drive scanner, and an example of a writing scanner is a write scanner 13. Become.

FIG. 2 shows a configuration example of the pixel circuit 10. The pixel circuits 10 are arranged in a matrix like the pixel circuits 10 in the configuration of FIG.
In FIG. 2, only one pixel circuit 10 arranged at a portion where the signal line DTL intersects with the write control line WSL and the power supply control line DSL is shown for simplification.

  The pixel circuit 10 includes an organic EL element 1 that is a light emitting element, a storage capacitor Cs, a sampling transistor Ts, and an n-channel thin film transistor (TFT) as a driving transistor Td. Note that the capacitance Coled is a parasitic capacitance of the organic EL element 1.

The storage capacitor Cs has one terminal connected to the source of the drive transistor Td and the other terminal connected to the gate of the drive transistor Td.
The light emitting element of the pixel circuit 10 is, for example, the organic EL element 1 having a diode structure, and includes an anode and a cathode. The anode of the organic EL element 1 is connected to the source of the drive transistor Td, and the cathode is connected to the cathode electrode line CPL to which the cathode potential Vcat is applied.

The sampling transistor Ts has one end of its drain and source connected to the signal line DTL and the other end connected to the gate of the driving transistor Td.
The gate of the sampling transistor Ts is connected to the write control line WSL.
The drain of the drive transistor Td is connected to the power supply control line DSL.

The light emission driving of the organic EL element 1 is basically as follows.
At the timing when the video signal voltage Vsig is applied to the signal line DTL, the sampling transistor Ts is turned on by the scanning pulse WS supplied from the write scanner 13 by the write control line WSL. As a result, the video signal voltage Vsig from the signal line DTL is written to the storage capacitor Cs.

The drive transistor Td causes the current Ids to flow through the organic EL element 1 by supplying current from the power supply control line DSL to which the drive potential Vcc is applied by the drive scanner 12, and causes the organic EL element 1 to emit light.
At this time, the current Ids becomes a value corresponding to the gate-source voltage Vgs of the driving transistor Td (a value corresponding to the voltage held in the holding capacitor Cs), and the organic EL element 1 emits light with luminance corresponding to the current value. To do.
That is, in the case of this pixel circuit 10, by writing the video signal voltage Vsig from the signal line DTL to the storage capacitor Cs, the gate applied voltage of the drive transistor Td is changed, thereby controlling the value of the current flowing through the organic EL element 1. To obtain the gradation of light emission.

Since the drive transistor Td is designed to always operate in the saturation region, the drive transistor Td becomes a constant current source having a value represented by the following expression 1.
Ids = (1/2) · μ · (W / L) · Cox · (Vgs−Vth) ² (Equation 1)
Where Ids is the current flowing between the drain and source of a transistor operating in the saturation region, μ is the mobility, W is the channel width, L is the channel length, Cox is the gate capacitance, and Vth is the threshold voltage of the driving transistor Td. Yes.
As apparent from Equation 1, the drain current Ids is controlled by the gate-source voltage Vgs in the saturation region. Since the gate-source voltage Vgs is kept constant, the drive transistor Td operates as a constant current source, and can emit the organic EL element 1 with constant luminance.

In this way, basically, in each frame period, an operation is performed in which the video signal value (gradation value) Vsig is written in the storage capacitor Cs in the pixel circuit 10, and thereby the driving transistor is selected according to the gradation to be displayed. The gate-source voltage Vgs of Td is determined.
The drive transistor Td functions as a constant current source for the organic EL element 1 by operating in the saturation region, and a current corresponding to the gate-source voltage Vgs is supplied to the organic EL element 1 so that each frame period is The organic EL element 1 emits light with a luminance corresponding to the gradation value of the video signal.

[2. Pixel circuit operation considered in the process leading to the present invention: division threshold correction]

Here, the pixel circuit operation considered in the process leading to the present invention will be described. This is a circuit operation including a threshold correction operation and a mobility correction operation for compensating for uniformity deterioration due to variations in the threshold and mobility of the driving transistor Td of each pixel circuit 10. In particular, the threshold correction operation is an example in which division threshold correction is performed a plurality of times by dividing within one light emission cycle.

In the pixel circuit operation, the threshold value correction operation and the mobility correction operation itself have been performed conventionally. This necessity will be briefly described.
For example, in a pixel circuit using a polysilicon TFT or the like, the threshold voltage Vth of the drive transistor Td and the mobility μ of the semiconductor thin film constituting the channel of the drive transistor Td may change over time. Further, the transistor characteristics of the threshold voltage Vth and the mobility μ are different for each pixel due to variations in the manufacturing process.
If the threshold voltage and mobility of the drive transistor Td differ from pixel to pixel, the current value flowing through the drive transistor Td varies from pixel to pixel. For this reason, even if the same video signal value (video signal voltage Vsig) is given to all the pixel circuits 10, the light emission luminance of the organic EL element 1 varies from pixel to pixel. As a result, the screen uniformity (uniformity) ) Is damaged.
For this reason, the pixel circuit operation is provided with a correction function for fluctuations in the threshold voltage Vth and the mobility μ.

FIG. 3 shows a timing chart of the operation of the pixel circuit 10 in one cycle (one frame period).
FIG. 3 shows the signal line voltage that the horizontal selector 11 applies to the signal line DTL. In the case of this operation example, the horizontal selector 11 supplies the signal line DTL with the pulse voltage as the threshold correction reference voltage Vofs and the video signal voltage Vsig in one horizontal period (1H) as the signal line voltage.
FIG. 3 shows a scan pulse WS applied to the gate of the sampling transistor Ts by the write scanner 13 via the write control line WSL. The n-channel sampling transistor Ts is turned on when the scanning pulse WS is set to the H level, and is turned off when the scanning pulse WS is set to the L level.
FIG. 3 shows a power pulse DS supplied from the drive scanner 12 via the power control line DSL. The drive voltage Vcc or the initial voltage Vini is given as the power supply pulse DS.
FIG. 3 shows changes in the gate voltage and source voltage of the drive transistor Td as the gate voltage Vg and the source voltage Vs.

A time point ts in the timing chart of FIG. 3 is a start timing of one cycle in which the organic EL element 1 as a light emitting element is driven to emit light, for example, one frame period of image display.
First, at time ts, the power supply pulse DS = the initial potential Vini is set, and the scanning pulse WS is at H level, and the sampling transistor Ts is turned on.

By stopping the supply of the drive voltage Vcc by setting the power supply pulse DS = the initial potential Vini, the gate voltage and the source voltage of the drive transistor Td are lowered, and the organic EL element 1 is extinguished and enters a non-light emission period.
In this case, the source potential = Vini, and the signal line voltage is applied to the gate of the drive transistor Td via the sampling transistor Ts. At this time, since the signal line voltage = the threshold correction reference voltage Vofs, the gate potential = Vofs.
Here, the initial potential Vini is set to satisfy Vofs−Vini> Vth. Vth is a threshold voltage of the drive transistor Td.
That is, as a preparation for threshold correction, the gate-source voltage of the drive transistor is sufficiently widened than the threshold voltage Vth.

Subsequently, the first threshold correction (Vth correction) is performed during the period LT1.
In this case, at the timing when the signal line voltage becomes the threshold correction reference voltage Vofs, the write scanner 13 sets the scanning pulse WS to the H level, and at the same time, the drive scanner 12 sets the power supply pulse DS to the driving voltage Vcc.
Then, the source node rises while the gate of the drive transistor Td is fixed to the threshold correction reference voltage Vofs.
This is because a current flows from the power supply control line DSL toward the anode of the organic EL element 1 by setting the power supply pulse DS to the drive voltage Vcc. As long as the anode potential Vel of the organic EL element 1 is Vel ≦ Vcat + Vthel (threshold voltage of the organic EL element 1), the current of the drive transistor Td is used to charge the storage capacitor Cs and the capacitor Coled. “Vel ≦ Vcat + Vthel” means that the leakage current of the organic EL element 1 is considerably smaller than the current flowing through the drive transistor Td.
For this reason, the anode potential Vel (the source potential of the drive transistor Td) increases with time.

This threshold value correction can be said to be an operation in which the gate-source voltage of the drive transistor Td is set to the threshold voltage Vth. Therefore, the source potential of the drive transistor Td only needs to be raised until the gate-source voltage of the drive transistor Td reaches the threshold voltage Vth.
However, the gate node can be fixed to the threshold correction reference voltage Vofs only during the period of the signal line voltage = Vofs. Then, depending on the frame rate or the like, sufficient time for the source potential to rise cannot be taken by the threshold correction operation once until the gate-source voltage reaches the threshold voltage Vth. Therefore, the threshold value correction is performed in a plurality of times.

For this reason, before the signal line voltage = the video signal voltage Vsig, the threshold value correction is suspended during the period LT2. That is, the write scanner 13 once sets the scanning pulse WS to L level and turns off the sampling transistor Ts.
At this time, since both the gate and the source are floating, a current flows between the drain and the source in accordance with the gate-source voltage Vgs and bootstraps. That is, the gate potential and the source potential rise as shown.

Next, in the period LT3, the second threshold correction is performed. That is, when signal line voltage = threshold correction reference voltage Vofs, the write scanner 13 sets the scanning pulse WS to H level again and turns on the sampling transistor Ts. As a result, the gate voltage of the drive transistor Td = the threshold correction reference voltage Vofs, and the source potential is increased.
Further, the threshold value correction operation is paused in the period LT4. Since the gate-source voltage of the driving transistor Td is closer to the threshold voltage Vth in the second threshold correction, the bootstrap amount in the second pause period is smaller than that in the first pause period.
In addition, the third threshold correction is performed in the period LT5, and after the pause of the period LT6, the fourth threshold correction is performed in the period LT7.
Finally, the gate-source voltage of the drive transistor Td becomes the threshold voltage Vth.
At this time, the source potential (the anode potential Vel of the organic EL element 1) = Vofs−Vth ≦ Vcat + Vthel. (Vcat is the cathode potential, Vthel is the threshold voltage of the organic EL element 1)
In the case of FIG. 3, after the fourth threshold correction period LT7, the scanning pulse WS is set to L level, the sampling transistor Ts is turned off, and the threshold correction operation is completed.

  In this example, the threshold correction is performed four times. However, how many times the threshold correction operation is performed can be appropriately determined according to the configuration and operation of the display device. There are also examples of 3 times, 5 times or more.

  Thereafter, after a period LT8, in a period LT9 in which the signal line voltage is the video signal voltage Vsig, the write scanner 13 sets the scanning pulse WS to the H level, and writing of the video signal voltage Vsig and mobility correction are performed. That is, the video signal voltage Vsig is input to the gate of the drive transistor Td.

The gate potential of the drive transistor Td becomes the potential of the video signal voltage Vsig, but current flows because the power supply control line DSL is at the drive voltage Vcc, and the source potential rises with time.
At this time, if the source voltage of the driving transistor Td does not exceed the sum of the threshold voltage Vthel and the cathode voltage Vcat of the organic EL element 1, the current of the driving transistor Td is used to charge the holding capacitor Cs and the capacitor Coled. That is, the condition is that the leakage current of the organic EL element 1 should be much smaller than the current flowing through the drive transistor Td.
At this time, since the threshold correction operation of the drive transistor Td is completed, the current flowing through the drive transistor Td reflects the mobility μ.
Specifically, those with high mobility have a large current amount at this time, and the source rises quickly. On the other hand, when the mobility is low, the amount of current is small and the source rises slowly.
As a result, the gate-source voltage Vgs of the driving transistor Td is reduced to reflect the mobility, and becomes a voltage for completely correcting the mobility after a predetermined time has elapsed.

  After writing the video signal voltage Vsig and correcting the mobility in this way, the gate-source voltage Vgs is determined, and the bootstrap and light emission states are entered.

As described above, the pixel circuit 10 performs the operation for light emission of the organic EL element 1 including the threshold value correction operation and the mobility correction operation as the light emission drive operation of one cycle in one frame period.
A current corresponding to the signal potential Vsig can be supplied to the organic EL element 1 regardless of variations in the threshold voltage Vth of the drive transistor Td in each pixel circuit 10 and fluctuations in the threshold voltage Vth due to temporal fluctuations by the threshold correction operation. . That is, variations in the threshold voltage Vth due to manufacturing or changes over time can be canceled, and high image quality can be maintained without causing uneven brightness on the screen.
In addition, since the drain current varies depending on the mobility of the driving transistor Td, the image quality deteriorates due to variations in the mobility of the driving transistor Td for each pixel circuit 10, but the mobility correction increases or decreases the mobility of the driving transistor Td. In response to this, the source potential Vs is obtained. As a result, the gate-source voltage Vgs is adjusted so as to absorb the variation in mobility of the drive transistor Td of each pixel circuit 10, so that the deterioration in image quality due to the variation in mobility is also eliminated.

Further, the threshold correction operation is divided and performed a plurality of times as a one-cycle pixel circuit operation because of the demand for higher frequency display devices.
As the frame rate is increased, the operation time of the pixel circuit is relatively shortened, so that it is difficult to secure a continuous threshold correction period (signal line voltage = threshold correction reference voltage Vofs period). . Thus, by performing the threshold correction operation in a time-sharing manner as described above, a necessary period is secured as the threshold correction period, and the gate-source voltage of the drive transistor Td is converged to the threshold voltage Vth.

[3. Pixel circuit operation considered in the process leading to the present invention: STC driving]

However, if the frame rate is further increased, more division threshold corrections are required to secure the threshold correction operation period.
Here, an STC driving method has been developed as a driving method that can ensure the threshold correction time more appropriately.

The operation of the STC driving method will be described.
In this case, as described with reference to FIG. 1, for example, three horizontal lines are set as one unit, and light emission driving including threshold correction operation is performed in units.

FIG. 4 shows signal line voltages, scanning pulses WS, and power supply pulses DS in the case of the STC driving method.
In FIG. 4, for the unit U1, the scan pulse WS1, power pulse DS1 corresponding to the pixels on the first line in FIG. 1, the scan pulse WS2, power pulse DS2 corresponding to the pixels on the second line, and the third A scan pulse WS3 and a power supply pulse DS3 corresponding to the pixels on the line are shown.
Regarding the unit U2, the scan pulse WS4 and power pulse DS4 corresponding to the pixels on the fourth line, which are omitted in FIG. 1, the scan pulse WS5 and power pulse DS5 corresponding to the pixels on the fifth line, and the sixth line are omitted. The scan pulse WS6 and the power supply pulse DS6 corresponding to the pixels are shown.

The signal line voltage applied to the signal line DTL by the horizontal selector 11 includes a threshold voltage correction reference voltage Vofs and pulse voltages as three video signal voltages Vsig # x, Vsig # y, and Vsig # z in three horizontal periods (3H). Become.
The 3H period is a period corresponding to 3 horizontal lines as one unit.
For example, video signal voltages Vsig applied to the pixel circuits 10 of the unit U1 (first to third lines) by one signal line DTL are indicated as Vsig # 1, Vsig # 2, and Vsig # 3. The video signal voltages Vsig applied to the pixel circuits 10 of the unit U2 (fourth to sixth lines) are indicated as Vsig # 4, Vsig # 5, and Vsig # 6.
Here, it is assumed that the video signal voltage Vsig is applied so that the entire screen emits light with the same luminance, and Vsig # 1 = Vsig # 2 = Vsig # 3 = Vsig # 4 = Vsig # 5 = Vsig # 6 ... Vsig # x = Vsig # y = Vsig # z. Of course, during normal video display, each video signal voltage Vsig has a voltage value corresponding to the luminance to be emitted from the corresponding pixel circuit 10.
The horizontal selector 11 applies the threshold correction reference voltage Vofs, the video signal voltages Vsig # 1, Vsig # 2, and Vsig # 3 to the signal line DTL during a certain 3H period (period in which the video signal voltage Vsig of the unit U1 is output). Will be given to.
In the next 3H period, the threshold correction reference voltage Vofs, video signal voltages Vsig # 4, Vsig # 5, and Vsig # 6 are applied to the signal line DTL as a period for outputting the video signal voltage Vsig of the unit U2.

In the case of this STC driving method, the write scanner 13 outputs a scanning pulse WS to each pixel circuit in one unit so that a threshold correction operation is simultaneously performed within one light emission cycle of each pixel circuit. . That is, the scanning pulse WS is output so that the threshold correction reference voltage Vofs is input to each pixel circuit simultaneously.
The driving by the scanning pulse WS and the power supply pulse DS for the pixel circuits 10 in each line is as follows.

For the pixel circuit 10 in the first line, the power supply pulse DS1 is set to the initial potential Vini at time t0, the light emission of the previous frame is completed, and the light emission operation of one cycle of the current frame is started.
For the pixel circuit 10 on the second line, the power supply pulse DS2 is set to the initial potential Vini at time t1, the light emission of the previous frame is completed, and the light emission operation for one cycle of the current frame is started.
For the pixel circuit 10 on the third line, the power supply pulse DS3 is set to the initial potential Vini at time t2, the light emission of the previous frame is completed, and the light emission operation for one cycle of the current frame is started.
Note that the light emission end timing of each pixel of the unit U1 is different from the time points t0, t1, and t2 because the light emission start timings at the time points t16, t18, and t20 described later are shifted. That is, this is because the light emission period lengths of the pixel circuits 10 of the respective lines are made the same so that a visually recognized luminance difference does not occur.

When each pixel of the unit U1 does not emit light at time points t0, t1, and t2, first, threshold correction preparation is simultaneously performed at time points t4 to t5.
That is, during the period of signal line voltage = threshold correction reference voltage Vofs, the scanning pulses WS1, WS2, and WS3 are simultaneously set to the H level.
As a result, the gate voltage Vg of the driving transistor of each pixel circuit 10 in the first to third lines is set to the threshold correction reference voltage Vofs. Further, the source potential = Vini.
Since the initial potential Vini is set so that Vofs−Vini> Vth, the gate-source voltage of the driving transistor is sufficiently widened than the threshold voltage Vth in preparation for threshold correction.

Next, as the time points t11 to t12, the first threshold correction is simultaneously performed in the pixel circuits 10 of the first line to the third line.
That is, during the period of signal line voltage = threshold correction reference voltage Vofs, the scan pulses WS1, WS2, and WS3 are simultaneously set to the H level, and the power supply pulses DS1, DS2, and DS3 are simultaneously set to the drive voltage Vcc.
As a result, in each pixel circuit 10 in the first to third lines, the source node rises while the gate of the drive transistor Td is fixed to the threshold correction reference voltage Vofs. That is, the gate-source voltage Vgs approaches the threshold voltage Vth.

The first threshold correction operation ends when the scanning pulses WS1, WS2, and WS3 are simultaneously set to the L level, and the threshold correction is suspended during the period in which the signal line voltage is the video signal voltage Vsig.
Then, at time points t13 to t14, the second threshold correction is simultaneously performed in the pixel circuits 10 of the first line to the third line.
That is, during the period of signal line voltage = threshold correction reference voltage Vofs, the scan pulses WS1, WS2, and WS3 are simultaneously set to the H level, and the second threshold correction operation is performed.
In this example, the threshold correction operation is performed in two steps, but the gate-source voltage Vgs of the drive transistor Td becomes the threshold voltage Vth by the second threshold correction operation, and the threshold correction operation is completed. .

Subsequently, the video signal voltage Vsig is sequentially written.
First, at time t15 to t16 when the video signal voltage Vsig # 1 is applied as the signal line voltage by the horizontal selector 11, writing is performed to the pixel circuit 10 of the first line. That is, the scanning pulse WS1 is set to the H level from time t15 to t16.
As a result, in each pixel circuit 10 in the first line, the video signal voltage Vsig # 1 is written to the gate of the drive transistor Td, the current flows because the power supply control line DSL is at the drive voltage Vcc, and the source potential is Ascending with time, mobility correction is performed.
In this way, the writing of the video signal voltage Vsig # 1 and the mobility correction are performed, the gate-source voltage Vgs is determined, and the state shifts to the light emitting state after time t16.

In addition, at time t17 to t18 when the video signal voltage Vsig # 2 is applied as the signal line voltage by the horizontal selector 11, the scanning pulse WS2 is set to the H level, and writing is performed on the pixel circuits 10 on the second line. That is, in each pixel circuit 10 on the second line, the video signal voltage Vsig # 2 is written to the gate of the drive transistor Td, and mobility correction is performed. After time t18, the light emission state is entered.
Further, at time t19 to t20 when the video signal voltage Vsig # 3 is applied as the signal line voltage by the horizontal selector 11, the scanning pulse WS3 is set to the H level, and writing is performed to the pixel circuit 10 on the third line. In each pixel circuit 10 on the third line, the video signal voltage Vsig # 3 is written to the gate of the driving transistor Td, mobility correction is performed, and the state shifts to the light emitting state after time t20.

The light emission operation in one cycle of each pixel circuit of the unit U1 is as described above.
In the unit U2, the same operation is performed for the pixel circuits 10 in the fourth line to the sixth line with a 3H period offset from the unit U1.
That is, at time points t6, t7, and t8, the power supply pulses DS4, DS5, and DS6 are set to the initial potential Vini, respectively, and the light emission of the previous frames of the pixel circuits 10 of the fourth to sixth lines is sequentially terminated, One cycle of light emission is started.
At time points t9 to t10, the scan pulses WS4, WS5, and WS6 are simultaneously set to the H level, and threshold correction preparation is simultaneously performed in the pixel circuits 10 of the fourth to sixth lines. As a result, the gate voltage Vg of the driving transistor of each pixel circuit 10 in the fourth to sixth lines is set to the threshold correction reference voltage Vofs. Further, the source potential = Vini. That is, the gate-source voltage of each driving transistor is sufficiently widened than the threshold voltage Vth.

Next, at time points t13 to t14, the scan pulses WS4, WS5, and WS6 are simultaneously set to the H level, and the power supply pulses DS4, DS5, and DS6 are simultaneously set to the drive voltage Vcc. As a result, the first threshold correction is simultaneously performed in the pixel circuits 10 of the fourth to sixth lines.
Further, after the correction suspension period, at time points t21 to t22, the scanning pulses WS4, WS5, and WS6 are simultaneously set to the H level, and the second-time threshold correction is simultaneously performed in the pixel circuits 10 of the fourth to sixth lines.

The video signal voltages Vsig # 4, Vsig # 5, and Vsig # 6 are sequentially written.
First, at time points t23 to t24 where the signal line voltage is equal to the video signal voltage Vsig # 4, the scanning pulse WS4 is set to the H level, and the writing of the video signal voltage Vsig # 4 to the pixel circuit 10 on the fourth line is performed. Mobility correction is performed. After time t24, the light emission state is entered.
At time points t25 to t26 when the signal line voltage = the video signal voltage Vsig # 5, the scanning pulse WS5 is set to the H level, and the video signal voltage Vsig # 5 is written and moved to the pixel circuit 10 on the fifth line. Degree correction is performed. After time t26, the light emission state is entered.
Further, at time points t27 to t28 when the signal line voltage is equal to the video signal voltage Vsig # 6, the scanning pulse WS6 is set to the H level, and the video signal voltage Vsig # 6 is written and moved to the pixel circuit 10 on the sixth line. Degree correction is performed. Then, after time t28, the light emission state is entered.

In the STC driving method, the threshold value correction operation and the like are collectively performed in units as described above.
Performing the threshold correction operation for all three lines means that 3H can be used for one operation in which the signal line voltage becomes the threshold correction reference voltage Vofs / video signal voltage Vsig. That is, it takes a long time for the threshold correction operation, which is an effective driving method for increasing the operation margin even when the frame rate is increased and the pulse transient is increased as the panel size is increased.
FIGS. 5A and 5B show threshold correction times in the case of normal division threshold correction (example in FIG. 3) and STC driving.
When performing the division threshold correction as shown in FIG. 3 as shown in FIG. 5A, one threshold correction operation is limited within a period in which the signal line voltage is the threshold correction reference voltage Vofs within the 1H period. The On the other hand, in the case of the above-described STC driving, as shown in FIG. 5B, the operation in units of 3H periods can increase the period during which the signal line voltage is the threshold correction reference voltage Vofs. In addition, the period of one threshold correction operation can be made longer.

Describe in detail. The time required other than the threshold correction time and the video signal writing time is a transition time (xτsig) of the signal line voltage pulse and a transition time (yτws) of the scanning pulse WS. In the case of the normal operation of FIG. 5A, the total of them is 2 (xτsig + yτws). For 3 lines, 6 (xτsig + yτws).
On the other hand, in the case of the three-line STC driving method, the total transition time is 4 (xτsig + yτws) as shown in FIG. That is, the time margin for threshold correction can be increased by 2 (xτsig + yτws).
As described above, in the case of the X-line STC driving method, the time margin is increased by (X−1) (xτsig + yτws) compared to the normal driving.
For this reason, STC driving can be said to be an effective driving method for increasing the operation margin even when the pulse rate increases as the frame rate increases and the panel size increases.

In this way, the STC driving method is advantageous when considering a high frame rate and a large panel by making the threshold correction operation period longer.
However, in the case of STC driving, there are concerns about the following problems.

Attention is paid to the influence of the light emission operation on the certain unit U (n) from the writing of the video signal voltage of the previous unit U (n−1).
For example, when attention is paid to the unit U2, it is an influence exerted by the light emission operation of the unit U1 in the previous stage.

First, in the pixel array 20, a cathode electrode line CPL is commonly arranged for each pixel circuit 10 as shown in FIG. The cathode electrode line CPL is covered by pixels in the panel surface, and the cathode voltage fluctuation (potential fluctuation) caused by the light emission operation of a certain unit naturally affects the lower unit.
For example, when the video signal voltage Vsig is written in the pixel circuit 10 in a certain line and the light emission operation is started, the source voltage Vs increases according to the gate-source voltage Vgs of the drive transistor Td of the pixel circuit. Then perform the bootstrap operation. For example, the node N1 in FIG. Then, the potential of the cathode electrode (node N2) rises via the capacitor Coled, and naturally the potential of the common cathode electrode (node N3) on the lower stage line also rises. Then, the source voltage Vs (node N4) rises through the capacitor Coled in the lower pixel circuit 10.

The influence of such a cathode electrode potential fluctuation will be described with reference to FIG. 7 in relation to the units U1 and U2.
In FIG. 7, the period from the time point t13 to t28 in FIG. 4 is expanded, the scan pulses WS1 to WS6, and the gate voltage and source voltage of the drive transistor Td in the pixel circuits 10 of the fourth to sixth lines serving as the unit U2. Is shown.
Vg4 and Vs4 are the gate voltage and source voltage of the drive transistor Td of the pixel circuit 10 in the fourth line.
Vg5 and Vs5 are the gate voltage and source voltage of the drive transistor Td of the pixel circuit 10 in the fifth line.
Vg6 and Vs6 are the gate voltage and source voltage of the drive transistor Td of the pixel circuit 10 in the sixth line.
The gate-source voltage of the drive transistor Td of the pixel circuit 10 in each line is shown as Vgs4, Vgs5, Vgs6.

As shown in the drawing, when attention is paid to the gate-source voltage Vgs of each pixel circuit 10 in the fourth line to the sixth line of the unit U2, every time the previous unit U1 (first to third lines) enters the light emission operation, Coupling enters the source node and the potential fluctuates.
That is, the source voltages Vs4, Vs5, and Vs6 of the fourth to sixth lines rise at time t16 when the first line of the unit U1 enters the light emission operation. Along with this, the gate voltages Vg4, Vg5, and Vg6 also rise through the storage capacitor Cs.
The rise in the potential of the cathode electrode line CPL from the time point t16 returns to the original cathode potential Vcat with time, but thereafter, similarly at the time points t18 and t20 at which the second line and the third line enter the light emission operation. A potential rise occurs.

The closer to unit U1, the greater the potential fluctuation. This is because the attenuation increases as the distance increases. Therefore, the potential fluctuation is the largest in the pixel circuit 10 of the fourth line, and the pixel circuit 10 of the fifth and sixth lines becomes smaller than the fourth line according to the distance.
For this reason, in the unit U2, the fourth line has the highest source potential immediately before the final threshold correction executed at the times t21 to t22.
At the time t21 when the final threshold correction operation is started, the gate voltage Vg that has risen due to the fluctuation of the source voltage Vs returns to the threshold correction reference voltage Vofs. However, since the fluctuation of the source voltage Vs is very small with respect to the fluctuation of the gate voltage Vg at the time t21, the gate-source voltage Vgs becomes small before and after the final threshold correction operation.
That is, at the time of final threshold correction, since Vgs <Vth, the threshold correction operation is not substantially performed.
Then, the gate-source voltage Vgs of the fourth to sixth lines after the threshold correction operation (after time t22) is Vgs4 <Vgs5 <Vgs6.

Thereafter, at time points t23 to t24, time points t25 to t26, and time points t27 to t28, the video signal voltage Vsig is written to the pixel circuits 10 on the fourth to sixth lines.
If the same video signal voltage (Vsig # 4 = Vsig # 5 = Vsig # 6) is written in the unit, the light-emitting state is changed while the relationship of Vgs4 <Vgs5 <Vgs6 is maintained.
Then, the gate-source voltage increases as the sixth line increases, and the emission luminance increases.
That is, as shown in FIG. 8, shading that becomes brighter as the lower line occurs in the same unit, and when raster display is performed in the panel, a luminance difference occurs between the units, which is visually recognized as a streak. This deteriorates the screen uniformity.

[4. Pixel Circuit Operation of First Embodiment]

The pixel circuit operation of the present embodiment is to prevent uniformity deterioration as described above while employing STC driving.
The pixel circuit operation of the first embodiment will be described with reference to FIGS. FIG. 9 shows the signal line voltage, the scan pulses WS (WS1 to WS6), and the power supply pulses DS (DS1 to DS6) for the units U1 and U2 in the same format as in FIG.

  In the case of the first embodiment, the signal voltage applied to the signal line DTL by the horizontal selector 11 is the threshold correction reference voltage Vofs, the adjustment voltage V1, and the three video signals in three horizontal periods (3H). The pulse voltages are voltages Vsig # x, Vsig # y, and Vsig # z. That is, the horizontal selector 11 differs from the STC drive in FIG. 4 in that the adjustment voltage V1 is applied as the signal line voltage next to the threshold correction reference voltage Vofs. Adjustment voltage V1> threshold correction reference voltage Vofs.

The driving by the scanning pulse WS and the power supply pulse DS for the pixel circuits 10 in each line is as follows.
For each of the pixel circuits 10 in the first to third lines, the power supply pulses DS1, DS2, and DS3 are set to the initial potential Vini at the time points t0, t1, and t2, respectively, and the emission of the previous frame is completed as in FIG. It is.

If each pixel of the unit U1 does not emit light at time points t0, t1, and t2, first, threshold correction preparation is simultaneously performed at time points t4 to t5 ′.
That is, during the period of signal line voltage = threshold correction reference voltage Vofs, the scanning pulses WS1, WS2, and WS3 are simultaneously set to the H level.
As a result, the gate voltage Vg of the drive transistor of each pixel circuit 10 in the first line to the third line is set to the threshold correction reference voltage Vofs, and the source potential = Vini, so that the gate-source voltage of the drive transistor Td is The threshold voltage Vth is sufficiently widened.
Note that the scanning pulses WS1, WS2, and WS3 are set to the L level at time t5 ′ before the signal line voltage becomes the adjustment voltage V1.

Next, as time points t11 to t12 ′, the first threshold correction is simultaneously performed in the pixel circuits 10 of the first to third lines.
That is, during the period of signal line voltage = threshold correction reference voltage Vofs, the scan pulses WS1, WS2, and WS3 are simultaneously set to the H level, and the power supply pulses DS1, DS2, and DS3 are simultaneously set to the drive voltage Vcc.
As a result, in each pixel circuit 10 in the first to third lines, the source node rises while the gate of the drive transistor Td is fixed to the threshold correction reference voltage Vofs. That is, the gate-source voltage Vgs approaches the threshold voltage Vth.

The first threshold value correction operation ends when the scanning pulses WS1, WS2, and WS3 are set to the L level at time t12 ′ before the signal line voltage becomes the adjustment voltage V1, and the signal line voltage is adjusted to the adjustment voltage V1 and the video. The threshold value correction is suspended during the period when the signal voltage is Vsig.
Then, at time points t13 to t14, the second threshold correction is simultaneously performed in the pixel circuits 10 of the first line to the third line. In this example, the second threshold correction is the final threshold correction operation in the division correction.
This last threshold value correction operation is executed while the scanning pulses WS1, WS2, and WS3 are simultaneously set to the H level during the period from the signal line voltage to the adjustment voltage V1 from the threshold value correction reference voltage Vofs. Note that the unit U1 will be described with reference to FIG. 10. In this case, the sampling transistor Ts is turned on even when the signal line voltage becomes the adjustment voltage V1, so that the driving transistor Td of each pixel circuit 10 is turned on. The gate voltage Vg is adjusted voltage V1.

Thereafter, the video signal voltage Vsig is sequentially written.
First, at time t15 to t16 when the video signal voltage Vsig # 1 is applied as the signal line voltage by the horizontal selector 11, the scanning pulse WS1 is set to the H level, and the video signal voltage Vsig # for the pixel circuit 10 in the first line. 1 is written and mobility correction is performed. After time t16, the light emission state is entered.
In addition, at time t17 to t18 when the video signal voltage Vsig # 2 is applied as the signal line voltage by the horizontal selector 11, the scanning pulse WS2 is set to the H level, and the video signal voltage Vsig # for the pixel circuit 10 in the second line. 2 writing and mobility correction are performed. After time t18, the light emission state is entered.
Further, at time t19 to t20 when the video signal voltage Vsig # 3 is applied as the signal line voltage by the horizontal selector 11, the scanning pulse WS3 is set to the H level, and the video signal voltage Vsig # for the pixel circuit 10 in the third line. 3 and mobility correction are performed. After time t20, the light emission state is entered.

In the unit U2, the same operation is performed for the pixel circuits 10 in the fourth line to the sixth line with a 3H period offset from the unit U1.
That is, at time points t6, t7, and t8, the power supply pulses DS4, DS5, and DS6 are set to the initial potential Vini, respectively, and the light emission of the previous frames of the pixel circuits 10 of the fourth to sixth lines is sequentially terminated, One cycle of light emission is started.
At time points t9 to t10 ′, the scanning pulses WS4, WS5, and WS6 are simultaneously set to the H level, and the threshold correction preparation is simultaneously performed in the pixel circuits 10 of the fourth to sixth lines.
Next, at time t13 to t14 ′, the scan pulses WS4, WS5, WS6 are simultaneously set to the H level, and the power supply pulses DS4, DS5, DS6 are simultaneously set to the drive voltage Vcc. As a result, the first threshold correction is simultaneously performed in the pixel circuits 10 of the fourth to sixth lines.

Further, after the correction suspension period, at time points t21 to t22, the scanning pulses WS4, WS5, and WS6 are simultaneously set to the H level, and the second (last) threshold correction is simultaneously performed in the pixel circuits 10 of the fourth to sixth lines. Done. In this case, even when the signal line voltage becomes the adjustment voltage V1, the scan pulses WS4, WS5, and WS6 are kept at the H level. As a result, the gate voltage Vg of the drive transistor Td of each pixel circuit 10 is set to the adjustment voltage V1.
Thereafter, the video signal voltages Vsig # 4, Vsig # 5, and Vsig # 6 are sequentially applied to the pixel circuits 10 of the fourth to sixth lines at time points t23 to t24, time points t25 to t26, and time points t27 to t28. Writing is performed, and each shifts to a light emitting state.

In the STC driving method of FIG. 9, in the threshold correction before the final threshold correction in the division correction (first threshold correction in the example of FIG. 9), the sampling transistor Ts is turned on by the scanning pulse WS with the signal line voltage = Vofs. Then, threshold correction is performed.
With respect to the final threshold correction (second threshold correction in the example of FIG. 9), the signal line voltage = Vofs to V1 is set to the timing at which the sampling transistor Ts is turned on by the scanning pulse WS.

In FIG. 10, the period from the time point t13 to t28 in FIG. 9 is enlarged, and the signal line voltage and the scan pulses WS1 to WS6 to the units U1 and U2 and the drive transistor Td of the unit U2 in the same format as in FIG. The gate voltage Vg (Vg4 to Vg6) and the source voltage Vs (Vs4 to Vs6) are shown.
As in the case described with reference to FIG. 7, every time each line of the unit U1 enters the light emission operation at time points t16, t18, t20, the source of the drive transistor Td of each line of the unit U2 is caused by the fluctuation of the potential of the cathode electrode line CPL. The voltage Vs and the gate voltage Vg vary.

Attention is paid to the final threshold correction period of the unit U2 from the time point t21 to t22. As described above, in the final threshold correction, when the signal line voltage reaches the adjustment voltage V1 as well as when the signal line voltage reaches the threshold correction reference voltage Vofs, the scanning pulses WS4 to WS6 are set to the H level and the sampling transistor Ts is turned on. Like that.
That is, at the end of the threshold correction, the adjustment voltage V1 is written to the gate of the drive transistor Td.
Here, when the gate-source voltage after the final threshold correction in the case of the STC drive of FIG. 4 is X (V) = Vofs−Vth, the gate-source voltage X ′ (V) of the present embodiment is If the write gain (source node change ratio with respect to gate node change) is Gin (%),
X ′ = X + (V1−Vofs) × Gin> X
It becomes.

That is, the gate-source voltage Vgs contracted by the fluctuation of the cathode electrode caused by the previous unit light emission can be set to the threshold voltage Vth or more again. Therefore, the threshold correction operation can be functioned.
In the state of Vgs> Vth, since the time from V1 writing to V2 writing is longer for the lower line, an operation that becomes darker for the lower line can be performed by writing the adjustment voltage V1.

A waiting time WT (waiting term) from the end of threshold correction to video signal writing in the same unit varies from line to line.
That is, assuming that the waiting times of the fourth, fifth, and sixth lines in unit U2 are WT4, WT5, and WT6, respectively, the relationship is WT4 <WT5 <WT6 as shown in FIG.
With the state of Vgs> Vth, the source potential of the drive transistor Td rises to reach Vgs = Vth. Even after Vgs = Vth, a minute leak current exists.
Therefore, the longer the waiting time, the greater the increase in the source voltage Vs due to the leakage current. That is, the lower line with a longer waiting time WT can reduce the gate-source voltage Vgs. This is used for operations that become darker as the lower line.

That is, in this embodiment, the following concept is adopted.
Due to the swing of the cathode electrode during light emission of the preceding unit, the source potential rises more toward the upper line in the unit closer to the preceding unit. For this reason, when the gate potential is set to the threshold correction reference voltage Vofs in the final threshold correction, the gate-source voltage Vgs becomes smaller toward the upper line. This causes in-unit shading that becomes brighter on the lower line side.
Here, at the end of the final threshold correction, the gate voltage is pushed up to the adjustment voltage V1, and the gate-source voltage Vgs of each drive transistor Td is widened.
At this time, the lower the line in the unit, the larger the gate-source voltage Vgs and the longer the waiting time. Therefore, the increase in the source voltage Vs due to the leakage current is larger. This is an operation in which the light emission luminance becomes darker toward the lower line side. That is, the operation is to cancel the variation of the emission luminance for each line due to the fluctuation of the cathode electrode potential.

In order to realize such a gate-source voltage adjustment operation of the drive transistor Td, the horizontal selector 11 and the write scanner 13 perform the operations shown in FIGS.
That is, the horizontal selector 11 supplies the threshold correction reference voltage Vofs, the adjustment voltage V1, and the video signal voltage Vsig (for example, Vsig # 4, Vsig # 5, Vsig # 6) to the pixel circuits 10 in each line in the unit during the 3H period. Supply. The write scanner 13 inputs the optimum adjustment voltage V1 to the gates of the drive transistors Td in the threshold correction operation before inputting the video signal voltages Vsig to the pixel circuits 10 in the unit. Thus, the scanning pulse WS (for example, WS4, WS5, WS6) is output.

By performing the gate-source voltage adjustment operation in this way, in the case of the normal STC driving method as shown in FIG. 4, shading (luminance difference in the unit) that becomes brighter in the lower stage due to the cathode swing is performed. Can be canceled.
Therefore, in the STC driving method, the uniformity can be improved while obtaining the advantage in securing the threshold correction period, and thereby, the display driving method can appropriately cope with the high frame rate and the large panel. be able to.
In order to properly realize this operation, the adjustment voltage V1 may be set appropriately. That is, an appropriate value of the adjustment voltage V1 may be set in accordance with the difference in source voltage fluctuation for each line due to the fluctuation of the cathode electrode potential, the difference in waiting time WT, the transistor size of the driving transistor Td, and the like. In practice, the adjustment voltage V1 can be varied while visually recognizing the screen, and a method of searching for a V1 value that eliminates shading can be realized.

[5. Pixel Circuit Operation of Second Embodiment]

Next, the pixel circuit operation of the second embodiment will be described with reference to FIGS.
FIG. 11 shows the signal line voltage, the scan pulses WS (WS1 to WS6), and the power supply pulses DS (DS1 to DS6) for the units U1 and U2 in the same format as in FIG.

  In the case of the second embodiment, the signal line voltage applied to the signal line DTL by the horizontal selector 11 is the threshold correction reference voltage Vofs and the three video signal voltages Vsig # x in three horizontal periods (3H). , Vsig # y and Vsig # z are pulse voltages. That is, this is the same as the STC drive described in FIG. 4, and the adjustment voltage V1 is not used as in the first embodiment.

Similarly to the first embodiment, the second embodiment also eliminates intra-unit shading caused by fluctuations in the cathode electrode potential during light emission of the preceding unit. For this reason, the gate of the drive transistor Td・ Source voltage adjustment is performed.
The gate-source voltage adjustment operation in this case is realized by the output method of the scan pulse WS of the write scanner 13. That is, for each pixel circuit in the unit, after completion of the threshold correction operation, the video signal is sequentially output for each pixel circuit 10 in the unit in the 3H period after the 3H period when the threshold correction operation is completed. This is executed by outputting the scanning pulse WS so as to input the voltage Vsig.

The pixel circuit operation of FIG. 11 will be described with respect to differences from FIG.
Description will be made with attention paid to the unit U2. In the case of FIG. 4, the last threshold value correction operation is performed at time points t21 to t22. Immediately thereafter, at time points t23 to t24, time points t25 to t26, and time points t27 to t28, the video signal voltages Vsig # 4, Vsig # 5, and Vsig # 6 are applied to the pixel circuits 10 on the fourth, fifth, and sixth lines, respectively. Writing is performed.
That is, the video signal voltage Vsig is written sequentially for each pixel circuit 10 within the 3H period when the threshold correction operation is completed.

On the other hand, the operation of FIG. 11 is as follows.
As for the unit U2, as shown in FIG. 11, the last threshold value correction operation is performed at time points t21 to t22. This is the same as FIG.
However, immediately after that, that is, within the 3H period in which the last threshold correction operation is performed, the writing of the video signal voltages Vsig # 4, Vsig # 5, and Vsig # 6 to the pixel circuits 10 on the fourth, fifth, and sixth lines. I do not do the inclusion.
The video signal voltages Vsig # 4, Vsig # 5, and Vsig # 6 are written to the pixel circuits 10 on the fourth, fifth, and sixth lines at time points t37 to t38, time points t39 to t40, and time points t41 to t42, respectively. Is done. That is, it is the 3H period following the 3H period in which the last threshold value correction operation was performed.
In other words, the threshold value correction operation is not performed during the same 3H period as the writing of the video signal voltage Vsig.

  The same applies to the unit U1, and the video signal voltage Vsig is written not at the time points t15 to t16, the time points t17 to t18 and the time points t19 to t20 in FIG. 4, but from the time points t31 to t32 and the time points t33 to t34 in FIG. It becomes time t35-t36. That is, the video signal voltage Vsig is written in the 3H period following the 3H period in which the final threshold value correcting operation is performed. The same applies to the unit U3 and subsequent units not shown.

In the gate-source voltage adjustment operation of the second embodiment, after the threshold correction operation of each pixel circuit 10 in the unit is completed, the potential fluctuations of the gate and source of the drive transistor Td return to the state before the fluctuation. Later, the video signal voltage is sequentially input.
This is because the write scanner 13 sets the scan pulse WS to H level for writing the video signal voltage Vsig in the next 3H period after the scan pulse WS is set to H level for the last threshold correction operation. This is realized.

In FIG. 12, the period from time t21 to t42 in FIG. 11 is expanded, the scanning pulses WS1 to WS6 to the units U1 and U2, the gate voltage Vg (Vg4 to Vg6) of the drive transistor Td of the unit U2, and the source voltage Vs (Vs4). ~ Vs6).
As shown in the figure, at each time point t32, t34, and t36, each line of the unit U1 enters the light emission operation, and the source voltage Vs of the driving transistor Td of each line of the unit U2 and the gate due to the fluctuation of the potential of the cathode electrode line CPL. The voltage Vg varies.

In the unit U2, the final threshold correction is performed at the time points t21 to t22, but as described above, the video signal writing and light emission operations are not performed immediately after that (the same 3H period).
In this case, even if the drive transistor Td of each pixel circuit 10 is affected by the coupling due to the cathode swing, the gate voltage Vg can be kept floating until the video signal is written. It can be returned to the state.
That is, as shown in the drawing, in the pixel circuit 10 on the fourth line, before reaching the time point t37, the gate voltage Vg4 and the source voltage Vs4 return to the potentials before the coupling is entered. Each of the pixel circuits 10 in the fifth line and the sixth line is also coupled to the gate voltages Vg5 and Vg6 and the source voltages Vs5 and Vs6 before reaching the time points t39 and t41 when the writing of the video signal voltage Vsig is started. Return to the potential before entering.
For this reason, in each pixel circuit 10 of the unit U2, the gate-source voltages Vgs4, Vgs5, and Vgs6 at the time of writing the video signal voltage Vsig are not affected by the coupling due to the cathode swing.
Therefore, shading that occurs in the case of FIG. 4 can be suppressed and uniform uniformity can be realized.
In the above example, the video signal writing is performed in the next 3H period after the last threshold correction 3H period. However, the video signal writing is performed in the next 3H period after the last threshold correction 3H period. Etc. are also possible.

[6. Pixel Circuit Operation of Third Embodiment]

The pixel circuit operation of the third embodiment will be described with reference to FIGS.
FIGS. 13 and 14 show the waveforms in the same format as FIGS.
Also in the case of the third embodiment, as in the second embodiment, the signal line voltage that the horizontal selector 11 gives to the signal line DTL is the threshold correction reference voltage Vofs in three horizontal periods (3H). The three video signal voltages Vsig # x, Vsig # y, and Vsig # z are pulse voltages.

This third embodiment also eliminates the intra-unit shading caused by the fluctuation of the cathode electrode potential during light emission of the preceding unit, as in the first and second embodiments. For this reason, the drive transistor The gate-source voltage adjustment operation of Td is performed.
The gate-source voltage adjustment operation in this case is realized by the output method of the scan pulse WS of the write scanner 13. In particular, the threshold correction operation period is shortened by delaying the start timing of the last threshold correction operation.

The pixel circuit operation of FIG. 13 will be described with respect to differences from FIG.
Description will be made with attention paid to the unit U2. In the case of FIG. 4, the last threshold value correction operation is performed at time points t21 to t22. Immediately thereafter, at time points t23 to t24, time points t25 to t26, and time points t27 to t28, the video signal voltages Vsig # 4, Vsig # 5, and Vsig # 6 are applied to the pixel circuits 10 on the fourth, fifth, and sixth lines, respectively. Writing is performed.

On the other hand, the operation of FIG. 13 is as follows.
As for the unit U2, as shown in FIG. 13, the last threshold value correction operation is performed at time points t21 ′ to t22.
That is, the start timing of the last threshold value correction operation is delayed from time t21 to t21 ′. Thereafter, the video signal voltages Vsig # 4, Vsig # 5, and Vsig # 6 are written to the pixel circuits 10 on the fourth, fifth, and sixth lines at time points t23 to t24, time points t25 to t26, and time points t27 to t28, respectively. It is the same that is performed.
The same applies to the unit U1, and the last threshold value correction operation performed at the time point t13 to t14 in the case of FIG. 4 is the period from the time point t13 ′ to t14 as shown in FIG.

The gate-source voltage adjustment operation of the third embodiment is such that the final threshold value correction operation is performed after the source potential fluctuation of the driving transistor Td returns to the state before the fluctuation.
FIG. 14 shows the time points t13 to t28 in an enlarged manner. As for the unit U2, the first threshold correction operation is first performed at the time points t13 to t14. That is, the scanning pulses WS4, WS5, WS6 are set to the H level from time t13 to t14.
After the first threshold correction operation, every time each line of the unit U1 enters the light emission operation at time points t16, t18, t20, the fluctuation of the potential of the cathode electrode line CPL causes the drive transistor Td of each line of the unit U2 to change. The source voltage Vs and the gate voltage Vg vary.

In the unit U2, the final threshold correction is performed at time points t21 ′ to t22. In this case, the period from the potential fluctuation at time t20 to the start timing of the threshold value correction operation at time t21 ′ is longer than that in the case of FIG.
For this reason, as shown in the figure, at the time of starting the final threshold value correcting operation, the increase of the source voltage Vs due to the influence of the coupling due to the cathode fluctuation returns to the state before the coupling is entered. In other words, the threshold value correction operation is not started until the source voltage Vs returns to the potential before coupling.
Since the final threshold correction operation is performed in the state where the source voltage Vs has returned, the gate-source voltage Vgs is also maintained when the gate voltage Vg is set to the threshold correction reference voltage Vofs during the final threshold correction operation. There will be no situation where the voltage is lower than the threshold voltage Vth. Therefore, the last threshold value correction operation is appropriately executed.

As described above, the final threshold correction operation is performed without being affected by the potential fluctuation due to the fluctuation of the cathode electrode potential, so that the video signal voltage Vsig can be written in a state where the threshold correction is properly completed. .
Therefore, shading that occurs in the case of FIG. 4 can be suppressed and uniform uniformity can be realized.

  In this embodiment, the start timing of the final threshold value correction operation is delayed in the sense that it takes time until the increase in the source voltage due to the influence of the fluctuation of the cathode electrode potential returns. Therefore, the setting of the threshold correction operation period such as the time points t21 'to t22 may be determined in consideration of the time until recovery of the cathode electrode potential and the period length necessary for the last threshold correction operation period.

While various embodiments have been described above, the present invention is not limited to the above examples. For example, how many times the division threshold correction is performed in STC driving is determined according to the actual frame rate, panel size, and the like. For example, the threshold value correction may be performed by dividing it into three or more times.
Further, if the threshold correction can be completed by one threshold correction operation, the division threshold correction is not necessarily required. For example, the idea of the first and second embodiments can be easily applied even when the threshold correction operation is performed once.

In addition, it is only an example that three lines are used as one unit for STC driving, and STC driving may be performed using four or more lines as one unit.
For example, when four lines are used as one unit, it goes without saying that the operation for STC driving is performed in units of four horizontal periods. That is, the horizontal selector 11 outputs the threshold correction reference voltage Vofs and the output of the video signal voltage Vsig to each line (additional adjustment voltage V1 in the first embodiment) to each signal line DTL in the 4H period. Against.

  DESCRIPTION OF SYMBOLS 1 Organic EL element, 10 pixel circuit, 11 horizontal selector, 12 drive scanner, 13 light scanner, 20 pixel array part, Cs holding capacity, Ts sampling transistor, Td drive transistor, CPL cathode electrode line

Claims (8)

The driving voltage is applied between the light-emitting element and the drain-source to apply a current corresponding to the gate-source voltage to the light-emitting element, and the signal line voltage is driven to be conductive by being electrically connected. A pixel circuit having a sampling transistor that is input to the gate of a transistor and a storage capacitor that is connected between the gate and source of the drive transistor and that holds the threshold voltage of the drive transistor and the input video signal voltage A pixel array in which one end of the light emitting element is a common electrode line;
When a plurality of horizontal lines are formed as one unit for each pixel circuit of the pixel array, signal lines arranged in a row on the pixel array are arranged in a plurality of horizontal periods corresponding to the number of horizontal lines of one unit. A signal selector for supplying a threshold correction reference voltage and a video signal voltage for each of the pixel circuits in the unit as the signal line voltage;
A drive control scanner that applies a power pulse to each power control line arranged in a row on the pixel array and applies a drive voltage to the drive transistor of the pixel circuit;
A scan pulse is applied to each write control line arranged in a row on the pixel array to control the sampling transistor of the pixel circuit, and each pixel is used as the scan pulse for each pixel circuit in one unit. The threshold correction reference voltage is input to each pixel circuit so that the threshold correction operation is simultaneously performed within one light emission cycle of the circuit, and then the video signal voltage is sequentially input to each pixel circuit in the unit. A writing scanner for outputting the scan pulse for controlling the sampling transistor;
With
The potential fluctuations of the gate and source of the drive transistor of each pixel circuit in the unit occurring through the common electrode line at the start of light emission of the previous unit do not appear as a difference in light emission luminance of the pixel circuit of each line in the unit. A display device in which a gate-source voltage adjustment operation for adjusting a gate-source voltage of a driving transistor of each pixel circuit is performed. The gate-source voltage adjustment operation is as follows:
The signal selector supplies a threshold correction reference voltage, an adjustment voltage, and a video signal voltage for each of the pixel circuits in the unit to the signal lines as the signal line voltages in the plurality of horizontal periods,
In the threshold correction operation before the video signal voltage is input to each pixel circuit in the unit, the writing scanner applies the scan pulse so that the adjustment voltage is input to the gate of each drive transistor. The display device according to claim 1, wherein the display device is executed by outputting. The display device according to claim 2, wherein the adjustment voltage is higher than the threshold correction reference voltage. The display according to claim 2, wherein the signal selector supplies the signal lines in the order of a threshold correction reference voltage, an adjustment voltage, and a video signal voltage for each of the pixel circuits in the unit in the plurality of horizontal periods. apparatus. The gate-source voltage adjustment operation is as follows:
Each pixel in the unit in a plurality of horizontal periods subsequent to the plurality of horizontal periods when the threshold correction operation is completed after the threshold correction operation is completed for each pixel circuit in the unit by the writing scanner. The display device according to claim 1, wherein the display device is executed by outputting the scan pulse for inputting the video signal voltage sequentially for each circuit. The gate-source voltage adjustment operation is as follows:
The writing scanner outputs the scanning pulse to each pixel circuit in the unit so that the threshold correction operation is executed after the fluctuation of the source potential of the driving transistor returns to the state before the fluctuation. The display device according to claim 1, wherein the display device is executed.   2. The display device according to claim 1, wherein the writing scanner outputs the scan pulse so that a threshold correction operation is performed a plurality of times within a period of one light emission cycle in each pixel circuit. The driving voltage is applied between the light-emitting element and the drain-source to apply a current corresponding to the gate-source voltage to the light-emitting element, and the signal line voltage is driven to be conductive by being electrically connected. A pixel circuit having a sampling transistor that is input to the gate of a transistor and a storage capacitor that is connected between the gate and source of the drive transistor and that holds the threshold voltage of the drive transistor and the input video signal voltage A pixel array in which one end of the light emitting element is a common electrode line;
A signal selector for supplying the signal line voltage to each signal line arranged in a row on the pixel array;
A drive control scanner that applies a power pulse to each power control line arranged in a row on the pixel array and applies a drive voltage to the drive transistor of the pixel circuit;
A write scanner for controlling the sampling transistor of the pixel circuit by applying a scan pulse to each write control line arranged in a row on the pixel array;
As a display driving method for a display device comprising:
When the signal selector has a plurality of horizontal lines as one unit for each pixel circuit of the pixel array, the signal selector is arranged in a row on the pixel array in a plurality of horizontal periods corresponding to the number of horizontal lines of one unit. Supply the signal line voltage to each of the signal lines with the threshold correction reference voltage and the video signal voltage for each of the pixel circuits in the unit;
The threshold value correction reference voltage is applied to each pixel circuit so that the write scanner performs the threshold value correction operation at the same time during one light emission cycle of each pixel circuit as the scanning pulse for each pixel circuit in one unit. After that, the scanning pulse for controlling the sampling transistor to output the video signal voltage sequentially for each pixel circuit in the unit is output,
Furthermore, the potential fluctuation of the gate and source of the drive transistor of each pixel circuit in the unit that occurs through the common electrode line at the start of light emission of the preceding unit does not appear as a difference in light emission luminance of the pixel circuit of each line in the unit. A display driving method in which a gate-source voltage adjusting operation for adjusting a gate-source voltage of a driving transistor of each pixel circuit is performed.