JP2011108140A - Data processor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve the following problem: when processing in hardware is not guaranteed to end within a predetermined time, the hardware cannot transmit a completion notification to a processor earlier than the actual end. <P>SOLUTION: The data processor includes: a processing time measuring part 106 for measuring an actual measurement time from the start of data processing to the end in an HW accelerator 104; an actual measurement processing time storing part 107 for storing the actual measurement processing time; an estimated processing time calculating part 108 for calculating an estimated time of data processing to be performed by the HW accelerator 104 on the basis of the actual measurement time; an estimated end time notifying part 109 for notifying a CPU 101 of an estimated end time at the estimated end time of the data processing, on the basis of the estimated processing timing; and a task execution order setting part for receiving notification of the estimated end timing to set an execution order of a task. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a data processing apparatus that processes data for general purposes, and more particularly, to a data processing apparatus in which hardware and software operating on a processor jointly process data.

Currently, a data processing device having a configuration in which a hardware device that executes a specific process is controlled by a control device such as a processor is widely used. In such a data processing apparatus, a single processor executes a plurality of tasks according to priority, and in this process, requests hardware to process data with a relatively large load on the task.
When processing is requested to the hardware, the processor interrupts the task relating to the data processing and executes the task to be executed next. When the requested process ends, the hardware notifies the processor of the end of the process. At this time, when the task related to the process being executed by the processor has a lower priority than the task related to the process requested by the hardware, the processor interrupts the process of the task being executed by the processor. Then, the task related to the processing requested to the hardware is continuously executed as necessary.

  In the above processor and hardware operations, for example, in Patent Document 1, in the process end notification method performed from the hardware to the processor, the progress of the process in the hardware is managed, and the process in the hardware is actually performed. Proposals have been made to increase the processing efficiency of the processor by notifying the processor of the end of processing from the hardware at a timing earlier than the timing of ending.

JP 2007-109038 A

In Patent Document 1, since processing in hardware is guaranteed to end in a certain time, the progress of the processing is managed, and the hardware to processor is processed at a timing earlier than the timing at which the processing in hardware is actually ended. Can be notified of the end of processing.
However, if it is not guaranteed that the process will end in a certain time, the hardware may notify the processor of the end of the process at a timing earlier than the timing at which the process in the hardware actually ends. There are things that cannot be done. Therefore, there is a problem that the processing efficiency in the processor cannot be increased.

  SUMMARY An advantage of some aspects of the invention is to solve at least a part of the problems described above, and the invention can be implemented as the following forms or application examples.

  Application Example 1 A task execution control unit that sequentially executes a plurality of tasks in accordance with the priority order of the tasks, and a data processing execution unit that executes data processing instructed by the task execution control unit, the data The process execution unit includes a process time measurement unit that measures an actual measurement process time from the start of data processing in the data process execution unit to an end, an actual measurement process time storage unit that stores the actual measurement process time, and the actual measurement Based on the measured processing time stored in the processing time storage unit, a predicted processing time calculation unit that calculates a predicted processing time of a data process to be executed by the data processing execution unit, and a prediction based on the predicted processing time A prediction end timing notifying unit for notifying the task execution control unit of a prediction end timing at the end of the processed data processing. Control unit, the data processing apparatus being characterized in that and a task execution order setting unit that sets the execution order of tasks notified of the predicted end time.

  According to this configuration, the data processing execution unit includes a processing time measurement unit that measures the actual measurement processing time from the start of data processing in the data processing execution unit to the end, and an actual measurement processing time storage that stores the actual measurement processing time. And a predicted processing time calculation unit that calculates a predicted processing time of data processing to be executed by the data processing execution unit based on the actual processing time stored in the actual processing time storage unit. As a result, even when data processing in the data execution processing unit is not guaranteed to end in a certain time, the end point of the data processing is predicted based on the prediction processing time. And the prediction end timing notification part which notifies a prediction end timing to a task execution control part at the time of completion | finish of the data process estimated based on prediction process time is provided. Therefore, even if the data processing in the data execution processing unit is not guaranteed to finish in a certain time, the task execution control from the data processing execution unit before the data processing in the data processing execution unit actually ends. The opportunity to notify the prediction end timing to the part can be increased.

  In addition, the task execution control unit includes a task execution order setting unit that receives the notification of the prediction end timing and sets the task execution order. Thus, when the task execution control unit receives a notification of the prediction end timing from the data processing execution unit before the data processing in the data processing execution unit actually ends, the task execution control unit sends the data processing execution unit to the data processing execution unit. Prepare to execute the requested task again.

  For this reason, the task execution control unit can resume the execution of the task requested to the data processing execution unit immediately after the data processing actually ends in the data processing execution unit, thereby shortening the time until the task execution restarts can do. Therefore, the processing efficiency in the task execution control unit can be increased.

  [Application Example 2] The data processing device, wherein the prediction processing time calculation unit calculates the prediction processing time by statistically processing the actual measurement processing time stored in the actual measurement processing time storage unit .

  According to this configuration, by using the statistical processing, it is possible to analyze the tendency of the distribution in the group of the actual measurement processing time stored in the actual measurement processing time storage unit. For this reason, it is possible to predict the time point at which the data processing ends based on the predicted end time reflecting the distribution trend.

  Application Example 3 The data processing apparatus, wherein the prediction end timing notification unit notifies the prediction end timing obtained by correcting the prediction processing time.

  According to this configuration, even if the data processing in the data processing unit is not guaranteed to end in a certain time, the data processing unit before the data processing in the data processing unit actually ends Therefore, the opportunity for notifying the task execution control unit of the predicted end timing can be increased. Further, it is possible to increase the case where the difference between the predicted processing time and the time when the data processing is actually finished is small. Thereby, it is possible to lengthen the execution time of the task being executed in the task execution control unit until the data processing in the data processing execution unit is completed. Thereby, the processing efficiency of a task execution control part can be raised.

The figure for demonstrating the structure of a data processor. The figure which showed an example of the task management table. The figure which showed an example of the memory map referred by CPU. The table | surface as an example which described the measured value and estimated value of the number of clock cycles, and those difference. (A) is a figure which shows the period when CPU of the data processor in this embodiment performs a task or a task switch, (b) is the HW accelerator of the data processor in this embodiment or a comparative example, and data processing The figure which shows the period to perform, (c) is a figure which shows the period when CPU of the data processor in a comparative example performs a task or a task switch. (A) is a figure which shows the period when CPU of the data processor in this embodiment performs a task or a task switch, (b) is the HW accelerator of the data processor in this embodiment or a comparative example, and data processing The figure which shows the period to perform, (c) is a figure which shows the period when CPU of the data processor in a comparative example performs a task or a task switch. The block diagram of the data processor as a comparative example. The table | surface which shows an example of the measured value in 2nd Embodiment, an estimated value, and a difference.

(First embodiment)
The first embodiment will be described below with reference to the drawings. FIG. 1 is a diagram for explaining the configuration of the data processing apparatus 100 of the present embodiment. A data processing apparatus 100 according to the present embodiment includes a CPU (Central Processing Unit) 101 as a task execution control unit that sequentially executes a plurality of tasks according to the priority order of tasks, and a data processing execution unit that processes data according to instructions from the CPU 101 And a hardware (HW) accelerator 104 as a data processing apparatus. The memory 102 is connected to the CPU 101 and the HW accelerator 104 by a bus, and stores instructions used to execute tasks of the CPU 101, tables and data used to execute the instructions, and the like.

  In addition, as shown in FIG. 1, this embodiment is not limited to the one provided with one HW accelerator 104, and may include a plurality of HW accelerators 104. In such a case, one CPU may control a plurality of HW accelerators 104, or there may be a plurality of CPUs.

  The memory 102 includes a task management table 103 that allows the CPU 101 to execute a plurality of tasks appropriately and sequentially. FIG. 2 is an example of the task management table 103.

  The task management table 103 is a task management table for managing tasks. The task management table 103 includes a task name (TASK ID) of each task, a program counter (PC) indicating the progress of each task, a processor state register (PSR) that records a processor state and conditions at the time of task execution, Used when there are multiple stack pointers (SP) indicating the position of the stack, a state (State) indicating the execution state of the task, a priority (priority), processing contents of the task being executed (register file), and multiple HW accelerators The HW accelerator that is used, or the use of the only HW accelerator, content not used (HW), etc. are managed.

  The CPU 101 uses the task management table 103 to set the execution order of a plurality of tasks. The execution order is represented by listing the tasks that can be executed in an order starting from those executed earlier.

  The CPU 101 and the task management table 103 function as an execution order setting unit according to the present embodiment, and set a task to be processed next based on the task priority.

  The HW accelerator 104 is a device for performing processing with a relatively large load when executing a task. For this reason, the HW accelerator 104 includes a calculation unit 111 that is controlled by the control unit 105 and performs data processing.

  The control unit 105 includes a processing time measurement unit 106, an actual measurement processing time storage unit 107, a prediction processing time calculation unit 108, a prediction end timing notification unit 109, and a status signal generation unit 110.

  The processing time measuring unit 106 measures the time required for data processing by the computing unit 111 as the actual measurement processing time. The processing time measurement unit 106 includes a counter, measures the number of clock cycles required for data processing in the calculation unit 111, and measures the measured processing time. Note that the measurement target is not limited to the number of clock cycles as in the present embodiment, and may be a real time value, for example. The processing time measuring unit 106 may be composed of a state machine. For example, when there are a plurality of processing end states, a value indicating each state may be used as a measured value.

  The actual measurement processing time storage unit 107 is a storage area for storing the number of clock cycles as the actual measurement processing time measured by the processing time measurement unit 106. The processing time measurement unit 106 stores the measured number of clock cycles in the actual measurement processing time storage unit 107.

  The prediction processing time calculation unit 108 calculates the prediction processing time using the number of clock cycles stored in the actual measurement processing time storage unit 107 as a sample.

  The prediction end timing notification unit 109 notifies the CPU 101 of the prediction end timing as indicated by an arrow A at the end point predicted based on the prediction processing time calculated by the prediction processing time calculation unit 108.

  The HW accelerator 104 includes a status signal generation unit 110 and a status register 112. The status signal generation unit 110 generates a flag signal (done_flag) indicating whether or not the processing of the calculation unit 111 is completed. This flag signal is progress information (HW status) indicating the progress status of the electronic data processing of the present embodiment. When the flag signal is “0”, it indicates that the data processing by the calculation unit 111 is being executed, and when the flag signal is “1”, it indicates that the data processing by the calculation unit 111 has been completed. Yes.

  FIG. 3 is a diagram illustrating an example of a memory map referred to by the CPU 101. The CPU 101 in FIG. 1 can recognize the HW status recorded in the status register 112 by referring to the corresponding address on the memory map. A flag indicating the end of data processing is written in the corresponding address. In the present embodiment, an address range in which the HW status is written in the memory map is set in advance. After the interrupt processing, the CPU 101 refers to the data written to the address in the set range of the memory map by polling indicated by an arrow B and recognizes the flag signal.

  Next, a method in which the predicted processing time calculation unit 108 according to the present embodiment calculates the predicted processing time by statistically processing the actually measured processing time will be described.

  FIG. 4 is a table as an example in which the measured value and the predicted value of the number of clock cycles when the data is processed in the past by the calculation unit 111 and the difference between them are described. The prediction value from the first time to the fifth time in the calculation unit 111 is set to 70 as an initial value. The predicted values from the sixth time to the 20th time in the calculation unit 111 are described as moving average values calculated based on the latest measured values for the last five times.

  The actual measurement processing time storage unit 107 includes a storage area for five measurement values, and stores the latest five actual measurement values. The prediction processing time calculation unit 108 takes a moving average value based on the five actual measurement values stored in the storage area of the actual measurement processing time storage unit 107, and calculates the value as a prediction value (prediction processing time).

  The prediction end timing notification unit 109 corrects the prediction value calculated by the prediction processing time calculation unit 108 with a correction value that is arbitrarily set, and the prediction end timing (prediction end) of the process currently being executed by the calculation unit 111. Time). In the present embodiment, the CPU 101 sets a fixed cycle number required for task switching as a correction value, and sets a value obtained by subtracting the correction value from the predicted value calculated from the moving average value as the prediction end timing.

The prediction end timing notification unit 109 notifies the CPU 101 of the end and generates an interrupt when the earlier of the following two conditions is satisfied.
(1) When the prediction end timing set by the prediction end timing notification unit 109 is reached.
(2) When data processing in the calculation unit 111 is completed.
When the end notification is made at the timing of (1), the processing in the calculation unit 111 is not completely ended. When the processing in the calculation unit 111 is completed, the status signal generation unit 110 sets the flag signal to “1”.

  After receiving the end notification due to the interrupt, the CPU 101 compares the priority of the next task to be executed in the task management table 103 with the priority of the task including the data processing that has been calculated by the calculation unit 111 so far. The task execution order is set so that the task with the higher priority is executed.

  When execution of a task including data processing that has been calculated by the calculation unit 111 is resumed by the CPU 101, the CPU 101 refers to the flag of the status register 112. When the flag is “1”, the calculation unit 111 Since the data processing is completely completed, the subsequent steps in the task being executed by the CPU 101 are executed. When the flag is “0”, the processing in the calculation unit 111 is not completed, and thus the CPU 101 performs polling until the flag of the status register 112 becomes “1”.

  The difference column in the table of FIG. 4 shows a value obtained by subtracting the actual measurement value from the predicted value at each time. The △ mark shown in the upper part of the table indicates that the difference is a positive value from the first to the fifth time (third time, fourth time, fifth time), and the ◯ mark is a positive difference from the sixth time to the 20th time. (7th time, 9th time, 11th time, 12th time, 17th time, 18th time).

  A positive value of the difference indicates that the predicted processing time that is the predicted value is shorter than the actual measured processing time that is the actually measured value. In this case, the prediction end timing notification unit 109 notifies the CPU 101 of the end before the calculation in the calculation unit 111 ends. On the other hand, a negative value of the difference indicates that the prediction processing time that is the prediction value is longer than the actual measurement processing time that is the actual measurement value. In this case, the prediction end timing notification unit 109 notifies the CPU 101 of the end when the calculation in the calculation unit 111 is completed.

  Next, operations of the CPU 101 and the HW accelerator 104 in FIG. 1 when the prediction end timing is earlier than the timing at which the data processing in the calculation unit 111 actually ends will be described.

  FIG. 5A is a diagram illustrating a period during which the CPU 101 of the data processing apparatus 100 according to the present embodiment executes a task or a task switch, and FIG. 5B is a diagram illustrating the processing unit 111 of the data processing apparatus 100 performing data processing. It is a figure which shows a period.

  At time S201, the CPU 101 illustrated in FIG. 5A requests the HW accelerator 104 to perform data processing in the task A being executed. Upon receiving the request, the HW accelerator 104 in FIG. 5B starts data processing by the calculation unit 111.

  In time S202, CPU101 starts execution of a task switch. At time S203, the CPU 101 starts processing of task B, which has priority after task A.

  Time S204 is an end time predicted based on the prediction processing time calculated by the prediction processing time calculation unit 108 in FIG. At time S204, the prediction end timing notification unit 109 in FIG. 1 refers to the contents of the flag in the status register 112. At this time, since the data processing is not completed in the calculation unit 111, the content of the flag is “0”. Therefore, the prediction end timing notification unit 109 outputs a prediction end notification as a prediction end timing to the CPU 101. To do.

  When the CPU 101 receives the prediction end notification, the CPU 101 refers to the task management table 103 and starts executing a task switch for switching to the task A whose priority is higher than the task B.

  At time S205, the CPU 101 starts polling by referring to the contents of the flag of the status register 112 in FIG.

  At time S206, when the data processing is completely completed by the calculation unit 111, the status signal generation unit 110 updates the contents of the status register 112 to “1”. The CPU 101 refers to the status register 112, and if the content is “1”, the CPU 101 determines that the data processing in the HW accelerator 104 is completely completed, and starts the execution of the task A again.

  FIG. 7 is a configuration diagram of a data processing device 500 as a comparative example. For comparison with the present embodiment, the operation contents of the CPU 501 and the HW accelerator 504 of the data processing apparatus 500 in FIG. 7 will be described.

  The CPU 501, the memory 502, the task management table 503, the HW accelerator 504, the control unit 505, and the calculation unit 511 provided in the data processing device 500 are the CPU 101 provided in the data processing device 100 of FIG. 1 described in the present embodiment. The memory 102, the task management table 103, the HW accelerator 104, the control unit 105, and the calculation unit 111 have the same configuration.

  The data processing device 500 includes the processing time measurement unit 106, the actual measurement processing time storage unit 107, the predicted processing time calculation unit 108, the prediction end timing notification unit 109, the status signal generation unit 110, and the status register illustrated in FIG. 112 is not provided.

  Therefore, the data processing device 500 does not have the function of notifying the prediction end notification described using the data processing device 100 of the present embodiment before the data processing in the calculation unit 511 is completed. When the data processing is actually ended, the HW accelerator 504 notifies the CPU 501 of the end.

  FIG. 5B is described here as a diagram illustrating a period during which the HW accelerator 504 of the data processing apparatus 500 of FIG. 7 in the comparative example performs data processing.

  FIG. 5C is a diagram illustrating a period during which the CPU 501 of the data processing device 500 in the comparative example executes a task or a task switch. The operation content from the time S201 to the time S203 in the CPU 501 in FIG. 5C is the same as the operation content from the time S201 to the time S203 in the CPU 101 in FIG.

  At time S204 in the comparative example, the prediction end notification as the prediction end timing is not output from the HW accelerator 504 to the CPU 501. Also, polling is not performed at time S205. Therefore, when processing of task B is started in CPU 501 at time S203, task B in CPU 501 is still being executed at time S204 and time S205.

  At time S <b> 206 in the comparative example, when the data processing in the calculation unit 511 ends, the HW accelerator 504 notifies the CPU 501 of the end.

  The CPU 501 refers to the task management table 503 and starts executing a task switch for switching to the task A whose priority is higher than the task B. At time S207, the CPU 501 starts the execution of task A again.

  In the comparative example described with reference to FIGS. 5B and 5C, when an end notification is given from the HW accelerator 504 to the CPU 501 at time S206, a task switch is executed. In contrast, in the present embodiment described with reference to FIGS. 5A and 5B, the prediction end notification is output to the CPU 101 by the prediction end timing notification unit 109 at time S204, and the CPU 101 executes the task switch. To start.

  Therefore, the time point when the execution of the task A is started again in the CPU 501 in the comparative example is a time point S207. On the other hand, the time when the execution of the task A is started in the CPU 101 in the present embodiment is time S206. The time when the execution of the task A is started again is advanced by a period M from the time S207 at which the execution of the task A in the comparative example is started again to the time S206 at which the execution of the task A in the present embodiment is started again. That's right. In other words, the present embodiment has accelerated the time point at which the execution of the task A is started again only during the time period in which the task switch in the comparative example is executed (the time period M from time S206 to time S207).

  Next, the operations of the CPU 101 and the HW accelerator 104 will be described when the timing at which the data processing in the calculation unit 111 ends is earlier than the prediction end timing.

  FIG. 6A is a diagram showing a period during which the CPU of the data processing apparatus according to this embodiment executes a task or task switch, and FIG. 6B is a HW accelerator of the data processing apparatus according to this embodiment or a comparative example. It is a figure which shows the period which performs data processing.

  At time S301, the CPU 101 illustrated in FIG. 6A requests the HW accelerator 104 to perform data processing in the task A being executed. Upon receiving the request, the HW accelerator 104 in FIG. 6B starts data processing by the calculation unit 111.

  At time S302, the CPU 101 refers to the task management table 103 and starts executing a task switch for switching to the task B having the priority order next to the task A.

  At time S303, the CPU 101 starts task B processing. At time S304, the processing in the calculation unit 111 actually ends, and the HW accelerator 104 notifies the CPU 101 of an end notification. The CPU 101 refers to the task management table 103 and starts executing a task switch for switching to the task A having a higher priority than the task B.

  Time S305 is the prediction end timing set by the prediction end timing notification unit 109. The prediction end timing notification unit 109 refers to the content of the flag in the status register 112, and since the flag content is “1”, the prediction end timing notification unit 109 notifies the CPU 101 of the prediction end timing as the prediction end timing. Do not send notifications. At time S306, the CPU 101 starts the execution of task A again.

  For comparison with the present embodiment, the operation content of the CPU 501 in the data processing apparatus 500 of FIG. 7 will be described. FIG. 6C is a diagram illustrating a period during which the CPU 501 of the data processing device 500 in the comparative example executes a task or a task switch. FIG. 6B is described here as a diagram illustrating a period during which the HW accelerator 504 of the data processing apparatus 500 in the comparative example performs data processing.

  Since the data processing device 500 in the comparative example does not include the prediction end timing notification unit, the prediction end notification is not notified from the HW accelerator 504 to the CPU 501. Therefore, the operation content from the time S301 to the time S306 in the CPU 501 in FIG. 6C is the same as the operation content from the time S301 to the time S306 in the CPU 101 in FIG.

  That is, when the timing at which the data processing in the calculation unit 111 ends is earlier than the prediction end timing, the time point S306 when the execution of the task A is started again by the CPU 101 in this embodiment is the task A in the CPU 501 in the comparative example. It becomes the same time as time S306 when the execution of is started again.

  As described above, the data processing apparatus 100 executes the CPU 101 as a task execution control unit that sequentially executes a plurality of tasks according to the priority order of the tasks, and the data processing instructed by the CPU 101 as described in the present embodiment. A HW accelerator 104 as a data processing execution unit, and the HW accelerator 104 measures a measured processing time from the start of data processing in the HW accelerator 104 to the end thereof, An actual measurement processing time storage unit 107 that stores the number of clock cycles as the actual measurement processing time, and a prediction process for data processing to be executed by the HW accelerator 104 based on the number of clock cycles stored in the actual measurement processing time storage unit 107 Prediction process to calculate the number of clock cycles as time The CPU 101 includes an interval calculation unit 108 and a prediction end timing notification unit 109 that notifies the CPU 101 of a prediction end notification as a prediction end timing at a data processing end time S204 predicted based on the prediction processing time. A task execution order setting unit that receives the notification of the prediction end timing and sets the task execution order.

  According to this configuration, even when the data processing in the HW accelerator 104 is not guaranteed to end in a certain time, the end point of the data processing is predicted based on the prediction processing time. As a result, even if the data processing in the HW accelerator 104 is not guaranteed to end in a certain time, the data processing in the HW accelerator 104 is actually terminated from the HW accelerator 104 to the CPU 101. On the other hand, the opportunity to notify the prediction end timing can be increased.

  In addition, since the CPU 101 can resume the execution of the task for which the HW accelerator 104 has requested the data processing immediately after the data processing is actually completed in the HW accelerator 104, the time until the task execution is resumed can be shortened. . Therefore, the processing efficiency in the CPU 101 can be increased.

  Further, the predicted processing time calculation unit 108 calculates the predicted processing time by statistically processing the actual processing time stored in the actual processing time storage unit 107.

  According to this configuration, by using the statistical processing, it is possible to analyze the distribution tendency in the group of the actual measurement processing time stored in the actual measurement processing time storage unit 107. For this reason, it is possible to predict the time point at which the data processing ends based on the predicted end time reflecting the distribution trend.

  In the present embodiment, the method of calculating the moving average value is used. However, the statistical calculation may be, for example, a calculation for obtaining the most frequent value and its derivation. In addition to arithmetic calculation, data processing using measured values may be performed. As a data processing method, for example, pattern matching using a plurality of measurement values may be performed. In addition, a plurality of processing methods may be appropriately switched and used, or parameters may be set from the outside.

  Further, the prediction end timing notification unit 109 notifies the prediction end timing obtained by correcting the prediction processing time.

  According to this configuration, even if the data processing in the calculation unit 111 of the HW accelerator 104 is not guaranteed to end in a fixed time by correcting the prediction processing time, the data in the calculation unit 111 is corrected. The opportunity to notify the CPU 101 of the prediction end timing from the HW accelerator 104 can be further increased before the processing actually ends.

(Second Embodiment)
In the second embodiment, a method for calculating a predicted processing time of data processing to be executed from now on based on one actual measurement processing time for which data processing was performed immediately before will be described.

  The data processing apparatus in the second embodiment has the same configuration as the data processing apparatus 100 described with reference to FIG.

  Let P (n) be the predicted value when the calculation unit 111 of the HW accelerator 104 as the data processing execution unit is about to start the n-th processing, and R (n) the actual measurement value required for the n-th processing. And

The predicted value P (n + 1) at the start of the (n + 1) -th process is defined as the following equation.
P (n + 1) = P (n) + (R (n) −P (n)) × F (Formula 1)
Here, F is an arbitrary coefficient that satisfies F> 0. When n = 0,
R (0) = 0, P (0) = initial value (0 or more).

  As is clear from Equation 1, the value obtained by bringing the predicted value at the start of the previous process closer to the previous actual measured value is used as the next predicted value, and the degree of approach is adjusted by the coefficient F. For example, when F = 1, the previous actual measurement value is directly used as the next prediction value.

  8A and 8B are tables showing an example of the number of clock cycles as an actual measurement value in the calculation unit 111 and the number of clock cycles as a prediction value calculated by the prediction processing time calculation unit 108. FIG. FIG. 8A shows a table of the predicted value P (n + 1) when the coefficient F is 1, and FIG. 8B shows the predicted value P (n + 1) when the coefficient F is 0.8. A table is shown.

  The difference column in FIGS. 8A and 8B shows a value obtained by subtracting the predicted value P (n) from the actually measured value R (n) at the nth time. As described in the first embodiment, a value with a positive difference indicates that the prediction processing time that is a prediction value is shorter than the actual measurement processing time that is an actual measurement value. In this case, before the calculation in the calculation unit 111 actually ends, a prediction end notification is notified from the prediction end timing notification unit 109 to the CPU 101, and when the calculation in the calculation unit 111 actually ends. The status signal generation unit 110 updates the contents of the status register 112 to “1”. The CPU 101 refers to the status register 112 and confirms that the content is “1”, thereby recognizing that the processing in the HW accelerator 104 has been completed.

  On the other hand, a negative value of the difference indicates that the prediction processing time that is the prediction value is longer than the actual measurement processing time that is the actual measurement value. In this case, an end notification is notified from the HW accelerator 104 to the CPU 101, and the prediction end timing notification unit 109 does not notify the prediction end notification.

  The circles shown in the upper part of the tables in FIGS. 8A and 8B indicate that the difference in the same number of times is a positive value when the table in FIG. 8A and the table in FIG. 8B are compared. In addition, it indicates that the difference in the same number is smaller. In the table of FIG. 8 (a), the number of times indicated with a circle is 3 times (4th time, 9th time, 15th time), and 7 times (3rd time, 6th time) in the table of FIG. 8 (b). 8th, 12th, 14th, 17th, 19th).

  This is because when the coefficient F in FIG. 8B is 0.8, the number of times that the predicted value is closer to the actually measured value is smaller than when the coefficient F in FIG. 8A is 1.0. It means a lot.

  In this way, by changing the value of the coefficient F and correcting, it is possible to increase the case where the predicted value is close to the actual measurement value. In this way, the prediction end timing is notified earlier than the end point of the data processing in the calculation unit 111 to reduce the time required to resume execution of the task A, and the data processing being executed in the calculation unit 111 is reduced. It is possible to lengthen the time during which processing of task B having a lower priority than task A is included (period from time S203 to time S204 in FIG. 5). Therefore, the processing efficiency in the CPU 101 can be improved.

  DESCRIPTION OF SYMBOLS 100 ... Data processing apparatus, 101 ... CPU, 103 ... Task management table, 104 ... HW accelerator, 106 ... Processing time measurement part, 107 ... Actual measurement processing time memory | storage part, 108 ... Prediction processing time calculation part, 109 ... Prediction end timing Notification section.

Claims (3)

A task execution control unit that sequentially executes a plurality of tasks in accordance with the priority order of the tasks;
A data processing execution unit that executes data processing instructed by the task execution control unit,
The data processing execution unit is a processing time measurement unit that measures an actual measurement processing time from the start of data processing in the data processing execution unit to the end thereof;
An actual measurement processing time storage unit for storing the actual measurement processing time;
A predicted processing time calculation unit that calculates a predicted processing time of data processing to be executed by the data processing execution unit based on the actual measurement processing time stored in the actual measurement processing time storage unit;
A prediction end timing notifying unit that notifies the task execution control unit of a prediction end timing at the end of data processing predicted based on the prediction processing time,
The task execution control unit includes a task execution order setting unit that receives a notification of the prediction end timing and sets an execution order of tasks. The data processing apparatus according to claim 1,
The data processing device, wherein the prediction processing time calculation unit calculates the prediction processing time by statistically processing the actual measurement processing time stored in the actual measurement processing time storage unit. The data processing apparatus according to claim 1 or 2, wherein
The prediction end timing notification unit notifies the prediction end timing obtained by correcting the prediction processing time.

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