JP2011107866A - Apparatus and method for sequence control of connected equipment simulator, and program therefor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To achieve PLC side sequence control which is indispensable for interlocking with an interface for operating the pseudo memory of a PLC, and also a programmable display unit for debugging of the programmable display unit. <P>SOLUTION: A simulator 21 simulates control to be executed by a programmable display unit 1 to connection equipment through a memory 24 which simulates a device memory designated in control. A sequence file 27 stores sequence block data describing an operation sequence to a pseudo memory and sequence operation timing data designating a chance to execute the operation sequence. A sequence execution control function in the simulator 21 controls timing by sequentially reading sequence operation timing data from a sequence file, and executes an operation to the pseudo memory by sequentially reading the sequence block data from the sequence file. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a technique for simulating a connected device of a programmable display connected to a programmable display.

  A conventional connected device simulator device for a programmable display (hereinafter referred to as a simulator device) is a connected device memory (hereinafter referred to as a pseudo memory) constructed in a pseudo manner in response to a memory read / write request from the programmable display. The connected device is simulated by reading / rewriting the data. At this time, the simulator device displays a list of addresses (or variables) and their values in the simulated memory being simulated, and displays the addresses of the pseudo memory arbitrarily designated by the user through a GUI (graphical user interface). It has a function to read / write data. Further, the simulator device has a function of incrementing / decrementing the address value of the pseudo memory arbitrarily designated by the user in the unit / range / time arbitrarily designated.

  For example, Patent Documents 1 and 2 below disclose a method of simulating the operation in a programmable logic controller (hereinafter referred to as PLC). These conventional techniques improve PLC debugging efficiency by simulating a PLC sequence.

  Patent Document 3 below discloses a general-purpose interface between a programmable display and a simulator device, and a method for controlling a pseudo memory in the simulator device. This prior art makes it possible to confirm the operation of the programmable display even if an actual connection device is not connected by simulating the interface part to the programmable display.

JP-A-4-215105 JP-A-5-297915 Japanese Patent No. 3562833

  However, the prior arts described in Patent Documents 1 and 2 have a problem that the purpose is to improve the debugging efficiency of the PLC, and it cannot be used as a simulator device for a programmable display device.

  In the prior art of Patent Document 3, in order to realize the control sequence of the connected device that is originally intended to be simulated, the user manually updates the contents of the pseudo memory on the simulator device in consideration of the actual control sequence. Had to do. For this reason, there has been a problem that it takes a lot of setting man-hours.

  Therefore, an object of the present invention is to realize not only an interface for operating a PLC pseudo memory but also PLC sequence control necessary for interlocking with a programmable display for debugging a programmable display. There is.

  In one example, a simulator device that simulates control executed by a programmable display or an emulator device of the programmable display to a connected device connected thereto via a pseudo memory that simulates a device memory specified at the time of the control And has the following configuration.

  The sequence information storage unit stores sequence block data describing an operation sequence for the pseudo memory and sequence operation timing data for designating a trigger for executing the operation sequence.

  The sequence execution control unit executes an operation on the pseudo memory by sequentially reading the sequence block data from the sequence information storage unit while controlling the timing by sequentially reading the sequence operation timing data from the sequence information storage unit.

  According to the present invention, the screen data creator can describe a simulation sequence of a connected device such as a PLC by a sequence description method of a simulator unit for the connected device without depending on a sequence description method for each connected device. It is possible to reduce the man-hours for building a test sequence.

  In addition, according to the present invention, by adding a sequence control function of the simulator for the connected device, the developer of the screen data of the programmable display device does not need to wait for the connection device to check the operation. The effect that man-hours can be reduced is obtained.

It is a whole block diagram of this embodiment. It is a figure which shows the hardware structural example of a programmable display. It is a functional block diagram of this embodiment. It is an operation | movement flowchart which shows the control operation of a simulator part. It is a figure which shows the structural example of sequence data. It is a figure which shows the example of the command which can be described as a sequence block. It is a mode transition table which shows the mode transition in a sequence process. It is a figure which shows the example of a screen of a sequence editor.

Hereinafter, embodiments for carrying out the present invention will be described in detail with reference to the drawings.
FIG. 1 is an overall configuration diagram of the present embodiment.
As shown in FIG. 1, the programmable display 1 corresponds to a programmable logic controller (hereinafter referred to as “PLC”), a connection device 2 that is a temperature controller, and a drawing editor device 5 that is a simulator device. They are connected via the communication interface 2 and the communication line 3. The drawing editor device 5 is configured by a personal computer or the like.

  The connection device 4 such as a PLC or a temperature controller is generally realized by a memory for designating general-purpose work areas, control information, and the like using device names and addresses, and a function for controlling them. . The programmable display 1 issues the command according to the specific protocol from the communication interface 2 to the connection device 4 through the communication line 3 by designating the above device name and address, etc. It is possible to control and display the status of the connected device 4.

FIG. 2 is a diagram illustrating a hardware configuration example of the programmable display device 1 illustrated in FIG. 1. First, the programmable display device 1 includes a display 7 that is a display body and a touch panel 6 that performs various operations on the display body. In addition, the programmable display device 1 executes various control programs described below by executing a control program stored in the ROM 12 connected via the bus while using the RAM 13 similarly connected via the bus as a work area. A CPU 8 for realizing the control operation is provided. Further, a touch panel controller 9 for controlling the touch panel 6, a graphic controller 11 for controlling the display 7, and a communication controller 10 for controlling the communication interface 2 connected to the communication line 3 in FIG. Prepare.

  FIG. 3 is a functional block diagram of the present embodiment. The display function by the programmable display 1 and the control function for the connection device 4 are a main body program execution unit 14 for executing a program related to basic functions such as display control, and communication control corresponding to each unique protocol for each connection device 4. The communication program execution unit 16 that executes

  For example, in FIG. 2, the main body program execution unit 14 and the communication program execution unit 16 are functions in which the CPU 8 executes a main body program corresponding to the main body program execution unit 14 stored in the ROM 12 and a communication program corresponding to the communication program execution unit 16. As realized.

  These programs are transferred from the drawing editor unit 19 in the personal computer (hereinafter referred to as “PC”) 17 to the programmable display 1 via the communication processing unit 18 and the communication line 3, for example, the ROM 12 (FIG. Non-volatile memory). In particular, a communication program specific to each connected device 4 is read by the drawing editor unit 19 from a communication program file 23 stored in a hard disk storage device (not shown) in the PC 17 and the communication line 3 is transmitted from the communication processing unit 18. And stored in the ROM 12 or the like in the programmable display 1.

  Moreover, the main body program execution unit 14 of the programmable display 1 performs operations of the programmable display 1 such as what display operation is performed, what control is performed, what kind of connection is performed, and what kind of connection is performed. The screen data 15 to be defined is created by using the drawing editor unit 19 on the PC 17 and downloaded to the programmable display device 1. The screen data 15 can be stored in the PC 17 as a screen data file 22.

  Here, for example, in creating the screen data 15 in the drawing editor unit 19 on the PC 17, a parts list including symbol images of each part such as a switch for receiving a user operation and a numerical display for displaying data is displayed on the PC 17. In particular, it is displayed on a display (not shown). The user selects a desired part from the parts list, and the drawing editor unit 19 moves the part to an arbitrary position on the screen of the programmable display 1 displayed on the display (not shown) on the PC 17, and the part. Is associated with the memory to be controlled such as the device name and address of the connection device 4 connected to the programmable display 1. As a result, the drawing editor unit 19 creates the screen data 15 related to the component, saves the screen data 15 as the screen data file 22 and transfers it to the programmable display 1. In the programmable display 1, the main body program 14 reads the screen data 15, whereby a control program corresponding to the part selected by the user is selected and activated. Then, the control program automatically displays the memory information to be controlled corresponding to the address of the designated device name on the display 7 (FIG. 2). In this way, by selecting a plurality of parts to be configured as control targets and placing them on the screen displayed by the drawing editor unit 19, the information of the connected device 4 can be easily controlled / displayed.

The communication program execution unit 16 mounted on the programmable display 1 has a general-purpose configuration that operates by being replaced with a unique communication program according to the connection device 4 set in the drawing editor unit 19 on the PC 17. It is practical to keep it. In this case, the interface between the main body program execution unit 14 and the communication program execution unit 16 is ideally a general-purpose common interface that does not depend on the communication protocol unique to the connected device 4.

  In FIG. 1, the cooperative operation between the programmable display 1 and the connection device 4 is established by a command specified from the programmable display 1 to the connection device 4 via the communication line 3 and the communication interface 2. Then, the control of the connected device 4 is executed as an operation on the device memory by the command. This means that if the programmable display device 1 and the connection device 4 can cooperate with each other by a command specified via the communication line 3, the connection device 4 does not need to be an actual device. Therefore, in the present embodiment, a simulated device memory is prepared as a pseudo memory 24 in the simulator unit 21 on the PC 17 that functions as a simulator device. More specifically, the pseudo memory 24 is secured on a RAM (random access memory) (not shown) on the PC 17.

Then, when the simulation operation is executed in cooperation with the programmable display 1 and the simulator unit 21 on the PC 17, the following operation is executed.
That is, first, the communication program executed by the communication program execution unit 16 of the programmable display 1 is replaced with a communication program for communication with the simulator unit 21 on the PC 17. Thereby, the connection apparatus 4 which actually communicates with the programmable display 1 is changed to the simulator unit 21 on the PC 17. As a result, the programmable display 1 can be operated in a state where the programmable display 1 is connected to the actual device of the connection device 4.

  The simulator unit 21 provides a means for easily displaying and changing the stored contents of the pseudo memory 24 such as a GUI (Graphical User Interface) for displaying and editing the stored contents of the pseudo memory 24. When the programmable display 1 starts its operation, the pseudo memory managed by the simulator unit 21 on the PC 17 is accessed by addressing the device memory with a command. Based on the screen data file 22 to be simulated and the screen that is actually displayed on the programmable display device 1, the simulator unit 21 analyzes which storage contents on the pseudo memory 24 are accessed, and displays the screen. The contents stored in the pseudo memory 24 used in the above are displayed as a list on the display. A temporary storage area necessary for simulating the operation of the connected device 4 is secured on the temporary memory 25 managed by the simulator unit 21. The temporary memory 25 is secured on a RAM (not shown) on the PC 17.

  In this way, the operation of the screen data 15 downloaded to the programmable display 1 can be simulated on the PC 17 with the connection device 4 being pseudo-connected to the programmable display 1.

  Here, the simulator unit 21 can execute the simulation operation even when the programmable display 1 is not connected to the PC 17. In this case, the emulator unit 20 in the PC 17 emulates the operation of the programmable display 1. The simulator unit 21 performs a simulation operation on the emulator unit 20 by communicating with the emulator unit 20 instead of the programmable display device 1 via the communication processing unit 18.

In the present embodiment, as shown in FIG. 3, in the simulator unit 21, a pseudo memory 24 corresponding to the connection device 4 (FIG. 1) is constructed, and an interface between the programmable display 1 and the connection device 4 is simulated. In addition, the user can arbitrarily set an operation sequence in the pseudo connection device 4 simulated by the simulator unit 21. Thereby, the control sequence between the programmable display device 1 and the connection device 4 can be easily simulated. The operation sequence and operation timing of the pseudo connection device 4 simulated by the simulator unit 21 are set by a sequence file 27 shown in FIG. The sequence file 27 can be edited / saved by the sequence editor unit 26 shown in FIG. The simulator unit 21 reads the operation sequence and operation timing of the pseudo connection device 4 from the designated sequence file 27, thereby simulating the control sequence of the pseudo connection device 4 being simulated.

FIG. 4 is a detailed functional block diagram of the simulator unit 21 and the communication processing unit 18 of FIG.
First, the communication processing unit 18 in FIGS. 3 and 4 selectively communicates with the programmable display 1 or the emulator unit 20 in the PC 17 shown in FIG. In the sequence file reading process 28, sequence data is read from the sequence file 27 of FIG. In the sequence execution start process 29, execution of the sequence is started. In the sequence execution end process 30, the execution of the sequence is ended. In the sequence execution command process 31, an arbitrary sequence is executed. In the simulated cycle timer event process 35, the cycle time interval of the connected device 4 to be simulated is notified. In the elapsed time timer event process 36, it is determined whether or not the sequence is an effective trigger. In the pseudo memory access process 37, it is determined whether or not the sequence is triggered by updating the pseudo memory 24. In the sequence execution condition determination process 39, it is determined whether or not the condition is sufficient to execute the sequence. In the sequence execution process 41, the sequence is analyzed and executed.

  Next, FIG. 5 is a diagram illustrating a configuration example of sequence data read from the sequence file 27. The sequence data includes simulated cycle time, sequence operation timing data, and sequence block data.

  The sequence operation timing data is managed by the sequence operation timing data No, and can be classified into a header portion and a data portion. The sequence operation timing header includes a set number and offset information to each sequence operation timing data. The sequence operation timing data includes sequence operation timing data corresponding to the set number. The sequence operation timing data further includes a sequence operation trigger, a sequence operation condition, and a sequence block No.

  In general, the sequence operation trigger includes a cycle operation that is executed for each cycle representing one process of the connection device 4 such as a PLC, a scheduled operation that is executed when a predetermined time has elapsed, and a change in a specified memory. It is classified into a trigger operation executed according to the time and a time operation executed at a certain time.

  Sequence operation conditions are classified into unconditional conditions that allow unconditional operation, calculation conditions that determine whether or not an operation can be performed by calculating a memory value, and bit conditions that determine whether or not an operation can be performed depending on the bit state of a memory. Is done.

The sequence block No. designates which sequence block is to be executed at the operation timing of the corresponding sequence.
The sequence block data can be classified into a header part and a data part. The header part includes the set number and offset information for each sequence block. Each data part is composed of a set number of sequence blocks.

The sequence block is managed by a sequence block No. and is configured as a series of sequence control statements. Here, the grammar of the sequence control statement may be a ladder program notation, or may be a grammar of an original interpreter format, but in this embodiment, a grammar of an original interpreter format (hereinafter referred to as “macro”). Is written).

  The macro is described by a command, an argument, and the like, and can access the temporary memory 25 in FIG. 3 which is a temporary work memory area for executing a sequence. For example, when the sequence to be simulated is based on a unique function of the PLC, or is updated in conjunction with an external device connected to the PLC, the PLC memory that is simulated to simulate the PLC sequence It is not desirable to use resources. In such a case, it is recommended to use the temporary memory 25. For example, when an external device connected to the PLC performs calculation based on information from the PLC and notifies the calculation result to the PLC, the memory resource of the simulated PLC is obtained by using the temporary memory 25 for the calculation. May not be used.

Detailed operations of the simulator unit 21 and the communication processing unit 18 having the above configuration will be described below.
First, the communication processing unit 18 in FIG. 3 or FIG. 4 performs communication interface processing when the simulator unit 21 is interlocked with the programmable display 1 (FIG. 1) and when it is interlocked with the emulator unit 20 (FIG. 3). By switching, it is structured to be able to communicate with both sides. An instruction instruction from the programmable display 1 or emulator unit 20 to be communicated to the simulator unit 21 is performed by a command, for example, a memory read command or a memory write command is mounted.

[Simulator software startup processing]
At startup, the simulator unit 21 reads the simulation target screen data from the screen data file 22 (FIG. 3), and determines the device memory held by the connected device 4 to be simulated.

  Next, the simulator unit 21 sets a device memory area held by the connected device 4 to be simulated and a work area used by the sequence function, which are determined by the analysis processing of the screen data file 22 described above, as pseudo memory. 24 and the temporary memory 25 are secured on the RAM.

Further, the simulator unit 21 initializes the communication processing unit 18 to a communicable state according to the communication target specified at the time of activation.
With the above operation, the simulator unit 21 is in a state where the simulation operation can be executed.

[Sequence file reading process 28]
When the sequence file 27 (FIG. 3) is designated by the user, the simulator unit 21 executes a sequence file reading process 28. In this process, as shown in FIG. 4, the target sequence file 27 is read and it is checked whether or not it is a normal sequence file. For example, a checksum or the like may be set in the file header portion to determine whether the sequence file is normal. If the sequence file is abnormal, the user is notified of the error. In the case of a normal sequence file, the sequence data is particularly developed on a RAM (not shown), and a transition to a sequence execution waiting state is made.

[Sequence execution start processing 29]
In the sequence execution start process 29, as shown in FIG. 4, when the sequence execution start is instructed by the user, the sequence execution state is changed.

  At the same time, the simulated cycle time is read from the sequence data developed on the RAM, and the timer event that occurs at the simulated cycle time interval for performing the cycle operation is registered in the timer event management process 32 among the sequence execution triggers. .

Also, among the sequence execution triggers, a time lapse timer event for making a determination about the scheduled operation and the time operation is registered in the timer event management process 32.
These timers desirably have a monitoring interval such as 100 ms (milliseconds) that satisfies the specifications of the scheduled operation and the time operation. More specifically, the registration of the timer event in the timer event management process 32 is, for example, an operation of setting the timer event information in the timer event management area on the RAM managed by the timer event management process 32. .

  Of the sequence execution triggers, for the scheduled operation, an area for storing the monitoring time and the elapsed time is constructed on the RAM, the current time is stored at the monitoring time, and 0 is stored in the elapsed time.

In addition, regarding the time operation among the sequence execution triggers, an area for storing the monitoring time is constructed on the RAM, and the current time is stored at the monitoring time.
Furthermore, regarding the trigger operation among the sequence execution triggers, an area for storing the trigger bit state is constructed on the RAM, and the current trigger bit information is stored in the trigger bit state.

[Timer event management process 32]
The timer event management process 32 manages whether or not the various timer events, monitoring / elapsed time, or trigger bit state conditions set by the sequence execution start process 29 are satisfied, and corresponds to the case where the conditions are satisfied. Event notification to be output.

[Simulated cycle timer event processing 35]
The simulated cycle timer event process 35 is executed when a simulated cycle timer event notification 33 is generated by the timer event management process 32.

  In this process, the set number in the sequence operation timing header shown in FIG. 5 and the offset information for each set data are referred to, and the sequence operation timing data for the set number is searched from the upper to the lower.

  Then, the occurrence of a sequence execution trigger event and the sequence operation timing data No are notified to the sequence execution condition determination process 39 as a sequence execution trigger event notification 38 for each sequence operation timing data set as cycle operation settings.

[Time elapsed timer event processing 36]
The time lapse timer event process 36 is executed when a time lapse timer event is generated by the timer event management process 32.

  In this process, the set number in the sequence operation timing header shown in FIG. 5 and the offset information for each set data are referred to, and the sequence operation timing data for the set number is searched from the upper to the lower.

Next, for the sequence operation timing data that is scheduled operation,
The current elapsed time is calculated from the monitoring time and the elapsed time stored above, and it is determined whether the specified period has elapsed from the elapsed time. In addition, for sequence operation timing data that is a time operation, it is determined whether a specified time is included between the monitoring time stored in the previous RAM and the current time. After each of these determination processes, the monitoring time and elapsed time are updated for a scheduled operation, and the monitoring time is updated for a time operation.

  Then, for each sequence operation timing data determined as the sequence execution timing, the occurrence of the sequence execution event and the sequence operation timing data No are notified to the sequence execution condition determination processing 39 as the sequence execution event notification 38. The

[Pseudo memory access processing 37]
The pseudo memory access process 37 manages access to the pseudo memory 24.
In this process, a read process or a write process for the data part on the pseudo memory 24 determined by the designated device name and address is executed.

  When the writing process is performed and the sequence is in the sequence execution state, the set number in the sequence operation timing header shown in FIG. 5 and the offset information to each sequence operation timing data are referred to, and the setting data for the set number is stored. Search from top to bottom. Then, the trigger bit is referenced for each sequence operation timing data set as the trigger operation. As a result, if the corresponding trigger bit is set in the pseudo memory 24 that has performed the writing process, it is determined whether or not a trigger has occurred based on the previously stored trigger bit state and the current trigger bit state. The After the operation determination, the trigger bit state is updated.

  When a trigger occurs, the sequence execution condition determination process 39 is notified of the occurrence of a sequence execution trigger event and sequence operation timing data No.

[Sequence execution condition determination processing 39]
The sequence execution condition determination process 39 is executed when a sequence execution trigger event notification 38 is notified from the simulated cycle timer event process 35, the elapsed time timer event process 36, or the pseudo memory access process 37.

  In this process, the sequence operation condition shown in FIG. 5 corresponding to the sequence operation timing data No notified as the sequence execution trigger event notification 38 is referred to, and it is determined whether or not each execution condition is satisfied.

If unconditional, it can be executed.
In the case of the calculation condition, the designated memory access or calculation is executed, and it is determined whether or not the calculation result satisfies the execution condition.

In the case of the bit condition, it is determined whether or not the bit state of the designated memory satisfies the execution condition.
If it is determined that the execution condition is satisfied, the sequence execution process 41 is notified of the occurrence of the sequence execution event and the sequence block No. shown in FIG. 5 corresponding to the sequence operation condition.

  If it is determined that the execution condition is not satisfied, the sequence execution trigger event notification 38 is ignored.

[Sequence execution command processing 31]
As shown in FIG. 4, the sequence execution command processing 31 is performed when the sequence execution by the sequence block No shown in FIG. 5 is instructed by the user and the set number in the sequence block header shown in FIG. 5. Reference is made to the offset information for each sequence block data. If executable sequence block data is set, the sequence execution event notification 42 is notified to the sequence execution process 41 of FIG. If the executable sequence block data is not set, an error is notified to the user.

[Sequence execution processing 41]
The sequence execution process 41 is executed when the sequence execution event notification 40 or 42 is notified.
In this process, the set number in the sequence block header of FIG. 5 and the offset information to each sequence block are referred to from the sequence block No specified by the event notification. Then, a control statement from the beginning of the sequence block data of the corresponding sequence block No to the end of the sequence block data is executed by the interpreter method.

  In the sequence execution process 41, for example, when sequence block data having the following description is executed, an operation to the pseudo memory 24 is executed via the pseudo memory access process 37.

<Example of sequence block data>
D100 = D200
D200 = D200 + 1

<Execution example>
A sequence of substituting the value of D200 on the pseudo memory 24 into D100 and incrementing the value of D200 by 1 is executed.

   An example of instructions that can be described as sequence block data is shown in FIG.

[Sequence execution end processing 30]
As shown in FIG. 4, the sequence execution end process 30 is executed when a sequence execution end is instructed by the user.

  In this process, a transition to the sequence execution wait state is made, and the timer event management process 32 is instructed to delete the cycle timer event and the elapsed time timer event. In addition, deletion of stored information for determining a sequence execution trigger is also instructed.

  FIG. 7 summarizes the mode transitions by executing the processes described above. In each transition mode, processing executed for each event that has occurred is shown.

FIG. 7 is a diagram showing a screen configuration example and a functional block diagram of the sequence editor unit 26 of FIG.
The simulation cycle time setting screen display unit 43 displays a screen for setting a simulation cycle time for simulating a cycle time representing one process of the connected device 4 such as a PLC.

The sequence operation timing setting screen display unit 44 displays a screen for setting the sequence operation timing.
The sequence block description screen display unit 45 displays a screen on which a user describes a sequence.

The simulated cycle time data capturing unit 46 captures simulated cycle time data input by the user in the simulated cycle time setting screen display unit 801.
The sequence operation timing data capturing unit 47 receives the sequence operation timing data input by the user via the edit screen displayed when the user clicks the “edit” button on the sequence operation timing setting screen display unit 44. take in.

The sequence block data capturing unit 48 captures the sequence block data described by the user in the sequence block description screen display unit 45.
The file storage unit 49 stores the simulated cycle time data, the sequence operation timing data, and the sequence block data in the sequence file 27 (see FIG. 2) in accordance with a storage command from the user. .

The embodiment described above produces the following effects.
That is, for example, when constructing a system for operating the programmable display 1 in conjunction with the ladder program of the connected device 4, in the conventional method, the screen data creator needs a part of the ladder program necessary for interlocking with the programmable display 1. In order to incorporate the sequence into the connection device 4, it is necessary to learn a sequence description method for each connection device 4, and a large amount of man-hours is required to construct a test sequence.

  On the other hand, according to the present embodiment, the screen data creator does not depend on the sequence description method for each connected device 4, and the PLC or the like can be used by the sequence description method of the simulator unit 21 (FIG. 3) for the connected device 4. A simulation sequence of the connected device 4 can be described, and the number of steps for constructing a test sequence can be reduced.

  Further, in the case where the acquisition of the connection device 4 is delayed from the development period, conventionally, the connection test with the connection device 4 cannot be performed until the connection device 4 is acquired. In this embodiment, the sequence control function of the simulator for the connected device 4 is added, so that the developer of the screen data 15 (FIG. 3) of the programmable display 1 waits for the connection device 4 to be checked for operation. This eliminates the need for it, and the effect of reducing the number of confirmation steps can be obtained.

DESCRIPTION OF SYMBOLS 1 Programmable display device 2 Communication interface 3 Communication line 4 Connection apparatus 5 Drawing editor device 6 Touch panel 6
7 Display 8 CPU
9 Touch Panel Controller 10 Communication Controller 11 Graphic Controller 12 ROM
13 RAM
14 Main program 15 Screen data 16 Communication program 17 PC
DESCRIPTION OF SYMBOLS 18 Communication processing part 19 Drawing editor part 20 Emulator part 21 Simulator part 22 Screen data file 23 Communication program file 24 Pseudo memory 25 Temporary memory 26 Sequence editor part 27 Sequence file 28 Sequence file reading process 29 Sequence execution start process 30 Sequence execution end process 31 Sequence execution command processing 32 Timer event management processing 33 Simulated cycle timer event notification 34 Time elapsed timer event notification 35 Simulated cycle timer event processing 36 Time elapsed timer event processing 37 Pseudo memory access processing 38 Sequence execution trigger event notification 39 Sequence execution condition determination Processing 40 Sequence execution event notification 41 Sequence execution processing 42 Sequence execution event notification 3 simulated cycle time setting screen display unit 44 sequence operation timing setting screen display unit 45 sequence block describing screen display unit 46 simulates the cycle time data capture unit 47 sequence operation timing data capture unit 48 sequence block data receiving part 49 file storage unit

Claims (5)

In the simulator device that simulates the control that the programmable display or the emulator device of the programmable display performs on the connected device connected thereto via a pseudo memory that simulates the device memory specified at the time of the control,
A sequence information storage unit that stores sequence block data that describes an operation sequence for the pseudo memory, and sequence operation timing data that specifies a trigger for executing the operation sequence;
A sequence execution control unit for performing operations on the pseudo memory by sequentially reading the sequence block data from the sequence information storage unit while controlling timing by sequentially reading the sequence operation timing data from the sequence information storage unit; ,
A sequence control device for a connected device simulator, comprising: A sequence execution command processing unit that arbitrarily executes the sequence block data stored in the sequence information storage unit based on a user's designation;
The sequence control apparatus for a connected device simulator according to claim 1. A sequence editor for editing the sequence block data and the sequence operation timing data;
The sequence control apparatus for a connected device simulator according to claim 1. In a simulation method of simulating control executed by a programmable display or an emulator device of a programmable display to a connected device connected thereto via a pseudo memory that simulates a device memory specified at the time of control,
Storing sequence block data describing an operation sequence for the pseudo memory and sequence operation timing data for specifying a trigger for executing the operation sequence in a sequence information storage unit;
Performing operations on the pseudo memory by sequentially reading the sequence block data from the sequence information storage unit while controlling the timing by sequentially reading the sequence operation timing data from the sequence information storage unit;
A sequence control method for a connected device simulator. Control that the programmable display or the emulator device of the programmable display executes with respect to the connected device connected thereto is simulated in a simulator device that simulates a device memory that is specified at the time of control,
Storing sequence block data describing an operation sequence for the pseudo memory and sequence operation timing data for specifying a trigger for executing the operation sequence in a sequence information storage unit;
Performing operations on the pseudo memory by sequentially reading the sequence block data from the sequence information storage unit while controlling the timing by sequentially reading the sequence operation timing data from the sequence information storage unit;
A program for executing functions.