JP2011107216A - Electrophoretic display device and method for driving the same, as well as electronic apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To perform high-quality display and to suppress power consumption in an electrophoretic display device. <P>SOLUTION: The electrophoretic display device includes a control means (10) which controls: (i) image signal supply means (240, 70) in such a way that an image signal potential of an image signal supplied to a latch circuit (25) arranged in a major gray scale pixel which is a pixel of pixels being larger in number out of pixels displaying a first gray scale with respect to a first image and pixels displaying a second gray scale with respect thereto and that of an image signal supplied to a latch circuit arranged in a major gray scale pixel with respect to a second image are different from each other; and (ii) a control potential supply means (230) in such a way that a first gray scale potential is supplied to a pixel electrode (21) arranged in a pixel for displaying the first gray scale and a second gray scale potential is supplied to a pixel electrode arranged in a pixel for displaying the second gray scale, in rewriting the first image displayed on a display section (3) to the second image. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to an electrophoretic display device, a driving method thereof, and a technical field of electronic equipment.

  This type of electrophoretic display device has a display unit that performs display as follows using a plurality of pixels. In each pixel, an image signal based on the image data is written to the memory circuit via the pixel switching element, and then the pixel electrode is driven by a potential corresponding to the written image signal, and a potential difference is generated between the pixel electrode and the common electrode. Thus, display is performed by moving the electrophoretic particles contained in the electrophoretic element between the pixel electrode and the common electrode to the pixel electrode side or the common electrode side. Known configurations of the memory circuit include a configuration including a capacitor and a configuration including a latch circuit including two complementary metal oxide semiconductor (CMOS) inverter circuits (see, for example, Patent Document 1).

JP 2008-268853 A

  When the memory circuit includes the latch circuit as described above, the gate of the P-channel transistor or the N-channel transistor constituting the latch circuit is constant during the period in which the latch circuit holds the image signal. The voltage continues to be applied. For this reason, the characteristics of the transistor may be deteriorated by BT (Bias Temperature) stress. Specifically, in a P-channel transistor that forms a latch circuit, threshold voltage is enhanced and the on-current may be reduced. For this reason, there is a technical problem that it may be difficult to hold the image signal by the latch circuit. In addition, in the N-channel transistor constituting the latch circuit, the threshold voltage is depleted, and the off-leak current may increase. For this reason, there is a technical problem that the power consumption of the latch circuit may increase.

  The present invention has been made in view of the above-described problems, for example, an electrophoretic display device capable of performing high-quality display and suppressing power consumption, a driving method thereof, and such It is an object to provide an electronic device including an electrophoretic display device.

  In order to solve the above-described problems, an electrophoretic display device of the present invention is an electrophoretic display device including a display unit composed of a plurality of pixels each having an electrophoretic element provided between a pixel electrode and a common electrode facing each other. A latch circuit provided for each of the pixels, to which an image signal having one of the first image signal potential and the second image signal potential is supplied, and an image signal supplied to the latch circuit. And a switch circuit that selectively selects one of the first and second control lines and electrically connects the one control line to the image electrode. And the latch circuit provided in the pixel to display the first gradation based on the image data having the first gradation and the second gradation different from the first gradation, and the second Before being provided in the pixel to display the gradation Image signal supply means for supplying the image signal to the latch circuit of each of the plurality of pixels, so that the image signals having different image signal potentials are supplied to the latch circuit; One of the first gradation potential and the second gradation potential corresponding to the second gradation is supplied as the first control potential to the first control line, and the first and second gradation potentials are supplied. Control potential supply means for supplying the second control potential as the second control potential to the second control line, which is different from the one of the grayscale potentials, and a first image displayed on the display unit. When rewriting to the second image, (i) a large number of pixels having the larger number of pixels among the pixels displaying the first gradation and the pixels displaying the second gradation of the first image Supplied to the latch circuit provided in the gradation pixel The image signal supply means is controlled so that the image signal potentials of the image signal and the image signal supplied to the latch circuit provided in the multi-gradation pixel for the second image are different from each other; ii) The first gradation potential is supplied to the pixel electrode provided in the pixel for displaying the first gradation among the plurality of pixels, and the second gradation is displayed among the plurality of pixels. Control means for controlling the control potential supply means so that the second gradation potential is supplied to the pixel electrode provided in the pixel to be provided.

  According to the electrophoretic display device of the present invention, during the operation, a voltage based on the potential difference between the pixel electrode and the common electrode in each of the plurality of pixels included in the display unit is applied to the electrophoretic element. Thereby, the image is displayed on the display unit by moving the electrophoretic particles contained in the electrophoretic element between the pixel electrode and the common electrode.

  Each pixel is provided with a pixel circuit for supplying a potential corresponding to the image data to the pixel electrode. The pixel circuit includes a latch circuit and a switch circuit.

  The latch circuit is composed of two CMOS inverter circuits, for example, and is configured to be able to hold the image signal supplied by the image signal supply means. The latch circuit functions as a memory circuit that temporarily stores the gradation to be displayed by the pixel provided with the latch circuit.

  According to the image signal supplied to the latch circuit (that is, according to whether the image signal supplied to the latch circuit has the image signal potential of the first image signal potential or the second image signal potential). One of the first control line and the second control line is electrically connected to the image electrode. For example, when the image signal having the first image signal potential is supplied to the latch circuit, the switch circuit electrically connects the first control line to the pixel electrode and has the second image signal potential in the latch circuit. When the image signal is supplied, the second control line is electrically connected to the pixel electrode.

  In the present invention, in particular, the control means updates the first image displayed on the display unit to the second image (that is, updates the image displayed on the display unit from the first image to the second image). The image signal supplied to the latch circuit provided in the multi-gradation pixel for the first image and the image signal supplied to the latch circuit provided in the multi-gradation pixel for the second image. The image signal supply means is controlled so that the image signal potentials are different from each other. Here, the “multi-gradation pixel” according to the present invention means a pixel having a larger number of pixels among a pixel displaying the first gradation and a pixel displaying the second gradation in one image. For example, when there are more pixels displaying the first gradation than pixels displaying the second gradation in one image, the pixels displaying the first gradation are many gradation pixels. When there are more pixels that display the second gradation in the image than pixels that display the first gradation, the pixels that display the second gradation are many gradation pixels. In the case where the image displayed on the display unit is a two-gradation image composed of the first and second gradations, the number of pixels of the multi-gradation pixels is half the number of pixels of the plurality of pixels constituting the display unit (that is, , 50%) or more.

  That is, when an image signal having the first image signal potential is supplied to the latch circuit provided in the multi-gradation pixel for the first image, the control means is provided in the multi-gradation pixel for the second image. The image signal having the second image signal potential is supplied to the latch circuit provided in the multi-gradation pixel for the first image so that the image signal having the second image signal potential is supplied to the latch circuit. In such a case, the image signal supply means is controlled so that the first image signal potential is supplied to the latch circuit provided in the multi-gradation pixels for the second image.

  Therefore, when the first image displayed on the display unit is rewritten to the second image, the image signal supplied before and after the image rewriting out of the plurality of latch circuits respectively provided for each of the plurality of pixels. The number of latch circuits having the same image signal potential can be reduced. Therefore, it is possible to suppress a constant voltage from being continuously applied to the gates of the transistors constituting the latch circuit, and to suppress the deterioration of the characteristics of the transistors constituting the latch circuit. Specifically, a decrease in on-current due to the enhancement of the threshold voltage in the P-channel transistor constituting the latch circuit can be suppressed. Furthermore, an increase in off-leakage current due to depletion of the threshold voltage in the N-channel transistor constituting the latch circuit can be suppressed. As a result, high-quality display can be performed and power consumption of the electrophoretic display device can be suppressed.

  Furthermore, the control means should display the second gradation among the plurality of pixels while supplying the first gradation potential to the pixel electrode provided in the pixel that should display the first gradation among the plurality of pixels. The control potential supply means is controlled so that the second gradation potential is supplied to the pixel electrode provided in the pixel. Therefore, an image based on the image data can be reliably displayed on the display unit.

  As described above, according to the electrophoretic display device of the present invention, high-quality display can be performed and power consumption can be suppressed.

  In one aspect of the electrophoretic display device of the present invention, the first and second control lines are provided for each of a plurality of divided display units obtained by dividing the display unit, and the switch circuit includes the plurality of divided displays. One of the first and second control lines provided in the divided display unit including the switch circuit is electrically connected to the pixel electrode, and the control means includes the plurality of divided display units. For each of the image signals supplied to the latch circuits provided in the multi-gradation pixels for the first image and to the latch circuits provided to the multi-gradation pixels for the second image. The image signal supply means is controlled so that the image signal potentials of the image signals to be different are different from each other.

  According to this aspect, when the first image displayed on the display unit is rewritten to the second image, the image is supplied before and after the image rewriting among the plurality of latch circuits provided for each of the plurality of pixels. Thus, the number of latch circuits having the same image signal potential of the image signals to be processed can be more reliably reduced. Therefore, it is possible to perform display with higher quality and further reduce power consumption.

  In order to solve the above problems, an electrophoretic display device driving method according to the present invention is provided with a display unit including a plurality of pixels each provided with an electrophoretic element between a pixel electrode and a common electrode facing each other. A display device, provided for each of the pixels, to which an image signal having one of the first image signal potential and the second image signal potential is supplied, and to the latch circuit A switch circuit that selectively selects one of the first and second control lines in accordance with the received image signal and electrically connects the one control line to the image electrode, respectively. A plurality of pixel circuits including the latch circuit provided in a pixel to display the first gradation based on image data having a first gradation and a second gradation different from the first gradation; And the pixel for displaying the second gradation Image signal supply means for supplying the image signal to the latch circuit of each of the plurality of pixels, so that the image signals having mutually different image signal potentials are supplied to the provided latch circuit; One gradation potential of the first gradation potential corresponding to one gradation and the second gradation potential corresponding to the second gradation is supplied to the first control line as a first control potential, and the first Driving an electrophoretic display device comprising control potential supply means for supplying the second control potential as the second control potential to the second control potential, which is different from the one of the first and second gradation potentials. A method for driving an electrophoretic display device, wherein when a first image displayed on the display unit is rewritten to a second image, (i) a pixel that displays the first gradation of the first image And a pixel for displaying the second gradation The image signal supplied to the latch circuit provided in the multi-gradation pixel, which is the pixel with the larger number of pixels, and the latch circuit provided in the multi-gradation pixel for the second image. Controlling the image signal supply means so that the image signal potential differs from that of the image signal, and (ii) the pixel electrode provided in the pixel that should display the first gradation among the plurality of pixels The first gradation potential is supplied to the pixel electrode, and the second gradation potential is supplied to the pixel electrode provided in the pixel that should display the second gradation among the plurality of pixels. A control step of controlling the control potential supply means.

  According to the driving method of the electrophoretic display device according to the present invention, high-quality display can be performed and power consumption can be suppressed as in the above-described electrophoretic display device of the present invention.

  Various aspects similar to the various aspects related to the electrophoretic display device of the present invention described above can be applied as appropriate to the driving method of the electrophoretic display device according to the present invention.

  In order to solve the above problems, an electronic apparatus according to the present invention includes the above-described electrophoretic display device according to the present invention (including various aspects thereof).

  According to the electronic apparatus of the present invention, since the above-described electrophoretic display device of the present invention is provided, high-quality display can be performed with low power consumption, for example, a wristwatch, electronic paper, an electronic notebook, Various electronic devices such as mobile phones and portable audio devices can be realized.

  The effect | action and other gain of this invention are clarified from the form for implementing invention demonstrated below.

1 is a block diagram illustrating an overall configuration of an electrophoretic display device according to a first embodiment. FIG. 3 is an equivalent circuit diagram illustrating an electrical configuration of a pixel of the electrophoretic display device according to the first embodiment. It is a fragmentary sectional view of the display part of the electrophoretic display device concerning a 1st embodiment. It is a top view which shows an example of the image before rewriting, and the image after rewriting. It is a conceptual diagram for demonstrating the drive method of the electrophoretic display device which concerns on 1st Embodiment. 3 is a flowchart illustrating a driving method of the electrophoretic display device according to the first embodiment. It is a conceptual diagram for demonstrating the drive method of the electrophoretic display apparatus which concerns on a comparative example. It is a block diagram which shows the structure of the electrophoretic display device which concerns on 2nd Embodiment. It is a top view which shows the other example of the image before rewriting, and the image after rewriting. It is a conceptual diagram for demonstrating the drive method of the electrophoretic display device which concerns on 2nd Embodiment. It is a perspective view which shows the structure of the electronic paper which is an example of the electronic device to which the electrophoretic display apparatus is applied. It is a perspective view which shows the structure of the electronic notebook which is an example of the electronic device to which an electrophoretic display apparatus is applied.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following embodiments, an active matrix driving type electrophoretic display device, which is an example of the electrophoretic display device of the present invention, is taken as an example.

<First Embodiment>
The electrophoretic display device according to the first embodiment will be described with reference to FIGS.

  First, the overall configuration of the electrophoretic display device according to the present embodiment will be described with reference to FIGS. 1 and 2.

  FIG. 1 is a block diagram showing the overall configuration of the electrophoretic display device according to this embodiment.

  1, the electrophoretic display device 1 according to the present embodiment includes a display unit 3, a controller 10, a scanning line driving circuit 60, a data line driving circuit 70, a power supply circuit 210, a common potential supply circuit 220, and the like. The control potential supply circuit 230 and the image signal generation circuit 240 are provided.

  In the display unit 3, m rows × n columns of pixels 20 are arranged in a matrix (in a two-dimensional plane). The display unit 3 includes m scanning lines 40 (that is, scanning lines Y1, Y2,..., Ym) and n data lines 50 (that is, data lines X1, X2,..., Xn). It is provided so as to cross each other. Specifically, the m scanning lines 40 extend in the row direction (that is, the X direction), and the n data lines 50 extend in the column direction (that is, the Y direction). The pixels 20 are arranged corresponding to the intersections of the m scanning lines 40 and the n data lines 50.

  The controller 10 is an example of the “control unit” according to the present invention, and the scanning line driving circuit 60, the data line driving circuit 70, the power supply circuit 210, the common potential supply circuit 220, the control potential supply circuit 230, and the image signal generation circuit 240. To control the operation. The controller 10 supplies timing signals such as a clock signal and a start pulse to each circuit, for example. The controller 10 has a memory 11. The memory 11 is a storage device such as a RAM (Random Access Memory) configured to be able to store an image signal potential of a multi-gradation pixel described later.

  Based on the timing signal supplied from the controller 10, the scanning line driving circuit 60 sequentially supplies a scanning signal in a pulse manner to each of the scanning lines Y1, Y2,.

  The data line driving circuit 70 supplies the image signals supplied from the image signal generation circuit 240 to the data lines X1, X2,..., Xn based on the timing signal supplied from the controller 10. The data line driving circuit 70 functions together with the image signal generation circuit 240 as an example of the “image signal supply means” according to the present invention.

  The image signal generation circuit 240 generates an image signal based on the image data under the control of the controller 10, and supplies the generated image signal to the data line driving circuit 70. The image signal takes a binary level of a high potential level (hereinafter referred to as “high level”, for example, 5 V) or a low potential level (hereinafter referred to as “low level”, for example, 0 V). In other words, the potential of the image signal (that is, the image signal potential) takes a high level or a low level. The high potential level (that is, high level) is an example of the “first image signal potential” according to the present invention, and the low potential level (that is, low level) is the “second image signal potential” according to the present invention. It is an example.

  The power supply circuit 210 supplies a high potential power supply potential Vdd to the high potential power supply line 91 and supplies a low potential power supply potential Vss to the low potential power supply line 92. Although not shown here, each of the high potential power supply line 91 and the low potential power supply line 92 is electrically connected to the power supply circuit 210 via an electrical switch.

  The common potential supply circuit 220 supplies the common potential Vcom to the common potential line 93. Although not shown here, the common potential line 93 is electrically connected to the common potential supply circuit 220 via an electrical switch.

  The control potential supply circuit 230 supplies the first control potential S1 to the first control line 94 and supplies the second control potential S2 to the second control line 95. The control potential supply circuit 230 supplies the high potential VH or the low potential VL as the first control potential S1 to the first control line 94 under the control of the controller 10, and the high potential VH or the low potential VL as the second control potential S2. Is supplied to the second control line 95. The high potential VH is a potential obtained by reversing the polarity of the low potential VL with respect to the reference potential. Although not shown here, each of the high potential power supply line 91, the low potential power supply line 92, the first control line 94, and the second control line 95 is connected to the control potential supply circuit 230 via an electrical switch. Electrically connected. The high potential VH is an example of the “first gradation potential” according to the present invention, and is a potential corresponding to “black”, which is an example of the “first gradation” according to the present invention (that is, the high potential VH). When VH is supplied to the pixel electrode 21, black is displayed in the pixel 20 provided with the pixel electrode 21). The low potential VL is an example of the “second gradation potential” according to the present invention, and is a potential corresponding to “white” which is an example of the “second gradation” according to the present invention (that is, the low potential VL is By being supplied to the pixel electrode 21, white is displayed in the pixel 20 provided with the pixel electrode 21).

  As will be described in detail later, particularly in the present embodiment, when the controller 10 rewrites the image displayed on the display unit 3, the image signal supplied to the multi-gradation pixels for the image before rewriting The image signal generation circuit 240 and the data line driving circuit 70 are controlled so that the image signal potentials of the rewritten image and the image signal supplied to the multi-gradation pixels are different from each other. The high potential VH is supplied to the pixel electrode 21 provided on the pixel 20 that should display black, and the low potential VL is supplied to the pixel electrode 21 provided on the pixel 20 that should display white among the plurality of pixels 20. Thus, the control signal supply circuit 230 is controlled.

  Note that various signals are inputted to and outputted from the controller 10, the scanning line driving circuit 60, the data line driving circuit 70, the power supply circuit 210, the common potential supply circuit 220, the control potential supply circuit 230, and the image signal generation circuit 240. Description of items not particularly related to the present embodiment will be omitted.

  FIG. 2 is an equivalent circuit diagram illustrating the electrical configuration of the pixel.

  In FIG. 2, the pixel 20 includes a pixel switching transistor 24, a latch circuit 25, a switch circuit 110, a pixel electrode 21, a common electrode 22, and an electrophoretic element 23. The pixel switching transistor 24, the latch circuit 25, and the switch circuit 110 constitute an example of the “pixel circuit” according to the present invention.

  The pixel switching transistor 24 is composed of, for example, an N-type transistor. The pixel switching transistor 24 has its gate electrically connected to the scanning line 40, its source electrically connected to the data line 50, and its drain electrically connected to the input terminal N 1 of the latch circuit 25. It is connected to the. The pixel switching transistor 24 is configured to pulse the image signal supplied from the data line driving circuit 70 (see FIG. 1) via the data line 50 via the scanning line 40 from the scanning line driving circuit 60 (see FIG. 1). Is output to the input terminal N1 of the latch circuit 25 at a timing corresponding to the scanning signal supplied to the latch circuit 25.

  The latch circuit 25 includes inverter circuits 25a and 25b.

  The inverter circuits 25a and 25b have a loop structure in which the other output terminal is electrically connected to the input terminals of each other. That is, the input terminal of the inverter circuit 25a and the output terminal of the inverter circuit 25b are electrically connected to each other, and the input terminal of the inverter circuit 25b and the output terminal of the inverter circuit 25a are electrically connected to each other. The input terminal of the inverter circuit 25a is configured as the input terminal N1 of the latch circuit 25, and the output terminal of the inverter circuit 25a is configured as the output terminal N2 of the latch circuit 25.

  The inverter circuit 25a is a CMOS inverter circuit having an N-type transistor 25a1 and a P-type transistor 25a2. The gates of the N-type transistor 25 a 1 and the P-type transistor 25 a 2 are electrically connected to the input terminal N 1 of the latch circuit 25. The source of the N-type transistor 25a1 is electrically connected to a low potential power supply line 92 to which a low potential power supply potential Vss is supplied. The source of the P-type transistor 25a2 is electrically connected to a high potential power supply line 91 to which a high potential power supply potential Vdd is supplied. The drains of the N-type transistor 25 a 1 and the P-type transistor 25 a 2 are electrically connected to the output terminal N 2 of the latch circuit 25.

  The inverter circuit 25b is a CMOS inverter circuit having an N-type transistor 25b1 and a P-type transistor 25b2. The gates of the N-type transistor 25 b 1 and the P-type transistor 25 b 2 are electrically connected to the output terminal N 2 of the latch circuit 25. The source of the N-type transistor 25b1 is electrically connected to a low potential power supply line 92 to which a low potential power supply potential Vss is supplied. The source of the P-type transistor 25b2 is electrically connected to a high potential power supply line 91 to which a high potential power supply potential Vdd is supplied. The drains of the N-type transistor 25 b 1 and the P-type transistor 25 b 2 are electrically connected to the input terminal N 1 of the latch circuit 25.

  When a high level image signal is input to the input terminal N1, the latch circuit 25 outputs a low potential power supply potential Vss from the output terminal N2, and when a low level image signal is input to the input terminal N1. The high potential power supply potential Vdd is output from the output terminal N2. That is, the latch circuit 25 outputs the low potential power supply potential Vss or the high potential power supply potential Vdd depending on whether the input image signal is at a high level or a low level. In other words, the latch circuit 25 is configured to be able to store the input image signal as the low potential power supply potential Vss or the high potential power supply potential Vdd.

  The high potential power supply line 91 and the low potential power supply line 92 are configured to be able to supply a high potential power supply potential Vdd and a low potential power supply potential Vss from the power supply circuit 210, respectively. The high potential power supply line 91 is electrically connected to the power supply circuit 210 via the switch 91s, and the low potential power supply line 92 is electrically connected to the power supply circuit 210 via the switch 92s. The switches 91 s and 92 s are configured to be switched between an on state and an off state by the controller 10. When the switch 91s is turned on, the high potential power supply line 91 and the power supply circuit 210 are electrically connected, and when the switch 91s is turned off, the high potential power supply line 91 is electrically disconnected. High impedance state. When the switch 92s is turned on, the low-potential power line 92 and the power circuit 210 are electrically connected, and when the switch 92s is turned off, the low-potential power line 92 is electrically disconnected. High impedance state.

  The switch circuit 110 includes a first transmission gate 111 and a second transmission gate 112.

  The first transmission gate 111 includes a P-type transistor 111p and an N-type transistor 111n. The sources of the P-type transistor 111p and the N-type transistor 111n are electrically connected to the first control line 94. The drains of the P-type transistor 111p and the N-type transistor 111n are electrically connected to the pixel electrode 21. The gate of the P-type transistor 111p is electrically connected to the input terminal N1 of the latch circuit 25, and the gate of the N-type transistor 111n is electrically connected to the output terminal N2 of the latch circuit 25.

  The second transmission gate 112 includes a P-type transistor 112p and an N-type transistor 112n. The sources of the P-type transistor 112p and the N-type transistor 112n are electrically connected to the second control line 95. The drains of the P-type transistor 112p and the N-type transistor 112n are electrically connected to the pixel electrode 21. The gate of the P-type transistor 112p is electrically connected to the output terminal N2 of the latch circuit 25, and the gate of the N-type transistor 112n is electrically connected to the input terminal N1 of the latch circuit 25.

  The switch circuit 110 selectively selects one of the first control line 94 and the second control line 95 in accordance with the image signal input to the latch circuit 25, and the one control line Is electrically connected to the pixel electrode 21.

  Specifically, when a high-level image signal is input to the input terminal N1 of the latch circuit 25, the low-potential power supply potential Vss is output from the latch circuit 25 to the gates of the N-type transistor 111n and the P-type transistor 112p. Since the high-potential power supply potential Vdd is output to the gates of the P-type transistor 111p and the N-type transistor 112n, only the P-type transistor 112p and the N-type transistor 112n constituting the second transmission gate 112 are turned on. The P-type transistor 111p and the N-type transistor 111n constituting one transmission gate 111 are turned off. On the other hand, when a low-level image signal is input to the input terminal N1 of the latch circuit 25, the high potential power supply potential Vdd is output from the latch circuit 25 to the gates of the N-type transistor 111n and the P-type transistor 112p, and the P-type Since the low-potential power supply potential Vss is output to the gates of the transistor 111p and the N-type transistor 112n, only the P-type transistor 111p and the N-type transistor 111n constituting the first transmission gate 111 are turned on, and the second transmission The P-type transistor 112p and the N-type transistor 112n constituting the gate 112 are turned off. That is, when a high-level image signal is input to the input terminal N1 of the latch circuit 25, only the second transmission gate 112 is turned on, while the low-level image signal is input to the input terminal N1 of the latch circuit 25. Is input, only the first transmission gate 111 is turned on.

  The first control line 94 and the second control line 95 are configured to be able to supply the first control potential S1 and the second control potential S2 from the control potential supply circuit 230, respectively. The first control line 94 is electrically connected to the control potential supply circuit 230 via the switch 94s, and the second control line 95 is electrically connected to the control potential supply circuit 230 via the switch 95s. Yes. The switches 94s and 95s are configured to be switched between an on state and an off state by the controller 10. When the switch 94s is turned on, the first control line 94 and the control potential supply circuit 230 are electrically connected, and when the switch 94s is turned off, the first control line 94 is electrically connected. The disconnected high impedance state is obtained. When the switch 95s is turned on, the second control line 95 and the control potential supply circuit 230 are electrically connected, and when the switch 95s is turned off, the second control line 95 is electrically connected. The disconnected high impedance state is obtained.

  Each pixel electrode 21 of the plurality of pixels 20 is electrically connected to a control line 94 or 95 that is alternatively selected according to an image signal by the switch circuit 110. At that time, the pixel electrode 21 of each of the plurality of pixels 20 is supplied with the first control potential S1 or the second control potential S2 from the control potential supply circuit 230 according to the on / off state of the switch 94s or 95s, or is high. Impedance state.

  More specifically, for the pixel 20 to which the low-level image signal is supplied, only the first transmission gate 111 is turned on, and the pixel electrode 21 of the pixel 20 is electrically connected to the first control line 94. The first control potential S1 is supplied from the power supply circuit 210 in accordance with the on / off state of the switch 94s, or is set to a high impedance state. On the other hand, for the pixel 20 to which the high-level image signal is supplied, only the second transmission gate 112 is turned on, and the pixel electrode 21 of the pixel 20 is electrically connected to the second control line 95, and the switch The second control potential S2 is supplied from the power supply circuit 210 according to the on / off state of 95 s, or a high impedance state is set.

  The pixel electrode 21 is disposed so as to face the common electrode 22 through the electrophoretic element 23.

  The common electrode 22 is electrically connected to a common potential line 93 to which a common potential Vcom is supplied. The common potential line 93 is configured to be able to supply the common potential Vcom from the common potential supply circuit 220. The common potential line 93 is electrically connected to the common potential supply circuit 220 via the switch 93s. The switch 93 s is configured to be switched between an on state and an off state by the controller 10. When the switch 93s is turned on, the common potential line 93 and the common potential supply circuit 220 are electrically connected, and when the switch 93s is turned off, the common potential line 93 is electrically disconnected. High impedance state.

  The electrophoretic element 23 is composed of a plurality of microcapsules each containing electrophoretic particles.

  Next, a specific configuration of the display unit of the electrophoretic display device according to the present embodiment will be described with reference to FIG.

  FIG. 3 is a partial cross-sectional view of the display unit of the electrophoretic display device according to this embodiment.

  In FIG. 3, the display unit 3 is configured such that an electrophoretic element 23 is sandwiched between an element substrate 28 and a counter substrate 29. In the present embodiment, description will be made on the assumption that an image is displayed on the counter substrate 29 side.

  The element substrate 28 is a substrate made of, for example, glass or plastic. Although not shown here on the element substrate 28, the pixel switching transistor 24, the latch circuit 25, the switch circuit 110, the scanning line 40, the data line 50, and the high potential power supply line 91 described above with reference to FIG. 2. A laminated structure in which a low potential power line 92, a common potential line 93, a first control line 94, a second control line 95, and the like are formed is formed. A plurality of pixel electrodes 21 are provided in a matrix on the upper layer side of the stacked structure.

  The counter substrate 29 is a transparent substrate made of, for example, glass or plastic. On the surface of the counter substrate 29 facing the element substrate 28, the common electrode 22 is formed in a solid shape so as to face the plurality of pixel electrodes 9a. The common electrode 22 is formed of a transparent conductive material such as magnesium silver (MgAg), indium / tin oxide (ITO), indium / zinc oxide (IZO), or the like.

  The electrophoretic element 23 is composed of a plurality of microcapsules 80 each including electrophoretic particles, and is fixed between the element substrate 28 and the counter substrate 29 by a binder 30 and an adhesive layer 31 made of, for example, resin. . In the electrophoretic display device 1 according to the present embodiment, in the manufacturing process, an electrophoretic sheet in which the electrophoretic element 23 is previously fixed to the counter substrate 29 side by the binder 30 is separately manufactured, such as the pixel electrode 21. It is bonded to the element substrate 28 side where is formed by an adhesive layer 31.

  One or a plurality of microcapsules 80 are sandwiched between the pixel electrode 21 and the common electrode 22 and arranged in one pixel 20 (in other words, with respect to one pixel electrode 21).

  The microcapsule 80 is formed by enclosing a dispersion medium and a plurality of white particles and a plurality of black particles, which are electrophoretic particles, inside a coating. The microcapsule 80 is formed in a spherical shape having a particle size of about 50 μm, for example.

  The coating functions as an outer shell of the microcapsule 80 and is formed of a translucent polymer resin such as an acrylic resin such as polymethyl methacrylate or polyethyl methacrylate, a urea resin, or gum arabic.

  The dispersion medium is a medium in which white particles and black particles are dispersed in the microcapsule 80 (in other words, in the coating). As a dispersion medium, water, alcohol solvents such as methanol, ethanol, isopropanol, butanol, octanol and methyl cellosolve, various esters such as ethyl acetate and butyl acetate, ketones such as acetone, methyl ethyl ketone and methyl isobutyl ketone, Aliphatic hydrocarbons such as pentane, hexane and octane, cycloaliphatic hydrocarbons such as cyclohexane and methylcyclohexane, benzene, toluene, xylene, hexylbenzene, hebutylbenzene, octylbenzene, nonylbenzene, decylbenzene, undecylbenzene , Aromatic hydrocarbons such as benzenes having a long-chain alkyl group such as dodecylbenzene, tridecylbenzene, tetradecylbenzene, and halogens such as methylene chloride, chloroform, carbon tetrachloride, 1,2-dichloroethane Hydrocarbons, carboxylate or other oils may be used singly or as a mixture. In addition, a surfactant may be added to the dispersion medium 81.

  The white particles are particles (polymer or colloid) made of a white pigment such as titanium dioxide, zinc white (zinc oxide), and antimony trioxide, and are negatively charged, for example.

  The black particles are particles (polymer or colloid) made of a black pigment such as aniline black or carbon black, and are positively charged, for example.

  For this reason, the white particles and the black particles can move in the dispersion medium by the electric field generated by the potential difference between the pixel electrode 21 and the common electrode 22.

  These pigments include electrolytes, surfactants, metal soaps, resins, rubbers, oils, varnishes, charge control agents composed of particles such as compounds, titanium-based coupling agents, aluminum-based coupling agents, silanes as necessary. A dispersant such as a system coupling agent, a lubricant, a stabilizer, and the like can be added.

  In FIG. 3, when a voltage is applied between the pixel electrode 21 and the common electrode 22 so that the potential of the common electrode 22 becomes relatively high, the positively charged black particles are microscopically caused by Coulomb force. While being attracted to the pixel electrode 21 side in the capsule 80, the negatively charged white particles are attracted to the common electrode 22 side in the microcapsule 80 by Coulomb force. As a result, the white particles are collected on the display surface side (that is, the common electrode 22 side) in the microcapsule 80, so that the color of the white particles (that is, white) can be displayed on the display surface of the display unit 3. . On the contrary, when a voltage is applied between the pixel electrode 21 and the common electrode 22 so that the potential of the pixel electrode 21 is relatively high, the negatively charged white particles are generated by the Coulomb force. At the same time, the positively charged black particles are attracted to the common electrode 22 side by the Coulomb force. As a result, the black particles gather on the display surface side of the microcapsule 80, whereby the color of the black particles (that is, black) can be displayed on the display surface of the display unit 3.

  That is, in this embodiment, when the high potential VH is supplied to the pixel electrode 21, black is displayed in the pixel 20 provided with the pixel electrode 21, and the low potential VL is supplied to the pixel electrode 21. White is displayed in the pixel 20 provided with the pixel electrode 21.

  Further, depending on the distribution state of the white particles and the black particles between the pixel electrode 21 and the common electrode 22, it is possible to display gray such as light gray, gray, dark gray and the like, which are intermediate tones between white and black. Further, by replacing the pigments used for the white particles and the black particles with pigments such as red, green, and blue, for example, color display such as red, green, and blue can be performed.

  The electrophoretic element 23 may be configured to include only one of positively charged particles or negatively charged particles. In this case, the color of the particle is visually recognized as the display color when the particle is moved to the observation side, and the color of the solvent is visually recognized when the particle is moved to the back side (the side opposite to the observation side). The The electrophoretic element 23 may have a configuration in which a solvent and electrophoretic particles are arranged in each region partitioned by a partition wall arranged between a pair of substrates.

  Next, a method for driving the above-described electrophoretic display device will be described with reference to FIGS.

  FIG. 4 is a plan view showing an example of an image before rewriting and an image after rewriting.

  In the following, as shown in FIG. 4, the driving method of the electrophoretic display device 1 described above will be described by taking as an example the case where the image displayed on the display unit 3 (see FIG. 1) is rewritten from the image P <b> 1 to the image P <b> 2. explain. Each of the images P1 and P2 is a two-gradation image composed of two gradations of black and white.

  The image P1 that is an image before rewriting has a white image region P1rw and a black image region P1rb, and the white image region P1rw is wider than the black image region P1rb. Therefore, when displaying the image P1 on the display unit 3, the pixel 20 of the pixel 20 that is arranged at a position corresponding to the white image region P1rw among the plurality of pixels 20 configuring the display unit 3 and displays white. The number is larger than the number of pixels 20 arranged at a position corresponding to the black image region P1rb and displaying black.

  The rewritten image P2 has a white image region P2rw and a black image region P2rb, and the white image region P2rw is wider than the black image region P2rb. Therefore, when displaying the image P2 on the display unit 3, the pixel 20 of the pixel 20 that is arranged at a position corresponding to the white image region P2rw among the plurality of pixels 20 configuring the display unit 3 and displays white. The number is larger than the number of pixels 20 arranged at a position corresponding to the black image region P2rb and displaying black.

  FIG. 5 is a conceptual diagram for explaining the driving method of the electrophoretic display device according to the present embodiment, and the image signal potential supplied to the latch circuit 25 of each pixel 20 when the image P1 before rewriting is displayed. In addition, an example of the image signal potential supplied to the latch circuit 25 of each pixel 20 when the rewritten image P2 is displayed is shown.

  In the following, as shown in FIG. 5, when displaying the image P1 before rewriting, the pixel 20 that displays white (that is, the pixel 20 arranged at a position corresponding to the white image region P1rw of the image P1). The latch circuit 25 is supplied with a high-level image signal (“Hi” in the figure), and the pixel 20 that displays black (that is, the pixel disposed at a position corresponding to the black image region P1rb of the image P1). The case where a low level (“Lo” in the figure) image signal is supplied to the latch circuit 25 of 20) will be described as an example. In this case, the pixel electrode 21 of the pixel 20 which is disposed at a position corresponding to the white image region P1rw and should display white is electrically connected to the second control line 95 by the switch circuit 110. The pixel electrode 21 of the pixel 20 that is arranged at a position corresponding to the black image region P1rb and displays black is electrically connected to the first control line 94 by the switch circuit 110. Further, a high potential VH (that is, a potential corresponding to black) is supplied from the control potential supply circuit 230 to the first control line 94 as the first control potential S1, and the second control potential S2 is supplied to the second control line 95. Is supplied with a low potential VL (that is, a potential corresponding to white). Thereby, the image P1 before rewriting is displayed.

  FIG. 6 is a flowchart showing a driving method of the electrophoretic display device according to this embodiment. FIG. 6 shows the flow of the driving method when rewriting the image displayed on the display unit 3.

  In FIG. 6, when the image displayed on the display unit 3 is rewritten, first, the image signal potential of the multi-gradation pixel of the previous image (that is, the image before rewriting) is at a high level (that is, “Hi”). Is determined by the controller 10 (step S10). That is, with respect to the image before rewriting, a high-level image is displayed in the latch circuit 25 provided in the multi-gradation pixel which is the pixel having the larger number of pixels of the pixel 20 displaying black and the pixel 20 displaying white. The controller 10 determines whether or not a signal is supplied. Specifically, the image signal potential of the multi-gradation pixel of the image before rewriting is stored in the memory 11, and the controller 10 refers to the image signal potential of the multi-gradation pixel stored in the memory 11. Then, it is determined whether or not the image signal potential of the multi-gradation pixels of the image before rewriting is at a high level. In the example shown in FIGS. 4 and 5, in the image P1 before rewriting, the number of pixels 20 that display white is larger than the number of pixels 20 that display black. A high-level image signal is supplied to a latch circuit 25 provided in a large number of gradation pixels. Therefore, in the example shown in FIGS. 4 and 5, it is determined that the image signal potential of the multi-gradation pixel of the image P1 before rewriting is at a high level.

  When it is determined that the image signal potential of the multi-gradation pixel of the previous image is at a high level (step S10: Yes), the image signal of the multi-gradation pixel of the next image (that is, the image after rewriting). The potential is set to the low level (Lo) by the controller 10 (step S20). That is, the controller 10 determines to supply a low-level image signal to the multi-gradation pixels of the rewritten image. Specifically, when the number of pixels 20 that should display black is larger than the number of pixels 20 that should display white in the image after rewriting, the controller 10 determines the multiple levels of the image after rewriting. It is determined that a low level image signal is supplied to the latch circuit 25 of the pixel 20 that should display black, which is a tone pixel, and a high level image signal is supplied to the latch circuit 25 of the pixel 20 that should display white. On the other hand, when the number of pixels 20 that should display white is larger than the number of pixels 20 that should display black in the rewritten image, white that is a multi-gradation pixel in the image after rewriting is displayed. A low level image signal is supplied to the latch circuit 25 of the pixel 20 to be displayed, and a high level image signal is supplied to the latch circuit 25 of the pixel 20 to display black. To determine the door. The image signal generation circuit 240 generates an image signal corresponding to this determination. In the example shown in FIGS. 4 and 5, the image signal potential of the multi-gradation pixel of the next image is determined to be low level (Lo).

  Thus, after the image signal potential of the multi-gradation pixel of the next image is determined to be low level (that is, after step S20), it is a memory that the image signal potential of the multi-gradation pixel is low level. 11 (step S40). Further, it is determined by the controller 10 whether or not the multiple gradations of the next image are black (step S60). That is, the controller 10 determines whether or not the number of pixels 20 that should display black is greater than the number of pixels 20 that should display white in the rewritten image. Specifically, the controller 10 compares the number of pixels that should display black with the number of pixels that should display white based on image data related to the next image. It is determined whether the majority gradation is black. In the example shown in FIGS. 4 and 5, in the rewritten image P2, the white image area P2rwy is wider than the black image area P2rb, and the pixel 20 displaying white is larger than the number of pixels 20 displaying black. Therefore, it is determined that the majority gradation is not black because the majority gradation is white (in other words, the majority gradation pixel is the pixel 20 that displays white).

  On the other hand, when it is determined that the image signal potential of the multi-gradation pixel of the previous image is not high level (that is, low level) (step S10: No), the image of the multi-gradation pixel of the next image The signal potential is determined to be a high level (Hi) by the controller 10 (step S30). That is, the controller 10 determines to supply a high-level image signal to the multi-gradation pixels of the rewritten image. Specifically, when the number of pixels 20 that should display black is larger than the number of pixels 20 that should display white in the image after rewriting, the controller 10 determines the multiple levels of the image after rewriting. It is determined that a high-level image signal is supplied to the latch circuit 25 of the pixel 20 that should display black, which is a tone pixel, and a low-level image signal is supplied to the latch circuit 25 of the pixel 20 that should display white. On the other hand, when the number of pixels 20 that should display white is larger than the number of pixels 20 that should display black in the rewritten image, white that is a multi-gradation pixel in the image after rewriting is displayed. A high level image signal is supplied to the latch circuit 25 of the pixel 20 to be displayed, and a low level image signal is supplied to the latch circuit 25 of the pixel 20 to display black. To determine the door. The image signal generation circuit 240 generates an image signal corresponding to this determination.

  Thus, after the image signal potential of the multi-gradation pixel of the next image is determined to be high level (that is, after step S30), the memory that the image signal potential of the multi-gradation pixel is high level. 11 (step S50). Further, it is determined by the controller 10 whether or not the multiple gradations of the next image are black (step S70). That is, in the rewritten image, the controller 10 determines whether or not the number of pixels 20 that should display white is larger than the number of pixels 20 that should display black. Specifically, the controller 10 compares the number of pixels that should display black with the number of pixels that should display white based on the image data related to the next image. It is determined whether the majority gradation is white.

  When it is determined in step S60 that the majority gradation of the next image is black (step S60: Yes), or when it is determined in step S70 that the majority gradation of the next image is white (step 70: In No), the controller 10 sets the first control potential S1 to the high potential VH and sets the second control potential S2 to the low potential VL (step S80). That is, when displaying the rewritten image, the controller 10 controls the control potential supply circuit 230 to control the first control potential S1 and the second control potential so that the multiple gradation pixels have a predetermined gradation. S2 is set to the high potential VH and the low potential VL, respectively.

  In this way, when the multi-gradation of the image after rewriting through steps S20 and S60 is black, the multi-gradation pixel to which the low-level image signal potential is supplied is a pixel. Since the first control potential S1 is supplied to the electrode 21, the pixel electrode 21 becomes a high potential VH and black display is performed. Further, in the minority gradation pixel to which the high-level image signal potential is supplied, the second control potential S2 is supplied to the pixel electrode 21, so that the pixel electrode 21 becomes a low potential VL and white display is performed. . As described above, the multi-gradation can be black in a state where the low-level image signal potential is supplied to the multi-gradation pixel.

  On the other hand, when the multi-gradation of the image after rewriting through steps S30 and S70 is white, in the multi-gradation pixel to which the high-level image signal potential is supplied, the pixel electrode 21 has Since the second control potential S2 is supplied, the pixel electrode 21 becomes the high potential VL and white display is performed. Further, in the minority gradation pixel to which the low-level image signal potential is supplied, the first control potential S1 is supplied to the pixel electrode 21, so that the pixel electrode 21 becomes a low potential VH and displays black. . As described above, the multiple gradations can be white in a state where the high-level image signal potential is supplied to the multiple gradation pixels. Therefore, the rewritten image can be reliably displayed on the display unit 3.

  On the other hand, when it is determined in step S60 that the majority gradation of the next image is white (step S60: No), or when it is determined in step S70 that the majority gradation of the next image is black (step S60). 70: Yes), the controller 10 sets the first control potential S1 to the low potential VL and sets the second control potential S2 to the high potential VH (step S90). That is, when displaying the rewritten image, the controller 10 controls the control potential supply circuit 230 to control the first control potential S1 and the second control potential so that the multiple gradation pixels have a predetermined gradation. S2 is set to a low potential VL and a high potential VH, respectively.

  In this way, when the multi-gradation of the image after rewriting through steps S20 and S60 is white, the multi-gradation pixel to which the low-level image signal potential is supplied is the pixel. Since the first control potential S1 is supplied to the electrode 21, the pixel electrode 21 becomes a high potential VL and white display is performed. Further, in the minority gradation pixel to which the high-level image signal potential is supplied, the second control potential S2 is supplied to the pixel electrode 21, so that the pixel electrode 21 becomes a low potential VH and black display is performed. . As described above, the multiple gradations can be white in a state where the low-level image signal potential is supplied to the multiple gradation pixels.

  On the other hand, when the multi-gradation of the image after rewriting through steps S30 and S70 is black, in the multi-gradation pixel to which the high level image signal potential is supplied, the pixel electrode 21 has Since the second control potential S2 is supplied, the pixel electrode 21 becomes the high potential VH and black display is performed. Further, in the minority gradation pixel to which the low-level image signal potential is supplied, the first control potential S1 is supplied to the pixel electrode 21, so that the pixel electrode 21 becomes a low potential VL and white display is performed. . In this way, the multi-gradation can be black in a state where the high-level image signal potential is supplied to the multi-gradation pixel. Therefore, the rewritten image can be reliably displayed on the display unit 3. In the example shown in FIGS. 4 and 5, with respect to the rewritten image P2, as described above, the majority gradation is determined to be white (step S60: No), and the first control potential S1 is set to the low potential VL. At the same time, the second control potential S2 is set to the high potential VH (step S90). In the example shown in FIGS. 4 and 5, since the image signal potential of the multi-gradation pixel of the next image is determined to be a low level as described above (step S20), white that is the multi-gradation pixel should be displayed. The pixel electrode 21 of the pixel 20 is electrically connected to the first control line 94 by the switch circuit 110. Therefore, the first control potential S1 supplied to the first control line 94 is set to the low potential VL, so that white can be reliably displayed in the pixels 20 that should display white. At this time, the pixel electrode 21 of the pixel 20 that should display black is electrically connected to the second control line 95 by the switch circuit 110. Therefore, the second control potential S2 supplied to the second control line 95 is set to the high potential VH, so that black can be reliably displayed in the pixels 20 that should display black.

  After the first control potential S1 and the second control potential S1 are set to the low potential VL or the high potential VH (after step S80 or step S90), the image signal of the next image is transferred to each pixel 20. (Step S100). That is, when the image signal potential of the multi-gradation pixel of the next image is determined to be low level by the processing according to step S20 and the multi-gradation is black (step S60: Yes), the multi-gradation pixel A low-level image signal is supplied to the pixel 20 that should display black, and a high-level image signal is supplied to the pixel 20 that should display white. In addition, when the image signal potential of the multi-gradation pixel of the next image is determined to be a low level by the processing according to step S20 and the multi-gradation is white (step S60: No), the multi-gradation pixel The low-level image signal is supplied to the pixel 20 that should display white, and the high-level image signal is supplied to the pixel 20 that should display black. In addition, when the image signal potential of the multi-gradation pixel of the next image is determined to be a high level by the processing according to step S30 and the multi-gradation is black (step S70: Yes), the multi-gradation pixel A high-level image signal is supplied to the pixel 20 that should display black, and a low-level image signal is supplied to the pixel 20 that should display white. In addition, when the image signal potential of the multi-gradation pixel of the next image is determined to be a high level by the processing according to step S30 and the multi-gradation is white (step S70: No), the multi-gradation pixel A high-level image signal is supplied to the pixel 20 that should display white, and a low-level image signal is supplied to the pixel 20 that should display black. In the example shown in FIGS. 4 and 5, a pixel 20 that should display white as a multi-gradation pixel for the image P <b> 2 (that is, a pixel that is arranged at a position corresponding to the white image region P <b> 2 rw and should display white). 20) is supplied with a low level image signal, and a high level is applied to the pixel 20 that should display black (that is, the pixel 20 that is arranged at a position corresponding to the black image region P2rb and should display black). An image signal is supplied.

  After the image signal of the next image is transferred to each pixel 20 (after step S100), display switching is performed (step S110). That is, after the image signal of the next image is transferred to each pixel 20, the first control potential S <b> 1 or the second control potential S <b> 2 is supplied to the pixel electrode 21 of each pixel 20 to be displayed on the display unit 3. The image is rewritten.

  According to the driving method of the electrophoretic display device according to this embodiment, when rewriting an image displayed on the display unit 3, a plurality of latch circuits 25 (one for each pixel 20) (see FIG. 2), the number of latch circuits 25 in which the image signal potentials of the image signals supplied before and after image rewriting are the same can be reduced. Accordingly, it is possible to suppress a constant voltage corresponding to the image signal potential from being continuously applied to the gates of the P-type transistors 25a2 and 25b2 and the N-type transistors 25a1 and 25b1 constituting the latch circuit 25, and these transistors 25a2, 25b2, It can suppress that the characteristic of 25a1 and 25b1 deteriorates. Specifically, a decrease in on-current due to the enhancement of the threshold voltage in the P-type transistors 25a2 and 25b2 can be suppressed. Furthermore, an increase in off-leakage current due to depletion of the threshold voltage in the N-type transistors 25a1 and 25b1 can be suppressed. As a result, high-quality display can be performed and power consumption of the electrophoretic display device 1 can be suppressed.

  Here, the driving method of the electrophoretic display device according to the present embodiment will be described with reference to FIG. 7 in addition to FIGS.

  As shown in FIG. 5, according to the driving method of the electrophoretic display device according to the present embodiment, when the image P1 displayed on the display unit 3 is rewritten to the image P2, the multi-gradation pixel for the image P1 is displayed. The image signal supplied to the latch circuit 25 provided in the pixel 20 that displays white (that is, the pixel 20 arranged at the position corresponding to the white image region P1rw) and the multi-level for the image P2 The image signal potential of the image signal supplied to the latch circuit 25 provided in the tone pixel (that is, the pixel 20 displaying white, that is, the pixel 20 arranged at a position corresponding to the white image region P2rw) is Image signals are supplied to the latch circuits 25 so as to be different from each other. For this reason, among the plurality of pixels 20 configuring the display unit 3, the pixel 20 disposed at a position corresponding to the white image region P2rw1 and the pixel 20 disposed at a position corresponding to the black image region P2rb2. The image signal potential of the image signal supplied to each of the latch circuits 25 is different before and after the image rewriting. Of the plurality of pixels 20 constituting the display unit 3, the pixel 20 disposed at a position corresponding to the white image region P2rw2 and the pixel 20 disposed at a position corresponding to the black image region P2rb1. The image signal potential of the image signal supplied to each latch circuit 25 is the same before and after rewriting of the image. Here, particularly in the present embodiment, the image signal potentials of the image signal supplied to the multi-gradation pixel for the image P1 and the image signal supplied to the multi-gradation pixel for the image P2 are different from each other. Since the image signal is supplied to each pixel 20, the number of pixels having different image signal potentials of the image signal supplied to the latch circuit 25 before and after rewriting of the image can be made relatively large. That is, as in the example shown in FIG. 5, the pixels 20 located in each of the white image area P2rw1 and the black image area P2rb2 in which the image signal potential of the image signal supplied to the latch circuit 25 before and after the rewriting of the image is different. The sum of the number of pixels of the pixel 20 is located in each of the white image region P2rw2 and the black image region P2rb1 in which the image signal potential of the image signal supplied to the latch circuit 25 is the same before and after rewriting of the image. More than the sum of the numbers.

  FIG. 7 shows the image signal potential supplied to the latch circuit 25 of each pixel 20 when displaying the image P1 before rewriting and the latch circuit of each pixel 20 when displaying the image P2 after rewriting in the comparative example. 25 shows an example of the image signal potential supplied to 25.

  According to the driving method according to the comparative example, a high-level image signal is always supplied to the pixel 20 that should display white, and a low-level image signal is always supplied to the pixel 20 that should display black. The first control potential S1 is set constant at the high potential VH, and the second control potential S2 is set constant at the low potential VL. As a result, the pixel electrode 21 of the pixel 20 that should display white is electrically connected to the second control line 95 by the switch circuit 110 and supplied with the low potential VL, and the pixel of the pixel 20 that should display black. The electrode 21 is electrically connected to the first control line 94 by the switch circuit 110 and supplied with a high potential VH. As a result, white is displayed in the pixel 20 that should display white, and black is displayed in the pixel 20 that should display black.

  In FIG. 7, according to such a driving method according to the comparative example, among the plurality of pixels 20 configuring the display unit 3, the pixel 20 disposed at a position corresponding to the white image region P <b> 2 rw <b> 2, and the black color The image signal potential of the image signal supplied to each latch circuit 25 of the pixel 20 arranged at the position corresponding to the image area P2rb1 is different before and after the image rewriting, but the position corresponding to the white image area P2rw1. The image signal potentials of the image signals supplied to the latch circuits 25 of the pixels 20 arranged in the pixel 20 and the pixels 20 arranged at positions corresponding to the black image region P2rb2 are the same before and after the rewriting of the image. It is.

  For this reason, when similar images are displayed before and after the rewriting of the image (that is, when the image P1 and the image P2 are similar), a relatively large number of the plurality of pixels 20 constituting the display unit 3 are displayed. The image signal potential of the image signal supplied to the latch circuit 25 of the pixel 20 does not change before and after the rewriting of the image (that is, becomes constant). Therefore, the characteristics of the transistors 25a2, 25b2, 25a1, and 25b1 constituting the latch circuit 25 may be deteriorated.

  However, according to the present embodiment, even when similar images are displayed before and after image rewriting, the number of pixels having different image signal potentials of image signals supplied to the latch circuit 25 before and after image rewriting. Therefore, the characteristics of the transistors 25a2, 25b2, 25a1 and 25b1 constituting the latch circuit 25 can be prevented from deteriorating.

  As described above, according to the electrophoretic display device 1 according to the present embodiment, high-quality display can be performed and power consumption can be suppressed.

Second Embodiment
An electrophoretic display device according to a second embodiment will be described with reference to FIGS.

  FIG. 8 is a block diagram illustrating a configuration of the electrophoretic display device according to the second embodiment. FIG. 8 mainly illustrates a configuration different from the configuration of the electrophoretic display device according to the first embodiment described above, among the configurations of the electrophoretic display device according to the second embodiment, and the first embodiment described above. The configuration similar to the configuration of the electrophoretic display device according to the above is not shown.

  In FIG. 8, the electrophoretic display device 1b according to the second embodiment replaces the first control line 94 and the second control line 95 in the first embodiment described above with the first control lines 94a, 94b, 94c and 94d. Unlike the electrophoretic display device 1 according to the first embodiment described above in that the second control lines 95a, 95b, 95c, and 95d are provided, the other configuration is substantially the same as that of the first embodiment described above. ing.

  In the electrophoretic display device 1b according to the second embodiment, the first control line and the second control for supplying the first control potential S1 and the second control potential S2 from the control potential supply circuit 230 (see FIG. 1), respectively. A line is provided for each of the four divided display parts 3a, 3b, 3c and 3d obtained by dividing the display part 3. That is, the electrophoretic display device 1b according to the second embodiment includes the first control line 94a and the second control line 95a for the divided display unit 3a, and the first control line 94b and the second control line 95a for the divided display unit 3b. 2 control lines 95b, the first display line 94c and the second control line 95c are provided for the divided display portion 3c, and the first control line 94d and the second control line 95d are provided for the divided display portion 3d. .

  The first control line 94a and the second control line 95a are configured to be able to supply the first control potential S1 and the second control potential S2 from the control potential supply circuit 230, respectively. The first control line 94b and the second control line 95b are configured to be able to supply the first control potential S1 and the second control potential S2 from the control potential supply circuit 230, respectively. The first control line 94c and the second control line 95c are configured such that the first control potential S1 and the second control potential S2 can be supplied from the control potential supply circuit 230, respectively. The first control line 94d and the second control line 95d are configured to be able to supply the first control potential S1 and the second control potential S2 from the control potential supply circuit 230, respectively. The control potential supply circuit 230 individually supplies the first control potential S1 supplied to each of the first control line 94a, the first control line 94b, the first control line 94c, and the first control line 94d (that is, the first control line 94a). Each line) can be set to a high potential VH or a low potential VL. The control potential supply circuit 230 individually supplies the second control potential S2 to be supplied to each of the second control line 95a, the second control line 95b, the second control line 95c, and the second control line 95d (that is, the control potential supply circuit 230). , For each second control line), the high potential VH or the low potential VL can be set.

  In the present embodiment, in particular, the controller 10 (see FIG. 1) includes a latch circuit 25 (see FIG. 1) provided in the multi-gradation pixels of the image before rewriting for each of the four divided display portions 3a, 3b, 3c, and 3d. 2) and the image signal generating circuit 240 so that the image signal potentials of the image signal supplied to the latch circuit 25 provided in the multi-gradation pixels for the rewritten image are different from each other. And controls the data line driving circuit 70 (see FIG. 1). Further, the controller 10 is provided with the high potential VH to the pixel electrode 21 provided in the pixel 20 that should display black among the plurality of pixels 20 and provided in the pixel 20 that should display white among the plurality of pixels 20. The control signal supply circuit 230 is controlled so that the low potential VL is supplied to the pixel electrode 21 that is provided. Here, the pixel electrode 21 of the pixel 20 constituting the divided display portion 3a is supplied with the low potential VL or the high potential VH via the first control line 94a or the second control line 95a, thereby constituting the divided display portion 3b. A low potential VL or a high potential VH is supplied to the pixel electrode 21 of the pixel 20 via the first control line 94b or the second control line 95b, and the pixel electrode 21 of the pixel 20 constituting the divided display portion 3c is supplied to the pixel electrode 21 of the pixel 20 The low potential VL or the high potential VH is supplied via the first control line 94c or the second control line 95c, and the first control line 94d or the second potential is supplied to the pixel electrode 21 of the pixel 20 constituting the divided display portion 3d. A low potential VL or a high potential VH is supplied via the control line 95d.

  That is, in this embodiment, in particular, each of the four divided display portions 3a, 3b, 3c, and 3d is driven by a driving method similar to the driving method according to the first embodiment described above.

  Therefore, when the image displayed on the display unit 3 is rewritten, the image signal potential of the image signal supplied before and after the image rewriting among the plurality of latch circuits 25 provided for each of the plurality of pixels 20. The number of latch circuits 25 having the same can be reduced more reliably. Therefore, it is possible to perform display with higher quality and further reduce power consumption.

  Here, the driving method of the electrophoretic display device according to the present embodiment will be described with reference to FIGS. 9 and 10.

  FIG. 9 is a plan view showing another example of an image before rewriting and an image after rewriting.

  In the following, as shown in FIG. 9, the driving method of the electrophoretic display device 1b described above will be described by taking as an example the case where the image displayed on the display unit 3 (see FIG. 1) is rewritten from the image P3 to the image P4. To do. Each of the images P3 and P4 is a two-gradation image composed of two gradations of black and white.

  An image P3 that is an image before rewriting has a white image region P3rw and a black image region P3rb, and the white image region P3rw and the black image region P3rb have the same size. . More specifically, the white image region P3rw corresponds to the upper half of the image P3, and the black image region P3rb corresponds to the lower half of the image P3. For such an image P3, many gradation pixels are not determined.

  The rewritten image P4 has a white image region P4rw and a black image region P4rb, and the white image region P4rw and the black image region P4rb have the same size. . More specifically, the white image region P4rw corresponds to the left half of the image P4, and the black image region P4rb corresponds to the lower half of the image P4. For such an image P4, many gradation pixels are not determined.

  FIG. 10 is a conceptual diagram for explaining the driving method of the electrophoretic display device according to this embodiment, and the image signal potential supplied to the latch circuit 25 of each pixel 20 when displaying the image P3 before rewriting. 4 shows an example of the image signal potential supplied to the latch circuit 25 of each pixel 20 when displaying the rewritten image P4.

  In the following, as shown in FIG. 10, when displaying the image P3 before rewriting, the pixel 20 that displays white (that is, the pixel 20 arranged at a position corresponding to the white image region P3rw of the image P3, In other words, a high level (“Hi” in the figure) image signal is supplied to the latch circuit 25 of the pixel 20 constituting the divided display section 3a and the pixel 20 constituting the divided display section 3b shown in FIG. The pixel 20 that displays black (that is, the pixel 20 arranged at a position corresponding to the black image region P3rb of the image P3, in other words, the pixel 20 and the divided display that constitute the divided display unit 3c shown in FIG. 8) The case where a low level (“Lo” in the figure) image signal is supplied to the latch circuit 25 of the pixel 20) constituting the unit 3d will be described as an example.

  Particularly in the present embodiment, as described above, the latch circuit 25 (see FIG. 2) provided in the multi-gradation pixel for the image before rewriting for each of the four divided display portions 3a, 3b, 3c, and 3d. The image signal generation circuit 240 and the data line driving are performed so that the supplied image signal and the image signal potential of the image signal supplied to the latch circuit 25 provided in the multi-gradation pixel for the rewritten image are different from each other. The circuit 70 (see FIG. 1) is controlled. Here, in the image P3, the multi-gradation pixel for the divided display unit 3a is a pixel 20 displaying white, and the multi-gradation pixel for the divided display unit 3b is a pixel 20 displaying white. The multi-gradation pixel for the divided display unit 3c is a pixel 20 displaying black, and the multi-gradation pixel for the divided display unit 3d is a pixel 20 displaying black. On the other hand, in the image P4, the multi-gradation pixel for the divided display portion 3a is the pixel 20 that should display white, and the multi-gradation pixel for the divided display portion 3b is the pixel 20 that should display black. The multi-gradation pixel for the portion 3c is the pixel 20 that should display white, and the multi-gradation pixel for the divided display portion 3d is the pixel 20 that should display black. Therefore, according to the driving method according to the present embodiment, the image signal potential of the image signal supplied to the latch circuit 25 of the pixel 20 constituting the divided display unit 3a changes from the high level to the low level, and the divided display unit The image signal potential of the image signal supplied to the latch circuit 25 of the pixel 20 constituting the 3b changes from the high level to the low level, and the image signal supplied to the latch circuit 25 of the pixel 20 constituting the divided display section 3c. The image signal potential of the image signal changes from the low level to the high level, and the image signal potential of the image signal supplied to the latch circuit 25 of the pixel 20 constituting the divided display portion 3d changes from the low level to the high level. That is, according to the driving method according to the present embodiment, when the image displayed on the display unit 3 is rewritten from the image P3 to the image P4, the image supplied to the latch circuits 25 of all the pixels 20 constituting the display unit 3. The image signal potential of the signal can be made different before and after the rewriting of the image. Therefore, it is possible to reliably suppress the deterioration of the characteristics of the transistors 25a2, 25b2, 25a1, and 25b1 that constitute the latch circuit 25 of the pixel 20 that constitutes the display unit 3.

<Electronic equipment>
Next, electronic devices to which the above-described electrophoretic display device is applied will be described with reference to FIGS. Below, the case where the electrophoretic display device described above is applied to electronic paper and an electronic notebook is taken as an example.

  FIG. 11 is a perspective view illustrating a configuration of the electronic paper 1400.

  As illustrated in FIG. 11, the electronic paper 1400 includes the electrophoretic display device according to the above-described embodiment as a display unit 1401. The electronic paper 1400 has flexibility, and includes a main body 1402 formed of a rewritable sheet having the same texture and flexibility as conventional paper.

  FIG. 12 is a perspective view illustrating a configuration of the electronic notebook 1500.

  As shown in FIG. 12, an electronic notebook 1500 is one in which a plurality of electronic papers 1400 shown in FIG. 11 are bundled and sandwiched between covers 1501. The cover 1501 includes display data input means (not shown) for inputting display data sent from an external device, for example. Thereby, according to the display data, the display content can be changed or updated while the electronic paper is bundled.

  Since the above-described electronic paper 1400 and electronic notebook 1500 include the electrophoretic display device according to the above-described embodiment, power consumption is small and high-quality image display can be performed.

  In addition to these, the electrophoretic display device according to the present embodiment described above can be applied to the display unit of an electronic device such as a wristwatch, a mobile phone, or a portable audio device.

  The present invention is not limited to the above-described embodiment, and can be appropriately changed without departing from the gist or concept of the invention that can be read from the claims and the entire specification, and an electrophoretic display with such a change. The apparatus, the driving method thereof, and the electronic apparatus provided with the electrophoretic display device are also included in the technical scope of the present invention.

  DESCRIPTION OF SYMBOLS 3 ... Display part, 3a, 3b, 3c, 3d ... Divided display part, 10 ... Controller, 11 ... Memory, 20 ... Pixel, 21 ... Pixel electrode, 22 ... Common electrode, 23 ... Electrophoretic element, 24 ... For pixel switching Transistors 25 ... Latch circuits 25a1, 25b1 N-type transistors 25a2, 25b2 P-type transistors 60 ... Scanning line driving circuits 70 ... Data line driving circuits 94, 94a, 94b, 94c, 94d ... First control 95, 95a, 95b, 95c, 95d ... second control line, 110 ... switch circuit, 210 ... power supply circuit, 220 ... common potential supply circuit, 230 ... control potential supply circuit, 240 ... image signal generation circuit

Claims (4)

An electrophoretic display device comprising a display unit composed of a plurality of pixels each provided with an electrophoretic element between a pixel electrode and a common electrode facing each other,
A latch circuit provided for each pixel and supplied with an image signal having one of the first image signal potential and the second image signal potential, and according to the image signal supplied to the latch circuit A plurality of pixels each including a switch circuit that selectively selects one of the first and second control lines and electrically connects the one control line to the image electrode Circuit,
Based on the first gradation and image data having a second gradation different from the first gradation, the latch circuit provided in the pixel for displaying the first gradation and the second gradation are displayed. Image signal supply means for supplying the image signal to the latch circuit of each of the plurality of pixels so that the image signals having different image signal potentials are supplied to the latch circuit provided in the power pixel; ,
Supplying one of the first gradation potential corresponding to the first gradation and the second gradation potential corresponding to the second gradation as the first control potential to the first control line; Control potential supply means for supplying, to the second control line, the second gradation potential that is different from the first gradation potential among the first and second gradation potentials;
When rewriting the first image displayed on the display unit to the second image, (i) a pixel that displays the first gradation and a pixel that displays the second gradation for the first image; The image signal supplied to the latch circuit provided in the multi-gradation pixel, which is the pixel having the larger number of pixels, and the latch circuit provided in the multi-gradation pixel for the second image Controlling the image signal supply means so that the image signal potentials of the image signals to be different from each other, and (ii) the pixels provided in the pixels to display the first gradation among the plurality of pixels The first gradation potential is supplied to the electrode, and the second gradation potential is supplied to the pixel electrode provided in the pixel that should display the second gradation among the plurality of pixels. Control means for controlling the control potential supply means; An electrophoretic display device comprising the electrophoretic display device. The first and second control lines are provided for each of a plurality of divided display units obtained by dividing the display unit,
The switch circuit electrically connects one of the first and second control lines provided in the divided display unit including the switch circuit among the plurality of divided display units to the pixel electrode,
The control means includes, for each of the plurality of divided display portions, an image signal supplied to the latch circuit provided in the multi-gradation pixel for the first image and the multi-story for the second image. 2. The electrophoretic display device according to claim 1, wherein the image signal supply unit is controlled so that an image signal potential of the image signal supplied to the latch circuit provided in the pixel is different from each other. An electrophoretic display device comprising a display unit composed of a plurality of pixels each having an electrophoretic element provided between a pixel electrode and a common electrode facing each other, wherein the electrophoretic display device is provided for each of the pixels, A latch circuit to which an image signal having one of the two image signal potentials is supplied, and control of any one of the first and second control lines in accordance with the image signal supplied to the latch circuit A plurality of pixel circuits each including a switch circuit that selectively selects a line and electrically connects the one control line to the image electrode; and a first gradation and the first gradation; Based on image data having different second gradations, the latch circuit provided in the pixel to display the first gradation and the latch circuit provided in the pixel to display the second gradation. The image signals having different image signal potentials Image signal supply means for supplying the image signal to the latch circuit of each of the plurality of pixels so that an image signal is supplied; a first gradation potential corresponding to the first gradation; and the second floor One of the second gradation potentials corresponding to the tone is supplied to the first control line as a first control potential, and the one gradation potential of the first and second gradation potentials is A driving method of an electrophoretic display device, comprising: driving an electrophoretic display device including a control potential supply unit that supplies a different other gradation potential as a second control potential to the second control line,
When rewriting the first image displayed on the display unit to the second image, (i) a pixel that displays the first gradation and a pixel that displays the second gradation for the first image; The image signal supplied to the latch circuit provided in the multi-gradation pixel, which is the pixel having the larger number of pixels, and the latch circuit provided in the multi-gradation pixel for the second image Controlling the image signal supply means so that the image signal potentials of the image signals to be different from each other, and (ii) the pixels provided in the pixels to display the first gradation among the plurality of pixels The first gradation potential is supplied to the electrode, and the second gradation potential is supplied to the pixel electrode provided in the pixel that should display the second gradation among the plurality of pixels. Including a control step of controlling the control potential supply means. The driving method of the electrophoretic display device, characterized in that.   An electronic apparatus comprising the electrophoretic display device according to claim 1.

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