JP2011096779A - Transistor, and electronic circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a transistor and an electronic circuit such that logical functions can be actualized and switched by the one transistor, or the one transistor can have a memory function, an amplifying function and a switching function. <P>SOLUTION: The transistor includes: a resonance tunnel layer 25 including a well layer 20 containing a ferromagnetic material and a pair of barrier layers 18, 22 in between which the well layer is sandwiched and which serve as barriers against carriers, and generating a resonance level spin-separated into a low level and a high level in the well layer; an emitter layer 24 for injecting spin-polarized carriers in the resonance tunnel layer; a base layer 16 provided on the opposite side of the resonance tunnel layer from the emitter and applying a voltage for generating a potential difference between the emitter layer and the well layer; and a collector layer 12 provided on the opposite side of the base layer from the resonance tunnel layer and receiving carriers having passed through the resonance tunnel layer. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a transistor and an electronic circuit, and more particularly to a transistor and an electronic circuit having a resonant tunnel structure.

  Spin functional elements using the spin degree of electrons are attracting attention as next-generation power-saving devices. A transistor using a resonant tunnel structure as an emitter is known (for example, Patent Document 1 and Non-Patent Document 1). A logic circuit using a transistor having a resonant tunnel structure is known (for example, Patent Document 2). Furthermore, a resonant tunnel structure using a ferromagnetic material as a well layer is known (for example, Patent Document 3 and Non-Patent Document 2). On the other hand, transistors using a spin function are known (for example, Patent Documents 4 and 5 and Non-Patent Document 3).

JP 61-296765 A JP-A-8-79057 International Publication No. 2006/112119 Pamphlet JP 2006-86491 A JP 2006-32915 A

Jpn. J. Appl. Phys., Vol. 24, No. 11, L853-854 (1985) Rhys. Rev. lett., Vol. 96, 027208 (2006) Rhys. Rev. lett., Vol. 94, 056601 (2005)

  For example, in Patent Document 2, a circuit having an XOR (Exclusive-NOR) logic function is realized by using one transistor and a plurality of resistors. However, a transistor capable of realizing a logical function with one transistor and switching the logical function has not been realized. Further, there is a demand for a new transistor having a memory function and an amplifying function or a switching function with one transistor.

  The present invention has been made in view of the above problems, and can realize a logic function and switch a logic function with one transistor, or can perform a memory function and an amplification function or a switching function with one transistor. It is an object to provide a transistor and an electronic circuit that can be combined.

  The present invention includes a well layer including a ferromagnet and a pair of barrier layers sandwiching the well layer and serving as a barrier against carriers, and the well layer spin-separated into a low level and a high level A resonant tunnel layer in which a level is formed; an emitter layer for injecting spin-polarized carriers into the resonant tunnel layer; and an emitter layer and the well layer provided on a side opposite to the emitter of the resonant tunnel layer, A base layer to which a voltage for generating a potential difference is applied, and a collector layer that is provided on the opposite side of the base layer from the resonant tunneling layer and receives carriers that have passed through the resonant tunneling layer. It is. According to the present invention, it is possible to provide a transistor that can have both a memory function and an amplification function or a switching function with a single transistor.

  In the above configuration, when the spin direction of the carriers injected into the resonant tunnel layer and the magnetization direction of the well layer are parallel, the low level corresponds to the carriers injected into the resonant tunnel layer, When the spin direction of the carriers injected into the resonant tunnel layer and the magnetization direction of the well layer are antiparallel, the high level corresponds to the carriers injected into the resonant tunnel layer. Can do.

  In the above structure, a collector barrier layer having a larger band gap than the base layer and the collector layer may be provided between the base layer and the collector layer.

  The present invention comprises the transistor, and first and second input terminals connected to the base layer and receiving first and second signals, respectively, and the spin direction of carriers injected into the resonant tunneling layer And when the magnetization direction of the well layer is parallel, and one of the first and second signals is at a high level and the other is at a low level, the carriers injected into the resonant tunnel layer are at the low level. When the spin direction of the carriers that have passed through the collector layer and injected into the resonant tunnel layer and the magnetization direction of the well layer are antiparallel, and both the first and second signals are at a high level The carriers injected into the resonant tunnel layer are an electronic circuit that passes through the high level to the collector layer. According to the present invention, it is possible to provide an electronic circuit capable of realizing a logical function and switching the logical function with one transistor.

  In the above configuration, when the spin direction of the carriers injected into the resonant tunnel layer and the magnetization direction of the well layer are parallel, and when both the first and second signals are at a high level, the resonant tunnel layer The injected carriers do not pass through the resonant tunnel layer, and the spin direction of the carriers injected into the resonant tunnel layer and the magnetization direction of the well layer are antiparallel, and one of the first and second signals Is high level and the other is low level, the carrier injected into the resonant tunnel layer may not pass through the resonant tunnel layer.

  In the above configuration, the energy difference between the low level and the bottom of the conduction band of the well layer may be equal to the energy difference between the high level and the low level.

  In the above configuration, a first power source that supplies a voltage to the collector layer, a second power source that supplies a voltage to the emitter layer, and between the collector layer and the first power source, or between the emitter layer and the second power source. A load connected between the power supply and an output terminal connected to a node between the load and the transistor may be provided.

  The present invention provides an electronic circuit that includes the above-described transistor and reconstructs the function of a logic circuit based on a relative magnetization direction of a spin direction of carriers injected into the resonant tunnel layer and a magnetization direction of the well layer. is there. According to the present invention, it is possible to provide an electronic circuit capable of realizing a logical function and switching the logical function with one transistor.

  According to the present invention, a transistor and an electronic device capable of realizing a logic function and switching the logic function with one transistor, or having both a memory function and an amplifying function or a switching function with one transistor. A circuit can be provided.

1 is a cross-sectional view of a transistor according to Example 1. FIG. FIG. 2 is an energy band diagram of the transistor according to the first embodiment. FIGS. 3A to 3C are diagrams showing the conduction band Ec of the transistor according to Example 1 in the case of parallel magnetization. FIGS. 4A to 4C are diagrams illustrating the conduction band Ec of the transistor according to Example 1 in the case of antiparallel magnetization. FIG. 5 is a circuit diagram of an electronic circuit according to the second embodiment.

  Embodiments of the present invention will be described below with reference to the drawings.

1 is a cross-sectional view of a transistor according to Example 1. FIG. As shown in FIG. 1, the collector layer 12, the collector barrier layer 14, the base layer 16, the resonant tunnel layer 25, and the emitter layer 24 are stacked on the substrate 10. A collector electrode 26 is electrically connected to the collector layer 12. A base electrode 28 is electrically connected to the base layer 16. An emitter electrode 30 is electrically connected to the emitter layer 24. The resonant tunnel layer 25 includes a well layer 20 including a ferromagnetic material and a pair of barrier layers 18 and 22 that sandwich the well layer 20 and serve as a barrier against carriers. The substrate 10 is a semiconductor substrate such as GaAs, and the collector layer 12 is an n-type GaAs layer, for example. The collector barrier layer 14 is, for example, an undoped AlGaAs layer. The base layer 16 is an n-type GaAs layer, for example. The well layer 20 includes a ferromagnetic material and is, for example, a Heusler alloy such as Co ₂ MnSi or FePt. The barrier layers 18 and 22 are insulating films such as MgO or Al ₂ O ₃ . The emitter layer 24 includes a ferromagnetic material and is, for example, a Heusler alloy similar to the well layer 20.

FIG. 2 is an energy band diagram of the transistor according to the first embodiment. Ec is the bottom of the conduction band, Ev is the top of the valence band, E _F denotes a Fermi level. Hereinafter, the bottom Ec of the conduction band is also simply referred to as the conduction band Ec. The arrows shown in the energy band gaps of the emitter layer 24 and the well layer 20 schematically indicate the magnetization directions of the emitter layer 24 and the well layer 20, respectively. The barrier layers 18 and 22 serve as a barrier against carriers (electrons in this case) injected from the emitter layer 24. Resonant tunnel levels 50 and 52 are formed in the well layer 20 between the pair of barrier layers 18 and 22. The resonant tunnel level is spin-separated into a low level 50 and a high level 52. The case where the energy separated from the spin and the energy from the bottom Ec of the conduction band of the well layer 20 of the low level 50 are the same E ₁ is illustrated. Electrons spin-polarized in a direction parallel to the magnetization direction of the well layer 20 have a low level 50, and electrons spin-polarized in a direction opposite to the magnetization direction of the well layer 20 (referred to as antiparallel) have a high level 52. It becomes.

  The emitter layer 24 injects carriers polarized in the magnetization direction into the resonant tunnel layer 25. The base layer 16 is provided on the opposite side of the resonant tunnel layer 25 from the emitter layer 24, and a voltage is applied to cause a potential difference between the emitter layer 24 and the well layer 20. The collector layer 12 is provided on the opposite side of the base layer 16 from the resonant tunnel layer 25 and receives carriers that have passed through the resonant tunnel layer 25. The collector barrier layer 14 is provided between the base layer 16 and the collector layer 12 and prevents carriers that have been relaxed by the resonant tunnel layer 25 or the like from reaching the collector layer 12.

  The well layer 20 of the resonant tunnel layer 25 may include a ferromagnetic material that forms a spin-separated resonance level. The barrier layers 18 and 22 may function as a barrier against injected carriers. The height and thickness of the barrier layers 18 and 22 and the thickness of the well layer 20 may be such thicknesses that resonance levels are generated in the well layer 20. For example, the thickness of the barrier layers 18 and 22 is about 0.5 to 2.0 nm, and the thickness of the well layer 20 is about 0.5 to 2.0 nm.

  The collector layer 12, the collector barrier layer 14 and the base layer 16 are preferably semiconductors. The collector layer 12 and the base layer 16 are preferably of the same conductivity type. The collector layer 12 and the base layer 16 are preferably n-type when the carriers injected into the resonant tunneling layer 25 by the emitter layer 24 are electrons, and p-type when the holes are holes. Since the collector barrier layer 14 functions as a barrier, the collector layer 12 and the base layer 16 preferably have a low doping concentration, and preferably function as a barrier against carriers injected by the emitter layer 24. As the collector layer 12, the collector barrier layer 14, and the base layer 16, a III-V group compound semiconductor or a II-IV group compound semiconductor can be used. For example, a compound semiconductor such as GaAs, AlAs, InAs, GaP, AlP, InP, GaN, AlN, InN, or a mixed crystal thereof can be used.

Next, the operation of the transistor according to the first embodiment will be described. FIGS. 3A to 3C are diagrams showing the conduction band Ec of the transistor according to Example 1 in the case of parallel magnetization. In FIG. 3A to FIG. 3C, the magnetization directions of the emitter layer 24 and the well layer 20 are parallel. That is, the spin direction of carriers injected into the resonant tunnel layer 25 and the magnetization direction of the well layer are parallel. In this case, the low level 50 corresponds to the carriers injected into the resonant tunnel layer 25. Similar to FIG. 2, the well layer 20, and the energy E ₁ of the energy difference E ₁ and spin separation between the conduction band Ec and the lower level 50 is shown a case where the same.

3A to 3C, the collector-emitter voltage _VCE is applied. In FIG. 3A, when the base-emitter voltage V _BE is 0 V, electrons cannot pass through the resonant tunnel layer 25 due to the barrier layers 18 and 22.

In FIG. 3B, when the base-emitter voltage V _BE is 2E ₁ / q (q is the amount of elementary charge of electrons), the lower level 50 of the resonance levels substantially coincides with the conduction band Ec of the emitter layer 24. To do. In this case, the spin direction of the electrons injected from the emitter layer 24 matches the spin direction of the low level 50. For this reason, electrons pass through the resonant tunnel layer 25 and flow to the collector layer 12 as the collector-emitter current _ICE . The direction of the current is the opposite direction of the electron flow, but in FIG. 3B, I _CE is shown in the direction of the electron flow.

In FIG. 3C, when the base-emitter voltage V _BE is larger than 2E ₁ / q, the conduction band Ec of the emitter layer 24 becomes higher than the low level 50. Therefore, no electrons flow from the emitter layer 24 to the collector layer 12. When the conduction band Ec of the emitter layer 24 substantially coincides with the high level 52, the spin direction of electrons injected from the emitter layer 24 is different from the spin direction of the high level 52, so that the electrons pass through the resonant tunnel layer 25. It is not possible.

As described above, when the spin direction of the carriers injected into the resonant tunneling layer 25 and the magnetization direction of the well layer are parallel, the collector − only when the conduction band Ec of the emitter layer 24 substantially coincides with the low level 50. Emitter current _ICE flows.

  Next, a case where the magnetization directions of the emitter layer 24 and the well layer 20 are antiparallel, that is, a case where the spin direction of carriers injected into the resonant tunnel layer 25 and the magnetization direction of the well layer 20 are antiparallel will be described. To do. FIGS. 4A to 4C are diagrams illustrating the conduction band Ec of the transistor according to Example 1 in the case of antiparallel magnetization. In this case, the high level 52 corresponds to the carriers injected into the resonant tunnel layer 25.

4A, when the base-emitter voltage V _BE is 0 V, electrons cannot pass through the resonant tunnel layer 25 as in FIG. 3A. In FIG. 4B, when the base-emitter voltage V _BE is 2E ₁ / q, the spin direction of electrons injected from the emitter layer 24 does not coincide with the spin direction of the low level 50. For this reason, electrons do not pass through the resonant tunnel layer 25.

In FIG. 4C, when the base-emitter voltage V _BE is 4E ₁ / q, the conduction band Ec of the emitter layer 24 substantially coincides with the high level 52. In this case, the spin direction of electrons injected from the emitter layer 24 matches the spin direction of the high level 52. For this reason, electrons pass through the resonant tunnel layer 25 and flow to the collector layer 12 as the collector-emitter current _ICE .

As described above, when the spin direction of carriers injected into the resonant tunnel layer 25 and the magnetization direction of the well layer 20 are antiparallel, only when the conduction band Ec of the emitter layer 24 substantially coincides with the high level 52. Collector-emitter current _ICE flows.

In the first embodiment, when the magnetization directions of the emitter layer 24 and the well layer 20 are parallel to each other, a voltage is applied as the base-emitter voltage V _{BE so} that the emitter layer 24 and the low level 50 substantially coincide with each other. Collector-emitter current _ICE flows. On the other hand, when the magnetization directions of the emitter layer 24 and the well layer 20 are antiparallel, the collector-emitter current _ICE does not flow even when the same base-emitter voltage _VBE is applied. When the magnetization directions of the emitter layer 24 and the well layer 20 are antiparallel, when a voltage is applied as the base-emitter voltage V _{BE so} that the emitter layer 24 and the high level 54 substantially coincide with each other, the collector-emitter current I _CE flows. On the other hand, when the magnetization directions of the emitter layer 24 and the well layer 20 are parallel, the collector-emitter current I _CE does not flow even when the same base-emitter voltage V _BE is applied. Thus, in the transistor of the first embodiment, a memory function based on the magnetization directions of the emitter layer 24 and the well layer 20 can be realized. Furthermore, an amplification or switching function as a bipolar transistor can be realized. Therefore, the memory function and the transistor function depending on the magnetization direction can be realized by one transistor.

In Example 1, since the resonant tunnel layer 25 is substantially symmetric, the potential of the well layer 20 is about ½ of the potential of the base. For this reason, by applying a voltage of 2E ₁ / q to the base-emitter voltage V _BE , the conduction band Ec of the emitter layer 24 and the low level 50 can substantially coincide. Further, by applying a voltage of 4E ₁ / q to the base-emitter voltage V _BE , the conduction band Ec of the emitter layer 24 and the high level 52 can be substantially matched. When the resonant tunnel layer 25 is asymmetric, the base-emitter voltage V _BE may be set to a voltage at which the conduction band Ec of the emitter layer 24 and the low level 50 or the high level 52 substantially coincide.

  As a method for changing the magnetization directions of the emitter layer 24 and the well layer 20, there are a method in which the coercive force between the emitter layer 24 and the well layer 20 is made different and a magnetic field is applied, and a method in which the magnetization is reversed by spin injection. is there.

Although FIG. 2 to FIG. 4C illustrate the case where electrons are used as carriers, holes may be used as carriers. Further, although the case where the energy difference between the spin separation energy of the well layer 20 and the low level 50 and the conduction band Ec is the same E ₁ has been described as an example, different energy may be used.

  Example 2 is an example of an electronic circuit using the transistor according to Example 1. FIG. FIG. 5 is a circuit diagram of an electronic circuit according to the second embodiment. As shown in FIG. 5, the first and second input terminals Tin1 and Tin2 are connected to the base B (that is, the base layer 16) of the transistor 40 according to the first embodiment via the resistors R1 and R2, respectively. The first power supply Vcc supplies power to the collector C (that is, the collector layer 12) of the transistor 40. The second power supply (ground) supplies power to the emitter E of the transistor 40 (that is, the emitter layer 24). A resistor R3, which is a load, is connected between the collector C of the transistor 40 and the first power supply Vcc. An output terminal Tout is connected to a node between the resistor R3 and the collector C. The first and second signals Vin1 and Vin2 are input to the first and second input terminals Tin1 and Tin2, respectively. An output signal Vout is output from the output terminal Tout.

First, the case where the spin direction of carriers injected into the resonant tunnel layer 25 and the magnetization direction of the well layer 20 are parallel will be described. Table 1 is a truth table of the electronic circuit according to the second embodiment. In1 and In2 are set to “0” when the first and second signals Vin1 and Vin2 are 0 V (low level), and “1” when they are 2E ₁ / q (high level). Out is set to “0” when Vout is at a high level, and is set to “1” when Vout is at a low level.

When both In1 and In2 are “0”, the collector-emitter current I _CE does not flow as shown in FIG. Therefore, Vout becomes a high level and Out becomes “0”. When one of In1 and In2 is 0 and the other is “1”, that is, when one of the first and second signals Vin1 and Vin2 is at a high level and the other is at a low level, as shown in FIG. In addition, a voltage of 2E ₁ / q is applied to the base layer 16. Therefore, the carriers injected from the emitter layer 24 into the resonant tunnel layer 25 pass through the collector layer 12 through the low level 50. Therefore, collector-emitter current _ICE flows, Vout becomes low level, and Out becomes “1”.

When both In1 and In2 are “1”, that is, when both the first and second signals Vin1 and Vin2 are at a high level, a voltage of 4E ₁ / q is applied to the base layer 16. As shown in FIG. 3C, carriers injected from the emitter layer 24 into the resonant tunnel layer 25 do not flow through the high level 52 and do not pass through the resonant tunnel layer 25. Therefore, the collector-emitter current I _CE does not flow, Vout becomes high level, and Out becomes “0”. As described above, the electronic circuit of Example 2 has an XOR function.

Next, a case where the spin direction of carriers injected into the resonant tunnel layer 25 and the magnetization direction of the well layer 20 are antiparallel will be described. Table 2 is a truth table of the electronic circuit according to the second embodiment.

When both In1 and In2 are “0”, the collector-emitter current I _CE does not flow as shown in FIG. Therefore, Vout becomes a high level and Out becomes “0”. When one of In1 and In2 is 0 and the other is “1”, that is, when one of the first and second signals Vin1 and Vin2 is at a high level and the other is at a low level, as shown in FIG. In addition, a voltage of 2E ₁ / q is applied to the base layer 16. Therefore, carriers injected from the emitter layer 24 into the resonant tunnel layer 25 do not flow through the low level 50 and do not pass through the resonant tunnel layer 25. Therefore, the collector-emitter current I _CE does not flow, Vout becomes high level, and Out becomes “0”.

When both In1 and In2 are “1”, that is, when both the first and second signals Vin1 and Vin2 are at a high level, a voltage of 4E ₁ / q is applied to the base layer 16. As shown in FIG. 4C, carriers injected from the emitter layer 24 into the resonant tunnel layer 25 pass through the high level 52 to the collector layer 12. Therefore, collector-emitter current _ICE flows, Vout becomes low level, and Out becomes “1”. As described above, the electronic circuit according to the second embodiment has an AND function.

  In the second embodiment, the resistor R3 is connected between the first power source Vcc and the collector C. However, the resistor R3 is connected between the second power source (ground) and the emitter E, and the resistor R3 and the emitter E are connected. The output terminal Tout may be connected to a node between the two terminals.

  According to the second embodiment, the function of the logic circuit can be reconstructed based on the relative magnetization direction of the spin direction of the carriers injected into the resonant tunnel layer 25 and the magnetization direction of the well layer 20. If the transistor according to the first embodiment is used, the function of the logic circuit can be reconstructed by the relative magnetization direction even if a circuit system other than the second embodiment is used.

In Example 2, less a level 50 and the energy difference E ₁ between the bottom Ec of the conduction band of the well layer, the energy difference E ₁ between high level 52 and lower level 50, it is preferably equal. Thereby, Vin1 and Vin2 can be made the same voltage.

  The preferred embodiments of the present invention have been described in detail above. However, the present invention is not limited to the specific embodiments, and various modifications and changes can be made within the scope of the gist of the present invention described in the claims. It can be changed.

DESCRIPTION OF SYMBOLS 10 Substrate 12 Collector layer 14 Collector barrier layer 16 Base layer 18, 22 Barrier layer 20 Well layer 24 Emitter layer 25 Resonant tunnel layer 40 Transistor 50 Low level 52 High level Tin1 First input terminal Tin2 Second input terminal Tout Output terminal R1-R3 resistance

Claims (8)

A resonance level that is spin-separated into a low level and a high level is formed in the well layer, including a well layer including a ferromagnetic material and a pair of barrier layers that sandwich the well layer and serve as a barrier against carriers. A resonant tunneling layer,
An emitter layer for injecting spin-polarized carriers into the resonant tunneling layer;
A base layer provided on the opposite side of the resonant tunneling layer from the emitter, to which a voltage for generating a potential difference is applied between the emitter layer and the well layer;
A collector layer provided on a side opposite to the resonant tunnel layer of the base layer and receiving a carrier that has passed through the resonant tunnel layer;
A transistor comprising: When the spin direction of the carriers injected into the resonant tunnel layer and the magnetization direction of the well layer are parallel, the low level corresponds to the carriers injected into the resonant tunnel layer,
The high level corresponds to the carriers injected into the resonant tunnel layer when the spin direction of the carriers injected into the resonant tunnel layer and the magnetization direction of the well layer are antiparallel. Transistor.   3. The transistor according to claim 1, further comprising a collector barrier layer having a larger band gap than the base layer and the collector layer between the base layer and the collector layer. A transistor according to any one of claims 1 to 3,
First and second input terminals connected to the base layer and receiving first and second signals, respectively,
When the spin direction of the carriers injected into the resonant tunnel layer and the magnetization direction of the well layer are parallel, and one of the first and second signals is at a high level and the other is at a low level, the resonance Carriers injected into the tunnel layer pass through the low level to the collector layer,
When the spin direction of the carriers injected into the resonant tunnel layer and the magnetization direction of the well layer are antiparallel, and when both the first and second signals are at a high level, they are injected into the resonant tunnel layer. An electronic circuit in which carriers pass through the high level to the collector layer. When the spin direction of the carriers injected into the resonant tunnel layer and the magnetization direction of the well layer are parallel, and both the first and second signals are at a high level, the carriers injected into the resonant tunnel layer Does not pass through the resonant tunneling layer,
When the spin direction of carriers injected into the resonant tunnel layer and the magnetization direction of the well layer are antiparallel, and when one of the first and second signals is at a high level and the other is at a low level, The electronic circuit according to claim 4, wherein carriers injected into the resonant tunnel layer do not pass through the resonant tunnel layer.   6. The electronic circuit according to claim 4, wherein an energy difference between the low level and the bottom of the conduction band of the well layer is equal to an energy difference between the high level and the low level. A first power supply for supplying a voltage to the collector layer;
A second power source for supplying a voltage to the emitter layer;
A load connected between the collector layer and the first power source or between the emitter layer and the second power source;
An output terminal connected to a node between the load and the transistor;
The electronic circuit according to claim 3, further comprising:   4. The transistor according to claim 1, wherein the logic circuit has a relative magnetization direction between a spin direction of carriers injected into the resonant tunnel layer and a magnetization direction of the well layer. Electronic circuits that reconstruct functions.

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