JP2011071266A - Epitaxial substrate for semiconductor element, semiconductor element, method of manufacturing epitaxial substrate for semiconductor element - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an epitaxial substrate for a semiconductor element in which warpage is suppressed. <P>SOLUTION: In an epitaxial substrate 10 for a semiconductor element in which a group-III nitride layer group is laminated and formed on a foundation substrate 1, the group-III nitride layer group has: a buffer layer 2 in which at least two or more group-III nitride layers are laminated; a channel layer 3 composed of a group-III nitride having a composition of In<SB>x1</SB>Al<SB>y1</SB>Ga<SB>z1</SB>N (0≤x1≤1, 0≤y1≤1, 0<z1≤1, and x1+y1+z1=1); and a barrier layer 4 composed of a group-III nitride having a composition of In<SB>x2</SB>Al<SB>y2</SB>Ga<SB>z2</SB>N (0≤x2≤1, 0<y2≤1, 0≤z2≤1, and x2+y2+z2=1). At least one of the buffer layers 2 is a lattice hole inherent layer 23 having lattice holes. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to an epitaxial substrate composed of a group III nitride semiconductor and having a multilayer structure, in particular, a multilayer structure epitaxial substrate for an electronic device, and a manufacturing method thereof.

  Nitride semiconductors are attracting attention as semiconductor materials for next-generation high-frequency / high-power devices because they have a high breakdown electric field and a high saturation electron velocity. For example, a HEMT (High Electron Mobility Transistor) element formed by laminating a barrier layer made of AlGaN and a channel layer made of GaN has a laminated interface due to a large polarization effect (spontaneous polarization effect and piezoelectric polarization effect) peculiar to nitride materials. This utilizes the feature that a high-concentration two-dimensional electron gas (2DEG) is generated at the (heterointerface) (see, for example, Non-Patent Document 1).

  As a base substrate of a substrate for HEMT elements, a single crystal (heterogeneous single crystal) having a composition different from that of a group III nitride, such as silicon or SiC, may be used depending on the application and required price. In this case, a buffer layer such as a strained superlattice layer or a low-temperature growth buffer layer is generally formed on the base substrate as an initial growth layer (for example, Patent Document 1, Patent Document 2, and Non-Patent Document). Reference 2). Therefore, epitaxially forming the barrier layer, the channel layer, and the buffer layer on the base substrate is the most basic configuration of the HEMT element substrate using the base substrate made of different single crystals. In addition, a spacer layer having a thickness of about 1 nm may be provided between the barrier layer and the channel layer for the purpose of promoting spatial confinement of the two-dimensional electron gas. The spacer layer is made of, for example, AlN. Furthermore, a cap layer made of, for example, an n-type GaN layer or a superlattice layer is formed on the barrier layer for the purpose of controlling the energy level at the outermost surface of the substrate for HEMT elements and improving the contact characteristics with the electrode. Sometimes it is done.

  In order to put the HEMT device as described above or a substrate for a HEMT device, which is a multilayer structure used for its production, into practical use, there are issues related to performance improvement such as increased power density and higher efficiency, and functionality such as normally-off operation. It is necessary to solve various issues such as issues related to improvement and basic issues such as high reliability and low price.

  For example, attempts have been made to increase the total thickness of nitride films in order to increase the withstand voltage of HEMT devices (see Non-Patent Document 3, for example).

JP 2003-59948 A JP 2005-158889 A

"Highly Reliable 250W High Electron Mobility Transistor Power Amplifier", TOSHIHIDE KIKKAWA, Jpn. J. Appl. Phys. 44, (2005), 4896 "Thickening of AlGaN / GaN HEMT structure on Si (111) substrate by studying multilayer structure", Takashi Suzue, Yuri Suzuki, Yuki Nomura, Takashi Egawa, IEICE technical report, ED2008-179 "High power AlGaN / GaN HFET with a high breakdown voltage of over 1.8kV on 4 inch Si substrates and the suppresion of current collapse", Nariaki Ikeda, Syuusuke Kaya, Jiang Li, Yoshihiro Sato, Sadahiro Kato, Seikoh Yoshida, Proceedings of the 20th International Symposium on Power Semicoductor Devices & IC's May 18-22,2008 Oralando, FL ", pp.287-290

  Non-Patent Document 3 discloses a technique for realizing high voltage resistance of a HEMT device by increasing the total film thickness of the group III nitride. In particular, as disclosed in Non-Patent Document 3, a device using an epitaxial substrate having a silicon substrate as a base substrate is used in terms of cost reduction of the epitaxial substrate and integration with a silicon-based circuit device. There are advantages.

  However, there is a large difference in lattice constant values between silicon and nitride materials. This causes misfit dislocations at the interface between the silicon substrate and the growth film, and promotes a three-dimensional growth mode at the timing from nucleation to growth. In other words, it is a factor that hinders the formation of a good nitride epitaxial film having a low dislocation density and a flat surface.

  In addition, since the value of the thermal expansion coefficient of a nitride material is larger than that of silicon, in the process of epitaxially growing a nitride film on a silicon substrate at a high temperature and then lowering the temperature to near room temperature, a tensile stress is generated in the nitride film. Work. As a result, there are problems that cracks are likely to occur on the film surface and that large warpage is likely to occur on the substrate.

  That is, it is known that it is very difficult to form a high-quality nitride film on a silicon substrate with a high yield as compared with the case of using a sapphire substrate or a SiC substrate. Therefore, as disclosed in Non-Patent Document 3, it is not easy to stably obtain a device having a high breakdown voltage by increasing the total thickness of the group III nitride with good reproducibility.

  The present invention has been made in view of the above problems, and an object thereof is to provide an epitaxial substrate for a semiconductor element in which warpage is suppressed.

In order to solve the above problems, the invention of claim 1 is a semiconductor device in which a group III nitride layer group is laminated on a base substrate so that the (0001) crystal plane is substantially parallel to the substrate surface of the base substrate. The group III nitride layer group includes a buffer layer in which at least two group III nitride layers are stacked, and In _x1 Al _{y1 Gaz1} N (0 ≦ x1 ≦ 1, 0 ≦ y1 ≦ 1, 0 <z1 ≦ 1, x1 + y1 + z1 = 1) channel layer made of group III nitride, and In _x2 Al _{y2 Gaz2} N (0 ≦ x2 ≦ 1, 0 <y2 ≦ 1, 0 ≦ a barrier layer made of a group III nitride having a composition of z2 ≦ 1, x2 + y2 + z2 = 1), and at least one of the buffer layers is a lattice-hole-internal layer having lattice vacancies .

The invention according to claim 2 is the epitaxial substrate according to claim 1, wherein the lattice vacancy-containing layer has a structure in which V ^III represents a group III atom defect and V ^N represents an N atom defect. ^{_{In x Al y Ga z V III}} p N (1-q) V N q (0 ≦ x ≦ 1,0 <y ≦ 1,0 ≦ z ≦ 1,0 <p <1, x + y + z + p = 1,0 ≦ q <1) A group III nitride represented by the composition formula:

  The invention of claim 3 is the epitaxial substrate according to claim 1 or 2, wherein 0.01 ≦ p ≦ 0.20.

  A fourth aspect of the present invention is the epitaxial substrate according to any one of the first to third aspects, wherein the thickness of the lattice vacancy inner layer is 2 nm or more and 30 nm or less.

  A fifth aspect of the present invention is the epitaxial substrate according to any one of the first to fourth aspects, wherein the channel layer includes a compressive strain in an in-plane direction at least at a portion in contact with the buffer layer. It is characterized by that.

  According to a sixth aspect of the present invention, a semiconductor element is formed using the epitaxial substrate for a semiconductor element according to any one of the first to fifth aspects.

The invention of claim 7 is a method of manufacturing an epitaxial substrate for a semiconductor device by forming a group III nitride layer group on a base substrate so that a (0001) crystal plane is substantially parallel to the substrate surface. A buffer layer forming step of forming at least two group III nitride layers on the base substrate to form a buffer layer; and In _x1 Al _y1 Ga _z1 N (0 ≦ ₁₎ on the buffer layer. a channel layer forming step of forming a channel layer made of a group III nitride having a composition of x1 ≦ 1, 0 ≦ y1 ≦ 1, 0 <z1 ≦ 1, x1 + y1 + z1 = 1), and In _x2 Al _{y2 Gaz2} N (0 ≦ a barrier layer forming step of forming a barrier layer made of a group III nitride having a composition of x2 ≦ 1, 0 <y2 ≦ 1, 0 ≦ z2 ≦ 1, x2 + y2 + z2 = 1), and in the buffer layer forming step, , At least one of the buffer layers, Forming a lattice vacancies inherent layer having a child holes, characterized in that.

The invention of claim 8 is the method for manufacturing an epitaxial substrate for a semiconductor device according to claim 7, wherein, in the buffer layer forming step, In _{x ′} Al _{y ′} Gaz _′ N (0 ≦ x ′ ≦ 1). by 0 <y '≦ 1,0 ≦ z ' ≦ 1, x '+ y' + z '= 1) comprising forming a layer having a composition III nitride represented by the formula annealing this, V ^III There represents a group III atoms defects, if V ^N denote the N atom _{defects, in x Al y Ga z V} III p N (1-q) V N q (0 ≦ x <x ', 0 <y ≦ 1, 0 ≦ z ≦ 1, 0 <p <1, x + y + z + p = 1, 0 ≦ q <1).

  The invention according to claim 9 is the method for manufacturing an epitaxial substrate for a semiconductor device according to claim 7 or claim 8, wherein annealing for forming the lattice vacancy resident layer is performed with a hydrogen partial pressure of 5 kPa or more and 100 kPa. The temperature is 900 ° C. or more and 1250 ° C. or less and the holding time is 3 minutes or more and 10 minutes or less.

  According to a tenth aspect of the present invention, an epitaxial substrate for a semiconductor device is produced using the production method according to any one of the seventh to ninth aspects.

  According to the inventions of claims 1 to 10, an epitaxial substrate in which warpage is suppressed is realized. In particular, when a silicon wafer is used as the underlying substrate, an epitaxial substrate having a property comparable to that when using a sapphire substrate, a SiC substrate, or the like is realized while suppressing warpage.

1 is a schematic cross-sectional view schematically showing a configuration of an epitaxial substrate 10 according to a first embodiment of the present invention. 4 is a schematic cross-sectional view schematically showing a configuration of an epitaxial substrate 20 according to a second embodiment of the present invention. FIG. It is a figure which shows the composition of the initially formed layer, the composition of the 3rd buffer layer 23 obtained after heat-standing, and various evaluation results about the epitaxial substrate 10 which concerns on Example 1. FIG. 6 is a diagram showing the thickness of a third buffer layer 23 and various evaluation results for an epitaxial substrate 10 according to Example 3. FIG. It is a figure which shows the conditions of the heating leaving at the time of forming the 3rd buffer layer 23, and various evaluation results about the epitaxial substrate 10 which concerns on Example 4. FIG.

<First Embodiment>
<Configuration of epitaxial substrate>
FIG. 1 is a schematic cross-sectional view schematically showing a configuration of an epitaxial substrate 10 according to the first embodiment of the present invention. The epitaxial substrate 10 has a configuration in which a base substrate 1, a buffer layer 2, a channel layer 3, and a barrier layer 4 are stacked. In addition, the ratio of the thickness of each layer in FIG. 1 does not reflect the actual one.

  The base substrate 1 is preferably a (111) plane single crystal silicon wafer. In addition, a mode using a substrate made of SiC, sapphire, GaAs, spinel, MgO, ZnO, ferrite, or the like may be used.

  The buffer layer 2, the channel layer 3, and the barrier layer 4 are each formed by an epitaxial growth method using a wurtzite group III nitride so that the (0001) crystal plane is substantially parallel to the substrate surface of the base substrate 1. It is a layer formed by. These layers are preferably formed by metal organic chemical vapor deposition (MOCVD).

  The buffer layer 2 is a layer formed of a group III nitride containing at least one of In, Al, and Ga as a group III element and having a thickness of about several tens nm to several hundreds nm. The buffer layer 2 may be a single group III nitride layer, or may have a configuration in which a plurality of group III nitride layers are stacked. In FIG. 1, a case where the buffer layer 2 includes three layers of a first buffer layer 21, a second buffer layer 22, and a third buffer layer 23 is illustrated.

  However, at least one layer constituting the buffer layer 2 (in the case of a single layer, the layer itself) is formed as a lattice-hole-internal layer having lattice vacancies. Details of the buffer layer 2 will be described later.

The channel layer 3 is a group III nitride having a composition of In _x1 Al _{y1 Gaz1} N (x1 + y1 + z1 = 1) and is formed to a thickness of about several μm. In the present embodiment, the channel layer 3 is formed so as to satisfy a composition range of x1 = 0 and 0 ≦ y1 ≦ 0.3. In the case of 0.3 <y1 ≦ 1, the crystallinity of the channel layer 3 itself is significantly deteriorated, and it becomes difficult to obtain the epitaxial substrate 10 having good electrical characteristics.

On the other hand, the barrier layer 4 is a group III nitride having a composition of In _x2 Al _y2 Ga _z2 N (where x2 + y2 + z2 = 1) and is formed to a thickness of about several nm to several tens of nm.

  In the epitaxial substrate 10 having such a layer structure, the interface between the channel layer 3 and the barrier layer 4 is a heterojunction interface. Therefore, due to the spontaneous polarization effect and the piezoelectric polarization effect, the interface layer (more specifically, the channel layer) A two-dimensional electron gas region in which the two-dimensional electron gas is present in a high concentration is formed in the vicinity of the three interfaces).

  In order to generate such a two-dimensional electron gas, the interface has an average roughness in the range of 0.1 nm to 3 nm. It is formed to be in the range of 1 nm to 3 nm. Note that a mode in which a flat interface is formed beyond the range may be possible, but it is not realistic in view of cost and manufacturing yield.

  Preferably, the average roughness is in the range of 0.1 nm to 1 nm, and the mean square roughness of the surface of the barrier layer 4 in the 5 μm × 5 μm field of view is in the range of 0.1 nm to 1 nm. When the HEMT device is formed by forming the source electrode, the drain electrode, and the gate electrode on the epitaxial substrate 10 satisfying such a range, a better ohmic resistance is provided between the source and drain electrodes and the barrier layer 4. Characteristics can be obtained, and better Schottky characteristics can be obtained between the gate electrode and the barrier layer 4. In addition, the confinement effect of the two-dimensional electron gas is further enhanced, and a two-dimensional electron gas with a higher concentration is generated.

  Various semiconductor elements such as HEMT elements and diode elements can be obtained by appropriately providing electrode patterns and other components to the epitaxial substrate 10 having the above-described configuration.

<Buffer layer>
Next, the buffer layer 2 will be described in more detail. The buffer layer 2 is formed by the deterioration of the crystal quality caused by the difference in lattice constant or the difference in thermal expansion coefficient between the underlying substrate 1 and the functional layers such as the channel layer 3 and the barrier layer 4 formed thereon, and the epitaxial substrate 10. This layer is provided for the purpose of suppressing the occurrence of warpage and cracks. In the present embodiment, the buffer layer 2 is constituted by three layers of a first buffer layer 21, a second buffer layer 22, and a third buffer layer 23 having different compositions. In the following, the case where the third buffer layer 23 is a lattice-hole inner layer will be described.

  The first buffer layer 21 is a layer made of AlN. The first buffer layer 21 is formed to have a thickness of about 40 nm to 200 nm.

The second buffer layer 22 is formed on the channel layer 3 and has a composition of In _xx Al _yy Ga _zz N (xx + yy + zz = 1, 0 ≦ xx <1, 0 ≦ yy <1, 0 <zz ≦ 1). It is a layer made of group III nitride. Preferably, the second buffer layer 22 is made of a group III nitride having a composition of Al _yy Ga _zz N (yy + zz = 1, 0 ≦ yy <1, 0 <zz ≦ 1). The second buffer layer 22 is formed to have a thickness of about several tens of nm.

The third buffer layer 23 has at least a group III atom abundance ratio lower than the stoichiometric ratio (group III atom: nitrogen atom = 1: 1), and there is a lattice vacancy at the position where the group III atom is arranged in the crystal lattice. This is a lattice defect underlying layer. Or, furthermore, the arrangement positions of nitrogen atoms may be lattice vacancies. That is, the third buffer layer 23, when the group III nitride V ^III represents the group III atoms defects, V ^N denote the N atom _{defects, In x Al y Ga z V} III p N (1-q ₎ V ^N _q (0 ≦ x ≦ 1, 0 <y ≦ 1, 0 ≦ z ≦ 1, 0 <p <1, x + y + z + p = 1, 0 ≦ q <1) Made of Group III nitride. Here, it is preferable that the value of p representing the ratio of group III atom defects satisfies 0.01 ≦ p ≦ 0.20. In addition, any group III atom may be arranged at lattice vacancies, but if the epitaxial substrate 10 is manufactured in the manner described later, the vapor pressure of In is higher than the vapor pressures of Ga and Al. Therefore, the arrangement position of In atoms tends to preferentially become lattice vacancies. The thickness of the third buffer layer 23 is preferably 30 nm or less. When the thickness exceeds 30 nm, white turbidity occurs on the surface of the epitaxial substrate 10. Such white turbidity is not preferable because two-dimensional electron gas density and electron mobility are extremely reduced. Such cloudiness can also occur when the formation conditions of the third buffer layer 23 are not appropriate.

  In the epitaxial substrate 10, the channel layer 3 and the barrier layer 4 are formed on the buffer layer 2 having such a configuration, so that the channel layer 3 is at least in contact with the buffer layer 2 (in other words, In the vicinity of the interface with the buffer layer 2, the compressive strain in the in-plane direction is inherent. In such an embodiment, when compressive strain acts on the inside, the occurrence of cracks and warpage in the epitaxial substrate 10 are suppressed. Specifically, when the radius of curvature is measured, a value of 100 m or more is obtained.

The dislocation density of the functional layer composed of the channel layer 3 and the barrier layer 4 is 6 × 10 ⁹ / cm ² or less. The value of dislocation density when a group III nitride layer group having the same total film thickness is formed on a sapphire substrate or SiC substrate via a low-temperature GaN buffer layer or the like by MOCVD is approximately 5 × 10 ⁸ to 1 × 10 ^10. since the range of / cm ^2, the above results, the epitaxial substrate dislocation density and the case of using a sapphire substrate or SiC substrate is same degree, inexpensive single-crystal silicon wafer than the sapphire substrate as the base substrate 1 It means that it was realized by using.

In addition, the electron mobility and the two-dimensional electron gas density of the epitaxial substrate 10 cannot be uniformly shown because they are dependent on the barrier layer composition and the barrier layer thickness, but are 1000 to 1500 cm ² / Vs, 1 It is about 0.0 × 10 ^{13 to} 2.0 × 10 ¹³ / cm ² , and the specific resistance of the channel layer is about 1 × 10 ⁵ to 1 × 10 ⁸ Ωcm. Also in these cases, like the dislocation density, the total film thickness using the sapphire substrate or the SiC substrate is the same value as that of the same epitaxial substrate (hereinafter, conventional substrate).

  Therefore, by forming a semiconductor element using an epitaxial substrate having such characteristics, it is possible to stably obtain a semiconductor element having a withstand voltage equivalent to that when a conventional substrate having the same total film thickness is used. It becomes.

  As described above, according to the present embodiment, a silicon substrate is used as a base substrate, and a buffer layer is formed between the base substrate and the channel layer, and at least a part of the buffer layer is a lattice vacant layer. As a result, it is possible to suppress the warpage and to realize an epitaxial substrate having characteristics similar to those when a sapphire substrate or a SiC substrate is used.

  In the above description, the case where the silicon substrate is used as the base substrate has been described. However, the effect of suppressing warpage by using at least a part of the buffer layer as the lattice hole inner layer is different from that of other types. Even in the case of using the underlying substrate, it can be obtained similarly.

<Epitaxial substrate manufacturing method>
Next, an outline of a method for manufacturing the epitaxial substrate 10 will be described by taking the case of using the MOCVD method as an example.

  First, a (111) plane single crystal silicon wafer is prepared as the base substrate 1, and the natural oxide film is removed by dilute hydrofluoric acid cleaning. Is formed. This is set in the reactor of the MOCVD apparatus.

Then, each layer is formed under a predetermined heating condition and gas atmosphere. First, the first buffer layer 21 made of AlN is a TMA which is an aluminum raw material in a state where the substrate temperature is kept at a predetermined formation temperature of 800 ° C. or more and 1200 ° C. or less and the reactor internal pressure is about 0.1 kPa to 30 kPa. (Trimethylaluminum) Bubbling gas and NH ₃ gas are introduced into the reactor at an appropriate molar flow ratio, and the film formation rate is set to 20 nm / min or more and the target film thickness is set to 200 nm or less. it can.

After the formation of the first buffer layer 21, the second buffer layer 22 is formed in a state where the substrate temperature is maintained at a predetermined formation temperature of 800 ° C. or higher and 1200 ° C. or lower and the reactor pressure is 0.1 kPa to 100 kPa. Depending on the composition of the second buffer layer 22 to be produced, TMG (trimethylgallium) bubbling gas and NH ₃ gas as raw materials, or TMI (trimethylindium) bubbling gas or TMA bubbling gas as indium raw materials are used. It is realized by introducing into the reactor at a predetermined flow rate ratio and reacting NH ₃ with at least one of TMI, TMA, and TMG.

In the formation of the third buffer layer 23, after the formation of the second buffer layer 23, first, In _{x ′} Aly _′ Gaz _′ N (0 ≦ x ′ ≦ 1, 0 <y ′ ≦ 1, 0 ≦ z ′) A layer made of a group III nitride represented by a composition formula of ≦ 1, x ′ + y ′ + z ′ = 1) (this is referred to as an initially formed layer) is formed. Such an initially formed layer is a layer containing a group III atom and a nitrogen atom in a stoichiometric ratio. This is because the TMG bubbling gas, the TMI bubbling gas, the TMA bubbling gas, and the NH ₃ gas are kept in the state where the substrate temperature is kept at a predetermined formation temperature of 650 ° C. or more and 900 ° C. or less and the pressure in the reactor is 1 kPa to 30 kPa. It implement | achieves by introduce | transducing in a reactor by the predetermined | prescribed flow rate ratio according to a composition.

When the initial formation layer is formed, the introduction of TMG bubbling gas, TMI bubbling gas, and TMA bubbling gas into the reactor is stopped, and the reactor is set so that the hydrogen partial pressure in the reactor becomes a value in the range of 5 kPa to 100 kPa. The total pressure and the supply flow rate of NH ₃ gas, N ₂ gas, and H ₂ gas are adjusted. Then, the substrate temperature is kept in the range of 900 ° C. to 1300 ° C. and left for 3 minutes to 10 minutes. Then, the group III atoms are detached from the initial formation layer in the process of being left to heat. When In atoms are present in the initially formed layer, In atoms having a high vapor pressure are desorbed preferentially over Al atoms and Ga atoms. Thereby, the third buffer layer 23 including the lattice vacancies is formed.

  In addition, when forming the 3rd buffer layer 23 by such a method, it is confirmed beforehand that a clear change does not arise in the average film thickness of the 3rd buffer layer 23 after an initial formation layer before heating leaving and the heating leaving stand. ing. Therefore, in forming the third buffer layer 23, the third buffer layer 23 having a desired thickness can be formed by forming an initial formation layer having a thickness corresponding to the target film thickness.

The channel layer 3 and the barrier layer 4 are formed after the third buffer layer 23 is formed in a state where the substrate temperature is maintained at a predetermined formation temperature of 800 ° C. or higher and 1200 ° C. or lower and the reactor pressure is 0.1 kPa to 100 kPa. At least one of TMI bubbling gas, TMA bubbling gas, or TMG bubbling gas and NH ₃ gas are introduced into the reactor at a flow ratio according to the composition of the channel layer 3 and the barrier layer 4 to be produced. _This is realized by reacting ₃ with at least one of TMI, TMA, and TMG.

  According to the above method, in the process of forming the buffer layer, after the initial formation layer is provided, the lattice vacancy inner layer is formed by a method that is extremely easy to realize by heating and leaving under a predetermined gas atmosphere. Therefore, as a result, an epitaxial substrate in which warpage is suppressed can be stably manufactured with a high yield.

<Second Embodiment>
As described above, it is possible to suppress the warpage of the epitaxial substrate by providing the lattice vacant layer in at least a part of the buffer layer 2. In the present embodiment, an epitaxial substrate having buffer layer 2 having a configuration different from that of epitaxial substrate 10 according to the first embodiment will be described. In the following, constituent elements having the same operational effects as constituent elements of epitaxial substrate 10 according to the first embodiment will be given the same reference numerals and detailed description thereof will be omitted.

  FIG. 2 is a schematic cross-sectional view schematically showing the configuration of the epitaxial substrate 20 according to the second embodiment of the present invention. The epitaxial substrate 20 is different from the epitaxial substrate 10 according to the first embodiment in that the buffer layer 2 includes a fourth buffer layer 24 having a superlattice structure on the third buffer layer 23.

The fourth buffer layer 24 is formed by alternately and alternately stacking the first unit layer 24a and the second unit layer 24b, which are two types of group III nitride layers having different compositions, on the third buffer layer 23. Formed. Here, a set of one first unit layer 24a and one second unit layer 24b is also referred to as a pair layer. The first unit layer 24a is formed with Al _w Ga _1-w N (0 ≦ w ≦ 1) to a thickness of about several tens of nm, and the second unit layer 24b is formed with AlN to a thickness of about several nm. Is a suitable example.

  By providing the fourth buffer layer 24, the total film thickness of the group III nitride layer group in the epitaxial substrate 10 is increased, and as a result, the withstand voltage in the semiconductor element is improved. Even when the fourth buffer layer 24 is provided, the crystal quality of the channel layer 3 and the barrier layer 4 is sufficiently good (not having the fourth buffer layer 24) if the formation conditions are suitably set. As much as the case).

  By providing such a fourth buffer layer 24, the epitaxial substrate 20 has a group III nitride layer group (buffer layer 2) formed on the base substrate 1 rather than the epitaxial substrate 10 according to the first embodiment. The channel layer 3 and the barrier layer 4 as a whole are made thick. Therefore, by using the epitaxial substrate 20, it is possible to form a semiconductor element having higher withstand voltage than when the epitaxial substrate 10 is used. The withstand voltage of the semiconductor element is the same as that in the case of using a conventional substrate having the same total film thickness, as in the first embodiment.

Example 1
In this example, the epitaxial substrate 10 according to the first embodiment was produced. Specifically, seven types of epitaxial substrates 10 (samples a-1 to a-7) having different compositions of the third buffer layer 23 were produced. FIG. 3 shows the composition of the initially formed layer, the composition of the third buffer layer 23 obtained after being left to heat, and various evaluation results for the epitaxial substrate 10 according to Example 1.

  First, for each sample, a (111) plane single crystal silicon wafer (hereinafter referred to as a silicon wafer) was prepared as the base substrate 1. The prepared silicon wafer was washed with dilute hydrofluoric acid with a composition of hydrofluoric acid / pure water = 1/10 (volume ratio) and sulfuric acid / hydrogen peroxide solution = 1/1 (volume ratio). An SPM cleaning with a cleaning liquid was performed to form an oxide film having a thickness of several millimeters on the wafer surface, which was set in the reactor of the MOCVD apparatus. Next, the reactor was heated to a hydrogen / nitrogen mixed atmosphere until the substrate temperature reached 1050 ° C., which is the channel layer formation temperature.

When the substrate temperature reached 1050 ° C., NH ₃ gas was introduced into the reactor, and the substrate surface was exposed to an NH ₃ gas atmosphere for 5 minutes.

Then, TMA bubbling gas was introduced into the reactor, and NH ₃ and TMA were reacted to form an AlN layer as the first buffer layer 21 so that the average film thickness was about 100 nm. At that time, the pressure in the reactor was 10 kPa.

When the first buffer layer 21 is formed, subsequently, the substrate temperature is set to 1050 ° C., the pressure in the reactor is set to 10 kPa, TMG bubbling gas is further introduced into the reactor, and the reaction of NH ₃ with TMA and TMG An Al _0.3 Ga _0.7 N layer as the second buffer layer 22 was formed to have an average film thickness of about 50 nm.

When the second buffer layer 22 is formed, subsequently, the substrate temperature is set to 800 ° C., the pressure in the reactor is set to 10 kPa, TMI bubbling gas is further introduced into the reactor, and the reaction between NH ₃ , TMA, TMG, and TMI is performed. Thus, an In _{x ′} Al _{y ′} Gaz _′ N layer as an initial formation layer was formed so as to satisfy the composition ratio shown in FIG. At that time, the average film thickness of the initially formed layer was set to about 20 nm.

When the initial formation layer is formed, the introduction of TMA, TMG, and TMI into the reactor is stopped, and the total pressure and NH ₃ gas, N ₂ gas, so that the hydrogen partial pressure in the reactor becomes 50 kPa, After adjusting the flow rate of H ₂ gas and the H ₂ gas, the substrate temperature was set to 1050 ° C., and the substrate was heated for 5 minutes to desorb group III atoms. However, the hydrogen partial pressure was set to 5 kPa only for sample a-6. It should be noted that there was no clear change in the average film thickness of the initially formed layer before being left to heat and the third buffer layer 23 after being left to heat.

  Regarding the samples a-1 to a-7, the composition of the third buffer layer 23 was examined by XPS (X-ray photoelectron spectroscopy). As shown in FIG. 3, among the obtained samples a-1 to a-7, In addition, it was confirmed that In was desorbed except for sample a-1 in which In was not included in the initially formed layer. In particular, In was completely detached from the third buffer layer 23 except for the sample a-6. In sample a-1, the elimination of other group III atoms was not observed. That is, in the sample a-1, the third buffer layer 23 had a stoichiometric ratio even after being left to heat.

  Further, when XRD (X-ray diffraction) measurement was performed on each of the initially formed layer and the third buffer layer 23, there was almost no difference in the position of the diffraction peak between the two. This means that the third buffer layer 23 has lattice vacancies while maintaining the crystal lattice of the initially formed layer.

After the formation of the third buffer layer 23, the substrate temperature was set to 1050 ° C., the reactor internal pressure was set to 30 kPa, and TMG and NH ₃ were reacted to form the GaN layer as the channel layer 3 with a thickness of about 1 μm.

Next, the substrate temperature was 1050 ° C., the pressure in the reactor was 10 kPa, and TMA, TMG, and NH ₃ were reacted to form an Al _0.2 Ga _0.8 N layer as the barrier layer 4 with a thickness of 20 nm.

  Thus, the epitaxial substrate 10 was obtained. In the obtained epitaxial substrate 10, the total film thickness of the group III nitride layer group formed on the silicon wafer was about 1.2 μm.

  Furthermore, about the obtained epitaxial substrate, the measurement of the curvature radius, the measurement of a crack density, and the presence or absence of white turbidity generation were performed.

  The radius of curvature was measured by analyzing the image of interference fringes by a laser incident interferometer using the phase shift method. As a result, as shown in FIG. 3, a value of 100 m or more was obtained except for the sample a-1. Such a result indicates that an epitaxial substrate in which warpage is suppressed can be obtained by providing the third buffer layer 23 as an inner layer of lattice vacancies.

  The crack density was measured by counting the number of cracks crossing the unit length straight line drawn on the differential interference microscope image. As a result, as shown in FIG. 3, no cracks were confirmed except for the sample a-5. The result shows that an epitaxial substrate in which the occurrence of cracks is suppressed can be obtained by setting the abundance ratio p of the lattice vacancies to 0.2 or less.

  The presence or absence of white turbidity was evaluated visually. In this example, no cloudiness was observed in any of samples a-1 to a-7.

(Example 2)
Various evaluations were further performed on the epitaxial substrate of the sample a-3 obtained in Example 1.

  First, the electron mobility, two-dimensional electron density, specific resistance, and dislocation density of the AlGaN / GaN laminated structure of the channel layer 3 and the barrier layer 4 were measured.

As a result, the electron mobility was about 1300 cm ² / Vs, the two-dimensional electron density was about 1 × 10 ¹³ / cm ² , and the specific resistance of the channel layer was 1 × 10 ⁸ Ωcm. The dislocation density was 4 × 10 ⁹ / cm ² . These are the same values as the GaN layer of the conventional substrate.

  Further, the lattice length (c-axis length) of GaN constituting the channel layer 3 was measured using an NDB method (nano-beam diffraction method). As a result, the c-axis length of the part in contact with the buffer layer 2 was 0.5190 nm. This is a value larger than the value of 0.5185 nm of the c-axis length of bulk GaN. Such a result indicates that the channel layer 3 inherently has a compressive strain in the in-plane direction at least at a portion in contact with the buffer layer 2.

  Furthermore, in order to investigate the Schottky characteristics, a Schottky diode was fabricated using Sample a-3. Specifically, a Pt electrode as an anode electrode and a Ti / Al ohmic electrode as a cathode electrode were formed on the barrier layer 4 by a photolithography process, and a concentric Schottky diode with an electrode interval of 10 μm was produced. .

With respect to the obtained Schottky diode, the reverse current-voltage characteristics were evaluated in a state where the silicon wafer and the cathode electrode were both grounded. As a result, the leakage current at an applied voltage of 100 V was 1 × 10 ⁻⁵ A / cm ² and the withstand voltage was 180 V. These values are comparable to the leakage current and the withstand voltage of a Schottky diode manufactured in the same manner using a conventional substrate.

(Comparative Example 1)
In this comparative example, an epitaxial substrate was fabricated under the same conditions as Sample a-3, except that heating was not performed after the initial formation layer was formed. That is, an epitaxial substrate that does not have a lattice hole inner layer was produced.

  The obtained epitaxial substrate was measured for the radius of curvature and the crack density in the same manner as in Example 1. As a result, no crack was confirmed, but the value of the radius of curvature was 10 m, which was very small compared to Example 1. That is, in this comparative example, only an epitaxial substrate having a warp large enough to be unsuitable for forming a semiconductor element was obtained.

  Similarly to Example 1, when the lattice length (c-axis length) of GaN constituting the channel layer 3 was measured using the NDB method, the c-axis length of the portion in contact with the buffer layer 2 was Unlike the bulk GaN value, it was 0.5175 nm.

  When the above results are compared with the above-mentioned Example 1, it can be said that the heating and leaving performed in Example 1 is effective in providing the lattice-hole-internal layer.

(Example 3)
In this example, a plurality of epitaxial substrates 10 (samples b-1 to b-5) having the same composition as the sample a-3 but having different thicknesses of the third buffer layer 23 were produced. The thickness of the third buffer layer 23 was adjusted by changing the initial formation layer formation time. FIG. 4 shows the thickness of the third buffer layer 23 and various evaluation results for the epitaxial substrate 10 according to the third embodiment.

  The results shown in FIG. 4 indicate that when the thickness of the third buffer layer 23 is 30 nm or less, the warpage is suppressed, the crack is not generated, and the epitaxial substrate 10 which does not cause white turbidity is formed.

Example 4
In this example, 12 types of epitaxial substrates 10 (samples c-1 to c-12) having the same composition as that of the sample a-3 but having different heating conditions for forming the third buffer layer 23 are produced. did. Specifically, the epitaxial substrate 10 was produced under the same conditions as in Example 1 except that the hydrogen partial pressure, temperature, and time when the third buffer layer 23 was left to heat were different. FIG. 5 shows the conditions of the heating standing when the third buffer layer 23 is formed and various evaluation results for the epitaxial substrate 10 according to Example 4.

  The results shown in FIG. 5 show that the hydrogen partial pressure in the reactor is a value in the range of 5 kPa to 100 kPa, the substrate temperature is kept in the range of 900 ° C. to 1300 ° C., and the standing time is 3 minutes to 10 minutes. This indicates that the epitaxial substrate 10 in which warpage is suppressed, cracks are not generated, and white turbidity does not occur is formed.

(Example 5)
In this example, the epitaxial substrate 20 according to the second embodiment was produced. Specifically, the process up to the third buffer layer 23 is performed in the same manner as the sample a-3 in Example 1, and then the channel layer 3 and the barrier layer 4 are formed in Example 1 after the fourth buffer layer 24 is formed. The sample a-3 was formed in the same manner. In forming the fourth buffer layer 24, the first unit layer 24a was a 20 nm thick Al _0.1 Ga _0.9 N layer, and the second unit layer 24b was a 5 nm thick AlN layer. Each of them was alternately formed by 80 layers.

  In the epitaxial substrate 20 thus obtained, the total film thickness of the group III nitride layer group formed on the silicon wafer was about 3.2 μm. Further, when the radius of curvature was measured, a value of 100 m was obtained.

  In addition, the electron mobility, two-dimensional electron density, specific resistance, and dislocation density of the AlGaN / GaN laminated structure of the channel layer 3 and the barrier layer 4 were measured.

As a result, the electron mobility was about 1300 cm ² / Vs, the two-dimensional electron density was about 1 × 10 ¹³ / cm ² , and the specific resistance of the channel layer was 1 × 10 ⁸ Ωcm. The dislocation density was 4 × 10 ⁹ / cm ² . These are values similar to those of the sample a-3.

  Further, the lattice length (c-axis length) of GaN constituting the channel layer 3 was measured using the NDB method. As a result, the c-axis length of the portion in contact with the buffer layer 2 was 0.5195 nm. This is a value larger than the value of 0.5185 nm of the c-axis length of bulk GaN. Such a result indicates that also in the epitaxial substrate 20 according to the second embodiment, the channel layer 3 inherently has a compressive strain in the in-plane direction at least at a portion in contact with the buffer layer 2.

  Furthermore, a Schottky diode was fabricated in order to investigate the Schottky characteristics. Specifically, a Pt electrode as an anode electrode and a Ti / Al ohmic electrode as a cathode electrode were formed on the barrier layer 4 by a photolithography process, and a concentric Schottky diode with an electrode interval of 10 μm was produced. .

With respect to the obtained Schottky diode, the reverse current-voltage characteristics were evaluated in a state where the silicon wafer and the cathode electrode were both grounded. As a result, the leakage current at an applied voltage of 100 V was 1 × 10 ⁻⁵ A / cm ² and the withstand voltage was 400 V. That is, it was confirmed that a higher withstand voltage can be obtained by providing the fourth buffer layer 24 and increasing the total thickness of the group III nitride layer group.

(Comparative Example 2)
In this comparative example, an epitaxial substrate having a buffer layer structure similar to that of the epitaxial substrate 20 according to the second embodiment but having no lattice vacancy inner layer was produced. Specifically, production was performed under the same conditions as in Example 5 except that the initially formed layer was not heated and left after formation.

  The obtained epitaxial substrate had many cracks of 6 / mm, and the epitaxial substrate was unsuitable for use in a semiconductor element process.

  Comparing the above results with Example 5, as in the case of comparing Example 1 with Comparative Example 1, it was found that the heating leaving in Example 5 was effective in providing the lattice vacancy inner layer. I can say that.

DESCRIPTION OF SYMBOLS 1 Base substrate 2 Buffer layer 3 Channel layer 4 Barrier layers 10 and 20 Epitaxial substrate 21 First buffer layer 22 Second buffer layer 23 Third buffer layer 24 Fourth buffer layer

Claims (10)

An epitaxial substrate for a semiconductor device, in which a group (III) crystal plane is laminated on a base substrate so that a (0001) crystal plane is substantially parallel to the substrate surface of the base substrate,
The group III nitride layer group is
A buffer layer in which at least two Group III nitride layers are laminated;
A channel layer made of a group III nitride having a composition of In _x1 Al _y1 Ga _z1 N (0 ≦ x1 ≦ 1, 0 ≦ y1 ≦ 1, 0 <z1 ≦ 1, x1 + y1 + z1 = 1),
A barrier layer made of a group III nitride having a composition of In _x2 Al _y2 Ga _z2 N (0 ≦ x2 ≦ 1, 0 <y2 ≦ 1, 0 ≦ z2 ≦ 1, x2 + y2 + z2 = 1);
With
At least one of the buffer layers is a lattice-hole-internal layer having lattice vacancies,
An epitaxial substrate for a semiconductor device, characterized in that: The epitaxial substrate according to claim 1,
The lattice vacancies underlying layer, V ^III represents the group III atoms defects, if V ^N denote the N atom _{defects, In x Al y Ga z V} III p N (1-q) V N q ( A group III nitride represented by a composition formula of 0 ≦ x ≦ 1, 0 <y ≦ 1, 0 ≦ z ≦ 1, 0 <p <1, x + y + z + p = 1, 0 ≦ q <1),
An epitaxial substrate for a semiconductor device, characterized in that: The epitaxial substrate according to claim 1 or 2, wherein
0.01 ≦ p ≦ 0.20,
An epitaxial substrate for a semiconductor device, characterized in that: The epitaxial substrate according to any one of claims 1 to 3, wherein
The thickness of the lattice vacancy inner layer is 2 nm or more and 30 nm or less,
An epitaxial substrate for a semiconductor device, characterized in that: The epitaxial substrate according to any one of claims 1 to 4, wherein
The channel layer has a compressive strain in the in-plane direction at least at a portion in contact with the buffer layer.
An epitaxial substrate for a semiconductor device, characterized in that:   A semiconductor element formed using the epitaxial substrate for a semiconductor element according to claim 1. A method of manufacturing an epitaxial substrate for a semiconductor device by forming a group III nitride layer group on a base substrate so that a (0001) crystal plane is substantially parallel to the substrate surface,
A buffer layer forming step of forming a buffer layer by laminating at least two group III nitride layers on the base substrate;
A channel layer made of a group III nitride having a composition of In _x1 Al _{y1 Gaz1} N (0 ≦ x1 ≦ 1, 0 ≦ y1 ≦ 1, 0 <z1 ≦ 1, x1 + y1 + z1 = 1) is formed on the buffer layer. A channel layer forming step;
A barrier layer forming step of forming a barrier layer made of a group III nitride having a composition of In _x2 Al _y2 Ga _z2 N (0 ≦ x2 ≦ 1, 0 <y2 ≦ 1, 0 ≦ z2 ≦ 1, x2 + y2 + z2 = 1);
With
In the buffer layer forming step, at least one of the buffer layers is formed as a lattice-hole-internal layer having lattice vacancies,
A method for producing an epitaxial substrate for a semiconductor device, comprising: A method for producing an epitaxial substrate for a semiconductor device according to claim 7,
In the buffer layer forming step, In _{x ′} Al _{y ′} Gaz _′ N (0 ≦ x ′ ≦ 1, 0 <y ′ ≦ 1, 0 ≦ z ′ ≦ 1, x ′ + y ′ + z ′ = 1). When a layer made of a group III nitride represented by the composition formula is formed and annealed, when V ^III represents a group III atom defect and V ^N represents an N atom defect, In _x Al _y Ga _z V ^III _p N _(1-q) V ^N _q (0 ≦ x <x ′, 0 <y ≦ 1, 0 ≦ z ≦ 1, 0 <p <1, x + y + z + p = 1, 0 ≦ q <1) Forming the lattice void inner layer represented by the composition formula:
A method for producing an epitaxial substrate for a semiconductor device, comprising: A method for producing an epitaxial substrate for a semiconductor device according to claim 7 or 8,
Annealing to form the lattice vacancy inner layer,
In an atmosphere with a hydrogen partial pressure of 5 kPa to 100 kPa and a temperature of 900 ° C. to 1250 ° C., with a holding time of 3 minutes to 10 minutes,
A method for producing an epitaxial substrate for a semiconductor device, comprising: The epitaxial substrate for semiconductor devices produced using the manufacturing method of the epitaxial substrate for semiconductor devices in any one of Claims 7 thru | or 9.

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