JP2011067029A - Power semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To lower a tolerable power of a limit resistor, reduce heating, and miniaturize a power semiconductor device which is equipped with a bootstrap circuit for obtaining a high side power supply voltage. <P>SOLUTION: The power semiconductor device includes a bootstrap circuit for generating a high side power supply voltage which is supplied to a high side drive unit 20 for driving a high side switching element Q2W of an inverter. A low side switching element Q1W is turned on for a predetermined period just after power supply for initial charging with a bootstrap capacitor 3. During the first half of the predetermined period, the low side switching element Q1W is intermittently turned on for intermittently charging the bootstrap capacitor 3. During the second half period, the low side switching element Q1W is fixed at on state for continuous charging of the bootstrap capacitor 3. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a power semiconductor device (power semiconductor device), and relates to a power semiconductor device that generates a high-side power supply voltage using a bootstrap circuit.

  In the field of power control systems using inverter circuits, power semiconductors that can be driven by a single power supply by generating a drive power supply voltage (high-side power supply voltage) for the high-side switching element of the inverter circuit using a bootstrap circuit Devices (power semiconductor devices) are known. The bootstrap circuit of such a power semiconductor device includes a diode (bootstrap diode) and a capacitor (bootstrap capacitor) connected in series between the power supply and the output node of the inverter circuit. In order to limit the initial charging current (inrush current), a resistance element (limit resistance) is directly connected to the bootstrap diode.

  Patent Document 1 below discloses a technique for performing a charging operation by a bootstrap circuit by controlling only a high-side (upper arm) switching element of an inverter circuit at the start of rotation of a motor by PWM (Pulse Width Modulation) control. . This prevents insufficient charging by the bootstrap circuit at the time of low-speed rotation startup.

JP 2000-23484 A

  The limiting resistance of the bootstrap circuit tends to have a relatively large formation area because a large allowable power required to withstand the initial charging current is required. For example, a power module in which an inverter circuit, a drive circuit, a protection circuit, and the like are housed in one package is known as an IPM (intelligent power module). However, in recent years, a diode or a limiting resistor for forming a bootstrap circuit is also included. A built-in power module has been proposed, and a limiting resistor that requires a large allowable power is one of the factors that hinder the miniaturization of the power module. In addition, the power loss at the limiting resistor due to the initial charging current is large, and there is also a problem of heat generation.

  The present invention has been made to solve the above-described problems. In a power semiconductor device including a bootstrap circuit for obtaining a high-side power supply voltage, the allowable power of a limiting resistor is reduced and heat generation is reduced. And it aims at contributing to size reduction of an apparatus.

  The power semiconductor device according to the present invention includes an inverter in which a low-side first switching element and a high-side second switching element are connected in series, a first drive circuit that drives the first switching element, and the second A second driving circuit for driving the switching element; a bootstrap circuit including a diode and a capacitor connected in series between a power supply and an output node of the inverter, and generating a high-side power supply voltage to be supplied to the second driving circuit; The first drive circuit charges the capacitor by turning on the first switching element during a predetermined period immediately after the power is turned on, and intermittently turns on the first switching element during the first half of the predetermined period. In the second half, a continuous charging operation for maintaining the first switching element on is performed. Is Umono.

  By performing intermittent charging in the first half of the initial charge of the capacitor of the bootstrap circuit, heat generation of the limiting resistor can be suppressed, and by performing continuous charging in the second half, an increase in charging time can be suppressed. Since the allowable power of the limiting resistor can be set small, the area for forming the limiting resistor can be reduced, which can contribute to the miniaturization of the power semiconductor device and the reduction of the manufacturing cost.

It is a block diagram of the power semiconductor device which concerns on each embodiment of this invention. 1 is a block diagram showing a configuration of a power semiconductor device according to a first embodiment. 6 is a diagram for explaining an initial charging operation of the power semiconductor device according to the first embodiment. FIG. FIG. 6 is a block diagram showing a configuration of a power semiconductor device according to a second embodiment. FIG. 10 is a diagram for explaining an initial charging operation of the power semiconductor device according to the second embodiment. FIG. 6 is a block diagram showing a configuration of a power semiconductor device according to a third embodiment. FIG. 10 is a diagram for explaining an initial charging operation of a power semiconductor device according to a third embodiment. FIG. 10 is a block diagram showing a configuration of a power semiconductor device according to a fourth embodiment. FIG. 10 is a diagram for explaining an initial charging operation of a power semiconductor device according to a fourth embodiment.

<Embodiment 1>
FIG. 1 is a configuration diagram of a power semiconductor device according to an embodiment of the present invention. In the present embodiment, an IPM for driving a three-phase motor is taken as an example, but for the sake of simplicity of explanation, only the W phase of the three phases (U, V, W) is shown in FIG.

  The power module 100 includes an inverter circuit in which a low-side switching element Q1W (first switching element) and a high-side switching element Q2W (second switching element) are connected in series, and a low-side driving unit 10 that drives the low-side switching element Q1W (first 1 driving circuit) and a high side driving unit 20 (second driving circuit) for driving the high side switching element Q2W. In the present embodiment, IGBTs are used as the low side switching element Q1W and the high side switching element Q2W, and free wheel diodes D1W and D2W are provided in the low side switching element Q1W and the high side switching element Q2W, respectively.

  The power module 100 further includes a control power supply 1 that outputs a control power supply voltage VD, a control circuit 2 that controls the low-side drive unit 10 and the high-side drive unit 20, and a current that flows through the low-side switching element Q1W. A current detection resistor 6 is connected.

  The power module 100 includes a bootstrap diode 4 and a limiting resistor 5. By externally attaching the bootstrap capacitor 3 to the power module 100, a bootstrap circuit including the bootstrap capacitor 3, the bootstrap diode 4, and the limiting resistor 5 is configured, and a high-side power supply voltage can be obtained. Yes.

  As shown in FIG. 1, the low-side drive unit 10 includes a low-side input signal terminal WNIN, a low-side output signal terminal WNOUT, a control power supply terminal Vcc, a ground terminal GND, a control reference voltage terminal VNO, and a current detection sense terminal CIN. A control signal for the low-side switching element Q1W output from the control circuit 2 is input to the low-side input signal terminal WNIN. The low side output signal terminal WNOUT is connected to the control electrode (gate) of the low side switching element Q1W. The low side drive unit 10 generates a drive signal for the low side switching element Q1W based on the control signal from the control circuit 2, thereby driving the low side switching element Q1W. A control power supply voltage VD output from the control power supply 1 is supplied to the control power supply terminal Vcc, and a ground potential is supplied to the ground terminal GND and the control reference voltage terminal VNO.

  The current detection sense terminal CIN is connected to the emitter of the low-side switching element Q1W (IGBT), and is connected to the ground potential through the current detection resistor 6. Therefore, a voltage generated in the current detection resistor 6 is input to the current detection sense terminal CIN, and the low side drive unit 10 can measure the current of the low side switching element Q1W based on the voltage. When the low-side drive unit 10 detects an overcurrent of the low-side switching element Q1W, it performs a short-circuit protection operation (for example, immediately shuts off the low-side switching element Q1W).

  On the other hand, the high side driver 20 includes a high side input signal terminal WPIN, a high side output signal terminal WPOUT, a control power supply terminal Vcc, a common ground terminal COM, a high side power supply terminal VB, and a high side reference voltage terminal VS. A control signal for the high side switching element Q2W output from the control circuit 2 is input to the high side input signal terminal WPIN. The high side output signal terminal WPOUT is connected to the control electrode (gate) of the high side switching element Q2W. The high side drive unit 20 generates a drive signal for the high side switching element Q2W based on the control signal from the control circuit 2, thereby driving the high side switching element Q2W. A control power supply voltage VD output from the control power supply 1 is supplied to the control power supply terminal Vcc, and a ground potential is supplied to the common ground terminal COM in the same manner as the ground terminal GND of the low-side drive unit 10.

  The high side reference voltage terminal VS is connected to the emitter of the high side switching element Q2W (that is, the output node of the inverter circuit), and the voltage of the high side reference voltage terminal VS becomes the reference voltage of the high side signal.

  A high-side power supply voltage for driving the high-side switching element Q2W is supplied to the high-side power supply terminal VB. In the present embodiment, this voltage is supplied to the bootstrap capacitor 3, the bootstrap diode 4, the limiting resistor 5, and the control. It is generated by a bootstrap circuit comprising a power supply 1.

  The bootstrap diode 4 and the limiting resistor 5 are connected in series between the control power supply terminal Vcc (control power supply 1) of the high side drive unit 20 and the high side power supply terminal VB. The bootstrap capacitor 3 is externally attached to the power module 100 so as to be connected between the high-side power supply terminal VB and the high-side reference voltage terminal VS (output node of the inverter circuit) of the high-side drive unit 20.

  FIG. 2 is a block diagram showing a configuration of the power semiconductor device according to the first embodiment. In the figure, elements corresponding to those shown in FIG. FIG. 2 shows three inverters for driving the three-phase motor M. Here, for simplicity of explanation, only the W phase will be representatively described.

  The low side drive unit 10 includes a low side drive circuit 11, a low side input circuit 12, and a current detection circuit 14. The control signal for the low-side switching element Q1W supplied from the control circuit 2 is input to the low-side drive circuit 11 through the low-side input circuit 12. The low side drive circuit 11 generates a drive signal for the low side switching element Q1W based on the control signal, and drives the low side switching element Q1W.

  The current detection circuit 14 measures the current of the low-side switching element Q1W based on the voltage generated in the current detection resistor 6, and outputs a signal corresponding to the current value to the low-side drive circuit 11. The low-side drive circuit 11 monitors the current value of the low-side switching element Q1W based on the signal, and performs a short-circuit protection operation when detecting that an overcurrent flows through the low-side switching element Q1W.

  The high side drive unit 20 includes a high side drive unit 20, a high side drive circuit 21, a high side input circuit 22, a level shift circuit 23, and a power supply voltage drop protection circuit 24. The control signal for the high-side switching element Q2W output from the control circuit 2 is sent to the level shift circuit 23 through the high-side input circuit 22, where a high-side signal (a signal based on the potential of the high-side reference voltage terminal VS) is sent. Then, the high-side drive circuit 21 is supplied. The high side drive circuit 21 generates a drive signal for the high side switching element Q2W based on the control signal, and drives the high side switching element Q2W.

  The power supply voltage drop protection circuit 24 monitors a high side power supply voltage VDB defined as a voltage between the high side reference voltage terminal VS and the high side power supply terminal VB. When the high side power supply voltage VDB falls below a predetermined value, the voltage is reduced. Set the drop detection signal to high level. When the high level of the voltage drop detection signal continues for a certain period, the high side drive circuit 21 performs a power supply voltage drop protection operation (for example, the input from the level shift circuit 23 is not accepted).

  FIG. 3 is a diagram illustrating an initial charging operation of the power semiconductor device according to the first embodiment. In the present embodiment, when the control power supply 1 supplied to the control power supply terminal Vcc is turned on, the control circuit 2 controls the low-side drive unit 10 to perform a predetermined period (hereinafter referred to as “initial charge” immediately after the control power supply 1 is turned on. Period "), the low side switching element Q1W is turned on and the bootstrap capacitor 3 is initially charged.

  As shown in FIG. 3, the control circuit 2 causes the low-side drive unit 10 to output an intermittent pulse drive signal in the first half of the initial charging period. Accordingly, the low side switching element Q1W is intermittently turned on, and the bootstrap capacitor 3 is intermittently charged (intermittent charging operation). In the second half of the initial charging period, the drive signal output by the low-side drive unit 10 is fixed at a high level. Therefore, during that period, the low-side switching element Q1W is fixed to the ON state, and the bootstrap capacitor 3 is continuously charged (continuous charging operation).

  At the start of the initial charging of the bootstrap capacitor 3, the current flowing through the limiting resistor 5 becomes particularly large, so heat generation (power loss) increases. However, by performing intermittent charging in the first half of the initial charging period, the heat generation is effective. Can be suppressed. In addition, intermittent charging has a drawback in that the time required for the initial charging of the bootstrap capacitor 3 becomes long. However, by continuously charging the bootstrap capacitor 3 in the latter half of the initial charging period, it is possible to suppress an increase in the charging time. It is done. In the present embodiment, the length of the period for intermittently charging the bootstrap capacitor 3 (switching timing from intermittent charge to continuous charge) is determined by the capacitance value of the bootstrap capacitor 3, the bootstrap diode 4 and the limiting resistor 5 It is assumed that it is set in advance based on the allowable power or the like.

  As described above, according to the present embodiment, it is possible to reduce the heat generation (power loss) of the limiting resistor 5 due to the initial charging current while suppressing the initial charging time of the bootstrap capacitor 3 from being prolonged. The allowable power of the resistor 5 can be set small. Therefore, the area where the limiting resistor 5 is formed can be reduced, which contributes to the miniaturization of the power control system and the power module and the reduction of the manufacturing cost.

<Embodiment 2>
As described above, in the first embodiment, the switching timing from intermittent charging to continuous charging (time t2 in FIG. 3) is based on the capacitance value of the bootstrap capacitor 3, the allowable power of the bootstrap diode 4 and the limiting resistor 5, and the like. Need to be set in advance. In this embodiment, a configuration example of a power semiconductor device capable of setting the switching timing by itself is shown.

  In the present embodiment, during the initial charging period of the bootstrap capacitor 3, first, the high-side power supply voltage VDB is measured while performing intermittent charging, and when it exceeds a predetermined value, switching to continuous charging is performed. This eliminates the need to preset the switching timing from intermittent charging to continuous charging, thus facilitating system design.

  However, in order to realize this function, the power semiconductor device needs to include a voltage measurement circuit that measures the high-side power supply voltage VDB. In the present embodiment, the power supply voltage drop protection circuit 24 is used as a voltage measurement circuit during the initial charging period of the bootstrap capacitor 3.

  FIG. 4 is a block diagram showing the configuration of the power semiconductor device according to the second embodiment. In the figure, elements corresponding to those shown in FIGS. 1 and 2 are denoted by the same reference numerals.

  The power module 100 of the present embodiment feeds back the voltage drop detection signal output from the power supply voltage drop protection circuit 24 to the control circuit 2 through the reverse level shift circuit 31 during the initial charging period of the bootstrap capacitor 3. The inverse level shift circuit 31 converts a voltage drop detection signal, which is a high-side signal (a signal based on the potential of the high-side reference voltage terminal VS), into a low-side signal (a signal based on the ground potential). It is.

  As described in the first embodiment, the power supply voltage drop protection circuit 24 sets the voltage drop detection signal to a high level when the high side power supply voltage VDB is equal to or lower than a predetermined value. This voltage drop detection signal is used to determine whether or not the high side drive circuit 21 performs the power supply voltage drop protection operation during the normal operation. However, when the bootstrap capacitor 3 is initially charged, the control circuit 2 uses the low side drive circuit 11. Is used to determine whether to perform intermittent charging or continuous charging.

  FIG. 5 is a diagram for explaining an initial charging operation of the power semiconductor device according to the second embodiment. The initial charging operation of the second embodiment is the same as that of the first embodiment (FIG. 3). However, at the switching timing (time t2) between intermittent charging and continuous charging, the voltage drop detection signal changes from high level to low level. It is defined as the changed timing, that is, the timing when the high side power supply voltage VDB becomes equal to or higher than a predetermined value (Va).

  According to the present embodiment, the switching timing between intermittent charging and continuous charging in the initial charging period of bootstrap capacitor 3 is automatically set based on the value of high-side power supply voltage VDB. Since there is no need to set the timing in advance, an effect of increasing the degree of freedom in system design (board design or circuit design) can be obtained. Even if the capacitance value of the bootstrap capacitor 3 externally attached to the power module 100 is changed, the switching timing between the intermittent charging and the continuous charging is appropriately set accordingly. The effect of widening the range of values can also be obtained.

  In particular, in the configuration of FIG. 4, since the power supply voltage drop protection circuit 24 is also used as a voltage measurement circuit for the high side power supply voltage VDB, it can be realized with a configuration substantially the same as that of the first embodiment, and an increase in circuit scale is also suppressed. . However, since the voltage drop detection signal output from the power supply voltage drop protection circuit 24 is a high-side signal, the reverse level shift circuit 31 needs to be provided.

<Embodiment 3>
In the second embodiment, the power semiconductor device having the function of setting the switching timing from intermittent charge to continuous charge of the bootstrap capacitor 3 (time t2 in FIG. 5) is shown. An example in which the initial charge of the bootstrap capacitor 3 can be set by itself (time t1) is shown.

  FIG. 6 is a block diagram showing the configuration of the power semiconductor device according to the third embodiment. In the figure, elements corresponding to those shown in FIG.

  The power module 100 of the present embodiment incorporates an initial charging pulse setting unit 32 that controls the initial charging operation of the bootstrap capacitor 3 (in Embodiments 1 and 2, the control circuit 2 has a function corresponding thereto). have). A voltage drop detection signal output from the power supply voltage drop protection circuit 24 is input to the initial charge pulse setting unit 32 through the reverse level shift circuit 31.

  The power module 100 further includes a rise detection circuit 33 and a one-shot pulse generation circuit 34 as a power supply detection circuit that detects the turning on of the control power supply 1. The output voltage of the rise detection circuit 33 rises with the rise of the control power supply voltage VD output from the control power supply 1, but falls to a low level when the control power supply voltage VD exceeds a predetermined value. The one-shot pulse generation circuit 34 outputs a one-shot pulse to the initial charge pulse setting unit 32 in response to the fall of the output voltage of the rising detection circuit 33. Thereby, the initial charge pulse setting unit 32 can detect the turning-on of the control power supply 1.

  FIG. 7 is a diagram for explaining an initial charging operation of the power semiconductor device according to the third embodiment. The initial charging operation of the third embodiment is the same as that of the second embodiment (FIG. 5), but the control power supply voltage VD is a predetermined value (Vb) at the initial charging start timing (time t1) of the bootstrap capacitor 3. It is defined as the above timing.

  According to the present embodiment, the start timing of the initial charging of the bootstrap capacitor 3 is automatically set when the control power supply 1 rises. Since there is no need to set the timing in advance, an effect of increasing the degree of freedom in system design (board design or circuit design) can be obtained.

<Embodiment 4>
In the present embodiment, a power semiconductor device is shown in which the setting of the switching timing (interval t2 in FIG. 5) from intermittent charging to continuous charging of the bootstrap capacitor 3 is performed.

  FIG. 8 is a block diagram showing the configuration of the power semiconductor device according to the fourth embodiment. In the figure, elements corresponding to those shown in FIG. In the configuration of FIG. 6, the voltage drop detection signal output from the power supply voltage drop protection circuit 24 is supplied to the initial charge pulse setting unit 32. However, in the present embodiment, the output signal of the current detection circuit 14 is used instead. Supply.

  The current detection circuit 14 measures the current value of the low-side switching element Q1W based on the voltage of the current detection sense terminal CIN (voltage generated in the current detection resistor 6), and the output signal of the current detection circuit 14 is current detection. This is a voltage signal corresponding to the voltage of the sense terminal CIN. The output signal of the current detection circuit 14 is used to determine whether or not the low-side drive circuit 11 performs a short-circuit protection operation during normal operation. However, when the bootstrap capacitor 3 is initially charged, the control circuit 2 supplies the low-side drive circuit 11 to the low-side drive circuit 11. It is used to determine whether to perform intermittent charging or continuous charging.

  FIG. 9 is a diagram for explaining an initial charging operation of the power semiconductor device according to the fourth embodiment. The initial charging operation of the fourth embodiment is the same as that of the third embodiment (FIG. 7), but the switching timing (time t2) between intermittent charging and continuous charging is the current when the low-side switching element Q1W is turned on. The timing when the value becomes equal to or lower than the predetermined value, that is, the timing when the voltage at the current detection sense terminal CIN becomes equal to or lower than the predetermined value (Vc) is defined as the switching timing between intermittent charging and continuous charging.

  According to the present embodiment, the same effect as in the second embodiment can be obtained. In particular, in the configuration of FIG. 8, the current detection circuit 14 for the short-circuit protection operation is also used for current measurement for determining the switching timing from intermittent charging to continuous charging, so that an increase in circuit scale is also suppressed. Furthermore, since the output signal of the current detection circuit 14 is a low-side signal, the reverse level shift circuit 31 is also unnecessary.

<Embodiment 5>
In recent years, a semiconductor device (SiC device) using SiC (silicon carbide) has attracted attention as a device that enables downsizing of a power converter such as an inverter. In the present embodiment, the low-side switching element Q1W and the high-side switching element Q2W used in the power semiconductor device according to the present invention and the freewheel diodes D1W and D2W connected to them are respectively SiC devices.

  As described above, according to the present invention, since the allowable power of the limiting resistor 5 of the bootstrap circuit can be set small, the power control system and the power module can be reduced in size. Combining the SiC device with the power semiconductor device of the present invention is effective because further downsizing can be achieved.

  100 power module, 1 control power supply, 2 control circuit, 3 bootstrap capacitor, 4 bootstrap diode, 5 limiting resistor, 6 current detection resistor, 7 high side drive unit, 8 low side drive unit, 10 low side drive unit, 11 low side Drive circuit, 12 Low side input circuit, 14 Current detection circuit, 20 High side drive unit, 21 High side drive circuit, 22 High side input circuit, 23 Level shift circuit, 24 Power supply voltage drop protection circuit, 31 Reverse level shift circuit, 32 Initial charge pulse setting unit, 33 rising detection circuit, 34 one-shot pulse generation circuit, Q1W low side switching element, Q2W high side switching element, D1W freewheel diode, D2W freewheel diode.

Claims (7)

An inverter formed by connecting a low-side first switching element and a high-side second switching element in series;
A first drive circuit for driving the first switching element;
A second drive circuit for driving the second switching element;
A bootstrap circuit including a diode and a capacitor connected in series between a power supply and an output node of the inverter, and generating a high-side power supply voltage to be supplied to the second drive circuit;
The first drive circuit includes:
The capacitor is charged by turning on the first switching element in a predetermined period immediately after turning on the power, and the first half of the predetermined period is an intermittent charging operation in which the first switching element is intermittently turned on, In the second half, a continuous charge operation for maintaining the first switching element on is performed. The power semiconductor device according to claim 1,
A voltage measurement circuit for measuring the high-side power supply voltage;
The first drive circuit includes:
Switching from the intermittent charging operation to the continuous charging operation is performed when the high-side power supply voltage exceeds a predetermined value. A power semiconductor device according to claim 2,
The voltage measurement circuit includes:
A power semiconductor device belonging to a power supply voltage drop protection circuit that performs a protection operation by detecting a drop in the high-side power supply voltage during normal operation. The power semiconductor device according to claim 1,
A current measuring circuit for measuring a current flowing through the first switching element;
The first drive circuit includes:
Switching from the intermittent charging operation to the continuous charging operation is performed when a current flowing through the first switching element becomes a predetermined value or less. The power semiconductor device according to claim 4,
The current measurement circuit includes:
A power semiconductor device that belongs to a short-circuit protection detection circuit that performs a protection operation by detecting an overcurrent of a first switching element during normal operation. A power semiconductor device according to any one of claims 2 to 5,
A power detection circuit for detecting the power-on,
The first drive circuit includes:
The power semiconductor device, wherein the intermittent charging operation is started when the power-on is detected. A power semiconductor device according to any one of claims 1 to 6,
Each of the first and second switching elements is provided with a freewheel diode,
The power semiconductor device, wherein the first and second switching elements and the free wheeling diode are SiC devices.

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