JP2011030350A - Power conversion device - Google Patents
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- JP2011030350A JP2011030350A JP2009173052A JP2009173052A JP2011030350A JP 2011030350 A JP2011030350 A JP 2011030350A JP 2009173052 A JP2009173052 A JP 2009173052A JP 2009173052 A JP2009173052 A JP 2009173052A JP 2011030350 A JP2011030350 A JP 2011030350A
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Abstract
Description
本発明は、３レベルインバータや３レベルコンバータなどの電力変換装置に適用するゲート駆動回路の基板内の回路構成方法に関する。 The present invention relates to a circuit configuration method in a substrate of a gate drive circuit applied to a power conversion device such as a three-level inverter or a three-level converter.
図９に直流から交流に変換する電力変換回路である３レベルインバータの回路例を示す。１、２が直列に接続された大容量の電解コンデンサで、正側電位をＰｃ、負側電位をＮｃ、中点電位をＭｃとした直流電源回路で、通常動作時は直流電圧変動が少ない平滑化された直流電圧である。一般に本直流部を交流電源より構成する場合は、図示していないダイオード整流器やＰＷＭ（パルス幅変調）整流器などを用いて構成することが可能である。 FIG. 9 shows a circuit example of a three-level inverter that is a power conversion circuit that converts direct current to alternating current. DC power supply circuit with 1 and 2 connected in series with large capacity, positive side potential Pc, negative side potential Nc, and midpoint potential Mc, smoothing with little DC voltage fluctuation during normal operation It is a direct current voltage. In general, when the direct current unit is constituted by an alternating current power source, it can be constituted by using a diode rectifier or a PWM (pulse width modulation) rectifier which is not shown.
３、４がＰｃ側電位に接続されているＩＧＢＴ（Ｔ１）とダイオード、５、６がＮｃ側電位に接続されているＩＧＢＴ（Ｔ２）とダイオードで、これらを３組用いて３相回路を構成する。７、８はＭｃ電位とＩＧＢＴ３とＩＧＢＴ５の直列接続点である交流出力端子９との間に接続された双方向性の交流スイッチ素子で、逆耐圧を有するＩＧＢＴ７、８を逆並列接続した構成である。 3 and 4 are IGBTs (T1) and diodes connected to the Pc side potential, and 5 and 6 are IGBTs (T2) and diodes connected to the Nc side potential. To do. Reference numerals 7 and 8 are bidirectional AC switch elements connected between the Mc potential and the AC output terminal 9 which is a series connection point of the IGBT 3 and the IGBT 5, and have a configuration in which the IGBTs 7 and 8 having reverse breakdown voltages are connected in reverse parallel. is there.
１０、１１、１２がフィルタ用のリアクトル、１３が本システムの負荷である。本回路構成とし、制御回路19からの信号で、各スイッチ素子（ＩＧＢＴ）を適切に駆動することにより、出力端子９は、Ｐｃ電位、Ｎｃ電位、およびＭｃ電位を出力することが可能な３レベル出力のインバータとなる。図１０に出力電圧波形例を示す。２レベルタイプのインバータに対して、低次の高調波成分が少ないことが特徴であり、出力フィルタ１０〜１２の小型化が可能となる。 10, 11 and 12 are reactors for the filter, and 13 is a load of this system. With this circuit configuration, by appropriately driving each switch element (IGBT) with a signal from the control circuit 19, the output terminal 9 can output a Pc potential, an Nc potential, and an Mc potential. It becomes an output inverter. FIG. 10 shows an output voltage waveform example. Compared to the two-level type inverter, there are few low-order harmonic components, and the output filters 10 to 12 can be downsized.
また１５、１６、１７、１８などが各ＩＧＢＴを駆動するためのゲート駆動回路、１９が各ゲート駆動回路に対してゲート駆動信号を出力する本システムの制御部である。
尚、図９に示す３レベルインバータ回路例は、特許文献１などに示されている。
Reference numerals 15, 16, 17, 18 and the like denote gate drive circuits for driving each IGBT, and reference numeral 19 denotes a control unit of this system that outputs a gate drive signal to each gate drive circuit.
An example of a three-level inverter circuit shown in FIG. 9 is shown in Patent Document 1 and the like.
図１１に、図９の３レベルインバータ用のＩＧＢＴモジュール（１相分）の内部構成例を示す。ＩＧＢＴＴ１、Ｔ２の直列回路と逆阻止形ＩＧＢＴＴ３Ｂ、Ｔ４Ｂを逆並列接続した交流スイッチ素子で構成され、主端子Ｐ、Ｎ、Ｍ、Ｕと、ゲート駆動用の端子Ｇ１〜Ｇ４、Ｅ１〜Ｅ４を備えている。ここで、交流スイッチ素子はこの構成に限られず、ダイオードを逆並列接続したＩＧＢＴを逆直列接続しても構成可能である。 FIG. 11 shows an internal configuration example of the IGBT module (for one phase) for the three-level inverter shown in FIG. It is composed of AC switching elements in which a series circuit of IGBTTT1 and T2 and reverse blocking IGBTTT3B and T4B are connected in reverse parallel, and includes main terminals P, N, M and U, and gate driving terminals G1 to G4 and E1 to E4. ing. Here, the AC switch element is not limited to this configuration, and can be configured by reverse-series connecting IGBTs having diodes connected in antiparallel.
図１２にＩＧＢＴの短絡保護回路を備えたゲート駆動回路例を示す。本回路方式は図１３示すように、何らかの原因でＩＧＢＴ（Ｔ１）とＩＧＢＴ（Ｔ２）が同時にオン状態となった場合に、電源短絡状態であることを検知（過電流状態を検知）し、強制遮断する方式である。図１２に示すように、ＩＧＢＴのコレクタとゲート駆動回路間に、ＩＧＢＴのコレクタ端子側をカソードとしたダイオード２０を接続し、前記ダイオードのアノード側電位がある設定値以上（ツェナーダイオード２１のツェナー電圧以上）となった場合に過電流状態であると判断する回路を設け、トランジスタ２２のオンによって強制遮断するものである。
図１２に示す短絡保護機能を有するゲート駆動回路例は、特許文献２などに示されている。
FIG. 12 shows an example of a gate drive circuit provided with an IGBT short-circuit protection circuit. As shown in FIG. 13, this circuit method detects that the power supply is short-circuited (detects an overcurrent state) when IGBT (T1) and IGBT (T2) are simultaneously turned on for some reason, and forcibly This is a blocking method. As shown in FIG. 12, a diode 20 whose cathode is the collector terminal side of the IGBT is connected between the collector of the IGBT and the gate drive circuit, and the anode side potential of the diode is equal to or higher than a set value (the Zener voltage of the Zener diode 21). In this case, a circuit for determining that the current is in an overcurrent state is provided, and the transistor 22 is forcibly cut off when the transistor 22 is turned on.
An example of a gate drive circuit having a short-circuit protection function shown in FIG.
また、ＩＧＢＴのコレクタのダイオードを接続するゲート駆動回路の基板例は、非特許文献１などに示されており、ＩＧＢＴとゲート駆動回路基板間の配線数は、ＩＧＢＴ１素子当り、コレクタとゲートとエミッタへの各配線が必要であり、配線数＝ＩＧＢＴ数×３本となる。
図１４にその概略構成図を示す。ＧＤＵ１が上アーム側ＩＧＢＴ（Ｔ１）を駆動するためのゲート駆動回路、ＧＤＵ２が下アーム側ＩＧＢＴ（Ｔ２）を駆動するためのゲート駆動回路、２０、３０がＩＧＢＴＴ１、Ｔ２の各コレクタに接続されるダイオード、２５、２６がゲート信号の絶縁器（フォトカプラなど）、２７がゲート駆動回路電源用トランスである。
Further, a substrate example of a gate driving circuit for connecting a diode diode of the IGBT is shown in Non-Patent Document 1 and the like, and the number of wires between the IGBT and the gate driving circuit substrate is the collector, gate and emitter per IGBT element. The number of wirings is equal to the number of IGBTs × 3.
FIG. 14 shows a schematic configuration diagram thereof. GDU1 is a gate drive circuit for driving the upper arm side IGBT (T1), GDU2 is a gate drive circuit for driving the lower arm side IGBT (T2), and 20 and 30 are connected to the collectors of IGBTTT1 and T2. Diodes 25 and 26 are gate signal insulators (photocouplers, etc.), and 27 is a gate drive circuit power transformer.
上述のように、短絡保護機能を有したゲート駆動回路からＩＧＢＴへの配線数はＩＧＢＴ１素子当り３本となることから、図９の３レベルインバータにおいては、１相分当り、１２本（３本×４ＩＧＢＴ）の配線数が必要となる。
特に３レベルインバータの場合、２レベルインバータと比較してＩＧＢＴ数が多いことから、必然的に配線数が多くなり、その結果、コストアップ、信頼性低下、誤配線の発生頻度が高くなるといった課題が発生する。
本発明は、３レベルインバータ用のゲート駆動回路において、ゲート駆動回路とＩＧＢＴモジュール間の配線数の削減を行うとともに、ゲート駆動回路基板内においても、各ゲート駆動回路の配置を適正化することで、各ゲート駆動回路間の配線の容易化を図ることで、上記課題の解決を図ることを目的とする。
As described above, since the number of wirings from the gate drive circuit having the short-circuit protection function to the IGBT is three per IGBT element, in the three-level inverter of FIG. 9, 12 (three) per phase. X4 IGBT) is required.
In particular, in the case of a three-level inverter, the number of IGBTs is larger than that of a two-level inverter, and thus the number of wirings inevitably increases, resulting in increased costs, reduced reliability, and increased frequency of erroneous wiring. Will occur.
The present invention reduces the number of wires between a gate drive circuit and an IGBT module in a gate drive circuit for a three-level inverter, and optimizes the arrangement of each gate drive circuit in the gate drive circuit board. An object of the present invention is to solve the above problems by facilitating the wiring between the gate drive circuits.
上述の課題を解決するために、第1の発明においては直流から交流、もしくは交流から直流に変換する電力変換回路で、直流回路の正極側にコレクタが接続されるダイオードが逆並列接続された第１のスイッチ素子と、直流回路の負極側にエミッタ端子が接続されるダイオードが逆並列接続された第２のスイッチ素子と、前記第１のスイッチ素子のエミッタ端子と前記第２のスイッチ素子のコレクタ端子との直列接続点と前記直流回路の中間電位点との間に接続した交流スイッチ素子と、を１相分とした３レベルの電圧を交流出力する電力用変換回路における、前記スイッチ素子の各々を駆動するゲート駆動回路の基板構成において、前記各ゲート駆動回路は、駆動対象となる前記スイッチ素子のオン時のコレクタ端子電圧を検出するための検出用ダイオードを各々備え、前記検出用ダイオードの少なくとも１個は他のゲート駆動回路を経由した配線経路で駆動対象となるスイッチ素子のコレクタ端子に接続されるゲート駆動回路の基板構成を備える。 In order to solve the above-described problem, in the first invention, in the power conversion circuit for converting from direct current to alternating current or from alternating current to direct current, a diode whose collector is connected to the positive side of the direct current circuit is connected in reverse parallel 1 switch element, a second switch element in which a diode whose emitter terminal is connected to the negative side of the DC circuit is connected in reverse parallel, the emitter terminal of the first switch element, and the collector of the second switch element Each of the switch elements in a power conversion circuit that outputs a three-level voltage AC corresponding to one phase of an AC switch element connected between a series connection point with a terminal and an intermediate potential point of the DC circuit In the substrate configuration of the gate drive circuit that drives the gate drive circuit, each gate drive circuit detects the collector terminal voltage when the switch element to be driven is ON. Each output diode is provided, and at least one of the detection diodes has a substrate configuration of a gate drive circuit connected to a collector terminal of a switch element to be driven through a wiring path via another gate drive circuit.
第２の発明においては、直流から交流、もしくは交流から直流に変換する電力変換回路で、直流回路の正極側にコレクタが接続されるダイオードが逆並列接続された第１のスイッチ素子と、直流回路の負極側にエミッタ端子が接続されるダイオードが逆並列接続された第２のスイッチ素子と、前記第１のスイッチ素子のエミッタ端子と前記第２のスイッチ素子のコレクタ端子との直列接続点と前記直流回路の中間電位点との間に、前記直列接続点側をコレクタ端子とした第３のスイッチ素子と、前記直流回路の中間電位点側をコレクタ端子とした第４のスイッチ素子とを逆並列接続した交流スイッチ回路と、を１相分とした３レベルの電圧を交流出力する電力用変換回路における、前記第１から第4のスイッチ素子の各々を駆動する4個のゲート駆動回路の基板構成において、前記各ゲート駆動回路は、駆動対象となる前記スイッチ素子のオン時のコレクタ端子電圧を検出するための検出用ダイオードを各々備え、前記検出用ダイオードの少なくとも１個は他のゲート駆動回路を経由した配線経路で駆動対象となるスイッチ素子のコレクタ端子に接続されるゲート駆動回路の基板構成を備える。 According to a second aspect of the present invention, there is provided a power conversion circuit for converting from direct current to alternating current or from alternating current to direct current, a first switch element having a diode connected to a positive electrode side of the direct current circuit and connected in reverse parallel, and a direct current circuit A second switching element in which a diode having an emitter terminal connected to the negative electrode side is connected in reverse parallel, a series connection point of an emitter terminal of the first switching element and a collector terminal of the second switching element; Between the intermediate potential point of the DC circuit, the third switch element having the series connection point side as a collector terminal and the fourth switch element having the intermediate potential point side of the DC circuit as a collector terminal are anti-parallel. 4 gates for driving each of the first to fourth switch elements in a power converter circuit that outputs a three-level voltage that is equivalent to one phase of a connected AC switch circuit. In the substrate configuration of the drive circuit, each of the gate drive circuits includes a detection diode for detecting a collector terminal voltage when the switch element to be driven is on, and at least one of the detection diodes is another The substrate structure of the gate drive circuit connected to the collector terminal of the switch element to be driven by the wiring path via the gate drive circuit is provided.
第３の発明においては、前記配線経路は、前記第３のスイッチ素子用ゲート駆動回路から前記第４のスイッチ素子用ゲート駆動回路を経由した経路、又は前記第３のスイッチ素子用ゲート駆動回路から前記第１のスイッチ素子用ゲート駆動回路を経由した経路、又は前記第２のスイッチ素子用ゲート駆動回路から前記第１のスイッチ素子用ゲート駆動回路を経由した経路、又は前記第２のスイッチ素子用ゲート駆動回路から前記第４のスイッチ素子用ゲート駆動回路を経由した経路、又は前記第４のスイッチ素子用ゲート駆動回路から前記第３のスイッチ素子用ゲート駆動回路を経由した経路、のいずれか一つの経路を含むようにする。 In a third aspect of the present invention, the wiring path is a path from the third switch element gate drive circuit via the fourth switch element gate drive circuit, or from the third switch element gate drive circuit. A path through the first switch element gate drive circuit, or a path from the second switch element gate drive circuit through the first switch element gate drive circuit, or the second switch element Either a path from the gate drive circuit via the fourth switch element gate drive circuit, or a path from the fourth switch element gate drive circuit to the third switch element gate drive circuit. Include one path.
第４の発明においては、第２の及び第３の発明において前記第１のスイッチ素子用ゲート駆動回路のエミッタ接続用端子と前記第４のスイッチ素子用ゲート駆動回路のエミッタ接続用端子とをゲート駆動回路の基板側で接続する。 According to a fourth aspect, in the second and third aspects, the emitter connection terminal of the first switch element gate drive circuit and the emitter connection terminal of the fourth switch element gate drive circuit are gated. Connect on the board side of the drive circuit.
第５の発明においては、第２〜第４の発明において前記第３のスイッチ素子のオン時のコレクタ端子電圧を検出するための検出用ダイオード又は前記第４のスイッチ素子のオン時のコレクタ端子電圧を検出するための検出用ダイオードと直列に抵抗を接続する。 In a fifth aspect of the invention, in the second to fourth aspects of the invention, the detection diode for detecting the collector terminal voltage when the third switch element is on or the collector terminal voltage when the fourth switch element is on A resistor is connected in series with a diode for detection.
第６の発明においては、直流から交流、もしくは交流から直流に変換する電力変換回路で、直流回路の正極側にコレクタが接続されるダイオードが逆並列接続された第１のスイッチ素子と、直流回路の負極側にエミッタ端子が接続されるダイオードが逆並列接続された第２のスイッチ素子と、前記第１のスイッチ素子のエミッタ端子と前記第２のスイッチ素子のコレクタ端子との直列接続点と前記直流回路の中間電位点との間に、前記直列接続点側をコレクタ端子としダイオードを逆並列接続した第３のスイッチ素子と、前記直流回路の中間電位点側をコレクタ端子としダイオードを逆並列接続した第４のスイッチ素子とを逆直列接続した交流スイッチ回路と、を１相分とした３レベルの電圧を交流出力する電力用変換回路における、前記第１から第4のスイッチ素子の各々を駆動する4個のゲート駆動回路の基板構成において、前記各ゲート駆動回路は、駆動対象となる前記スイッチ素子のオン時のコレクタ端子電圧を検出するための検出用ダイオードを各々備え、前記検出用ダイオードの少なくとも１個は他のゲート駆動回路を経由した配線経路で駆動対象となるスイッチ素子のコレクタ端子に接続されるゲート駆動回路の基板構成を備える。 According to a sixth aspect of the present invention, there is provided a power conversion circuit for converting from direct current to alternating current or from alternating current to direct current, wherein a first switch element in which a diode whose collector is connected to the positive side of the direct current circuit is connected in antiparallel, and the direct current circuit A second switching element in which a diode having an emitter terminal connected to the negative electrode side is connected in reverse parallel, a series connection point of an emitter terminal of the first switching element and a collector terminal of the second switching element; Between the intermediate potential point of the DC circuit, a third switch element in which the series connection point side is the collector terminal and the diode is connected in reverse parallel, and the diode is connected in reverse parallel with the intermediate potential point side of the DC circuit is the collector terminal In the power converter circuit for AC output of a three-level voltage for one phase of an AC switch circuit in which the fourth switch element is connected in reverse series In the substrate configuration of four gate drive circuits that drive each of the fourth to fourth switch elements, each of the gate drive circuits is for detection to detect a collector terminal voltage when the switch element to be driven is on. Each of the diodes includes a substrate configuration of a gate drive circuit connected to a collector terminal of a switch element to be driven through a wiring path via another gate drive circuit.
第７の発明においては、第６の発明において前記配線経路は、前記第３のスイッチ素子用ゲート駆動回路から前記第１のスイッチ素子用ゲート駆動回路を経由した経路、又は前記第２のスイッチ素子用ゲート駆動回路から前記第１のスイッチ素子用ゲート駆動回路を経由した経路、のいずれか一つの経路を含むようにする。 In a seventh aspect based on the sixth aspect, the wiring path is a path from the third switch element gate drive circuit via the first switch element gate drive circuit, or the second switch element. Any one of the paths from the gate drive circuit for the first circuit to the gate drive circuit for the first switch element is included.
第８の発明においては、第６又は第７の発明において前記第３のスイッチ素子用ゲート駆動回路のエミッタ接続用端子と前記第４のスイッチ素子用ゲート駆動回路のエミッタ接続用端子とをゲート駆動回路の基板側で接続する。 According to an eighth aspect of the invention, in the sixth or seventh aspect of the invention, the gate connection is made between the emitter connection terminal of the third switch element gate drive circuit and the emitter connection terminal of the fourth switch element gate drive circuit. Connect on the board side of the circuit.
第９の発明においては、直流から交流、もしくは交流から直流に変換する電力変換回路で、直流回路の正極側にコレクタが接続されるダイオードが逆並列接続された第１のスイッチ素子と、直流回路の負極側にエミッタ端子が接続されるダイオードが逆並列接続された第２のスイッチ素子と、前記第１のスイッチ素子のエミッタ端子と前記第２のスイッチ素子のコレクタ端子との直列接続点と前記直流回路の中間電位点との間に、前記直列接続点側をエミッタ端子としダイオードを逆並列接続した第３のスイッチ素子と、前記直流回路の中間電位点側をエミッタ端子としダイオードを逆並列接続した第４のスイッチ素子とを逆直列接続した交流スイッチ回路と、を１相分とした３レベルの電圧を交流出力する電力用変換回路における、前記第１から第4のスイッチ素子の各々を駆動する4個のゲート駆動回路の基板構成において、前記各ゲート駆動回路は、駆動対象となる前記スイッチ素子のオン時のコレクタ端子電圧を検出するための検出用ダイオードを各々備え、前記検出用ダイオードの少なくとも１個は他のゲート駆動回路を経由した配線経路で駆動対象となる前記スイッチ素子のコレクタ端子に接続されるゲート駆動回路の基板構成を備える。 According to a ninth aspect of the present invention, there is provided a power conversion circuit for converting from direct current to alternating current or from alternating current to direct current, wherein a first switching element having a diode connected to a positive electrode side of the direct current circuit and connected in reverse parallel, and a direct current circuit A second switching element in which a diode having an emitter terminal connected to the negative electrode side is connected in reverse parallel, a series connection point of an emitter terminal of the first switching element and a collector terminal of the second switching element; Between the intermediate potential point of the DC circuit, a third switch element in which the series connection point side is an emitter terminal and a diode is connected in reverse parallel, and the diode is connected in reverse parallel with the intermediate potential point side of the DC circuit being an emitter terminal An AC switch circuit connected in reverse series with the fourth switch element, and a power conversion circuit that outputs AC of three levels of voltage corresponding to one phase. In the substrate configuration of four gate drive circuits that drive each of the fourth to fourth switch elements, each of the gate drive circuits is for detection to detect a collector terminal voltage when the switch element to be driven is on. Each of the diodes includes a substrate configuration of a gate driving circuit connected to a collector terminal of the switch element to be driven through a wiring path via another gate driving circuit.
第１０の発明においては、第９の発明において前記配線経路は、前記第３のスイッチ素子用ゲート駆動回路から前記第４のスイッチ素子用ゲート駆動回路を経由した経路、又は前記第４のスイッチ素子用ゲート駆動回路から前記第３のスイッチ素子用ゲート駆動回路を経由した経路、又は前記第２のスイッチ素子用ゲート駆動回路から前記第１のスイッチ素子用ゲート駆動回路を経由した経路、のいずれか一つの経路を含むようにする。 In a tenth aspect, in the ninth aspect, the wiring path is a path from the third switch element gate drive circuit via the fourth switch element gate drive circuit, or the fourth switch element. Any one of a path from the gate drive circuit for the third switch via the gate drive circuit for the third switch element, or a path from the gate drive circuit for the second switch element to the gate drive circuit for the first switch element Include one path.
第１１の発明においては、第９又は第１０の発明において前記第１のスイッチ素子用ゲート駆動回路のエミッタ接続用端子と前記第３のスイッチ素子用ゲート駆動回路のエミッタ接続用端子とをゲート駆動回路の基板側で接続する。 In an eleventh aspect of the invention, in the ninth or tenth aspect of the invention, gate driving is performed on the emitter connection terminal of the first switch element gate drive circuit and the emitter connection terminal of the third switch element gate drive circuit. Connect on the board side of the circuit.
本発明では、各ゲート駆動回路に設けられた過電流時のＩＧＢＴ素子のオン電圧を検出するためのダイオードとＩＧＢＴ素子のコレクタとの接続方法を、他のゲート駆動回路基板を経由して配線するようにしていること及び主回路側で共通電位となっているエミッタ接続線をゲート駆動基板間で接続することにより、配線数の低減が可能となる。
この結果、ゲート駆動回路基板からＩＧＢＴまでの配線数が削減でき、安価で信頼性の高いシステムの構築が可能となる。
In the present invention, a method for connecting the diode and the collector of the IGBT element for detecting the on-voltage of the IGBT element at the time of overcurrent provided in each gate driving circuit is wired via another gate driving circuit substrate. By connecting the emitter connection lines having the common potential on the main circuit side between the gate drive substrates, the number of wirings can be reduced.
As a result, the number of wirings from the gate drive circuit board to the IGBT can be reduced, and an inexpensive and highly reliable system can be constructed.
本発明の要点は、直流から交流、もしくは交流から直流に変換する電力変換回路で、直流回路の正極側にコレクタが接続されるダイオードが逆並列接続された第１のスイッチ素子と、直流回路の負極側にエミッタ端子が接続されるダイオードが逆並列接続された第２のスイッチ素子と、前記第１のスイッチ素子のエミッタ端子と前記第２のスイッチ素子のコレクタ端子との直列接続点と前記直流回路の中間電位点との間に接続した交流スイッチ素子と、を１相分とした３レベルの電圧を交流出力する電力用変換回路における、前記スイッチ素子の各々を駆動するゲート駆動回路の基板構成において、前記各ゲート駆動回路は、駆動対象となる前記スイッチ素子のオン時のコレクタ端子電圧を検出するための検出用ダイオードを各々備え、前記検出用ダイオードの少なくとも１個は他のゲート駆動回路を経由した配線経路で駆動対象となるスイッチ素子のコレクタ端子に接続されるゲート駆動回路の基板構成を備えている点である。 The gist of the present invention is a power conversion circuit for converting from direct current to alternating current or from alternating current to direct current. The first switching element having a diode connected to the positive electrode side of the direct current circuit and connected in reverse parallel, and the direct current circuit A second switching element in which a diode having an emitter terminal connected to the negative electrode side is connected in reverse parallel; a series connection point of the emitter terminal of the first switching element and the collector terminal of the second switching element; and the direct current Substrate structure of a gate drive circuit for driving each of the switch elements in a power conversion circuit that outputs a three-level voltage corresponding to one phase of an AC switch element connected between the intermediate potential points of the circuit Each of the gate drive circuits includes a detection diode for detecting a collector terminal voltage when the switch element to be driven is on, At least one output diode is that it includes a substrate configuration of the gate drive circuit connected to the collector terminal of the switching element to be driven by a wiring route via the other gate drive circuit.
図１に、本発明の第1の実施例を示す。ＭＪ１は３レベル変換装置用の半導体モジュールで、直列接続されたＩＧＢＴＴ１、Ｔ２と、逆阻止型ＩＧＢＴＴ３Ｂ、Ｔ４Ｂを逆並列接続した交流スイッチ素子を内蔵している。また、２８はＩＧＢＴＴ１、Ｔ２、Ｔ３Ｂ、Ｔ４Ｂを駆動するためのゲート駆動回路基板で、ＧＤＵ１がＩＧＢＴ１用、ＧＤＵ２がＩＧＢＴ２用、ＧＤＵ３がＩＧＢＴ３Ｂ用、ＧＤＵ４がＩＧＢＴ４Ｂ用である。本実施例はＧＤＵ１とＧＤＵ４が隣接して中央部に、その外側にＧＤＵ３とＧＤＵ２が配置された構造である。各ゲート駆動回路の入力部には絶縁器２５、２６、３５、３６が設けられ、外部の制御回路からの信号が絶縁してゲート駆動回路に入力される。また、Ｇ１〜Ｇ４は各ＩＧＢＴのゲートに接続するためのゲート接続用端子、Ｅ１〜Ｅ４は各ＩＧＢＴのエミッタに接続するためのエミッタ接続用端子、Ｃ１はＩＧＢＴ１のコレクタに接続するためのコレクタ接続用端子である。
各ゲート駆動回路には、ＩＧＢＴの過電流時のコレクタ電圧を検出するための検出用ダイオード２０、３０、３１、３３が設けられており、さらにダイオード３３には直列に抵抗３４が、ダイオード３１には直列に抵抗３２が、各々接続される。
FIG. 1 shows a first embodiment of the present invention. MJ1 is a semiconductor module for a three-level conversion device, and incorporates an AC switching element in which IGBTTT1 and T2 connected in series and reverse blocking IGBTTT3B and T4B are connected in reverse parallel. Reference numeral 28 denotes a gate drive circuit board for driving IGBTTT1, T2, T3B, and T4B. GDU1 is for IGBT1, GDU2 is for IGBT2, GDU3 is for IGBT3B, and GDU4 is for IGBT4B. In the present embodiment, GDU1 and GDU4 are adjacent to each other at the central portion, and GDU3 and GDU2 are disposed outside thereof. Insulators 25, 26, 35, and 36 are provided at the input portion of each gate drive circuit, and a signal from an external control circuit is insulated and input to the gate drive circuit. G1 to G4 are gate connection terminals for connection to the gates of the IGBTs, E1 to E4 are emitter connection terminals for connection to the emitters of the IGBTs, and C1 is a collector connection for connection to the collector of the IGBT1. Terminal.
Each gate drive circuit is provided with detection diodes 20, 30, 31, 33 for detecting the collector voltage at the time of overcurrent of the IGBT. Further, a resistor 34 is connected in series with the diode 33, and a diode 31 is connected to the diode 31. Are connected in series with resistors 32, respectively.
このような構成において、各ゲート駆動回路に設けられているコレクタ電圧を検出するための検出用ダイオード２０、３０、３１、３３はそれぞれ各ＩＧＢＴのコレクタに接続する必要がある。本実施例では、ゲート駆動回路ＧＤＵ１の検出用ダイオード２０のカソードはコレクタ接続用端子Ｃ１から直接ＩＧＢＴＴ１のコレクタに、ゲート駆動回路ＧＤＵ２の検出用ダイオード３０のカソードはゲート駆動回路ＧＤＵ４のエミッタ接続用端子Ｅ４を経由してＩＧＢＴＴ２のコレクタに、ゲート駆動回路ＧＤＵ３の検出用ダイオード３３のカソードはゲート駆動回路ＧＤＵ１のエミッタ接続用端子Ｅ１を経由してＩＧＢＴＴ３Ｂのコレクタに、ゲート駆動回路ＧＤＵ４の検出用ダイオード３１のカソードはゲート駆動回路ＧＤＵ３のエミッタ接続用端子Ｅ３を経由してＩＧＢＴＴ４Ｂのコレクタに、それぞれ接続される。ここで、ダイオード３３と直列に接続された抵抗３４とダイオード３１と直列に接続された抵抗３２は、ＩＧＢＴＴ３ＢとＴ４Ｂから構成された交流スイッチ素子の両端に印加される正負の電圧によって生じる順方向電流の抑制用である。これらのゲート駆動回路の基板構成により、ゲート駆動基板２８とＩＧＢＴモジュールＭＪ１との配線数は９本となり、従来技術を用いた場合の配線数１２本に比べて、３本減少する。 In such a configuration, the detection diodes 20, 30, 31, and 33 for detecting the collector voltage provided in each gate drive circuit need to be connected to the collectors of the respective IGBTs. In this embodiment, the cathode of the detection diode 20 of the gate drive circuit GDU1 is directly connected to the collector of the IGBTTT1 from the collector connection terminal C1, and the cathode of the detection diode 30 of the gate drive circuit GDU2 is the emitter connection terminal of the gate drive circuit GDU4. The collector of the IGBTTT2 is connected via E4, the cathode of the detection diode 33 of the gate drive circuit GDU3 is connected to the collector of the IGBTTT3 via the emitter connection terminal E1 of the gate drive circuit GDU1, and the detection diode 31 of the gate drive circuit GDU4 is connected. Are connected to the collector of the IGBTTT4B via the emitter connection terminal E3 of the gate drive circuit GDU3. Here, the resistor 34 connected in series with the diode 33 and the resistor 32 connected in series with the diode 31 are forward currents generated by positive and negative voltages applied to both ends of the AC switch element composed of IGBTTT3B and T4B. It is for suppression. Due to the substrate configuration of these gate driving circuits, the number of wirings between the gate driving substrate 28 and the IGBT module MJ1 is nine, which is three fewer than the number of wirings 12 when the conventional technique is used.
また、ゲート駆動回路ＧＤＵ１のエミッタ接続用端子Ｅ１とゲート駆動回路ＧＤＵ４のエミッタ接続用端子Ｅ４とを接続線ＬＡで接続することにより、ＧＤＵ１とＩＧＢＴＴ１のエミッタ接続線又はＧＤＵ４とＩＧＢＴＴ４Ｂのエミッタ接続線の一方は省略できるため、ゲート駆動基板２８とＩＧＢＴモジュールＭＪ１との配線数は８本に削減することができる。 Further, the emitter connection terminal E1 of the gate drive circuit GDU1 and the emitter connection terminal E4 of the gate drive circuit GDU4 are connected by the connection line LA, so that the emitter connection line of GDU1 and IGBTTT1 or the emitter connection line of GDU4 and IGBTTT4B is connected. Since one of them can be omitted, the number of wirings between the gate drive substrate 28 and the IGBT module MJ1 can be reduced to eight.
図２に、本発明の第２の実施例を示す。第１の実施例との違いは、ゲート駆動回路ＧＤＵ３の検出用ダイオード３３とゲート駆動回路ＧＤＵ４の検出用ダイオード３１の極性（アノードとカソードの関係）を反転させている点であり、作用と効果は第１の実施例と同様である。尚、ダイオード３３と抵抗３４の直列接続順序及びダイオード３１と抵抗３２の直列接続順序の違いは、作用及び効果に差異を生じない。 FIG. 2 shows a second embodiment of the present invention. The difference from the first embodiment is that the polarities (relationship between anode and cathode) of the detection diode 33 of the gate drive circuit GDU3 and the detection diode 31 of the gate drive circuit GDU4 are reversed. Is the same as in the first embodiment. In addition, the difference in the series connection order of the diode 33 and the resistor 34 and the series connection order of the diode 31 and the resistor 32 cause no difference in operation and effect.
図３に、本発明の第３の実施例を示す。第１の実施例との違いは、ゲート駆動回路の基板構成が、ＧＤＵ３とＧＤＵ４が隣接して中央部に、その外側にＧＤＵ１とＧＤＵ２がそれぞれ配置されている点である。本実施例では、ゲート駆動回路ＧＤＵ１の検出用ダイオード２０のカソードはコレクタ接続用端子Ｃ１から直接ＩＧＢＴＴ１のコレクタに、ゲート駆動回路ＧＤＵ２の検出用ダイオード３０のカソードはゲート駆動回路ＧＤＵ４のエミッタ接続用端子Ｅ４を経由してＩＧＢＴＴ２のコレクタに、ゲート駆動回路ＧＤＵ３の検出用ダイオード３３のカソードはゲート駆動回路ＧＤＵ４のエミッタ接続用端子Ｅ４を経由してＩＧＢＴＴ３Ｂのコレクタに、ゲート駆動回路ＧＤＵ４の検出用ダイオード３１のカソードはゲート駆動回路ＧＤＵ３のエミッタ接続用端子Ｅ３を経由してＩＧＢＴＴ４Ｂのコレクタに、それぞれ接続される。 FIG. 3 shows a third embodiment of the present invention. The difference from the first embodiment is that the substrate configuration of the gate drive circuit is such that GDU3 and GDU4 are adjacent to each other at the central portion, and GDU1 and GDU2 are disposed outside thereof. In this embodiment, the cathode of the detection diode 20 of the gate drive circuit GDU1 is directly connected to the collector of the IGBTTT1 from the collector connection terminal C1, and the cathode of the detection diode 30 of the gate drive circuit GDU2 is the emitter connection terminal of the gate drive circuit GDU4. The collector of the IGBTTT2 via E4, the cathode of the detection diode 33 of the gate drive circuit GDU3 is connected to the collector of the IGBTTT3B via the emitter connection terminal E4 of the gate drive circuit GDU4, and the detection diode 31 of the gate drive circuit GDU4. Are connected to the collector of the IGBTTT4B via the emitter connection terminal E3 of the gate drive circuit GDU3.
これらのゲート駆動回路の基板構成により、ゲート駆動基板２８とＩＧＢＴモジュールＭＪ１との配線数は９本となり、従来技術を用いた場合の配線数１２本に比べて、３本減少する。また、ゲート駆動回路ＧＤＵ１のエミッタ接続用端子Ｅ１とゲート駆動回路ＧＤＵ４のエミッタ接続用端子Ｅ４とをゲート駆動回路ＧＤＵ３の検出用ダイオード３３のカソードを経由して接続線ＬＡで接続することにより、ＧＤＵ１とＩＧＢＴＴ１のエミッタ接続線又はＧＤＵ４とＩＧＢＴＴ４Ｂのエミッタ接続線の一方は省略できるため、ゲート駆動基板２８とＩＧＢＴモジュールＭＪ１との配線数は８本に削減することができる。 Due to the substrate configuration of these gate driving circuits, the number of wirings between the gate driving substrate 28 and the IGBT module MJ1 is nine, which is three fewer than the number of wirings 12 when the conventional technique is used. Further, the emitter connection terminal E1 of the gate drive circuit GDU1 and the emitter connection terminal E4 of the gate drive circuit GDU4 are connected by the connection line LA via the cathode of the detection diode 33 of the gate drive circuit GDU3. Since one of the emitter connection line of IGBTTT1 and the emitter connection line of GDU4 and IGBTTT4B can be omitted, the number of wirings between the gate drive substrate 28 and the IGBT module MJ1 can be reduced to eight.
図４に、本発明の第４の実施例を示す。第３の実施例との違いは、ゲート駆動回路ＧＤＵ３の検出用ダイオード３３とゲート駆動回路ＧＤＵ４の検出用ダイオード３１の極性（アノードとカソードの関係）を反転させている点であり、作用と効果は第３の実施例と同様である。尚、本実施例の場合、ゲート駆動回路ＧＤＵ１のエミッタ接続用端子Ｅ１とゲート駆動回路ＧＤＵ４のエミッタ接続用端子Ｅ４は直接接続される。 FIG. 4 shows a fourth embodiment of the present invention. The difference from the third embodiment is that the polarities (relationship between anode and cathode) of the detection diode 33 of the gate drive circuit GDU3 and the detection diode 31 of the gate drive circuit GDU4 are reversed. Is the same as in the third embodiment. In the present embodiment, the emitter connection terminal E1 of the gate drive circuit GDU1 and the emitter connection terminal E4 of the gate drive circuit GDU4 are directly connected.
図５に、本発明の第５の実施例を示す。第４の実施例との違いは、ゲート駆動回路ＧＤＵ３の検出用ダイオード３３のカソードがゲート駆動回路ＧＤＵ１のエミッタ接続用端子Ｅ１を経由してＩＧＢＴＴ３のコレクタに、ゲート駆動回路ＧＤＵ４の検出用ダイオード３１のカソードがゲート駆動回路ＧＤＵ３のエミッタ接続用端子Ｅ３を経由してＩＧＢＴＴ４Ｂのコレクタに、それぞれ接続されている点である。作用と効果は第３又は第４の実施例と同様である。 FIG. 5 shows a fifth embodiment of the present invention. The difference from the fourth embodiment is that the cathode of the detection diode 33 of the gate drive circuit GDU3 is connected to the collector of the IGBTTT3 via the emitter connection terminal E1 of the gate drive circuit GDU1, and the detection diode 31 of the gate drive circuit GDU4. Are connected to the collector of the IGBTTT4B via the emitter connection terminal E3 of the gate drive circuit GDU3. The operation and effect are the same as those of the third or fourth embodiment.
図６に、本発明の第６の実施例を示す。第１〜第５の実施例との違いは、ゲート駆動回路の基板構成が、ＧＤＵ２とＧＤＵ３が隣接して中央部に、その外側にＧＤＵ１とＧＤＵ４がそれぞれ配置されている点である。本実施例では、ゲート駆動回路ＧＤＵ１の検出用ダイオード２０のカソードはコレクタ接続用端子Ｃ１から直接ＩＧＢＴＴ１のコレクタに、ゲート駆動回路ＧＤＵ２の検出用ダイオード３０のカソードはゲート駆動回路ＧＤＵ１のエミッタ接続用端子Ｅ１を経由してＩＧＢＴＴ２のコレクタに、ゲート駆動回路ＧＤＵ３の検出用ダイオード３３のカソードはゲート駆動回路ＧＤＵ４のエミッタ接続用端子Ｅ４を経由してＩＧＢＴＴ３Ｂのコレクタに、ゲート駆動回路ＧＤＵ４の検出用ダイオード３１のカソードはゲート駆動回路ＧＤＵ３のエミッタ接続用端子Ｅ３を経由してＩＧＢＴＴ４Ｂのコレクタに、それぞれ接続される。 FIG. 6 shows a sixth embodiment of the present invention. The difference from the first to fifth embodiments is that the substrate configuration of the gate drive circuit is such that GDU2 and GDU3 are adjacent to each other at the central portion, and GDU1 and GDU4 are disposed outside thereof. In this embodiment, the cathode of the detection diode 20 of the gate drive circuit GDU1 is directly connected to the collector of the IGBTTT1 from the collector connection terminal C1, and the cathode of the detection diode 30 of the gate drive circuit GDU2 is the emitter connection terminal of the gate drive circuit GDU1. The collector of the IGBTTT2 is passed through E1, the cathode of the detection diode 33 of the gate drive circuit GDU3 is connected to the collector of the IGBTTT3B via the emitter connection terminal E4 of the gate drive circuit GDU4, and the detection diode 31 of the gate drive circuit GDU4. Are connected to the collector of the IGBTTT4B via the emitter connection terminal E3 of the gate drive circuit GDU3.
これらのゲート駆動回路の基板構成により、ゲート駆動基板２８とＩＧＢＴモジュールＭＪ１との配線数は９本となり、従来技術を用いた場合の配線数１２本に比べて、３本減少する。また、ゲート駆動回路ＧＤＵ１のエミッタ接続用端子Ｅ１とゲート駆動回路ＧＤＵ４のエミッタ接続用端子Ｅ４とを接続線ＬＡで接続することにより、ＧＤＵ１とＩＧＢＴ１のエミッタ接続線又はＧＤＵ４とＩＧＢＴＴ４Ｂのエミッタ接続線の一方は省略できるため、ゲート駆動基板２８とＩＧＢＴモジュールとの配線数は８本に削減することができる。 Due to the substrate configuration of these gate driving circuits, the number of wirings between the gate driving substrate 28 and the IGBT module MJ1 is nine, which is three fewer than the number of wirings 12 when the conventional technique is used. Further, the emitter connection terminal E1 of the gate drive circuit GDU1 and the emitter connection terminal E4 of the gate drive circuit GDU4 are connected by the connection line LA, whereby the emitter connection line of GDU1 and IGBT1 or the emitter connection line of GDU4 and IGBTTT4B. Since one of them can be omitted, the number of wirings between the gate drive substrate 28 and the IGBT module can be reduced to eight.
図７に、本発明の第７の実施例を示す。第１〜第６の実施例との違いは、ＩＧＢＴモジュールＭＪ２における交流スイッチ素子の構成が、ダイオードを逆並列接続したＩＧＢＴＴ３とダイオードを逆並列接続したＩＧＢＴＴ４とを逆直列接続して構成している点である。ＩＧＢＴＴ１とＩＧＢＴＴ２の直列接続点側にＩＧＢＴＴ３のコレクタを、直流電源の中間電位接続端子Ｍ側にＩＧＢＴＴ４のコレクタを接続する構成である。 FIG. 7 shows a seventh embodiment of the present invention. The difference from the first to sixth embodiments is that the configuration of the AC switch element in the IGBT module MJ2 is configured by connecting an IGBTTT3 in which diodes are connected in antiparallel and an IGBTTT4 in which diodes are connected in antiparallel to each other. Is a point. In this configuration, the collector of IGBTTT3 is connected to the series connection point side of IGBTTT1 and IGBTTT2, and the collector of IGBTTT4 is connected to the intermediate potential connection terminal M side of the DC power supply.
また、２８はＩＧＢＴＴ１〜Ｔ４を駆動するためのゲート駆動回路基板で、ＧＤＵ１がＩＧＢＴＴ１用、ＧＤＵ２がＩＧＢＴＴ２用、ＧＤＵ３がＩＧＢＴＴ３用、ＧＤＵ４がＩＧＢＴＴ４用である。本実施例はＧＤＵ１とＧＤＵ４が隣接して中央部に、その外側にＧＤＵ３とＧＤＵ２が配置された構造である。各ゲート駆動回路の入力部には絶縁器２５、２６、３５、３６が設けられ、外部の制御回路からの信号が絶縁してゲート駆動回路に入力される。また、Ｇ１〜Ｇ４は各ＩＧＢＴのゲートに接続するためのゲート接続用端子、Ｅ１〜Ｅ４は各ＩＧＢＴのエミッタに接続するためのエミッタ接続用端子、Ｃ１はＩＧＢＴＴ１のコレクタに接続するためのコレクタ接続用端子、Ｃ４はＩＧＢＴＴ４のコレクタに接続するためのコレクタ接続用端子である。各ゲート駆動回路には、ＩＧＢＴの過電流時のコレクタ電圧を検出するための検出用ダイオード２０、３０、３１、３３が設けられている。 Reference numeral 28 denotes a gate drive circuit board for driving IGBTTT1 to T4. GDU1 is for IGBTTT1, GDU2 is for IGBTTT2, GDU3 is for IGBTTT3, and GDU4 is for IGBTTT4. In the present embodiment, GDU1 and GDU4 are adjacent to each other at the central portion, and GDU3 and GDU2 are disposed outside thereof. Insulators 25, 26, 35, and 36 are provided at the input portion of each gate drive circuit, and a signal from an external control circuit is insulated and input to the gate drive circuit. G1 to G4 are gate connection terminals for connection to the gates of the IGBTs, E1 to E4 are emitter connection terminals for connection to the emitters of the IGBTs, and C1 is a collector connection for connection to the collector of the IGBTTT1. A terminal C4 is a collector connection terminal for connecting to the collector of the IGBTTT4. Each gate drive circuit is provided with detection diodes 20, 30, 31, and 33 for detecting the collector voltage when the IGBT is overcurrent.
このような構成において、各ゲート駆動回路に設けられているコレクタ電圧を検出するための検出用ダイオード２０、３０、３１、３３はそれぞれ各ＩＧＢＴのコレクタに接続する必要がある。本実施例では、ゲート駆動回路ＧＤＵ１の検出用ダイオード２０のカソードはコレクタ接続用端子Ｃ１から直接ＩＧＢＴＴ１のコレクタに、ゲート駆動回路ＧＤＵ２の検出用ダイオード３０のカソードはゲート駆動回路ＧＤＵ１のエミッタ接続用端子Ｅ１を経由してＩＧＢＴＴ２のコレクタに、ゲート駆動回路ＧＤＵ３の検出用ダイオード３３のカソードはゲート駆動回路ＧＤＵ１のエミッタ接続用端子Ｅ１を経由してＩＧＢＴＴ３のコレクタに、ゲート駆動回路ＧＤＵ４の検出用ダイオード３１のカソードは直接ＩＧＢＴＴ４のコレクタに、それぞれ接続される。 In such a configuration, the detection diodes 20, 30, 31, and 33 for detecting the collector voltage provided in each gate drive circuit need to be connected to the collectors of the respective IGBTs. In this embodiment, the cathode of the detection diode 20 of the gate drive circuit GDU1 is directly connected to the collector of the IGBTTT1 from the collector connection terminal C1, and the cathode of the detection diode 30 of the gate drive circuit GDU2 is the emitter connection terminal of the gate drive circuit GDU1. The collector of the IGBTTT2 is passed through E1, the cathode of the detection diode 33 of the gate drive circuit GDU3 is connected to the collector of the IGBTTT3 via the emitter connection terminal E1 of the gate drive circuit GDU1, and the detection diode 31 of the gate drive circuit GDU4. Are directly connected to the collector of the IGBTTT4.
これらのゲート駆動回路の基板構成により、ゲート駆動基板２８とＩＧＢＴモジュールＭＪ２との配線数は１０本となり、従来技術を用いた場合の配線数１２本に比べて、２本減少する。また、ゲート駆動回路ＧＤＵ３のエミッタ接続用端子Ｅ３とゲート駆動回路ＧＤＵ４のエミッタ接続用端子Ｅ４とを接続線ＬＢで接続することにより、ＧＤＵ３とＩＧＢＴＴ３のエミッタ接続線又はＧＤＵ４とＩＧＢＴＴ４のエミッタ接続線の一方は省略できるため、ゲート駆動基板２８とＩＧＢＴモジュールＭＪ２との配線数は９本に削減することができる。 Due to the substrate configuration of these gate drive circuits, the number of wires between the gate drive substrate 28 and the IGBT module MJ2 is 10, which is two fewer than the number of wires 12 when the conventional technique is used. Further, the emitter connection terminal E3 of the gate drive circuit GDU3 and the emitter connection terminal E4 of the gate drive circuit GDU4 are connected by the connection line LB, whereby the emitter connection line of GDU3 and IGBTTT3 or the emitter connection line of GDU4 and IGBTTT4. Since one of them can be omitted, the number of wirings between the gate drive substrate 28 and the IGBT module MJ2 can be reduced to nine.
図８に、本発明の第８の実施例を示す。第７の実施例との違いは、ＩＧＢＴモジュールＭＪ２の交流スイッチ素子の構成が、ダイオードを逆並列接続したＩＧＢＴＴ３とダイオードを逆並列接続したＩＧＢＴＴ４とを逆直列接続した構成で、ＩＧＢＴＴ１とＩＧＢＴＴ２の直列接続点側にＩＧＢＴＴ３のエミッタを、直流電源の中間電位接続端子Ｍ側にＩＧＢＴＴ４のエミッタを、各々接続する点である。また、Ｇ１〜Ｇ４は各ＩＧＢＴのゲートに接続するためのゲート接続用端子、Ｅ１〜Ｅ４は各ＩＧＢＴのエミッタに接続するためのエミッタ接続用端子、Ｃ１はＩＧＢＴＴ１のコレクタに接続するためのコレクタ接続用端子、Ｃ４はＩＧＢＴＴ４のコレクタに接続するためのコレクタ接続用端子である。 FIG. 8 shows an eighth embodiment of the present invention. The difference from the seventh embodiment is that the configuration of the AC switch element of the IGBT module MJ2 is a configuration in which an IGBTTT3 in which diodes are connected in reverse parallel and an IGBTTT4 in which diodes are connected in reverse parallel are connected in reverse series, and IGBTTT1 and IGBTTT2 are connected in series The IGBTTT3 emitter is connected to the connection point side, and the IGBTTT4 emitter is connected to the intermediate potential connection terminal M side of the DC power supply. G1 to G4 are gate connection terminals for connection to the gates of the IGBTs, E1 to E4 are emitter connection terminals for connection to the emitters of the IGBTs, and C1 is a collector connection for connection to the collector of the IGBTTT1. A terminal C4 is a collector connection terminal for connecting to the collector of the IGBTTT4.
本実施例では、ゲート駆動回路ＧＤＵ１の検出用ダイオード２０のカソードはコレクタ接続用端子Ｃ１から直接ＩＧＢＴＴ１のコレクタに、ゲート駆動回路ＧＤＵ２の検出用ダイオード３０のカソードはゲート駆動回路ＧＤＵ１のエミッタ接続用端子Ｅ１を経由してＩＧＢＴＴ２のコレクタに、ゲート駆動回路ＧＤＵ３の検出用ダイオード３３のカソードはゲート駆動回路ＧＤＵ４のコレクタ接続用端子Ｃ４を経由してＩＧＢＴＴ３のコレクタに、ゲート駆動回路ＧＤＵ４の検出用ダイオード３１のカソードは直接ＩＧＢＴＴ４のコレクタに、それぞれ接続される。これらのゲート駆動回路の基板構成により、ゲート駆動基板２８とＩＧＢＴモジュールＭＪ２との配線数は１０本となり、従来技術を用いた場合の配線数１２本に比べて、２本減少する。また、ゲート駆動回路ＧＤＵ３のエミッタ接続用端子Ｅ３とゲート駆動回路ＧＤＵ１のエミッタ接続用端子Ｅ１とを接続線ＬＣで接続することにより、ＧＤＵ３とＩＧＢＴＴ３のエミッタ接続線又はＧＤＵ１とＩＧＢＴＴ１のエミッタ接続線の一方は省略できるため、ゲート駆動基板２８とＩＧＢＴモジュールＭＪ２との配線数は９本に削減することができる。 In this embodiment, the cathode of the detection diode 20 of the gate drive circuit GDU1 is directly connected to the collector of the IGBTTT1 from the collector connection terminal C1, and the cathode of the detection diode 30 of the gate drive circuit GDU2 is the emitter connection terminal of the gate drive circuit GDU1. The collector of the IGBTTT2 is connected via E1, the cathode of the detection diode 33 of the gate drive circuit GDU3 is connected to the collector of the IGBTTT3 via the collector connection terminal C4 of the gate drive circuit GDU4, and the detection diode 31 of the gate drive circuit GDU4. Are directly connected to the collector of the IGBTTT4. Due to the substrate configuration of these gate drive circuits, the number of wires between the gate drive substrate 28 and the IGBT module MJ2 is 10, which is two fewer than the number of wires 12 when the conventional technique is used. Further, the emitter connection terminal E3 of the gate drive circuit GDU3 and the emitter connection terminal E1 of the gate drive circuit GDU1 are connected by a connection line LC, whereby the emitter connection line of GDU3 and IGBTTT3 or the emitter connection line of GDU1 and IGBTTT1 is connected. Since one of them can be omitted, the number of wirings between the gate drive substrate 28 and the IGBT module MJ2 can be reduced to nine.
尚、上記実施例では、ゲート駆動回路の電源については言及していないが、第1の実施例〜第6の実施例において、ゲート駆動回路ＧＤＵ１とＧＤＵ４のエミッタ接続用端子を接続線ＬＡで接続した場合には、ゲート駆動回路ＧＤＵ１とＧＤＵ４の電源は共通化でき、電源回路の構成が簡素化できる効果が生じる。同様に、第7の実施例において、ゲート駆動回路ＧＤＵ３とＧＤＵ４のエミッタ接続用端子を接続線ＬＢで接続する場合にはゲート駆動回路ＧＤＵ３とＧＤＵ４の電源は共通化でき、第8の実施例において、ゲート駆動回路ＧＤＵ１とＧＤＵ３のエミッタ接続用端子を接続線ＬＣで接続する場合にはゲート駆動回路ＧＤＵ１とＧＤＵ３の電源を共通化できる。
また、実施例では、３レベルインバータ回路を例に説明したが、多レベルのインバータ回路、交流を直流に変換するＰＷＭ整流回路などにも適用可能である。
In the above embodiment, the power source of the gate drive circuit is not mentioned. However, in the first to sixth embodiments, the emitter connection terminals of the gate drive circuits GDU1 and GDU4 are connected by the connection line LA. In this case, the gate drive circuits GDU1 and GDU4 can have a common power supply, and the power supply circuit configuration can be simplified. Similarly, in the seventh embodiment, when the emitter connection terminals of the gate drive circuits GDU3 and GDU4 are connected by the connection line LB, the power sources of the gate drive circuits GDU3 and GDU4 can be shared, and in the eighth embodiment, When the emitter connection terminals of the gate drive circuits GDU1 and GDU3 are connected by the connection line LC, the power sources of the gate drive circuits GDU1 and GDU3 can be shared.
In the embodiment, a three-level inverter circuit has been described as an example. However, the present invention can be applied to a multi-level inverter circuit, a PWM rectifier circuit that converts alternating current into direct current, and the like.
１、２・・・電解コンデンサ ４、６・・・ダイオード
３、５、Ｔ、Ｔ１、Ｔ２、Ｔ３、Ｔ４・・・ＩＧＢＴ
７、８、Ｔ３Ｂ、Ｔ４Ｂ・・・逆阻止型ＩＧＢＴ
１０〜１２・・・フィルタリアクトル １３・・・負荷
１５〜１８、ＧＤＵ１〜ＧＤＵ４・・・ゲート駆動回路 １９・・・制御回路
２０、３０、３１、３３・・・検出用ダイオード ３２、３４・・・抵抗
２１・・・ツェナーダイオード ２２・・・トランジスタ
ＳＩ、２５、２６、３５、３６、ＳＩ・・・絶縁器
２７・・・ゲート駆動電源用トランス
２８・・・ゲート駆動基板 ＭＪ１、ＭＪ２・・・ＩＧＢＴモジュール
ＬＡ、ＬＢ，ＬＣ・・・接続線 ＰＳ，ＮＳ・・・電源
Ｒ１、Ｒｇ、Ｒｏｎ、Ｒｏｆｆ・・・抵抗 Ｄ１・・・ダイオード
Ｔｏｎ、Ｔｏｆｆ・・・トランジスタ
1, 2, ... Electrolytic capacitor 4, 6 ... Diode 3, 5, T, T1, T2, T3, T4 ... IGBT
7, 8, T3B, T4B ... Reverse blocking IGBT
10-12 ... Filter reactor 13 ... Load 15-18, GDU1-GDU4 ... Gate drive circuit 19 ... Control circuit 20, 30, 31, 33 ... Detection diode 32, 34 ...・ Resistor 21 ... Zener diode 22 ... Transistor SI, 25, 26, 35, 36, SI ... Insulator 27 ... Transformer for gate drive power supply 28 ... Gate drive substrate MJ1, MJ2 ...・ IGBT module LA, LB, LC ... connection line PS, NS ... power supply R1, Rg, Ron, Roff ... resistor D1 ... diode Ton, Toff ... transistor
Claims (11)
前記各ゲート駆動回路は、駆動対象となる前記スイッチ素子のオン時のコレクタ端子電圧を検出するための検出用ダイオードを各々備え、前記検出用ダイオードの少なくとも１個は他のゲート駆動回路を経由した配線経路で駆動対象となるスイッチ素子のコレクタ端子に接続されるゲート駆動回路の基板構成を備えたことを特徴とする３レベル電力変換装置。 A power conversion circuit that converts direct current to alternating current, or alternating current to direct current, a first switch element having a diode connected to the positive side of the direct current circuit and connected in reverse parallel, and an emitter terminal on the negative side of the direct current circuit A second switch element in which a diode to be connected is connected in reverse parallel; a series connection point of an emitter terminal of the first switch element and a collector terminal of the second switch element; and an intermediate potential point of the DC circuit In a power conversion circuit for AC output of a three-level voltage corresponding to one phase of an AC switch element connected between, a substrate configuration of a gate drive circuit for driving each of the switch elements,
Each of the gate drive circuits includes a detection diode for detecting a collector terminal voltage when the switch element to be driven is on, and at least one of the detection diodes passes through another gate drive circuit. A three-level power converter comprising a substrate configuration of a gate drive circuit connected to a collector terminal of a switch element to be driven in a wiring path.
前記各ゲート駆動回路は、駆動対象となる前記スイッチ素子のオン時のコレクタ端子電圧を検出するための検出用ダイオードを各々備え、前記検出用ダイオードの少なくとも１個は他のゲート駆動回路を経由した配線経路で駆動対象となるスイッチ素子のコレクタ端子に接続されるゲート駆動回路の基板構成を備えたことを特徴とする３レベル電力変換装置。 A power conversion circuit that converts direct current to alternating current, or alternating current to direct current, a first switch element having a diode connected to the positive side of the direct current circuit and connected in reverse parallel, and an emitter terminal on the negative side of the direct current circuit A second switch element in which a diode to be connected is connected in reverse parallel; a series connection point of an emitter terminal of the first switch element and a collector terminal of the second switch element; and an intermediate potential point of the DC circuit An AC switch circuit in which a third switch element having a collector terminal on the series connection point side and a fourth switch element having a collector terminal on the intermediate potential point side of the DC circuit are connected in reverse parallel, In the power conversion circuit for AC output of 3 levels of voltage for one phase, the substrate configuration of four gate drive circuits for driving each of the first to fourth switch elements Stomach,
Each of the gate drive circuits includes a detection diode for detecting a collector terminal voltage when the switch element to be driven is on, and at least one of the detection diodes passes through another gate drive circuit. A three-level power converter comprising a substrate configuration of a gate drive circuit connected to a collector terminal of a switch element to be driven in a wiring path.
前記各ゲート駆動回路は、駆動対象となる前記スイッチ素子のオン時のコレクタ端子電圧を検出するための検出用ダイオードを各々備え、前記検出用ダイオードの少なくとも１個は他のゲート駆動回路を経由した配線経路で駆動対象となるスイッチ素子のコレクタ端子に接続されるゲート駆動回路の基板構成を備えたことを特徴とする３レベル電力変換装置。 A power conversion circuit that converts direct current to alternating current, or alternating current to direct current, a first switch element having a diode connected to the positive side of the direct current circuit and connected in reverse parallel, and an emitter terminal on the negative side of the direct current circuit A second switch element in which a diode to be connected is connected in reverse parallel; a series connection point of an emitter terminal of the first switch element and a collector terminal of the second switch element; and an intermediate potential point of the DC circuit A third switch element in which the series connection point side is a collector terminal and a diode is connected in reverse parallel; and a fourth switch element in which the intermediate potential point side of the DC circuit is a collector terminal and a diode is connected in reverse parallel; The first to fourth switch elements in the AC switch circuit in which the two are connected in reverse series, and the power conversion circuit that outputs a three-level voltage corresponding to one phase. In the substrate configuration of four gate drive circuits that drive each of the
Each of the gate drive circuits includes a detection diode for detecting a collector terminal voltage when the switch element to be driven is on, and at least one of the detection diodes passes through another gate drive circuit. A three-level power converter comprising a substrate configuration of a gate drive circuit connected to a collector terminal of a switch element to be driven in a wiring path.
前記各ゲート駆動回路は、駆動対象となる前記スイッチ素子のオン時のコレクタ端子電圧を検出するための検出用ダイオードを各々備え、前記検出用ダイオードの少なくとも１個は他のゲート駆動回路を経由した配線経路で駆動対象となる前記スイッチ素子のコレクタ端子に接続されるゲート駆動回路の基板構成を備えたことを特徴とする３レベル電力変換装置。 A power conversion circuit that converts direct current to alternating current, or alternating current to direct current, a first switch element having a diode connected to the positive side of the direct current circuit and connected in reverse parallel, and an emitter terminal on the negative side of the direct current circuit A second switch element in which a diode to be connected is connected in reverse parallel; a series connection point of an emitter terminal of the first switch element and a collector terminal of the second switch element; and an intermediate potential point of the DC circuit A third switch element in which the series connection point side is an emitter terminal and a diode is connected in reverse parallel; and a fourth switch element in which the intermediate potential point side of the DC circuit is an emitter terminal and a diode is connected in reverse parallel; The first to fourth switch elements in the AC switch circuit in which the two are connected in reverse series, and the power conversion circuit that outputs a three-level voltage corresponding to one phase. In the substrate configuration of four gate drive circuits that drive each of the
Each of the gate drive circuits includes a detection diode for detecting a collector terminal voltage when the switch element to be driven is on, and at least one of the detection diodes passes through another gate drive circuit. A three-level power conversion device comprising a substrate configuration of a gate drive circuit connected to a collector terminal of the switch element to be driven in a wiring path.
10. The emitter connection terminal of the first switch element gate drive circuit and the emitter connection terminal of the third switch element gate drive circuit are connected on the substrate side of the gate drive circuit. Or the three-level power conversion device according to 10.
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| JP2013255350A (en) * | 2012-06-07 | 2013-12-19 | Fuji Electric Co Ltd | Control device for three-level power conversion circuit |
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| US10123443B2 (en) | 2014-12-25 | 2018-11-06 | Fuji Electric Co., Ltd. | Semiconductor device |
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