JP2011002259A - Method for measuring stress, sensor for measuring stress and device for evaluating residual stress - Google Patents

Method for measuring stress, sensor for measuring stress and device for evaluating residual stress Download PDF

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JP2011002259A
JP2011002259A JP2009143537A JP2009143537A JP2011002259A JP 2011002259 A JP2011002259 A JP 2011002259A JP 2009143537 A JP2009143537 A JP 2009143537A JP 2009143537 A JP2009143537 A JP 2009143537A JP 2011002259 A JP2011002259 A JP 2011002259A
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stress
substrate
chain
resistance
via chain
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JP5334023B2 (en
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Hajime Tomokage
肇 友景
Takeshi Kawajiri
剛 川尻
Hitoshi Horiuchi
整 堀内
Jun Morishita
順 森下
Yoshio Takimoto
嘉夫 滝本
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Consortium For Advanced Semiconductor Mat & Related Tech
WALTS KK
Consortium for Advanced Semiconductor Materials and Related Technologies
Fukuoka Industry Science and Technology Foundation
Fukuoka University
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Consortium For Advanced Semiconductor Mat & Related Tech
WALTS KK
Consortium for Advanced Semiconductor Materials and Related Technologies
Fukuoka Industry Science and Technology Foundation
Fukuoka University
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Abstract

PROBLEM TO BE SOLVED: To provide a method for measuring stress which measures the stress given to a substrate and a measuring object to which the substrate is fixed, based on a change in the resistance of a via chain, utilizing that a reversible resistance change is found out when the stress is given to the substrate provided with the via chain.SOLUTION: The prescribed substrate 10, on which the via chain 15 and pads 17 and 18 connected thereto are provided is fixed to the measuring object and electrical resistance between the pads, is measured; thereby the change in the resistance of the via chain 15 corresponding to the amplitude of the stress given to the measuring object is made detectable from outside in the condition that this stress is given also to the substrate 10, simultaneously. By understanding beforehand the relation between the change in the stress and the change in the resistance of the via chain 15, the stress value can be acquired from the resistance value of the via chain 15. The stress given to the measuring object can be measured with good sensitivity, on the basis of the property that the resistance changes greatly, compared with the case of a piezo resistance effect, with respect to the same stress.

Description

本発明は、半導体製造プロセスにより基板上に設けたビアチェーンの抵抗変化に基づいて、基板や当該基板が固定された測定対象物に加わる応力を測定する応力測定方法に関する。   The present invention relates to a stress measurement method for measuring stress applied to a substrate or a measurement object to which the substrate is fixed, based on a resistance change of a via chain provided on the substrate by a semiconductor manufacturing process.

LSIをはじめとする半導体デバイスは、小型化、高集積化と共に、さらなる高速化、省電力化を目指して、配線の微細化や多層化が進んでいる。そして、微細化に伴って配線のより一層の低抵抗化を図るためにアルミニウム配線に代えて銅配線が採用され、また、銅配線の採用と共に、層間絶縁膜として、配線間容量低減のため膜中に空孔を導入し、誘電率の低減を図った低誘電率膜(low−k膜)が用いられるようになっている。   In semiconductor devices such as LSIs, miniaturization and multilayering of wiring are progressing with the aim of further speeding up and power saving along with downsizing and high integration. Then, in order to further reduce the resistance of the wiring with miniaturization, a copper wiring is adopted instead of the aluminum wiring, and, along with the adoption of the copper wiring, as an interlayer insulating film, a film for reducing the capacitance between the wirings A low dielectric constant film (low-k film) in which holes are introduced to reduce the dielectric constant is used.

こうした配線の微細化や多層化等に伴う新たな技術の導入に伴い、製造工程においても、形成される回路の動作に影響を及すような問題が生じやすくなっており、デバイスの量産にあたり、製造工程中や工程後における不具合発生の有無や、設計通りの電気的特性が確保できるかどうか等を、適切に検証、評価することが求められている。   With the introduction of new technology accompanying such miniaturization and multilayering of wiring, problems that affect the operation of the formed circuit are likely to occur in the manufacturing process. It is required to appropriately verify and evaluate whether or not defects occur during or after the manufacturing process and whether or not the electrical characteristics as designed can be ensured.

近年、こうした半導体デバイスの製造にあたって、ウェハやパッケージの各段階において、配線の性能やプロセスの影響の評価、不具合の解析等を行うためにTEG(Test Element Group)が用いられるようになっている。このTEGにおける多層配線の評価用パターンの一つとして、複数層にわたり配設される多数の配線を、ビアを介して各層間で接続して直列鎖状に連結したビアチェーンが設けられており、このビアチェーンの抵抗等を測定することで、配線やビア、絶縁膜等が当初の設計通りに機能しているかの確認が行える仕組みである。   In recent years, in manufacturing such semiconductor devices, TEG (Test Element Group) has been used at each stage of wafers and packages to evaluate wiring performance and process influence, analyze defects, and the like. As one of the evaluation patterns for multilayer wiring in this TEG, there is provided a via chain in which a large number of wirings arranged in a plurality of layers are connected between each layer through vias and connected in series. By measuring the resistance and the like of this via chain, it is possible to confirm whether the wiring, vias, insulating film, etc. are functioning as originally designed.

こうした従来のビアチェーンを用いた半導体デバイスの評価手法の例としては、特開平3−36747号公報(特許文献1)や特開2004−228510号公報(特許文献2)、特開2004−335914号公報(特許文献3)に開示されるものがある。   Examples of such conventional semiconductor device evaluation methods using via chains include Japanese Patent Laid-Open No. 3-36747 (Patent Document 1), Japanese Patent Application Laid-Open No. 2004-228510 (Patent Document 2), and Japanese Patent Application Laid-Open No. 2004-335914. There are some which are indicated by a gazette (patent documents 3).

一方、半導体デバイスでは、モールド等のパッケージ工程やワイヤボンディング等の配線工程、さらに製造後の温度変化や圧力付加によって、基板(チップ)に応力が加わり、これが電気的特性を変化させる場合もある。このため、基板に加わる応力を適切に評価しておく必要があり、応力を測定する仕組みが求められていた。応力の測定をデバイス外部から行うことは困難であったが、近年、半導体基板そのものに拡散抵抗素子部、すなわちピエゾ抵抗効果を利用した応力検知部を形成して基板に加わる応力を電気信号として測定可能とするものが提案されており、その例として、特開2005−209827号公報(特許文献4)や特開2009−65052号公報(特許文献5)に開示されるものがある。   On the other hand, in a semiconductor device, stress is applied to a substrate (chip) due to a packaging process such as molding, a wiring process such as wire bonding, and a temperature change or pressure application after manufacturing, which may change electrical characteristics. For this reason, it is necessary to appropriately evaluate the stress applied to the substrate, and a mechanism for measuring the stress has been demanded. In recent years, it has been difficult to measure stress from outside the device, but in recent years, a diffused resistance element, that is, a stress detector utilizing the piezoresistive effect is formed on the semiconductor substrate itself, and the stress applied to the substrate is measured as an electrical signal. Some have been proposed, and examples thereof include those disclosed in Japanese Unexamined Patent Application Publication No. 2005-209827 (Patent Document 4) and Japanese Unexamined Patent Application Publication No. 2009-65052 (Patent Document 5).

また、こうした半導体に拡散抵抗素子部を設けたものは、半導体基板自体の応力測定用にとどまらず、基板に拡散抵抗素子部のみ設けた、すなわち応力測定の機能のみ与えた半導体センサとしても一般的に利用されている。こうした従来の応力測定用センサの例としては、特開平10−132675号公報(特許文献6)や特開2006−258674号公報(特許文献7)に開示されるものがある。   In addition, such a semiconductor provided with a diffused resistor element is not limited to measuring the stress of the semiconductor substrate itself, but is also generally used as a semiconductor sensor provided with only a diffused resistor element on the substrate, that is, only having a stress measuring function. Has been used. Examples of such conventional stress measurement sensors include those disclosed in Japanese Patent Laid-Open No. 10-132675 (Patent Document 6) and Japanese Patent Laid-Open No. 2006-258664 (Patent Document 7).

特開平3−36747号公報JP-A-3-36747 特開2004−228510号公報JP 2004-228510 A 特開2004−335914号公報JP 2004-335914 A 特開2005−209827号公報JP 2005-209827 A 特開2009−65052号公報JP 2009-65052 A 特開平10−132675号公報Japanese Patent Laid-Open No. 10-132675 特開2006−258674号公報JP 2006-258664 A

従来の半導体デバイスの電気的特性等の評価は前記特許文献1ないし3に示される手法等で行われていたが、ビアチェーン等の配線パターンのみでは、半導体基板に加わる応力を検知して評価することはできず、前記特許文献4、5に示されるような拡散抵抗素子部を基板上に別途設けて測定する必要があった。   Conventionally, evaluation of electrical characteristics and the like of a semiconductor device has been performed by the method described in Patent Documents 1 to 3, but only a wiring pattern such as a via chain detects and evaluates stress applied to a semiconductor substrate. However, it was necessary to separately measure the diffused resistance element as shown in Patent Documents 4 and 5 on the substrate.

しかしながら、前記特許文献4ないし7に示されるような半導体基板上に拡散抵抗素子部を形成したものによる応力の測定は、応力の変化に対応する拡散抵抗素子部の抵抗変化が、ピエゾ抵抗効果の性質上、応力0における抵抗値から最大でも数%程度の変化にとどまるなど極めて小さいものであることから、検出感度が優れず、測定に際して様々な工夫が必要となり、測定が難しいという課題を有していた。また、拡散抵抗素子部は半導体基板に拡散層として形成されるものであり、製造プロセス上の制約を受けやすく、また基板上での配置も限定されるという課題を有していた。   However, the measurement of stress using a diffusion resistance element portion formed on a semiconductor substrate as disclosed in Patent Documents 4 to 7 shows that the resistance change of the diffusion resistance element portion corresponding to the change in stress is caused by the piezoresistance effect. Due to its nature, it is extremely small, such as only a few percent change from the resistance value at zero stress, so the detection sensitivity is not excellent, and various measures are required for measurement, making it difficult to measure. It was. Further, the diffusion resistance element portion is formed as a diffusion layer on the semiconductor substrate, and thus has a problem that it is easily restricted by the manufacturing process and the arrangement on the substrate is limited.

本発明は、前記課題を解消するためになされたもので、ビアチェーンを設けた基板に応力を加えた際に可逆的な抵抗変化が見出されたことを利用して、基板やこの基板を固定した測定対象物に加わる応力をビアチェーンの抵抗変化に基づいて測定する応力測定方法、及び、測定対象物に固定してビアチェーンの抵抗変化から応力の値を求められる応力測定用センサ、並びに、応力に対応して抵抗を変化させるビアチェーンが設けられて基板に加わる応力を測定、評価できる残留応力評価用デバイス、を提供することを目的とする。   The present invention has been made in order to solve the above-described problems. By utilizing the fact that a reversible resistance change was found when stress was applied to a substrate provided with a via chain, the substrate and this substrate were A stress measurement method for measuring stress applied to a fixed measurement object based on a resistance change of the via chain, a stress measurement sensor that can be fixed to the measurement object and a stress value can be obtained from the resistance change of the via chain, and Another object of the present invention is to provide a residual stress evaluation device that is provided with a via chain that changes resistance in response to stress and can measure and evaluate stress applied to a substrate.

本発明に係る応力測定方法は、基板上に絶縁膜を介して複数層にわたり配設される多数の配線を、ビアを介して各層間で接続して直列に連結してなるビアチェーンが、外層に配設されて外部配線に接続する一の接続パッドとチェーン一端部を接続されると共に、外層に配設されて外部配線に接続する他の接続パッドとチェーン他端部を接続された状態で、前記基板を測定対象物に固定し、前記一の接続パッドと他の接続パッドとの間の抵抗を、前記測定対象物に応力の加わった状態で測定し、あらかじめ取得された前記基板における応力変化に対応する抵抗変化の割合に基づいて、測定対象物に加わる応力の値を求めるものである。   In the stress measuring method according to the present invention, a via chain formed by connecting a large number of wirings arranged on a substrate across a plurality of layers via an insulating film between layers via vias and connecting them in series is an outer layer. One connection pad connected to the external wiring is connected to one end of the chain, and the other connection pad connected to the external wiring is connected to the external wiring and the other end of the chain are connected. The substrate is fixed to the measurement object, and the resistance between the one connection pad and the other connection pad is measured in a state where stress is applied to the measurement object, and the stress in the substrate acquired in advance is measured. Based on the rate of resistance change corresponding to the change, the value of the stress applied to the measurement object is obtained.

このように本発明においては、配線が微細化、多層化した半導体デバイスの基板上における配線の電気的特性の評価に用いられるビアチェーンについて、本発明者が、こうしたビアチェーンのある基板に応力を加えると、ビアチェーンの抵抗値が、加えられる応力の大きさに対応して大きく変化し、且つ応力の付加を解除すると当初の抵抗値に戻る現象を見出したことに基づいて、所定の基板上にビアチェーンとこれに接続するパッドを備えたものを測定対象物に固定し、パッド間の電気抵抗を測定することにより、測定対象物に加わる応力が同時に基板にも加わる中、この応力の大きさに対応したビアチェーンの抵抗変化を外部から検知できることとなり、あらかじめ応力の変化とビアチェーンの抵抗変化との関係を把握しておくことでビアチェーンの抵抗値から応力の値を取得でき、同じ応力に対しピエゾ抵抗効果の場合に比べ大きく抵抗が変化する性質に基づいて、感度よく測定対象物に加わる応力の測定が行える。   As described above, in the present invention, regarding the via chain used for the evaluation of the electrical characteristics of the wiring on the substrate of the semiconductor device in which the wiring is miniaturized and multi-layered, the inventor applied stress to the substrate having such a via chain. In addition, the resistance value of the via chain changes greatly corresponding to the magnitude of the applied stress, and the phenomenon that the resistance value returns to the original resistance value when the stress is released is found on the predetermined substrate. By fixing a device with a via chain and a pad connected to it to the measurement object and measuring the electrical resistance between the pads, the stress applied to the measurement object is simultaneously applied to the substrate. The resistance change of the via chain corresponding to the thickness can be detected from the outside, and the relationship between the stress change and the resistance change of the via chain is grasped in advance. You can get the value of the stress from the resistance value of the chain, based on the large nature of resistance changes compared with the piezo resistance effect for the same stress, enabling the measurement of the stress applied to the sensitivity measuring object.

また、本発明に係る応力測定方法は必要に応じて、前記測定対象物への固定状態で前記基板に加わる応力が、ビアチェーンに対し引張り方向となる場合は、あらかじめ取得された前記基板でのビアチェーンに対し引張り方向となる応力変化に対応する抵抗変化の割合に基づいて応力値を求め、前記測定対象物への固定状態で前記基板に加わる応力が、ビアチェーンに対し圧縮方向となる場合は、あらかじめ取得された前記基板でのビアチェーンに対し圧縮方向となる応力変化に対応する抵抗変化の割合に基づいて応力値を求めるものである。   In addition, the stress measurement method according to the present invention, if necessary, when the stress applied to the substrate in a state of being fixed to the measurement object is in a tensile direction with respect to the via chain, When the stress value is obtained based on the ratio of the resistance change corresponding to the stress change in the tension direction with respect to the via chain, and the stress applied to the substrate in the fixed state to the measurement object is in the compression direction with respect to the via chain Is to obtain the stress value based on the ratio of the resistance change corresponding to the stress change in the compression direction with respect to the via chain in the substrate obtained in advance.

このように本発明においては、ビアチェーンのある基板では、基板に加わる応力の向きが、ビアチェーンに対する引張り方向の場合と圧縮方向の場合とで、それぞれ応力の変化とビアチェーンの抵抗変化との関係が異なる性質を有することに基づいて、基板に加わる応力の向きが、前記引張り方向の場合には、あらかじめ取得された前記引張り方向における応力の変化と抵抗変化との関係を用いて応力を求め、また、基板に加わる応力の向きが、前記圧縮方向の場合には、あらかじめ取得された前記圧縮方向における応力の変化と抵抗変化との関係を用いて応力を求めることにより、応力の加わる向きによって異なるビアチェーンの抵抗変化に対応して、基板に加わる応力を適切に求められることとなり、極めて正確に測定対象物に加わる応力の測定が行える。   As described above, according to the present invention, in a substrate with a via chain, the stress applied to the substrate has a stress change and a via chain resistance change in each of a tensile direction and a compression direction with respect to the via chain. When the direction of the stress applied to the substrate is the tension direction based on the fact that the relationship is different, the stress is obtained using the relationship between the change in stress and the resistance change in the tension direction obtained in advance. Further, when the direction of the stress applied to the substrate is the compression direction, the stress is obtained by using the relationship between the change in the stress and the resistance change in the compression direction acquired in advance, and the direction of the stress is applied. Corresponding to the resistance change of different via chains, the stress applied to the substrate can be obtained appropriately, and the response to the measurement object can be applied very accurately. It can be performed of the measurement.

また、本発明に係る応力測定方法は、基板上に絶縁膜を介して複数層にわたり配設される多数の配線を、ビアを介して各層間で接続して直列に連結してなるビアチェーンが、外層に配設されて外部配線に接続する一の接続パッドとチェーン一端部を接続されると共に、外層に配設されて外部配線に接続する他の接続パッドとチェーン他端部を接続され、前記一の接続パッドと他の接続パッドとの間の抵抗を、前記基板に応力の加わった状態で測定し、あらかじめ取得された前記基板における応力変化に対応する抵抗変化の割合に基づいて、基板に加わる応力の値を求めるものである。   Further, the stress measuring method according to the present invention includes a via chain formed by connecting a plurality of wirings arranged on a substrate over a plurality of layers via an insulating film between each layer via vias and connecting them in series. The one end of the chain connected to the external wiring disposed on the outer layer is connected to one end of the chain, and the other end of the chain connected to the external wiring connected to the outer wiring is connected to the other end of the chain. The resistance between the one connection pad and the other connection pad is measured in a state where stress is applied to the substrate, and based on the ratio of the resistance change corresponding to the stress change in the substrate obtained in advance. The value of the stress applied to is obtained.

このように本発明においては、所定の基板上にビアチェーンとこれに接続するパッドを設け、基板に直接応力が加わりうる状況でパッド間の電気抵抗を測定することにより、基板に加わった応力の大きさに対応したビアチェーンの抵抗変化を検知できることとなり、あらかじめ応力の変化とビアチェーンの抵抗変化との関係を把握しておくことでビアチェーンの抵抗値から応力の値を取得でき、同じ応力に対しピエゾ抵抗効果の場合に比べ大きく抵抗が変化する性質に基づいて、感度よく基板に直接加わる応力の測定が行える。なお、本発明の応力測定方法は、基板に加えられた外力により生じた応力を測るものであってもよい。この場合、外力は、ビアチェーンから離れた部分に加えてもよく、ビアチェーンの上に加えてもよい。また、外力を付加する部分に、押圧パッドを設ける構成とすることもできる。   As described above, in the present invention, a via chain and a pad connected to the via chain are provided on a predetermined substrate, and the electrical resistance between the pads is measured in a situation where stress can be directly applied to the substrate. The resistance change of the via chain corresponding to the size can be detected, and the stress value can be obtained from the resistance value of the via chain by grasping the relationship between the stress change and the resistance change of the via chain in advance. On the other hand, the stress directly applied to the substrate can be measured with high sensitivity based on the property that the resistance changes greatly compared to the case of the piezoresistance effect. The stress measurement method of the present invention may measure the stress generated by an external force applied to the substrate. In this case, the external force may be applied to a part away from the via chain or may be applied on the via chain. Moreover, it can also be set as the structure which provides a press pad in the part which adds external force.

また、本発明に係る応力測定方法は必要に応じて、前記応力の加わった状態での測定が、基板のデバイス実装状態における残留応力の測定であると共に、前記抵抗変化の割合が、基板のデバイス実装前に取得された抵抗変化の割合であるものである。   Further, in the stress measurement method according to the present invention, if necessary, the measurement in the state where the stress is applied is the measurement of the residual stress in the device mounting state of the substrate, and the ratio of the resistance change is the device of the substrate. This is the ratio of the resistance change obtained before mounting.

このように本発明においては、半導体デバイスの基板上に主電子回路とは別途にビアチェーンとこれに接続するパッドを設け、デバイス実装状態におけるパッド間の電気抵抗を測定することにより、デバイス実装状態で基板に応力が加わっている場合に、この応力の大きさに対応したビアチェーンの抵抗変化を外部から検知できることとなり、あらかじめ応力の変化とビアチェーンの抵抗変化との関係を把握しておくことでビアチェーンの抵抗値から応力の値を取得でき、同じ応力に対しピエゾ抵抗効果の場合に比べ大きく抵抗が変化する性質に基づいて、感度よく応力の測定が行え、デバイス実装状態で基板に加わっている応力の評価を正確に行える。   As described above, in the present invention, a via chain and a pad connected to the via chain are provided separately from the main electronic circuit on the substrate of the semiconductor device, and the electrical resistance between the pads in the device mounting state is measured. When stress is applied to the board, the via chain resistance change corresponding to the magnitude of this stress can be detected from the outside, and the relationship between the stress change and the via chain resistance change must be known in advance. The stress value can be obtained from the resistance value of the via chain, and based on the property that the resistance changes greatly compared to the case of the piezoresistive effect for the same stress, the stress can be measured with high sensitivity and added to the board in the device mounted state Stress can be accurately evaluated.

また、本発明に係る応力測定方法は必要に応じて、前記基板が、絶縁膜をlow−k絶縁膜とされると共に、前記複数層にわたり配設される配線を銅配線とされて用いられるものである。   In addition, the stress measuring method according to the present invention is used, if necessary, with the substrate being a low-k insulating film as the insulating film and a copper wiring being arranged over the plurality of layers. It is.

このように本発明においては、基板における層間の絶縁膜が低誘電率膜で、且つ配線が銅配線であり、著しく微細化される配線とビアからなるビアチェーンを基板のμmオーダーの極めて小さい領域に設けられ、このビアチェーンを設けた極小の領域を測定範囲として応力を求められることにより、外部に導通可能なパッドのスペースを確保すれば、応力測定対象に関わりなく適宜測定範囲を設定して応力を測定でき、微小レベルから一般的な歪みゲージのレベルまで適切に応力測定が行える。   As described above, in the present invention, the interlayer insulating film in the substrate is a low dielectric constant film and the wiring is a copper wiring, and a via chain consisting of wiring and vias to be remarkably miniaturized is an extremely small region on the order of μm of the substrate. If the space for the pad that can be connected to the outside is secured, the measurement range can be set appropriately regardless of the stress measurement target. Stress can be measured, and stress measurement can be appropriately performed from a minute level to a level of a general strain gauge.

また、本発明に係る応力測定方法は必要に応じて、前記基板が、前記配線を90nmノードの多層配線とされ、各ビア径を約0.13μm、各ビアのピッチを約0.33μmとされると共に、ビアチェーンにおけるビア数を2万ないし10万個とされて用いられるものである。   Further, in the stress measurement method according to the present invention, if necessary, the substrate is formed of a 90 nm node multilayer wiring, the via diameter is about 0.13 μm, and the pitch of each via is about 0.33 μm. In addition, the number of vias in the via chain is 20,000 to 100,000.

このように本発明においては、90mmノードの多層配線基板では、多数のビアが配線の大きさに対応した径及び間隔で配置されてビアチェーンをなす基板に対し、応力がビアチェーンに対する引張り方向や圧縮方向にそれぞれ加わると、応力が大きくなるのに合せてビアチェーンの抵抗が小さくなる性質を有することに基づいて、ビアチェーンの抵抗変化を測定し、応力の変化とビアチェーンの抵抗変化との関係を用いて応力を求められることにより、基板に加わる応力の増加、減少とは逆の変化傾向を示すビアチェーンの抵抗値から応力の値を適切に求められ、応力以外の外部からの影響を受けることなく応力の測定が行える。   As described above, in the present invention, in a multilayer wiring board of 90 mm node, stress is applied to the via chain in the tensile direction with respect to the via chain in which a large number of vias are arranged with diameters and intervals corresponding to the size of the wiring. The resistance change of the via chain is measured based on the fact that the resistance of the via chain decreases as the stress increases as the stress increases, and the change in stress and the resistance change of the via chain are measured. By obtaining the stress using the relationship, the stress value can be determined appropriately from the resistance value of the via chain that shows the opposite trend of the increase and decrease of the stress applied to the substrate, and the influence from the outside other than the stress can be obtained. The stress can be measured without receiving it.

また、本発明に係る応力測定方法は必要に応じて、前記基板が、前記配線を250nmノードの多層配線とされ、各ビア径を約0.25μm、各ビアのピッチを約1μmとされると共に、ビアチェーンにおけるビア数を2万ないし10万個とされて用いられるものである。   In addition, in the stress measurement method according to the present invention, if necessary, the substrate has a multi-layer wiring of 250 nm nodes, the diameter of each via is about 0.25 μm, and the pitch of each via is about 1 μm. The number of vias in the via chain is 20,000 to 100,000.

このように本発明においては、250mmノードの多層配線基板では、多数のビアが配線の大きさに対応した径及び間隔で配置されてビアチェーンをなす基板に対し、応力がビアチェーンに対する引張り方向や圧縮方向にそれぞれ加わると、応力の増大、減少に合せてビアチェーンの抵抗が大きな変化率で増大、減少する性質を有することに基づいて、ビアチェーンの抵抗変化を測定し、応力の変化とビアチェーンの抵抗変化との関係を用いて応力を求められることにより、基板に加わる応力の増加、減少と同じような変化傾向を示すビアチェーンの抵抗値から応力の値を適切に求められ、応力に対する感度を高くして応力の測定を効率よく行える。   As described above, in the present invention, in a multilayer wiring board having a 250 mm node, a number of vias are arranged at diameters and intervals corresponding to the size of the wiring to form a via chain. The resistance change of the via chain is measured based on the fact that the resistance of the via chain increases and decreases with a large change rate as the stress increases and decreases as the stress increases and decreases. By obtaining the stress using the relationship with the resistance change of the chain, the stress value can be appropriately obtained from the resistance value of the via chain that shows the same change tendency as the increase and decrease of the stress applied to the substrate, Stress can be measured efficiently with high sensitivity.

また、本発明に係る応力測定用センサは、基板上に絶縁膜を介して複数層にわたり配設される多数の配線を、ビアを介して各層間で接続して直列に連結してなるビアチェーンが、外層に配設されて外部配線に接続する一の接続パッドとチェーン一端部を接続されると共に、外層に配設されて外部配線に接続する他の接続パッドとチェーン他端部を接続されてなり、前記一の接続パッドと他の接続パッドとの間の抵抗を測定可能として測定対象物に固定されるものである。   In addition, the stress measurement sensor according to the present invention is a via chain formed by connecting a number of wirings arranged on a substrate over a plurality of layers via an insulating film between each layer via vias and connecting them in series. Is connected to one end of the chain and the other end of the chain connected to the external wiring and connected to the other end of the chain connected to the external wiring and connected to the external wiring. Thus, the resistance between the one connection pad and the other connection pad can be measured and fixed to the measurement object.

このように本発明においては、所定の基板上にビアチェーンとこれに接続するパッドを備えたものをセンサとして測定対象物に固定し、応力の大小に応じて変化するパッド間の電気抵抗の値を得ることにより、応力が測定対象物に加わると同時に基板にも加わる中で、この応力に対応したビアチェーンの抵抗変化を測定すれば、あらかじめ把握された応力の変化とビアチェーンの抵抗変化との関係を用いて、ビアチェーンの抵抗値から応力の値を容易に求められ、測定対象物に加わる応力の測定を効率よく行える。なお、こうした測定対象物に加わる応力を測定するセンサの他、前記基板で直接外力を受け得る場合には、基板を他の物体に固定する必要はなく、基板のみ配置して、外力によって基板に生じる応力の値や外力の値を求め得るセンサとすることができる。   As described above, in the present invention, a sensor having a via chain and a pad connected to the via chain on a predetermined substrate is fixed to a measurement object as a sensor, and the value of the electrical resistance between the pads changes according to the magnitude of the stress. By measuring the resistance change of the via chain corresponding to this stress while stress is applied to the object to be measured at the same time as the measurement object, By using this relationship, the stress value can be easily obtained from the resistance value of the via chain, and the stress applied to the measurement object can be measured efficiently. In addition to the sensor for measuring the stress applied to the object to be measured, when the external force can be directly received by the substrate, it is not necessary to fix the substrate to another object. It can be set as the sensor which can obtain | require the value of the produced stress, and the value of external force.

また、本発明に係る残留応力評価用デバイスは、基板上に絶縁膜を介して複数層にわたり配設される多数の配線を、ビアを介して各層間で接続して直列に連結してなるビアチェーンが、外層に配設されて外部配線に接続する一の接続パッドとチェーン一端部を接続されると共に、外層に配設されて外部配線に接続する他の接続パッドとチェーン他端部を接続されて、基板上の主電子回路部とは電気的に接続されない応力検出部とされてなり、前記一の接続パッドと他の接続パッドとの間の抵抗を外部から測定可能として実装状態とされるものである。   Further, the device for evaluating residual stress according to the present invention is a via formed by connecting a large number of wirings arranged on a substrate across a plurality of layers via an insulating film between each layer via vias and connecting them in series. The chain is connected to one end of the chain and the other end of the chain connected to the external wiring and connected to the other end of the chain connected to the external wiring and connected to the external wiring. Thus, the stress detection unit is not electrically connected to the main electronic circuit unit on the board, and the resistance between the one connection pad and the other connection pad can be measured from the outside, and is in a mounted state. Is.

このように本発明においては、半導体デバイスの基板上に主電子回路とは別途にビアチェーンとこれに接続するパッドを設け、パッド間の電気抵抗の値を取得することにより、デバイス実装状態で基板に応力が加わっている場合に、この応力に対応したビアチェーンの抵抗変化を外部から測定すれば、あらかじめ把握された応力の変化とビアチェーンの抵抗変化との関係を用いて、ビアチェーンの抵抗値から応力の値を容易に求められ、基板に加わる応力を適切に測定でき、同様の構造の半導体デバイスにおける残留応力の評価を正確に行える。   Thus, in the present invention, a via chain and a pad connected to the via chain are provided separately from the main electronic circuit on the substrate of the semiconductor device, and the value of the electrical resistance between the pads is obtained, so that the substrate is mounted in the device mounted state. If a change in the resistance of the via chain corresponding to this stress is measured from the outside when stress is applied to the via, the resistance of the via chain can be determined using the relationship between the change in stress and the resistance change of the via chain ascertained in advance. The stress value can be easily obtained from the value, the stress applied to the substrate can be appropriately measured, and the residual stress in the semiconductor device having the same structure can be accurately evaluated.

本発明の第1の実施形態に係る応力測定方法で用いるセンサの平面図である。It is a top view of the sensor used with the stress measuring method concerning a 1st embodiment of the present invention. 本発明の第1の実施形態に係る応力測定方法で用いるセンサの概略断面図である。It is a schematic sectional drawing of the sensor used with the stress measuring method which concerns on the 1st Embodiment of this invention. 本発明の第1の実施形態に係る応力測定方法で用いるセンサにおけるビアチェーン部分の概略平面図である。It is a schematic plan view of the via chain part in the sensor used with the stress measuring method which concerns on the 1st Embodiment of this invention. 本発明の第1の実施形態に係る応力測定方法で用いるセンサにおけるビアチェーン部分の模式断面図である。It is a schematic cross section of a via chain portion in the sensor used in the stress measurement method according to the first embodiment of the present invention. 本発明の第2の実施形態に係る応力測定方法で用いる評価用デバイスの一部切欠平面図である。It is a partial notch top view of the device for evaluation used with the stress measuring method concerning a 2nd embodiment of the present invention. 本発明の第2の実施形態に係る応力測定方法で用いる評価用デバイスの概略断面図である。It is a schematic sectional drawing of the device for evaluation used with the stress measuring method which concerns on the 2nd Embodiment of this invention. 本発明の他の実施形態に係る基板上のビアチェーンのメモリーデバイスとしての応用状態説明図である。It is application state explanatory drawing as a memory device of the via chain on the board | substrate which concerns on other embodiment of this invention. 本発明の実施例におけるビアチェーンに対し引張り方向となる応力の基板付加状態説明図である。It is a board | substrate addition state explanatory drawing of the stress used as the tension direction with respect to the via chain in the Example of this invention. 本発明の実施例におけるビアチェーンに対し圧縮方向となる応力の基板付加状態説明図である。It is a board | substrate addition state explanatory drawing of the stress which becomes a compression direction with respect to the via chain in the Example of this invention. 本発明の実施例における90nmノードの場合の応力と抵抗との関係を示すグラフである。It is a graph which shows the relationship between the stress in the case of a 90 nm node in the Example of this invention, and resistance. 本発明の実施例における250nmノードの場合の応力と抵抗との関係を示すグラフである。It is a graph which shows the relationship between the stress in the case of a 250 nm node in the Example of this invention, and resistance.

(本発明の第1の実施形態)
以下、本発明の第1の実施形態に係る応力測定方法を前記図1ないし図4に基づいて説明する。
前記各図において本実施形態に係る応力測定方法は、基板10上にビアチェーン15のあるセンサ1を用い、このセンサ1を応力の測定対象物50に固定してこの測定対象物50に加わる応力を測定するものである。
(First embodiment of the present invention)
Hereinafter, a stress measurement method according to a first embodiment of the present invention will be described with reference to FIGS.
In each of the drawings, the stress measuring method according to the present embodiment uses the sensor 1 having the via chain 15 on the substrate 10, and the sensor 1 is fixed to the stress measuring object 50 and applied to the measuring object 50. Is to measure.

前記センサ1は、基板10上に絶縁膜13を介して複数層にわたり配設される多数の配線11を、ビア12を介して各層間で接続して直列に連結してなるビアチェーン15と、外層に配設されてビアチェーン15一端部を接続される第一接続パッド17と、外層に配設されてビアチェーン15他端部を接続される第二接続パッド18と、これら各部を覆って保護する外装体16とを備える構成である。   The sensor 1 includes a via chain 15 formed by connecting a plurality of wirings 11 arranged on a substrate 10 across a plurality of layers via insulating films 13 between each layer via vias 12 and connecting them in series. A first connection pad 17 disposed on the outer layer and connected to one end of the via chain 15; a second connection pad 18 disposed on the outer layer and connected to the other end of the via chain 15; It is the structure provided with the exterior body 16 to protect.

このセンサ1は、第一接続パッド17と第二接続パッド18をそれぞれ外部配線17a、18aに接続して外装体16の表面の端子部17b、18bと導通させており、この端子部17b、18bにより外部の測定機器と接続して、第一接続パッド17と第二接続パッド18との間の抵抗を測定可能とされており、前記端子部17b、18bを外側に向けた状態で測定対象物50に固定される。   In the sensor 1, the first connection pad 17 and the second connection pad 18 are connected to the external wirings 17a and 18a, respectively, so as to be electrically connected to the terminal portions 17b and 18b on the surface of the exterior body 16, and the terminal portions 17b and 18b. By connecting to an external measuring device, the resistance between the first connection pad 17 and the second connection pad 18 can be measured, and the object to be measured with the terminal portions 17b and 18b facing outward 50.

センサ1における基板10、配線11、ビア12及び絶縁膜13は一般的な半導体デバイス同様の構成としてかまわないが、設計上の要求により配線が微細化される場合、配線を銅配線とし、合せて絶縁膜13として低誘電率膜(low−k膜)を採用するのが好ましい。また、このセンサ1は、一般的な半導体デバイス同様に、シリコン等の半導体基板10上に絶縁膜13を介した複数層の配線層を設けて形成されるものであるが、多層配線可能なものであれば、基板10はシリコンをはじめとする半導体に限られず、ポリイミドやガラス製基板としてもかまわない。   The substrate 10, the wiring 11, the via 12 and the insulating film 13 in the sensor 1 may be configured in the same manner as a general semiconductor device. However, when the wiring is miniaturized due to a design requirement, the wiring is a copper wiring. It is preferable to employ a low dielectric constant film (low-k film) as the insulating film 13. The sensor 1 is formed by providing a plurality of wiring layers on a semiconductor substrate 10 made of silicon or the like with an insulating film 13 interposed therebetween as in a general semiconductor device. If so, the substrate 10 is not limited to a semiconductor such as silicon, but may be a polyimide or glass substrate.

前記配線11は、90nmノードや250nmノードといった一般的に半導体デバイスで採用されている配線状態とされて用いられる。ビア12の大きさや配設間隔はこうした配線状態によって変化し、例えば、90nmノードの場合、各ビア径を約0.13μm、各ビアのピッチを約0.33μmとされ、また、250nmノードの場合、各ビア径を約0.25μm、各ビアのピッチを約1μmとされる。なお、ビア12の形成にあたっては、銅配線の場合、ビア部分の銅メッキが適切に行われ、また隣接する銅配線との密着性を確実としたり、low−k膜への銅の移行を抑えたりするために、公知のシード層やバリアメタルの技術を用いることもできる。   The wiring 11 is used in a wiring state generally adopted in a semiconductor device such as a 90 nm node and a 250 nm node. For example, in the case of a 90 nm node, each via diameter is about 0.13 μm, each via pitch is about 0.33 μm, and in the case of a 250 nm node. Each via diameter is about 0.25 μm, and the pitch of each via is about 1 μm. In the formation of the via 12, in the case of copper wiring, copper plating of the via portion is appropriately performed, adhesion with the adjacent copper wiring is ensured, and copper migration to the low-k film is suppressed. For this purpose, a known seed layer or barrier metal technique can be used.

前記ビアチェーン15は、基板10上に絶縁膜13を介して複数層にわたり配設される多数の配線11を、ビア12を介して各層間で接続して直列に連結してなる公知のものであり、本実施形態の場合、連結個数が非常に多いことから、つづら折り状パターンとして省スペース化して配置される。   The via chain 15 is a known one formed by connecting a large number of wirings 11 arranged on a substrate 10 across a plurality of layers via insulating films 13 between each layer via vias 12 and connecting them in series. In the case of this embodiment, since the number of connections is very large, it is arranged in a space-saving manner as a zigzag folded pattern.

ビアチェーン15におけるビア数は2万ないし10万個とされ、ビアチェーン15の抵抗(接続パッド間の抵抗)はビア数、すなわち配線の連結数が多くなるほど大きくなり、ビアチェーン15に対し応力の加わらない状態で200kΩないし1MΩとなる。なお、この応力が加わらない状態のビアチェーン15の抵抗値は、配線長や配線の連結数(ビア数)、ビア径等により測定状況に応じて適宜調整することができる。   The number of vias in the via chain 15 is 20,000 to 100,000, and the resistance of the via chain 15 (resistance between connection pads) increases as the number of vias, that is, the number of interconnected wirings increases. 200 kΩ to 1 MΩ when not applied. In addition, the resistance value of the via chain 15 in a state where the stress is not applied can be appropriately adjusted according to the measurement situation depending on the wiring length, the number of wirings connected (number of vias), the via diameter, and the like.

各接続パッド17、18は、それぞれ外層に配設される金属製の公知のパッドであり、内層側に形成されるビアチェーン15の両端部を接続され、また外部配線に接続されて、ビアチェーン15の抵抗を測定可能とするものである。   Each of the connection pads 17 and 18 is a known metal pad disposed on the outer layer, and is connected to both ends of the via chain 15 formed on the inner layer side and connected to the external wiring, and is connected to the via chain. 15 resistances can be measured.

一般的なビアチェーンは、配線が微細化、多層化した半導体デバイスの基板上における配線の電気的特性評価に用いられているが、こうしたビアチェーンについて、本発明者は、ビアチェーンのある基板に応力を加えると、ビアチェーンの抵抗値が、加えられる応力の大きさに対応して当初値から数十から数百%の変化率で大きく変化し、且つ応力の付加を解除すると当初の抵抗値に戻る現象を、後述する実験により見出した。   A general via chain is used for evaluating electrical characteristics of wiring on a substrate of a semiconductor device in which wiring is miniaturized and multilayered. For such via chain, the present inventor has attached to a substrate having a via chain. When stress is applied, the resistance value of the via chain changes greatly at a rate of change of several tens to several hundred percent from the initial value corresponding to the magnitude of the applied stress, and the initial resistance value when the stress is removed. The phenomenon of returning to (1) was found by an experiment described later.

この現象を利用して、測定対象物50に固定した基板10における第一接続パッド17と第二接続パッド18との間の抵抗を、測定対象物50に応力の加わった状態で測定すれば、あらかじめ取得された基板10における応力変化に対応する抵抗変化の割合に基づいて、測定対象物50に加わる応力の値を求められることとなる。   Using this phenomenon, if the resistance between the first connection pad 17 and the second connection pad 18 on the substrate 10 fixed to the measurement object 50 is measured in a state where stress is applied to the measurement object 50, Based on the ratio of the resistance change corresponding to the stress change in the substrate 10 acquired in advance, the value of the stress applied to the measurement object 50 is obtained.

なお、この基板10に加わる応力の向きが、ビアチェーン15に対する引張り方向の場合と圧縮方向の場合とで、それぞれ応力の変化とビアチェーン15の抵抗変化との関係が異なることも、後述する実験により見出されたが、こうした性質に対応して、測定対象物50への固定状態で基板10に加わる応力が、ビアチェーン15に対し引張り方向となる場合は、あらかじめ取得された基板10でのビアチェーン15に対し引張り方向となる応力変化に対応する抵抗変化の割合に基づいて応力値を求める。一方、測定対象物50への固定状態で基板10に加わる応力が、ビアチェーン15に対し圧縮方向となる場合は、あらかじめ取得された基板10でのビアチェーン15に対し圧縮方向となる応力変化に対応する抵抗変化の割合に基づいて応力値を求める。   It is noted that the relationship between the stress change and the resistance change of the via chain 15 is different depending on whether the direction of the stress applied to the substrate 10 is the tensile direction or the compression direction with respect to the via chain 15. However, when the stress applied to the substrate 10 in a state of being fixed to the measurement object 50 is in the pulling direction with respect to the via chain 15 in correspondence with such a property, The stress value is obtained based on the ratio of the resistance change corresponding to the stress change in the pulling direction with respect to the via chain 15. On the other hand, when the stress applied to the substrate 10 in the fixed state to the measurement object 50 is in the compression direction with respect to the via chain 15, the stress change in the compression direction with respect to the via chain 15 in the substrate 10 obtained in advance is changed. The stress value is determined based on the corresponding resistance change rate.

ただし、前記引張り方向の応力とは、所定の厚みを有する基板10に対し、例えばビアチェーン15のある基板表面側が山側、基板の反対面側が谷側となる向きに基板10を曲げようとする外力が加わる場合の、ビアチェーン15のある基板10表面でこの基板表面をビアチェーンと共に引き伸そうとする向きに生じる応力と同じものを指し、また、前記圧縮方向の応力とは、例えばビアチェーン15のある基板表面側が谷側、基板の反対面側が山側となる向きに基板10を曲げようとする外力が加わる場合の、ビアチェーン15のある基板10表面でこの基板表面をビアチェーンと共に押し縮めようとする向きに生じる応力と同じものを指している。   However, the stress in the pulling direction refers to an external force that bends the substrate 10 in such a direction that, for example, the substrate surface side with the via chain 15 is a peak side and the opposite surface side of the substrate is a valley side. Is applied to the surface of the substrate 10 with the via chain 15 in the direction in which the surface of the substrate 10 is stretched together with the via chain, and the stress in the compression direction is, for example, the via chain 15 When an external force is applied to bend the substrate 10 in such a direction that the substrate surface side with the valley is the trough side and the opposite surface side of the substrate is the crest side, the substrate surface with the via chain 15 will be compressed together with the via chain. It refers to the same stress that occurs in the direction.

次に、本実施形態に係る応力測定方法による測定の実施状態について説明する。あらかじめ、センサ1をなす基板10については、試験装置等でビアチェーン15に対する引張り方向と圧縮方向の各応力を変化させ、この変化に対応した抵抗変化状態を取得し、各方向の応力と抵抗との関係を把握しておく。   Next, the implementation state of the measurement by the stress measurement method according to the present embodiment will be described. For the substrate 10 forming the sensor 1, the stress in the pulling direction and the compressing direction with respect to the via chain 15 is changed with a test apparatus or the like in advance, and the resistance change state corresponding to this change is obtained. Keep track of the relationship.

そして、測定に先立ち、センサ1を測定対象物50の測定対象箇所に、この測定対象物50に応力が加わらない状態で、且つセンサ1自体にも応力が生じないようにしつつ、センサ1を固定する。センサ1の各接続パッド17、18には、このパッド間の抵抗を測定可能な機器が所定の外部配線を介して接続されている。   Prior to measurement, the sensor 1 is fixed to the measurement target portion of the measurement target 50 in a state where no stress is applied to the measurement target 50 and the sensor 1 itself is not stressed. To do. A device capable of measuring the resistance between the pads is connected to each connection pad 17, 18 of the sensor 1 via a predetermined external wiring.

測定対象物50が外力を受けて変形したり、測定対象物50自体が内部変化(発熱等)により変形して、応力が生じると、センサ1をなす基板10にも応力が加わることとなる。こうしてビアチェーン15のある基板10に応力が加わると、測定している接続パッド間の電気抵抗、すなわちビアチェーン15の抵抗値が、基板10に加わる応力の大きさに対応して大きく変化し、応力の加わらない状態と異なる値を示す。   When the measurement object 50 is deformed by receiving an external force, or the measurement object 50 itself is deformed by an internal change (such as heat generation) to generate stress, the stress is also applied to the substrate 10 forming the sensor 1. When stress is applied to the substrate 10 with the via chain 15 in this way, the electrical resistance between the connection pads being measured, that is, the resistance value of the via chain 15 is greatly changed in accordance with the magnitude of the stress applied to the substrate 10. The value is different from the state where no stress is applied.

測定対象物50の変形状態や、センサ1と測定対象物50との位置関係から、基板10に加わる応力が、ビアチェーン15に対し引張り方向となるか圧縮方向となるかは判断可能であるため、得られた抵抗値と、応力の方向に応じた応力と抵抗との既知の関係から、測定対象物50における応力を求めることができる。   Since it is possible to determine whether the stress applied to the substrate 10 is in the tension direction or the compression direction with respect to the via chain 15 from the deformation state of the measurement object 50 and the positional relationship between the sensor 1 and the measurement object 50. The stress in the measurement object 50 can be obtained from the obtained resistance value and the known relationship between the stress and the resistance according to the direction of the stress.

このように、本実施形態に係る応力測定方法においては、基板10上にビアチェーン15とこれに接続するパッド17、18を備えたセンサ1を測定対象物50に固定し、各パッド17、18間の電気抵抗、すなわちビアチェーン15の抵抗を測定することにより、測定対象物50に加わる応力が同時に基板10にも加わる中、この応力の大きさに対応したビアチェーン15の抵抗変化を外部から検知できることとなり、あらかじめ応力の変化とビアチェーン15の抵抗変化との関係を把握しておくことでビアチェーン15の抵抗値から応力の値を取得でき、同じ応力に対しピエゾ抵抗効果の場合に比べ大きく抵抗が変化する性質に基づいて、感度よく測定対象物50に加わる応力の測定が行える。   As described above, in the stress measurement method according to the present embodiment, the sensor 1 including the via chain 15 and the pads 17 and 18 connected to the via chain 15 on the substrate 10 is fixed to the measurement object 50, and the pads 17 and 18. By measuring the electrical resistance between them, that is, the resistance of the via chain 15, while the stress applied to the measurement object 50 is simultaneously applied to the substrate 10, the resistance change of the via chain 15 corresponding to the magnitude of this stress is externally applied. By knowing the relationship between the stress change and the resistance change of the via chain 15 in advance, the stress value can be obtained from the resistance value of the via chain 15 as compared with the case of the piezoresistive effect for the same stress. The stress applied to the measurement object 50 can be measured with high sensitivity based on the property that the resistance greatly changes.

また、応力の変化に伴う抵抗変化をビアチェーン15によるものとし、ピエゾ抵抗効果を利用しておらず、抵抗検出部分が半導体基板に拡散層を設ける構造でないため、デバイスの製造プロセスの制約を受けず、製造環境の自由度を高められることに加え、基板10は半導体である必要がなく、半導体以外の多層配線が可能な基板材料も使用でき、測定環境に対応した最適な材料を選択できる。   In addition, the resistance change due to the stress change is caused by the via chain 15, the piezoresistance effect is not used, and the resistance detection part is not provided with a diffusion layer on the semiconductor substrate. In addition to increasing the degree of freedom of the manufacturing environment, the substrate 10 does not need to be a semiconductor, and a substrate material capable of multilayer wiring other than the semiconductor can be used, and an optimum material corresponding to the measurement environment can be selected.

なお、前記実施形態に係る応力測定方法において、用いるセンサ1は基板10を外装体16で覆って保護する構成としているが、これに限らず、半導体製造プロセスの中で基板や配線を適切に保護可能な最外層の保護膜を設けることができれば、プラスチックやセラミック等の外装体16がない状態で用いるようにすることもできる。   In the stress measurement method according to the embodiment, the sensor 1 to be used is configured to protect the substrate 10 by covering the substrate 10 with the exterior body 16. However, the present invention is not limited thereto, and the substrate and wiring are appropriately protected in the semiconductor manufacturing process. If an outermost protective film can be provided, it can be used without the outer package 16 made of plastic or ceramic.

また、前記実施形態に係る応力測定方法において、センサ1は測定対象物50となる他の物体に固定されて、この測定対象物50に加わる応力を測定するものとしているが、この他、基板に直接外力が加えられる場合には、基板を測定対象物に固定する必要はないため、基板のみで、外力によって生ずる応力の値及び外力の値を求め得るセンサを構成することもできる。   In the stress measurement method according to the embodiment, the sensor 1 is fixed to another object to be the measurement object 50 and measures the stress applied to the measurement object 50. When an external force is directly applied, it is not necessary to fix the substrate to the measurement object, so that a sensor that can obtain the value of the stress generated by the external force and the value of the external force can be configured using only the substrate.

(本発明の第2の実施形態)
本発明の第2の実施形態を前記図5及び図6に基づいて説明する。
前記各図において本実施形態に係る応力測定方法は、半導体デバイス内部の基板20に、主電子回路24と別途にビアチェーン25が設けられて構成された評価用デバイス2を用い、この評価用デバイス2の基板20を測定対象物として、この基板20に加わる応力を測定するものである。
(Second embodiment of the present invention)
A second embodiment of the present invention will be described with reference to FIGS.
In each of the drawings, the stress measurement method according to the present embodiment uses the evaluation device 2 configured by providing the substrate 20 inside the semiconductor device with the main electronic circuit 24 and the via chain 25 separately, and this evaluation device. The stress applied to the substrate 20 is measured using the second substrate 20 as a measurement object.

本実施形態に係る応力測定方法では、前記第1の実施形態のように、基板上にビアチェーンを設けたセンサを所定の測定対象物に取付けて測定を行うのではなく、評価用デバイス2の基板20にビアチェーン25を設けて、その抵抗値から基板20に加わる応力を求めることで、外部からの測定が難しい実装後の基板20についての応力測定を可能とし、同様の構成を備える半導体デバイスについての、基板のデバイス実装状態における残留応力評価を適切に行えるようにするものである。   In the stress measurement method according to the present embodiment, the measurement of the evaluation device 2 is not performed by attaching a sensor having a via chain on a substrate to a predetermined measurement object as in the first embodiment. A semiconductor device having a similar configuration by providing a via chain 25 on the substrate 20 and obtaining stress applied to the substrate 20 from its resistance value, thereby enabling stress measurement on the mounted substrate 20 that is difficult to measure from the outside. Therefore, the residual stress in the device mounting state of the substrate can be appropriately evaluated.

前記評価用デバイス2は、半導体の基板20と、この基板20上に形成される主電子回路24と、基板20上に絶縁膜を介して複数層にわたり配設される多数の配線をビアで接続して直列に連結してなるビアチェーン25と、外層に配設されてビアチェーン25一端部を接続される第一接続パッド27と、外層に配設されてビアチェーン25他端部を接続される第二接続パッド28と、これら各部を覆って保護する外装体26と、主電子回路24や各接続パッド27、28を外部と導通可能とする端子部29とを備える構成である。   The evaluation device 2 includes a semiconductor substrate 20, a main electronic circuit 24 formed on the substrate 20, and a large number of wirings arranged on the substrate 20 through a plurality of layers via insulating films. The via chain 25 connected in series, the first connection pad 27 arranged on the outer layer and connected to one end of the via chain 25, and the other end of the via chain 25 arranged on the outer layer are connected. A second connection pad 28, an exterior body 26 that covers and protects these parts, and a terminal part 29 that allows the main electronic circuit 24 and each connection pad 27, 28 to be electrically connected to the outside.

この評価用デバイス2は、第一接続パッド27と第二接続パッド28をそれぞれ外部配線27a、28aに接続して端子部29と導通させており、この端子部29により外部の測定機器と接続して、第一接続パッド27と第二接続パッド28との間の抵抗を測定可能とされる。   In this evaluation device 2, the first connection pad 27 and the second connection pad 28 are connected to the external wirings 27 a and 28 a, respectively, and are electrically connected to the terminal part 29, and the terminal part 29 is connected to an external measuring device. Thus, the resistance between the first connection pad 27 and the second connection pad 28 can be measured.

評価用デバイス2は、ビアチェーン25を備える他は、一般的な半導体デバイス同様の構造としてかまわないが、設計上の要求により配線が微細化される場合、配線を銅配線とし、合せて絶縁膜として低誘電率膜(low−k膜)を採用するのが好ましい。なお、ビアの大きさや配設間隔については前記第1の実施形態の場合と同様である。   The evaluation device 2 may have a structure similar to that of a general semiconductor device except that it includes a via chain 25. However, when the wiring is miniaturized due to a design requirement, the wiring is a copper wiring and an insulating film is combined. It is preferable to employ a low dielectric constant film (low-k film). The via size and arrangement interval are the same as those in the first embodiment.

前記ビアチェーン25及び各接続パッド27、28の各構成や、第一接続パッド27と第二接続パッド28との間の抵抗、すなわちビアチェーン25の抵抗から応力を求める仕組みについては、前記第1の実施形態と同様であり、説明を省略する。   Regarding the structure of the via chain 25 and the connection pads 27 and 28 and the mechanism for obtaining the stress from the resistance between the first connection pad 27 and the second connection pad 28, that is, the resistance of the via chain 25, the first It is the same as that of the embodiment, and the description is omitted.

次に、本実施形態に係る応力測定方法による測定の実施状態について説明する。あらかじめ、デバイスとして実装される前の基板20について、前記第1の実施形態同様、試験装置等で基板20に加わる応力を変化させ、この変化に対応した抵抗変化状態を取得し、応力と抵抗との関係を把握しておく。   Next, the implementation state of the measurement by the stress measurement method according to the present embodiment will be described. For the substrate 20 before being mounted as a device, the stress applied to the substrate 20 is changed by a test apparatus or the like as in the first embodiment, and a resistance change state corresponding to this change is obtained. Keep track of the relationship.

そして、一般的な半導体デバイス同様に、基板20の主電子回路24や接続パッド27、28をそれぞれ端子部29と接続しつつ、樹脂やセラミック等の外装体26で基板20を覆い、評価用デバイス2としての完成状態とする。   Then, like the general semiconductor device, the main electronic circuit 24 and the connection pads 27 and 28 of the substrate 20 are connected to the terminal portions 29, respectively, and the substrate 20 is covered with an exterior body 26 such as a resin or ceramic, and the evaluation device Completed state as 2.

評価用デバイス2に対する測定は、評価用デバイス2を外力が加わらないように支持した状態で、各接続パッド27、28に導通する端子部29に測定用機器を接続して、パッド間の抵抗を測定する。   The measurement with respect to the evaluation device 2 is performed by connecting a measurement device to the terminal portion 29 that is electrically connected to the connection pads 27 and 28 in a state where the evaluation device 2 is supported so that no external force is applied. taking measurement.

基板20において、製造プロセスを経て何らかの応力が加わっていると、測定しているパッド間の電気抵抗、すなわち基板20上のビアチェーン25の抵抗値が、実装前の応力が加わらない状態から、基板20に加わっている応力の大きさに対応して大きく変化した値を示す。得られた抵抗値と、応力と抵抗との既知の関係から、基板20における応力を求めることができる。   If some stress is applied to the substrate 20 through the manufacturing process, the electrical resistance between the pads being measured, that is, the resistance value of the via chain 25 on the substrate 20 is not applied to the stress before mounting. 20 shows a value greatly changed corresponding to the magnitude of the stress applied to 20. The stress in the substrate 20 can be obtained from the obtained resistance value and the known relationship between the stress and the resistance.

この評価用デバイス2は、同じ主電子回路を有する製品タイプの半導体デバイスと同じ構造であり、同様の製造プロセスを経てデバイス実装状態とされていることから、評価用デバイス2で生じている応力はその半導体デバイスでも同様に生じると考えることができ、評価用デバイス2についての応力評価を適切に行えば、半導体デバイスについても同様に応力評価を行ったと見なせ、デバイス設計や製造プロセス等の改善に繋げられることとなる。   Since this evaluation device 2 has the same structure as a product type semiconductor device having the same main electronic circuit and is in a device mounting state through the same manufacturing process, the stress generated in the evaluation device 2 is It can be considered that the same occurs in the semiconductor device. If the stress evaluation for the evaluation device 2 is appropriately performed, it can be regarded that the stress evaluation is performed for the semiconductor device in the same manner, and the device design, the manufacturing process, etc. can be improved. It will be connected.

このように、本実施形態に係る応力測定方法においては、半導体の基板20上に主電子回路24とは別途にビアチェーン25とこれに接続するパッド27、28を設け、デバイス実装状態におけるパッド間の電気抵抗を測定することにより、デバイス実装状態で基板20に応力が加わっている場合に、この応力の大きさに対応したビアチェーン25の抵抗変化を外部から検知できることとなり、あらかじめ応力の変化とビアチェーン25の抵抗変化との関係を把握しておくことでビアチェーン25の抵抗値から応力の値を取得でき、同じ応力に対しピエゾ抵抗効果の場合に比べ大きく抵抗が変化する性質に基づいて、感度よく応力の測定が行え、デバイス実装状態で基板20に加わっている応力の評価を正確に行える。   As described above, in the stress measurement method according to the present embodiment, the via chain 25 and the pads 27 and 28 connected to the via chain 25 are provided on the semiconductor substrate 20 separately from the main electronic circuit 24, and the pads between the pads in the device mounting state are provided. By measuring the electrical resistance, it is possible to detect a change in resistance of the via chain 25 corresponding to the magnitude of the stress from the outside when stress is applied to the substrate 20 in the device mounting state. By grasping the relationship with the resistance change of the via chain 25, the stress value can be obtained from the resistance value of the via chain 25, and the resistance changes greatly compared to the case of the piezoresistance effect for the same stress. The stress can be measured with high sensitivity, and the stress applied to the substrate 20 in the device mounting state can be accurately evaluated.

なお、前記第1及び第2の各実施形態に係る応力測定方法において、基板10、20上にはビアチェーン15、25を一箇所設けて応力測定に用いる構成としているが、これに限らず、基板(チップ)の大きさに対して形成されるビアチェーンは著しく小さくなることから、基板上にビアチェーンと接続する接続パッドを配置できる範囲で、ビアチェーンを複数設けて、基板に加わる応力を複数点で測定できるようにすることもできる。   In the stress measurement method according to each of the first and second embodiments, the via chains 15 and 25 are provided on the substrates 10 and 20 to be used for the stress measurement. Since the via chain formed with respect to the size of the substrate (chip) is extremely small, multiple via chains are provided on the substrate in a range where the connection pads connecting to the via chain can be arranged, and the stress applied to the substrate is reduced. It is also possible to enable measurement at multiple points.

また、前記第1及び第2の各実施形態に係る応力測定方法において用いた、基板10、20上のビアチェーン15、25で応力変化に対応した抵抗変化を検出する仕組みについては、応力測定に用いる他、外力・気圧等を測定する圧力センサ、あるいは、基板に対する押圧等の操作入力に伴う応力変化に対応するビアチェーンの抵抗の所定の閾値を跨いだ変化を検出し、外部装置のON、OFFを制御するスイッチとして用いることもできる。さらに、図7に示すように、こうしたスイッチの役目を果すビアチェーン35を基板30上に線状あるいはマトリクス状に接続しつつ多数配置し、いずれのビアチェーンに応力による抵抗変化が生じているか判別できるようにすると共に、所定の入力情報に基づいて各ビアチェーンの箇所に応力を付加する機構を設ければ、入力情報に対応した一又は複数のビアチェーンが抵抗を変化させた状態を維持する、一種のメモリーデバイスとして利用することもできる。   The mechanism for detecting the resistance change corresponding to the stress change in the via chains 15 and 25 on the substrates 10 and 20 used in the stress measurement method according to each of the first and second embodiments is used for stress measurement. In addition to using it, a pressure sensor that measures external force / atmospheric pressure, etc., or a change across a predetermined threshold of resistance of a via chain corresponding to a stress change accompanying an operation input such as pressing against a substrate is detected to turn on an external device, It can also be used as a switch for controlling OFF. Further, as shown in FIG. 7, a large number of via chains 35 serving as such switches are arranged on the substrate 30 while being connected in a linear or matrix form, and it is determined which of the via chains has undergone a resistance change due to stress. In addition, if a mechanism for applying stress to each via chain location based on predetermined input information is provided, one or more via chains corresponding to the input information maintain the state in which the resistance is changed. It can also be used as a kind of memory device.

本発明の応力測定方法において、応力変化に対応する抵抗変化の検出部分として用いる、ビアチェーンを設けた基板が、加えられた応力によりビアチェーンの抵抗を変化させる性質について、これを実際に確認した実験について説明する。   In the stress measurement method of the present invention, the fact that the substrate provided with the via chain used as a resistance change detection portion corresponding to the stress change changes the resistance of the via chain by the applied stress was actually confirmed. The experiment will be described.

本発明でセンサとして、又は半導体デバイス内で用いられることとなる基板の実施例としては、一般的な半導体デバイス同様の構造として、半導体と同じ製造プロセスで製造したものを用いた。この実施例の基板は、シリコン基板とされ、配線を銅配線とし、合せて絶縁膜を低誘電率膜(low−k膜)として、90nmノードのもの(第1実施例)と、250nmノードのもの(第2実施例)をそれぞれ製造して実験に供した。   As an example of a substrate to be used as a sensor or a semiconductor device in the present invention, a substrate manufactured by the same manufacturing process as that of a semiconductor was used as a structure similar to a general semiconductor device. The substrate of this embodiment is a silicon substrate, the wiring is copper wiring, and the insulating film is a low dielectric constant film (low-k film), which has a 90 nm node (first embodiment) and a 250 nm node. Each (second example) was manufactured and subjected to experiments.

90nmノードとした第1実施例の場合、基板上のビアチェーンにおけるビア数が10万個となるよう配線を連結すると共に、各ビア径を約0.13μm、各ビアのピッチを約0.33μmとしている。この場合ビアチェーンの抵抗(接続パッド間の抵抗)は応力の加わらない状態で1MΩとなる。   In the case of the first embodiment having a 90 nm node, the wiring is connected so that the number of vias in the via chain on the substrate is 100,000, each via diameter is about 0.13 μm, and the pitch of each via is about 0.33 μm. It is said. In this case, the resistance of the via chain (resistance between the connection pads) is 1 MΩ in a state where no stress is applied.

一方、250nmノードとした第2実施例の場合、基板上のビアチェーンにおけるビア数が10万個となるよう配線を連結すると共に、各ビア径を約0.25μm、各ビアのピッチを約1μmとしている。この場合もビアチェーンの抵抗(接続パッド間の抵抗)は応力の加わらない状態で1MΩとなる。   On the other hand, in the case of the second embodiment in which the node is 250 nm, the wiring is connected so that the number of vias in the via chain on the substrate is 100,000, each via diameter is about 0.25 μm, and the pitch of each via is about 1 μm. It is said. Also in this case, the resistance of the via chain (resistance between the connection pads) becomes 1 MΩ in a state where no stress is applied.

いずれの実施例の場合もLow−K膜部分の厚さは0.5ないし0.8μmとなっており、ビアチェーンは、つづら折り状パターンとして複数をそれぞれ独立させた状態で配置されている。   In any of the embodiments, the thickness of the Low-K film portion is 0.5 to 0.8 μm, and a plurality of via chains are arranged in an independent manner as a zigzag pattern.

基板への応力付加には、試料に対し、並んだ四つの支点のうち、装置のロードセルに連結する中間の二つの支点を当接させる面と、その反対側となる両端の支点を当接させる面をそれぞれ入替えることで、基板へビアチェーンに対する引張り方向と圧縮方向の応力を切替えて加えられる四点曲げ装置を用いた。四点曲げ装置における基板を支持する支点位置は、両端の支点間距離が24mm、各支点間の距離がいずれも8mmとなっている。   For applying stress to the substrate, out of the four fulcrums arranged side by side, the middle fulcrum connected to the load cell of the apparatus is brought into contact with the fulcrum at both ends on the opposite side. A four-point bending apparatus was used in which the stresses in the pulling direction and the compressing direction with respect to the via chain were switched and applied to the substrate by switching the surfaces. As for the fulcrum positions for supporting the substrate in the four-point bending apparatus, the distance between the fulcrums at both ends is 24 mm, and the distance between each fulcrum is 8 mm.

実験では、四点曲げ装置で基板の四箇所に支点を当接させ、基板に対し、ビアチェーンのある基板表面側が山側、基板の反対面側が谷側となる向きに基板を曲げようとする荷重を加えて、中間の二つの支点に挟まれた基板表面の中間部分に、この基板表面をビアチェーンと共に伸そうとする向き、すなわちビアチェーンに対する引張り方向への応力を加える操作(図8参照)と、逆に、基板に対し、ビアチェーンのある基板表面側が谷側、基板の反対面側が山側となる向きに基板を曲げようとする荷重を加えて、前記中間部分に、基板表面をビアチェーンと共に押し縮めようとする向き、すなわちビアチェーンに対する圧縮方向への応力を加える操作(図9参照)をそれぞれ実行した。これら引張り方向と圧縮方向に既知の応力をそれぞれ加えた各場合で応力変化に伴うパッド間の抵抗変化を測定した。   In the experiment, a fulcrum is brought into contact with four locations of the substrate with a four-point bending device, and the load is intended to bend the substrate so that the substrate surface side with the via chain is a peak side and the opposite surface side of the substrate is a valley side. And applying stress to the intermediate portion of the substrate surface sandwiched between the two intermediate fulcrums in the direction of extending the substrate surface together with the via chain, that is, in the tensile direction with respect to the via chain (see FIG. 8). On the contrary, a load is applied to the substrate so that the substrate surface side with the via chain is a trough side and the opposite surface side of the substrate is a crest side. In addition, an operation (see FIG. 9) for applying a stress in the compressing direction with respect to the via chain, that is, the direction of pressing and shrinking was performed. In each case where a known stress was applied to each of the tension direction and the compression direction, the resistance change between the pads accompanying the stress change was measured.

測定は各実施例の場合ごとに引張り方向と圧縮方向の応力についてそれぞれ行い、荷重を調整して各応力を変化させながら、四点曲げ装置における中間の二つの支点に挟まれた基板上の領域に配設されたビアチェーンについて、その両端と接続したパッドに測定装置の電極を当てて抵抗を計測した。なお、基板上でのビアチェーンの位置の違いによる影響を避けるため、基板上で少し離れた位置にある二つのビアチェーンについて同時に抵抗を計測して、その合計値を測定結果として採用する。そして、ビアチェーンを二つとも変えて同様の測定を三回行う。ただし、90nmノードの基板と250nmノードの基板とで、測定対象となるビアチェーンの位置と組合わせは同じにしている。   The measurement is performed for each of the stresses in the tensile direction and the compression direction for each example, and the area on the substrate sandwiched between two intermediate fulcrums in the four-point bending apparatus while changing the stress by adjusting the load. With respect to the via chain disposed in the electrode, the resistance of the via chain was measured by applying the electrode of the measuring device to pads connected to both ends of the via chain. In order to avoid the influence due to the difference in the position of the via chain on the substrate, the resistance is measured simultaneously for two via chains located slightly apart on the substrate, and the total value is adopted as the measurement result. Then, the same measurement is performed three times by changing both via chains. However, the positions and combinations of via chains to be measured are the same for the 90 nm node substrate and the 250 nm node substrate.

90nmノードの基板の場合と、250nmノードの基板の場合のそれぞれについて引張り方向と圧縮方向の各応力に対する抵抗の変化をビアチェーンの組を変えて三回測定した各結果(A、B、C)、並びに抵抗の測定結果三回分の平均値の応力に対する変化を、横軸を応力、縦軸を抵抗の変化率としてそれぞれ記した各グラフを、図10、11に示す。なお、応力は正の値が引張り方向、負の値が圧縮方向をそれぞれ示している。   Results of measuring the resistance change for each stress in the tensile direction and the compressive direction three times for each of the 90 nm node substrate and the 250 nm node substrate by changing the set of via chains (A, B, C) In addition, FIGS. 10 and 11 show graphs in which the change in the average value of the resistance measurement results for three times with respect to the stress is shown with the horizontal axis as the stress and the vertical axis as the rate of change in resistance. For the stress, a positive value indicates the tensile direction and a negative value indicates the compression direction.

図10から、90nmノードの配線の場合、応力の向きが引張り方向、圧縮方向のいずれも、応力が増大するほど抵抗値が減少しており、その減少の度合は、応力が引張り方向に加わる場合の方が、圧縮方向の場合より大きい結果となっている。そして、応力が加わらない状態からの抵抗変化割合は、数十%に達している。   From FIG. 10, in the case of 90 nm node wiring, the resistance value decreases as the stress increases in both the tensile direction and the compressive direction, and the degree of the decrease is when the stress is applied in the tensile direction. The result is larger than that in the compression direction. And the resistance change rate from the state where stress is not applied has reached several tens of percent.

また、図11から、250nmノードの配線の場合、90nmノードの配線の場合とは逆に、応力の向きが引張り方向、圧縮方向のいずれも、応力が増大するほど抵抗値が増加しており、その増加の度合は、応力が引張り方向に加わる場合の方が、圧縮方向の場合より大きい結果となっている。いずれの方向についても、90nmノードの配線の場合に比べて応力変化に対する抵抗変化の割合が大きくなっており、応力が加わらない状態からの抵抗変化割合は、数百%に達している。   Further, from FIG. 11, in the case of the wiring of the 250 nm node, contrary to the case of the wiring of the 90 nm node, the resistance value increases as the stress increases in both the tensile direction and the compression direction. The degree of increase is greater when the stress is applied in the tension direction than in the compression direction. In any direction, the rate of resistance change with respect to the stress change is larger than in the case of the 90 nm node wiring, and the rate of resistance change from the state where no stress is applied reaches several hundred percent.

このように、ビアチェーンを設けた基板に応力を加えた場合の、ビアチェーンの抵抗値の変化の態様は基板の設計によりさまざまであるが、いずれの場合も、加えられる応力の大きさに対応して抵抗値が大きく変化し、且つ応力の付加を解除すると当初の抵抗値に戻る現象が確認されると共に、同一の設計で製造した基板については、応力に対応した抵抗変化に再現性があることも確認されたことから、これを応力測定に利用できることは明らかである。   In this way, when the stress is applied to the board with the via chain, the change in the resistance value of the via chain varies depending on the board design, but in either case, it corresponds to the magnitude of the applied stress. As a result, the resistance value changes greatly, and when the stress is released, the phenomenon of returning to the original resistance value is confirmed, and the resistance change corresponding to the stress is reproducible for the board manufactured with the same design. It is clear that this can be used for stress measurement.

1 センサ
10、20、30 基板
11、21 配線
12、22 ビア
13、23 絶縁膜
15、25、35 ビアチェーン
16、26 外装体
17、27 第一接続パッド
18、28 第二接続パッド
2 評価用デバイス
24 主電子回路
29 端子部
50 測定対象物
1 Sensor 10, 20, 30 Substrate 11, 21 Wiring 12, 22 Via 13, 23 Insulating film 15, 25, 35 Via chain 16, 26 Exterior body 17, 27 First connection pad 18, 28 Second connection pad 2 For evaluation Device 24 Main electronic circuit 29 Terminal section 50 Measurement object

Claims (9)

基板上に絶縁膜を介して複数層にわたり配設される多数の配線を、ビアを介して各層間で接続して直列に連結してなるビアチェーンが、外層に配設されて外部配線に接続する一の接続パッドとチェーン一端部を接続されると共に、外層に配設されて外部配線に接続する他の接続パッドとチェーン他端部を接続された状態で、前記基板を測定対象物に固定し、
前記一の接続パッドと他の接続パッドとの間の抵抗を、前記測定対象物に応力の加わった状態で測定し、あらかじめ取得された前記基板における応力変化に対応する抵抗変化の割合に基づいて、測定対象物に加わる応力の値を求めることを
特徴とする応力測定方法。
A via chain formed by connecting a large number of wirings arranged on multiple layers across the substrate via an insulating film between each layer via vias and connecting them in series is arranged on the outer layer and connected to the external wiring The board is fixed to the measurement object with one connection pad connected to one end of the chain and the other connection pad disposed on the outer layer and connected to the external wiring connected to the other end of the chain. And
The resistance between the one connection pad and the other connection pad is measured in a state where stress is applied to the measurement object, and based on the resistance change ratio corresponding to the stress change in the substrate obtained in advance. A stress measuring method characterized by obtaining a value of stress applied to an object to be measured.
前記請求項1に記載の応力測定方法において、
前記測定対象物への固定状態で前記基板に加わる応力が、ビアチェーンに対し引張り方向となる場合は、あらかじめ取得された前記基板でのビアチェーンに対し引張り方向となる応力変化に対応する抵抗変化の割合に基づいて応力値を求め、
前記測定対象物への固定状態で前記基板に加わる応力が、ビアチェーンに対し圧縮方向となる場合は、あらかじめ取得された前記基板でのビアチェーンに対し圧縮方向となる応力変化に対応する抵抗変化の割合に基づいて応力値を求めることを
特徴とする応力測定方法。
In the stress measuring method according to claim 1,
When the stress applied to the substrate in a fixed state to the object to be measured is in the tensile direction with respect to the via chain, the resistance change corresponding to the stress change in the tensile direction with respect to the via chain in the substrate acquired in advance. Obtain the stress value based on the ratio of
When the stress applied to the substrate in a fixed state to the measurement object is in the compression direction with respect to the via chain, the resistance change corresponding to the stress change in the compression direction with respect to the via chain in the substrate acquired in advance. A stress measurement method characterized in that a stress value is obtained based on the ratio.
基板上に絶縁膜を介して複数層にわたり配設される多数の配線を、ビアを介して各層間で接続して直列に連結してなるビアチェーンが、外層に配設されて外部配線に接続する一の接続パッドとチェーン一端部を接続されると共に、外層に配設されて外部配線に接続する他の接続パッドとチェーン他端部を接続され、
前記一の接続パッドと他の接続パッドとの間の抵抗を、前記基板に応力の加わった状態で測定し、あらかじめ取得された前記基板における応力変化に対応する抵抗変化の割合に基づいて、基板に加わる応力の値を求めることを
特徴とする応力測定方法。
A via chain formed by connecting a large number of wirings arranged on multiple layers across the substrate via an insulating film between each layer via vias and connecting them in series is arranged on the outer layer and connected to the external wiring One connection pad and one end of the chain are connected, and another connection pad disposed on the outer layer and connected to the external wiring is connected to the other end of the chain,
The resistance between the one connection pad and the other connection pad is measured in a state where stress is applied to the substrate, and based on the ratio of the resistance change corresponding to the stress change in the substrate obtained in advance. A stress measurement method characterized by obtaining a value of stress applied to the substrate.
前記請求項3に記載の応力測定方法において、
前記応力の加わった状態での測定が、基板のデバイス実装状態における残留応力の測定であると共に、前記抵抗変化の割合が、基板のデバイス実装前に取得された抵抗変化の割合であることを
特徴とする応力測定方法。
In the stress measurement method according to claim 3,
The measurement in the state where the stress is applied is measurement of residual stress in the device mounting state of the substrate, and the ratio of the resistance change is a ratio of the resistance change acquired before mounting the device on the substrate. And stress measurement method.
前記請求項1ないし4のいずれかに記載の応力測定方法において、
前記基板が、絶縁膜をlow−k絶縁膜とされると共に、前記複数層にわたり配設される配線を銅配線とされて用いられることを
特徴とする応力測定方法。
In the stress measuring method according to any one of claims 1 to 4,
The stress measurement method characterized in that the substrate is used with a low-k insulating film as an insulating film and a copper wiring as a wiring arranged over the plurality of layers.
前記請求項5に記載の応力測定方法において、
前記基板が、前記配線を90nmノードの多層配線とされ、各ビア径を約0.13μm、各ビアのピッチを約0.33μmとされると共に、ビアチェーンにおけるビア数を2万ないし10万個とされて用いられることを
特徴とする応力測定方法。
In the stress measurement method according to claim 5,
In the substrate, the wiring is a multi-layer wiring of 90 nm nodes, each via diameter is about 0.13 μm, each via pitch is about 0.33 μm, and the number of vias in the via chain is 20,000 to 100,000 A stress measurement method characterized by being used.
前記請求項5に記載の応力測定方法において、
前記基板が、前記配線を250nmノードの多層配線とされ、各ビア径を約0.25μm、各ビアのピッチを約1μmとされると共に、ビアチェーンにおけるビア数を2万ないし10万個とされて用いられることを
特徴とする応力測定方法。
In the stress measurement method according to claim 5,
In the substrate, the wiring is a multi-layer wiring of 250 nm node, each via diameter is about 0.25 μm, each via pitch is about 1 μm, and the number of vias in the via chain is 20,000 to 100,000. A stress measurement method characterized by being used.
基板上に絶縁膜を介して複数層にわたり配設される多数の配線を、ビアを介して各層間で接続して直列に連結してなるビアチェーンが、外層に配設されて外部配線に接続する一の接続パッドとチェーン一端部を接続されると共に、外層に配設されて外部配線に接続する他の接続パッドとチェーン他端部を接続されてなり、
前記一の接続パッドと他の接続パッドとの間の抵抗を測定可能として測定対象物に固定されることを
特徴とする応力測定用センサ。
A via chain formed by connecting a large number of wirings arranged on multiple layers across the substrate via an insulating film between each layer via vias and connecting them in series is arranged on the outer layer and connected to the external wiring And one end of the chain is connected to one end of the chain, and the other end of the chain connected to the external wiring disposed on the outer layer is connected to the other end of the chain.
A stress measuring sensor, wherein a resistance between the one connection pad and another connection pad is measurable and fixed to a measurement object.
基板上に絶縁膜を介して複数層にわたり配設される多数の配線を、ビアを介して各層間で接続して直列に連結してなるビアチェーンが、外層に配設されて外部配線に接続する一の接続パッドとチェーン一端部を接続されると共に、外層に配設されて外部配線に接続する他の接続パッドとチェーン他端部を接続されて、基板上の主電子回路部とは電気的に接続されない応力検出部とされてなり、
前記一の接続パッドと他の接続パッドとの間の抵抗を外部から測定可能として実装状態とされることを
特徴とする残留応力評価用デバイス。
A via chain formed by connecting a large number of wirings arranged on multiple layers across the substrate via an insulating film between each layer via vias and connecting them in series is arranged on the outer layer and connected to the external wiring One connection pad is connected to one end of the chain, and another connection pad disposed on the outer layer and connected to the external wiring is connected to the other end of the chain. The stress detection unit is not connected
A residual stress evaluation device characterized in that a resistance between the one connection pad and another connection pad can be measured from the outside to be mounted.
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