JP2010518470A - 命令実行を容易にするためのバッファの使用 - Google Patents
命令実行を容易にするためのバッファの使用 Download PDFInfo
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- JP2010518470A JP2010518470A JP2009547636A JP2009547636A JP2010518470A JP 2010518470 A JP2010518470 A JP 2010518470A JP 2009547636 A JP2009547636 A JP 2009547636A JP 2009547636 A JP2009547636 A JP 2009547636A JP 2010518470 A JP2010518470 A JP 2010518470A
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- 238000012545 processing Methods 0.000 claims abstract description 88
- 238000000034 method Methods 0.000 claims abstract description 45
- 238000004590 computer program Methods 0.000 claims description 6
- 230000004044 response Effects 0.000 claims description 3
- 230000008569 process Effects 0.000 abstract description 37
- 238000012360 testing method Methods 0.000 description 109
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- 238000011084 recovery Methods 0.000 description 8
- 230000006870 function Effects 0.000 description 5
- 238000013519 translation Methods 0.000 description 5
- 230000008901 benefit Effects 0.000 description 4
- 238000011156 evaluation Methods 0.000 description 4
- 230000008859 change Effects 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 230000003287 optical effect Effects 0.000 description 3
- 230000001360 synchronised effect Effects 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 2
- 238000007792 addition Methods 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 230000000977 initiatory effect Effects 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 230000009191 jumping Effects 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 238000012544 monitoring process Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 210000003813 thumb Anatomy 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/40—Transformation of program code
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/3005—Arrangements for executing specific machine instructions to perform operations for flow control
- G06F9/30054—Unconditional branch instructions
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30181—Instruction operation extension or modification
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
- G06F9/322—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address
- G06F9/323—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address for indirect branch instructions
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3802—Instruction prefetching
- G06F9/3814—Implementation provisions of instruction buffers, e.g. prefetch buffer; banks
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3802—Instruction prefetching
- G06F9/3816—Instruction alignment, e.g. cache line crossing
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
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- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
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- General Physics & Mathematics (AREA)
- Executing Machine-Instructions (AREA)
- Debugging And Monitoring (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
Abstract
【解決手段】命令実行は、特殊な状況を有する命令を処理するのにバッファを使用することによって容易にされる。そのような命令を実行する時に、命令のポインタが、バッファに向けられる。命令は、バッファから実行され、その後、ポインタが、バッファ以外の位置をポイントするように回復される。
【選択図】図5
Description
Claims (7)
- バッファに命令を提供することと、
前記バッファ内の前記命令の態様を変更しなければならないかどうかを判定することと、
前記判定ステップに応答して前記態様を変更することと、
メモリ内の前記命令の実行ではなく、前記バッファからの前記命令の実行を可能にするために、命令ポインタを前記バッファにリダイレクトすることと
を含む、処理環境内で命令実行を容易にする方法。 - 前記提供することが、メモリ内の論理的に連続するが物理的に不連続な位置から前記バッファ内の物理的に連続する位置へ前記命令をコピーすることを含む、請求項1に記載の方法。
- 前記命令が、ページ境界をまたぐ命令を含み、前記提供することが、前記命令の第1部分をメモリのあるページから前記バッファにコピーし、前記命令の第2部分をメモリの別のページから前記バッファにコピーすることを含む、請求項1に記載の方法。
- 前記命令が、execute命令のターゲット命令を含み、前記変更することが、前記ターゲット命令のレジスタを変更することを含む、請求項1に記載の方法。
- 前記処理環境が、エミュレータを含む、請求項1に記載の方法。
- 請求項1ないし5のいずれかに記載の方法の全ステップを実行するように適合された手段を含むシステム。
- コンピュータ・システム上で実行される時に請求項1ないし5のいずれかに記載の方法の全ステップを実行する命令を含むコンピュータ・プログラム。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/670,187 | 2007-02-01 | ||
US11/670,187 US7882336B2 (en) | 2007-02-01 | 2007-02-01 | Employing a buffer to facilitate instruction execution |
PCT/EP2008/050652 WO2008092769A1 (en) | 2007-02-01 | 2008-01-21 | Employing a buffer to facilitate instruction execution |
Publications (2)
Publication Number | Publication Date |
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JP2010518470A true JP2010518470A (ja) | 2010-05-27 |
JP5235900B2 JP5235900B2 (ja) | 2013-07-10 |
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Application Number | Title | Priority Date | Filing Date |
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JP2009547636A Active JP5235900B2 (ja) | 2007-02-01 | 2008-01-21 | 命令実行を容易にするためのバッファの使用 |
Country Status (7)
Country | Link |
---|---|
US (1) | US7882336B2 (ja) |
EP (1) | EP2115574B1 (ja) |
JP (1) | JP5235900B2 (ja) |
KR (1) | KR101109984B1 (ja) |
CN (1) | CN101583926B (ja) |
TW (1) | TWI417786B (ja) |
WO (1) | WO2008092769A1 (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2013008351A (ja) * | 2011-05-20 | 2013-01-10 | Semiconductor Energy Lab Co Ltd | 半導体装置及びその駆動方法 |
JP2013527534A (ja) * | 2010-05-24 | 2013-06-27 | クアルコム,インコーポレイテッド | 命令としてデータ値を評価するシステムおよび方法 |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP2881858B1 (de) * | 2013-12-09 | 2016-04-06 | dSPACE digital signal processing and control engineering GmbH | Verfahren zur Änderung der Software im Speicher eines elektronischen Steuergerätes |
Citations (6)
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JPS57189252A (en) * | 1981-05-18 | 1982-11-20 | Mitsubishi Electric Corp | Program controlling method |
JPS6055467A (ja) * | 1983-08-29 | 1985-03-30 | インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション | マルチ・マイクロプロセツサによつて実現されたメインフレ−ム・エミユレ−シヨン用デ−タ処理システム |
JP2001306334A (ja) * | 2000-04-25 | 2001-11-02 | Nec Software Hokuriku Ltd | エミュレーション装置 |
JP2004110827A (ja) * | 2002-09-19 | 2004-04-08 | Arm Ltd | 複数の個別記憶アドレス領域内に記憶された可変長命令の実行 |
JP2004252525A (ja) * | 2003-02-18 | 2004-09-09 | Nec Corp | エミュレータおよびプログラム |
JP2010518471A (ja) * | 2007-02-01 | 2010-05-27 | インターナショナル・ビジネス・マシーンズ・コーポレーション | 処理環境での命令実行の制御 |
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2007
- 2007-02-01 US US11/670,187 patent/US7882336B2/en active Active
-
2008
- 2008-01-21 JP JP2009547636A patent/JP5235900B2/ja active Active
- 2008-01-21 WO PCT/EP2008/050652 patent/WO2008092769A1/en active Application Filing
- 2008-01-21 KR KR1020097010895A patent/KR101109984B1/ko active IP Right Grant
- 2008-01-21 CN CN200880002611.2A patent/CN101583926B/zh active Active
- 2008-01-21 EP EP08701609.3A patent/EP2115574B1/en active Active
- 2008-01-31 TW TW097103822A patent/TWI417786B/zh active
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JPS57189252A (en) * | 1981-05-18 | 1982-11-20 | Mitsubishi Electric Corp | Program controlling method |
JPS6055467A (ja) * | 1983-08-29 | 1985-03-30 | インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション | マルチ・マイクロプロセツサによつて実現されたメインフレ−ム・エミユレ−シヨン用デ−タ処理システム |
JP2001306334A (ja) * | 2000-04-25 | 2001-11-02 | Nec Software Hokuriku Ltd | エミュレーション装置 |
JP2004110827A (ja) * | 2002-09-19 | 2004-04-08 | Arm Ltd | 複数の個別記憶アドレス領域内に記憶された可変長命令の実行 |
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Cited By (4)
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JP2013527534A (ja) * | 2010-05-24 | 2013-06-27 | クアルコム,インコーポレイテッド | 命令としてデータ値を評価するシステムおよび方法 |
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Also Published As
Publication number | Publication date |
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JP5235900B2 (ja) | 2013-07-10 |
US7882336B2 (en) | 2011-02-01 |
KR20090095573A (ko) | 2009-09-09 |
CN101583926B (zh) | 2012-08-22 |
US20080189527A1 (en) | 2008-08-07 |
TW200847013A (en) | 2008-12-01 |
TWI417786B (zh) | 2013-12-01 |
KR101109984B1 (ko) | 2012-02-16 |
WO2008092769A1 (en) | 2008-08-07 |
EP2115574B1 (en) | 2016-09-28 |
EP2115574A1 (en) | 2009-11-11 |
CN101583926A (zh) | 2009-11-18 |
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