JP2010285325A - Method for producing nitride semiconductor substrate - Google Patents

Method for producing nitride semiconductor substrate Download PDF

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JP2010285325A
JP2010285325A JP2009142012A JP2009142012A JP2010285325A JP 2010285325 A JP2010285325 A JP 2010285325A JP 2009142012 A JP2009142012 A JP 2009142012A JP 2009142012 A JP2009142012 A JP 2009142012A JP 2010285325 A JP2010285325 A JP 2010285325A
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nitride semiconductor
semiconductor substrate
film
substrate
processing
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Satoshi Nakayama
智 中山
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Hitachi Cable Ltd
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<P>PROBLEM TO BE SOLVED: To provide a method for producing a nitride semiconductor substrate, by which contour processing (particularly, orientation-flat processing and index-flat processing) on a nitride semiconductor substrate can be easily carried out with high accuracy. <P>SOLUTION: The method for producing a nitride semiconductor substrate includes steps of: forming a protective film having a bored portion in a desired shape on a base substrate; growing a nitride semiconductor layer in the bored portion; and peeling the nitride semiconductor layer. The desired shape includes an orientation-flat portion and/or an index-flat portion in the nitride semiconductor substrate. The protective film includes an oxide film, a metal film or a nitride film. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

本発明は、窒化物半導体基板の製造方法に関し、特に基板のオリエンテーションフラットやインデックスフラットを容易に形成できる窒化物半導体基板の製造方法に関する。   The present invention relates to a method for manufacturing a nitride semiconductor substrate, and more particularly to a method for manufacturing a nitride semiconductor substrate capable of easily forming an orientation flat or an index flat of the substrate.

長寿命青色レーザーや高輝度青色LED(Light Emitting Diode)、高特性電子デバイス等を製造するために良質な窒化物半導体基板が求められている。近年、それらデバイスのエピタキシャルウェハ用基板として、HVPE法(Hydride Vapor Phase Epitaxy)等により製造された自立型GaN基板が利用されている。   A high-quality nitride semiconductor substrate is required to produce a long-life blue laser, a high-intensity blue LED (Light Emitting Diode), a high-performance electronic device, and the like. In recent years, free-standing GaN substrates manufactured by the HVPE method (Hydride Vapor Phase Epitaxy) or the like have been used as epitaxial wafer substrates for these devices.

エピタキシャルウェハを製造するためGaN基板には、通常、次のような加工が施される。エピタキシャルウェハ製造装置のサセプタにセットするために基板外径を整える加工を行う。割れや欠け防止のため面取加工を行う。基板の結晶方位の目印としてオリエンテーションフラット(OF)加工を行い、表面・裏面を見分けるための目印としてインデックスフラット(IF)加工や梨地状の裏面加工を行う。基板上に堆積する層を均質に成膜するため基板表面の平坦化加工を行う。平坦化加工としては研削・ラップ・研磨加工が一般的に行われている。   In order to manufacture an epitaxial wafer, the GaN substrate is usually subjected to the following processing. Processing for adjusting the outer diameter of the substrate is performed in order to set the epitaxial wafer manufacturing apparatus on the susceptor. Chamfering is performed to prevent cracking and chipping. Orientation flat (OF) processing is performed as a mark for the crystal orientation of the substrate, and index flat (IF) processing and matte-shaped back surface processing are performed as marks for distinguishing the front and back surfaces. In order to uniformly form a layer to be deposited on the substrate, the substrate surface is planarized. As the flattening process, grinding, lapping, and polishing processes are generally performed.

基板形状を整えるための加工(外径加工、OF・IF加工、面取加工)は、しばしばNC加工機や倣い式の加工機を用いて次のような手順で行われる。成長させた結晶インゴットに対し円筒研削を施し、次にフラット(OFやIF)を研削・形成してからウェハ状にスライスする。この場合、フラット(OFやIF)を形成するにあたり、円筒研削したインゴットに対してX線回折測定などを行って結晶方位を判別する。また、他の手順としては、ウェハ状にスライスした後に、劈開によってフラット(OFやIF)を形成する方法もある。   Processing for adjusting the substrate shape (outer diameter processing, OF / IF processing, chamfering) is often performed in the following procedure using an NC processing machine or a copying type processing machine. The grown crystal ingot is subjected to cylindrical grinding, then flat (OF or IF) is ground and formed, and then sliced into a wafer. In this case, when forming a flat (OF or IF), the crystal orientation is discriminated by performing X-ray diffraction measurement or the like on a cylindrically ground ingot. Another procedure is to form a flat (OF or IF) by cleaving after slicing the wafer.

現在の技術では窒化物半導体結晶のインゴット成長が難しいことから、窒化物半導体基板は、異種基板上に窒化物半導体結晶の厚膜を成長させ、それを剥離する方法により1枚ずつ製造されている。そのため、フラットの形成は劈開による方法で行なわれる。   Since ingot growth of nitride semiconductor crystals is difficult with current technology, nitride semiconductor substrates are manufactured one by one by a method in which a thick film of nitride semiconductor crystals is grown on a different substrate and then peeled off. . Therefore, the formation of the flat is performed by a method by cleavage.

しかしながら、六方晶系の窒化物半導体結晶は、SiやGaAs等の立方晶系に比して劈開性が弱く劈開面からずれ易い問題があった。また、窒化物半導体基板は透明であることから、剥離後に基板の表裏を取り違える不具合が生じ易かった。   However, the hexagonal nitride semiconductor crystal has a problem that it is less cleaved than a cubic system such as Si or GaAs and is easily displaced from the cleavage plane. Further, since the nitride semiconductor substrate is transparent, it is easy to cause a problem that the front and back of the substrate are mistaken after peeling.

このような問題に対し、例えば特許文献1では、円形ウェハよりも外周が小さく、OF・IFの形状を有する型を円形ウェハに当て、超音波加工を行うことで円形ウェハを型通りにくり抜く方法が開示されている。特許文献1によれば、このような方法をとることでOF・IF加工を同時に行うことができ、加工時間を大幅に短縮することができるとしている。また、特許文献2には、結晶方位の基準となる部分を保護膜により保護して結晶成長を行う方法が開示されている。   For example, Patent Document 1 discloses a method for punching a circular wafer in a mold by applying ultrasonic processing to a circular wafer having a periphery that is smaller than that of a circular wafer and having an OF / IF shape. Is disclosed. According to Patent Document 1, by adopting such a method, OF / IF processing can be performed simultaneously, and the processing time can be greatly shortened. Patent Document 2 discloses a method of growing a crystal by protecting a portion serving as a reference for crystal orientation with a protective film.

特開2006−339431号公報JP 2006-339431 A 特開平5−55143号公報JP-A-5-55143

Y. Oshima, T. Eri, M. Shibata, H. Sunakawa, K. Kobayashi, T. Ichihashi and A. Usui: Jpn. J. Appl. Phys. 42 (2003) L1.Y. Oshima, T. Eri, M. Shibata, H. Sunakawa, K. Kobayashi, T. Ichihashi and A. Usui: Jpn. J. Appl. Phys. 42 (2003) L1.

上述したように、窒化物半導体基板では、ウェハに対するOF・IF加工が難しいという問題があった。特許文献1に記載の方法は、OF・IFの加工時間を大幅に短縮することができる利点を有するが、GaN基板が硬脆材料であるため加工速度を更に上げる(加工時間を更に短縮する)ことが困難である。従って、本発明の目的は、窒化物半導体基板に対する外形加工(特にOF・IF加工)を精度良くかつ容易に行うことができる窒化物半導体基板の製造方法を提供することにある。   As described above, the nitride semiconductor substrate has a problem that OF / IF processing on the wafer is difficult. The method described in Patent Document 1 has the advantage that the processing time of OF / IF can be significantly reduced, but the processing speed is further increased because the GaN substrate is a hard and brittle material (the processing time is further reduced). Is difficult. Accordingly, an object of the present invention is to provide a method for manufacturing a nitride semiconductor substrate capable of accurately and easily performing outer shape processing (particularly OF / IF processing) on the nitride semiconductor substrate.

本発明は上記目的を達成するため、窒化物半導体基板の製造方法であって、所望形状でくり貫かれた部分を有する保護膜を下地基板の上に形成する工程と、前記くり貫かれた部分に窒化物半導体層を成長する工程と、前記窒化物半導体層を剥離する工程とを含むことを特徴とする窒化物半導体基板の製造方法を提供する。   In order to achieve the above object, the present invention provides a method for manufacturing a nitride semiconductor substrate, comprising a step of forming a protective film having a portion hollowed out in a desired shape on a base substrate, and the hollowed out portion. The method further includes the steps of growing a nitride semiconductor layer and peeling the nitride semiconductor layer.

また本発明は上記目的を達成するため、上記の本発明に係る窒化物半導体基板の製造方法において、以下のような改良や変更を加えることができる。
(1)前記所望形状は、前記窒化物半導体基板におけるオリエンテーションフラットおよび/またはインデックスフラットを含む。
(2)前記保護膜が、酸化物膜、金属膜または窒化物膜である。
In order to achieve the above object, the present invention can be modified or changed as follows in the method for manufacturing a nitride semiconductor substrate according to the present invention.
(1) The desired shape includes an orientation flat and / or an index flat in the nitride semiconductor substrate.
(2) The protective film is an oxide film, a metal film, or a nitride film.

本発明によれば、窒化物半導体基板の製造において、窒化物半導体基板に対する外形加工(特にOF・IF加工)を容易に行うことができる。また、結晶方位の面出しとして確度のあるサファイア基板のOFを基準にすることで、精度良くOF・IFの位置決めを行うことができる。   According to the present invention, in the manufacture of a nitride semiconductor substrate, outer shape processing (particularly OF / IF processing) can be easily performed on the nitride semiconductor substrate. In addition, OF / IF positioning can be performed with high accuracy by using OF of the sapphire substrate with accuracy as a reference for crystal orientation.

下地基板として用いる直径62 mmのc面サファイア単結晶基板の平面模式図である。FIG. 3 is a schematic plan view of a c-plane sapphire single crystal substrate having a diameter of 62 mm used as a base substrate. 表面領域にボイド部を形成した下地基板の平面模式図である。It is a plane schematic diagram of the base substrate which formed the void part in the surface area. ボイド部上にフォトレジストを塗布した下地基板の平面模式図である。It is a plane schematic diagram of the base substrate which apply | coated the photoresist on the void part. フォトリソグラフィーに用いたマスクパターンの平面模式図である。It is a plane schematic diagram of the mask pattern used for photolithography. 感光部以外のフォトレジストを除去した下地基板の平面模式図である。It is a plane schematic diagram of the base substrate from which the photoresist other than the photosensitive portion is removed. 図5の下地基板の全面にSiO2膜を成膜した下地基板の平面模式図である。FIG. 6 is a schematic plan view of a base substrate in which a SiO 2 film is formed on the entire surface of the base substrate of FIG. フォトレジスト上のSiO2膜を除去した下地基板の平面模式図である。It is a plane schematic diagram of the base substrate from which the SiO 2 film on the photoresist is removed. HVPE成長後に剥離した窒化物半導体基板の平面模式図である。FIG. 3 is a schematic plan view of a nitride semiconductor substrate peeled after HVPE growth.

以下、本発明に係る実施の形態について、図面を参照しながら詳細に説明する。ただし、本発明はここで取り上げた実施の形態に限定されるものではない。   Hereinafter, embodiments according to the present invention will be described in detail with reference to the drawings. However, the present invention is not limited to the embodiment taken up here.

本発明に係る製造方法に沿って次に示す手順により窒化物半導体基板の製造を行った。まず、下地基板として直径62 mmのc面サファイア単結晶基板11を用意した(図1参照)。   A nitride semiconductor substrate was manufactured according to the following procedure according to the manufacturing method of the present invention. First, a c-plane sapphire single crystal substrate 11 having a diameter of 62 mm was prepared as a base substrate (see FIG. 1).

(a)c面サファイア単結晶基板11上に、有機金属化学気相堆積法(MOCVD)を用いて膜厚300 nmのGaN薄膜を成長した。   (A) A 300 nm-thick GaN thin film was grown on the c-plane sapphire single crystal substrate 11 by metal organic chemical vapor deposition (MOCVD).

(b)GaN薄膜上に真空蒸着法を用いてTi薄膜を膜厚20 nmで堆積した。その後、アンモニア及び水素の混合雰囲気中において1060℃で30分間の熱処理を行い、網目状のTiNナノマスクを形成しTi/GaN界面に多数のボイドを発生させた(下地基板の表面領域にボイド部22を形成した)(図2参照)。   (B) A Ti thin film with a thickness of 20 nm was deposited on the GaN thin film by vacuum evaporation. Thereafter, a heat treatment was performed at 1060 ° C. for 30 minutes in a mixed atmosphere of ammonia and hydrogen to form a network-like TiN nanomask and generate a large number of voids at the Ti / GaN interface (void portions 22 in the surface region of the underlying substrate). (See Fig. 2).

(c)ボイド部22を形成した下地基板21上にスピンコータでネガ型のフォトレジスト32を均一に塗布し、プリベークを行った(図3参照)。   (C) A negative type photoresist 32 was uniformly applied with a spin coater on the base substrate 21 on which the void portion 22 was formed, and prebaked (see FIG. 3).

(d)その後、図4に示したようなマスク40を用いて露光装置によりマスク40と下地基板31を密着させた等倍露光を行い、現像・リンスを行って図5に示したようなパターンを形成した。不要なフォトレジストを完全に除去したことを確認してからポストベークを行って下地基板51を得た。   (D) After that, the mask 40 as shown in FIG. 4 is used, and exposure is performed at the same magnification with the mask 40 and the base substrate 31 being brought into close contact with each other. Formed. After confirming that unnecessary photoresist was completely removed, post-baking was performed to obtain a base substrate 51.

(e)図5に示した下地基板51の表面全体にスパッタ法によりSiO2膜62を成膜した(図6参照)。 (E) A SiO 2 film 62 was formed on the entire surface of the base substrate 51 shown in FIG. 5 by sputtering (see FIG. 6).

(f)次に、全面にSiO2膜が成膜された下地基板61から剥離液を用いてフォトレジスト32上部のSiO2膜62をリフトオフし、図7に示したような下地基板71を得た。 (F) Next, the SiO 2 film 62 on the photoresist 32 is lifted off from the base substrate 61 with the SiO 2 film formed on the entire surface by using a stripping solution to obtain the base substrate 71 as shown in FIG. It was.

(g)この下地基板71に対してハイドライド気相エピタキシー法(HVPE)を用いて、膜厚600μmのGaN膜を成長した。成長に用いた原料はNH3とGaClとし、成長温度は1060℃とした。また、成長は常圧で行い、供給ガスのGaCl分圧およびNH3分圧はそれぞれ8×10-3 atm、8×10-2 atmとし、キャリヤガスとしてN2を用いた。 (G) A GaN film having a thickness of 600 μm was grown on the base substrate 71 by hydride vapor phase epitaxy (HVPE). The raw materials used for the growth were NH 3 and GaCl, and the growth temperature was 1060 ° C. The growth was carried out at normal pressure, the GaCl partial pressure and NH 3 partial pressure of the supply gas were 8 × 10 −3 atm and 8 × 10 −2 atm, respectively, and N 2 was used as the carrier gas.

上記のHVPE成長において、ボイド部22上にはGaN膜が成長したが、SiO2膜62上ではGaN膜の成長はみられなかった。また、このGaN膜は、ボイド部22におけるGaN/TiN界面から容易に剥離することができ、所望形状の窒化物半導体基板81を得ることができる(図8参照)。なお、剥離した窒化物半導体基板81に対し、必要に応じて外径精密加工、高精度OF加工、面取加工を行ってもよい。 In the above HVPE growth, a GaN film was grown on the void portion 22, but no growth of the GaN film was observed on the SiO 2 film 62. Further, the GaN film can be easily peeled off from the GaN / TiN interface in the void portion 22, and a nitride semiconductor substrate 81 having a desired shape can be obtained (see FIG. 8). Note that the peeled nitride semiconductor substrate 81 may be subjected to precision outside diameter processing, high precision OF processing, and chamfering as necessary.

本発明における窒化物半導体の結晶成長方法としては、例えば、ボイド形成剥離法(非特許文献1参照)を好適に用いることができる。また、有機金属塩化物気相成長法(MOHVPE)や有機金属化学気相堆積法(MOCVD)を利用してもよい。   As a method for growing a nitride semiconductor crystal in the present invention, for example, a void formation peeling method (see Non-Patent Document 1) can be preferably used. Alternatively, metal organic chloride vapor deposition (MOHVPE) or metal organic chemical vapor deposition (MOCVD) may be used.

11…c面サファイア単結晶基板、
21…表面領域にボイド部を形成した下地基板、22…ボイド部、
31…ボイド部上にフォトレジストを塗布した下地基板、32…フォトレジスト、
40…マスク、41…マスクパターン透過部、42…マスクパターン遮光部、
51…感光部以外のフォトレジストを除去した下地基板、
61…全面にSiO2膜を成膜した下地基板、62…SiO2膜、
71…フォトレジスト上のSiO2膜を除去した下地基板、
81…窒化物半導体基板。
11 ... c-plane sapphire single crystal substrate,
21 ... A base substrate having a void portion formed on the surface region, 22 ... a void portion,
31 ... Underlying substrate with photoresist applied on the void, 32 ... Photoresist,
40 ... Mask, 41 ... Mask pattern transmission part, 42 ... Mask pattern light shielding part,
51. Base substrate from which photoresist other than photosensitive portion is removed,
61 ... Underlying substrate with SiO 2 film formed on the entire surface, 62 ... SiO 2 film,
71: the base substrate from which the SiO 2 film on the photoresist is removed,
81: Nitride semiconductor substrate.

Claims (3)

窒化物半導体基板の製造方法であって、所望形状でくり貫かれた部分を有する保護膜を下地基板の上に形成する工程と、前記くり貫かれた部分に窒化物半導体層を成長する工程と、前記窒化物半導体層を剥離する工程とを含むことを特徴とする窒化物半導体基板の製造方法。   A method of manufacturing a nitride semiconductor substrate, the step of forming a protective film having a portion hollowed out in a desired shape on a base substrate, and the step of growing a nitride semiconductor layer on the hollowed out portion And a step of peeling the nitride semiconductor layer. A method of manufacturing a nitride semiconductor substrate, comprising: 前記所望形状は、前記窒化物半導体基板におけるオリエンテーションフラットおよび/またはインデックスフラットを含むことを特徴とする請求項1に記載の窒化物半導体基板の製造方法。   The method for manufacturing a nitride semiconductor substrate according to claim 1, wherein the desired shape includes an orientation flat and / or an index flat in the nitride semiconductor substrate. 前記保護膜が、酸化物膜、金属膜または窒化物膜であることを特徴とする請求項1または請求項2に記載の窒化物半導体基板の製造方法。   The method for manufacturing a nitride semiconductor substrate according to claim 1, wherein the protective film is an oxide film, a metal film, or a nitride film.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013049592A (en) * 2011-08-30 2013-03-14 Nichia Corp Method for manufacturing crystal substrate, and substrate holding tool

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013049592A (en) * 2011-08-30 2013-03-14 Nichia Corp Method for manufacturing crystal substrate, and substrate holding tool

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