JP2010279098A - Current control circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve the problem associated with conventional current control circuits in which a current is not controlled with high accuracy. <P>SOLUTION: A current control circuit includes: a transistor 107 that controls a current passed through a load; a sense MOS 116 through which a current corresponding thereto is passed; an amplifier 124 that outputs a first control signal V2 for controlling currents passed through the transistor 107 and the sense MOS 116 based on a comparison voltage Vs based on a current passed through the sense MOS 116 and a reference voltage V1; an amplifier 118 that outputs a second control signal so that the drain voltage of the transistor 107 and the drain voltage of the sense MOS 116 are equal to each other; and a transistor 112 that is connected in series with the sense MOS 116 and controls a current passed through the sense MOS 116 based on the second control signal. The amplifier 124 outputs the first control signal V2 so that the transistor 107 and the sense MOS 116 operate in a saturation region. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a current control circuit, and more particularly to a current control circuit having a current sensing circuit.

  In recent years, zoom and focus functions have been added to mobile phone cameras. Therefore, a motor that controls the lens position of the camera is required to operate stably regardless of temperature changes.

  First, in order for the motor to operate stably, it is necessary to supply a stable current to the motor. Therefore, a current control circuit is generally used. However, in the case of the conventional current control circuit, the current flowing through the motor fluctuates because the amplifier constituting the current control circuit has an undesired offset voltage, and the offset voltage changes in temperature. Accordingly, it has been an important issue to improve the current stability by reducing the influence of the offset voltage of the amplifier and its temperature change.

  For example, a current control circuit including a sense MOS transistor (hereinafter simply referred to as a sense MOS) is known as an IC (Integrated Circuit) that outputs a stable current for driving a lens position control motor.

  FIG. 6 shows a current control circuit including a sense MOS introduced in Patent Document 1. The circuit shown in FIG. 6 is an H-bridge type current control circuit 10 having a conventional sense MOS. The circuit shown in FIG. 6 monitors the current (output current) flowing through the load and compares it with a predetermined reference voltage.

  The output current is stably controlled by feeding back the comparison result. In order to make the drawing easier to see, the connection lines between the pre-driver 15 and the gates of TR2 and TR3 are omitted in FIG.

  As shown in FIG. 6, the current control circuit 10 includes an H bridge circuit 11 composed of transistors TR1 to TR4, a triangular wave generator 12, a superposition circuit 12a, a reference DAC 13, a sense resistor SR1, and a PWM comparator 14. And a pre-driver circuit 15, a sense MOS 16, a transistor TR 5, and an amplifier 18, and drives the motor 17.

  The triangular wave generator 12, the reference DAC 13, and the superimposing circuit 12a constitute a reference voltage source. In this reference voltage source, the superimposing circuit 12a superimposes a triangular wave signal having a predetermined frequency generated by the triangular wave generator 12 and a reference level generated by the reference DAC 13, and outputs a reference voltage V1.

  The reference voltage V1 is input to the non-inverting input terminal of the PWM comparator 14. On the other hand, a sense signal Vs corresponding to the current flowing through the load is input to the inverting input terminal of the PWM comparator 14. The PWM comparator 14 compares the reference voltage V1 and the sense signal Vs and outputs a PWM signal Vp.

  The pre-driver circuit 15 receives the PWM signal Vp. The pre-driver circuit 15 outputs a switching signal for switching the transistors TR1 to TR4 of the H bridge circuit 11 based on the PWM signal Vp.

  The H bridge circuit 11 includes four transistors TR1 to TR4 provided between the high potential side power source VM and the low potential side power source GND. Further, the H bridge circuit 11 can switch the direction of the current flowing through the motor 17. Transistors TR1 and TR3 are P-channel MOS transistors, and transistors TR2 and TR4 are N-channel MOS transistors.

  As a specific operation, the H-bridge circuit 11 turns on TR1 and TR4 and turns off TR2 and TR3, for example, in order from the high-potential-side power supply VM via TR1, motor 17, TR4. A current flows through the low potential side power supply GND. On the other hand, when TR1 and TR4 are turned off and TR2 and TR3 are turned on, a current flows from the high potential side power source VM to the low potential side power source GND via TR3, the motor 17, and TR2.

  The circuit shown in FIG. 6 shows an example in which TR1 is turned on, TR2 and TR3 are turned off, and TR4 is turned on / off (PWM control). Thereby, it is possible to control the current flowing to the low potential side power supply GND via TR1, the motor 17, and TR4 in order from the high potential side power supply VM.

  On the other hand, when switching the direction of the current flowing through the motor, TR3 is turned on, TR1 and TR4 are turned off, and TR2 is turned on / off (PWM control). Thereby, it is possible to control the current flowing to the low potential side power supply GND via the TR3, the motor 17, and the TR2 in order from the high potential side power supply VM. In this case, the gate voltage of TR3 is applied to the gate of the sense MOS 16, and the voltage on the right side of the motor 17 in FIG.

  Note that the gate-source voltage of the transistor that is turned on among the transistors TR1 to TR4 has a potential difference between the high-potential-side power supply VM and the low-potential-side power supply GND. In other words, the transistor is in a complete on state (full on state) in which a sufficient voltage is applied between the gate and the source.

  Further, the circuit shown in FIG. 6 has been described by taking as an example a case where one H bridge circuit 11 is provided to drive one load (motor 17). However, when driving a stepping motor or the like, it is necessary to provide two or more H-bridge circuits.

  Next, a current based on the current value supplied to the motor 17 flows through the sense MOS 16. A sense signal Vs is generated based on the current flowing through the sense MOS 16 and the sense resistor SR1. The amplifier 18 controls the transistor TR5 so that the drain voltage of the transistor TR1 is equal to the drain voltage of the sense MOS 16.

  The reference voltage V1 includes the following various voltages. When the reference voltage is formed only by the DC voltage, the output current flowing through the motor 17 has a waveform as shown in FIG. FIG. 3 shows waveforms when the reference voltage is formed by superimposing a triangular wave for PWM driving on a DC voltage. FIG. 4 shows a waveform when the reference voltage is formed by superimposing a PWM driving triangular wave on the half-wave SIN wave voltage based on the output signal of the reference DAC 13. As shown in FIGS. 2 to 4, the output current waveform to the load for each reference voltage has a ripple component in a triangular shape. In the case of FIG. 2, the ripple component of the output current has a frequency corresponding to the load (for example, the motor 17) and the resistance component. In the case of FIGS. 3 and 4, the ripple component of the output current has a frequency corresponding to a triangular wave.

  As described above, the current control circuit shown in FIG. 6 is characterized by supplying a stable current to a load (motor or the like). However, the amplifier 18 included in the circuit shown in FIG. 6 has an undesired offset voltage having a predetermined magnitude. With this offset voltage, the accuracy and stability of the current monitoring by the sense MOS 16 are lowered. That is, the current control circuit shown in FIG. 6 has a problem that current control with high accuracy cannot be performed.

  The reason why the accuracy and stability of the current monitor are lowered will be described with reference to FIGS. FIG. 5 is a diagram showing current-voltage characteristics of an enhancement type P-channel MOS transistor.

  The transistor TR1 and the sense MOS 16 are formed on the same chip and thus have the same electrical characteristics. Here, if the transistors have the same size, the electrical characteristics are the same. The drain currents controlled according to the gate voltage (gate-source voltage) and the drain voltage (source-drain voltage) are the same. Source-drain current) is the same. Therefore, if the gate voltage and the drain voltage are the same, a drain current proportional to the size of the transistor flows.

  That is, by making the drain voltage applied to the transistor TR1 and the sense MOS 16 the same, the sense MOS 16 can monitor the current flowing through the transistor TR1 with high accuracy. Here, the amplifier 18 serves to control the transistor TR5 so that the drain voltage of the transistor TR1 and the drain voltage of the sense MOS 16 are equal to each other.

  However, when an offset voltage exists in the amplifier 18, a potential difference corresponding to the offset voltage of the amplifier 18 is generated between the drain voltage of the transistor TR1 and the drain voltage of the sense MOS 16. That is, the drain voltage of the transistor TR1 and the drain voltage of the sense MOS 16 are different from each other. As a result, an error occurs when the sense MOS 16 monitors the current flowing through the transistor TR1. In order for the current control circuit to perform highly accurate current control, it is necessary to reduce this error.

  In the circuit shown in FIG. 6, the transistor TR1 is in a full-on state as described above. Here, when the transistor TR1 is in a full-on state, the on-resistance is low. When the on-resistance is low, the drain voltage Vds is usually small. That is, as shown in FIG. 5, the transistor TR1 in the full-on state operates in the non-saturation region.

  As shown in FIG. 5, in the non-saturated region, the change in Id (ΔId) with respect to the change in the drain voltage Vds (ΔVds) is large. On the other hand, in the saturation region, the change in Id (ΔId) is very small with respect to the change in Vds (ΔVds).

  Here, the offset voltage of the amplifier 18 corresponds to the voltage difference ΔVds shown in FIG. That is, in order to reduce the influence of the offset voltage (ΔVds), the transistor TR1 needs to operate in the saturation region. However, as described above, in the circuit shown in FIG. 6, the transistor TR1 may operate in the non-saturated region. Therefore, a large current error (ΔId) corresponding to the offset voltage (ΔVds) occurs in the drain current of the transistor TR1. For this reason, the sense MOS 16 cannot accurately monitor the current flowing through the transistor TR1.

  Further, in general, the offset voltage of the amplifier tends to increase as the temperature rises. That is, the offset voltage of the amplifier 18 varies according to the temperature change. For this reason, operating the transistor TR1 in the saturation region is important in reducing the influence of the temperature change of the offset voltage.

  In addition, Patent Document 2 discloses a differential amplifier 21 that controls a transistor Pc1 and a transistor Px1 that perform mirror operation and a control voltage Vp corresponding to a desired output current and an output voltage of the transistor Px1 at a predetermined ratio. And an interface circuit for transmitting a digital signal at high speed (see FIG. 1 of Patent Document 2).

JP 2007-244083 A JP 2000-341107 A

  As described above, the conventional current control circuit has a problem that current control with high accuracy cannot be performed.

  The current control circuit according to the present invention includes a first transistor for controlling a current flowing through a load, a second transistor through which a current corresponding to a current flowing through the first transistor flows, and a current flowing through the second transistor A first amplifier that outputs a first control signal for controlling a current flowing through the first and second transistors based on a comparison voltage determined based on the first reference voltage and a predetermined reference voltage; A second amplifier that outputs a second control signal so as to make the potential of the first terminal of the first transistor equal to the potential of the first terminal of the second transistor; A third transistor that is connected in series to the second transistor and that controls a current flowing through the second transistor based on the second control signal, the current control circuit comprising: Amplifiers, said first and said second transistor to output the first control signal to operate in the saturation region.

  With the circuit configuration as described above, highly accurate current control can be performed.

  According to the present invention, a current control circuit capable of highly accurate current control can be provided.

It is a figure which shows the current control circuit concerning embodiment of this invention. It is a timing chart of an output current when a reference voltage is formed with a DC voltage. It is a timing chart of an output current when a reference voltage is formed by superimposing a triangular wave for PWM driving on a DC voltage. It is a timing chart of an output current when a reference voltage is formed by superimposing a triangular wave for PWM driving on a half-wave SIN wave voltage. It is a figure which shows the current-voltage characteristic of an enhancement type P channel MOS transistor. It is a figure which shows the current control circuit of a prior art.

  Hereinafter, specific embodiments to which the present invention is applied will be described in detail with reference to the drawings. For clarity of explanation, duplicate explanation is omitted as necessary.

  Embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a diagram showing a current control circuit according to an embodiment of the present invention. As a feature of the current control circuit 150 shown in FIG. 1, an amplifier (first amplifier) 124 for generating a gate voltage of the sense MOS (second transistor) 116 and the transistor (first transistor) 107 is provided. Thereby, the current control circuit 150 shown in FIG. 1 can suppress the difference in drain current between the transistors 107 and 116 caused by the offset voltage of the amplifier (second amplifier) 118 and the temperature change thereof. That is, the current control circuit 150 shown in FIG. 1 is characterized in that it can supply a more stable current to the load. In order to make the drawing easier to see, the connection line between the pre-driver 115 and the gate of the transistor (fourth transistor) 108 is omitted in FIG.

  1 includes a reference voltage source 120, an H-bridge circuit 111, a transistor (third transistor) 112, a sense resistor 113, a sense MOS 116, an amplifier 118, an amplifier 124, And a driver 115 for driving the motor 117.

  The H bridge circuit 111 includes a transistor 107, a transistor 108, a transistor (fifth transistor) 109, and a transistor (sixth transistor) 110. The reference voltage source 120 includes a triangular wave generator 12, a reference DAC 13, and a superimposing circuit 12a.

  In the current control circuit 150 according to the embodiment of the present invention, a case where the sense MOS 116, the transistors 107, 109, and 112 are P-channel MOS transistors and the transistors 108 and 110 are N-channel MOS transistors will be described as an example.

  In the reference voltage source 120, the superimposing circuit 12a superimposes a triangular wave signal having a predetermined frequency generated by the triangular wave generator 12 and a reference level generated by the reference DAC 13, and outputs a reference voltage V1. The reference voltage V1 generated by the reference voltage source 120 is input to the + input terminal of the amplifier 124.

  The low potential side power supply GND is connected to one terminal of the sense resistor 113, the source of the transistor 108, and the source of the transistor 110. The other terminal of the sense resistor 113 is connected to the negative input terminal of the amplifier 124 and the drain of the transistor 112.

  The output terminal of the amplifier 124 is connected to the gate of the sense MOS 116 and the gate of the transistor 107 connected in common therewith. Each output terminal of the pre-driver circuit 115 is connected to the gate of the transistor 108, the gate of the transistor 109, and the gate of the transistor 110.

  Note that an external signal for controlling the switching operation of the transistors 108, 109, 110 is input to the pre-driver circuit 115. In FIG. 1, the connection line between the pre-driver circuit 115 and the gate of the transistor 108 is omitted.

  The high potential side power source VM is connected to the source of the transistor 107 (second terminal of the first transistor), the source of the transistor 109, and the source of the sense MOS 116 (second terminal of the second transistor). The The drain of the transistor 107 (the first terminal of the first transistor) is connected to the drain of the transistor 108, the + input terminal of the amplifier 118, and one terminal of the motor 117.

  The drain of the transistor 109 is connected to the drain of the transistor 110 and the other terminal of the motor 117. The drain of the sense MOS 116 (the first terminal of the second transistor) is connected to the source of the transistor 112 and the negative input terminal of the amplifier 118. The output terminal of the amplifier 118 is connected to the gate of the transistor 112.

  Next, the operation will be described. The reference voltage V1 generated by the reference voltage source 120 is input to the + input terminal of the amplifier 124. In addition, a sense voltage Vs determined based on the current flowing through the motor 117 as a load and the sense resistor 113 is input to the negative input terminal of the amplifier 124.

  The amplifier 124 outputs an analog voltage V2 obtained by amplifying the difference between the reference voltage V1 and the sense voltage Vs with a predetermined amplification factor. This voltage V2 is input to the gate of the sense MOS 116 and the gate of the transistor 107, and controls the current flowing through the transistor 107 and the sense MOS 116. Here, the amplification factor of the amplifier 124 is set so that the transistor 107 and the sense MOS 116 operate in the saturation region.

  Accordingly, as illustrated in FIG. 5, the circuit illustrated in FIG. 1 can suppress the drain current error ΔId with respect to the drain voltage variation ΔVds of the transistor 107. That is, the influence of the offset voltage of the amplifier 118 and its temperature change can be reduced as much as possible. As a result, the current control circuit according to the embodiment of the present invention can supply a more stable current to the load. Details will be described later.

  The H bridge circuit 111 includes four transistors 107 to 110 provided between the high potential side power source VM and the low potential side power source GND. The H bridge circuit 111 can switch the direction of the current flowing through the motor 117.

  As a specific operation, for example, the H-bridge circuit 111 turns on the transistor 107 and the transistor 110 and turns off the transistor 108 and the transistor 109, so that the transistor 107, the motor 117, and the transistor are sequentially turned on from the high potential side power source VM. A current flows through the low potential side power supply GND via 110.

  On the other hand, when the transistor 107 and the transistor 110 are turned off and the transistor 108 and the transistor 109 are turned on, a current flows from the high-potential-side power supply VM to the low-potential-side power supply GND sequentially through the transistor 109, the motor 117, and the transistor 108. .

  In this manner, the direction of the current flowing through the motor 117 can be switched by performing on / off control of the transistors 107 to 110 by the switching signal from the pre-driver circuit 115.

  Note that the circuit illustrated in FIG. 1 illustrates an example in which the transistor 110 is turned on, the transistors 108 and 109 are turned off, and the current flowing through the transistor 107 is controlled. As a result, the current flowing to the low potential side power supply GND via the transistor 107, the motor 117, and the transistor 110 can be controlled sequentially from the high potential side power supply VM.

  Here, the transistor 107 is controlled in an analog manner by the voltage V <b> 2 output from the amplifier 124. That is, the current flowing through the transistor 107 according to the voltage V2 output from the amplifier 124 is controlled. Thereby, the current flowing through the motor 117 is controlled. For example, when the voltage V2 output from the amplifier 124 is small, the current flowing through the transistor 107 increases. As a result, the current flowing through the motor 117 increases.

  Note that the gate-source voltage of the transistor 110 has a potential difference between the high potential side power source VM and the low potential side power source GND. That is, it is assumed that the transistor is completely turned on (full on).

  On the other hand, when the transistor 108 is turned on, the transistor 107 and the transistor 110 are turned off, and the transistor 109 is controlled in an analog manner by the voltage V 2 output from the amplifier 124, the current flowing through the motor 117 can be similarly controlled. Specifically, the transistor 109 is controlled in an analog manner by the voltage V2 output from the amplifier 124. Thereby, the current flowing through the motor 117 is controlled.

  Further, the circuit shown in FIG. 1 is an example in the case where one H-bridge circuit is provided to drive one load (motor 117). However, it is possible to appropriately change to a circuit configuration including two or more H-bridge circuits for driving a stepping motor or the like.

  Next, a current based on the current value supplied to the motor 117 flows through the sense MOS 116. A sense voltage Vs is generated based on the current flowing through the sense MOS 116 and the sense resistor 113.

  Note that the transistor 107 and the sense MOS 116 preferably have the same electrical characteristics. Here, if the electrical characteristics are the same, if the transistors have the same size, the drain controlled according to the gate voltage (gate-source voltage) and the drain voltage (source-drain voltage). It means that the current (source-drain current) is the same. Therefore, if the gate voltage and the drain voltage are the same, a drain current proportional to the size of the transistor flows.

  That is, by applying the same drain voltage to the transistor 107 and the sense MOS 116, the sense MOS 116 can monitor the current flowing through the transistor 107 with high accuracy. Here, the amplifier 118 controls the current flowing through the transistor 112 so that the drain voltage of the transistor 107 and the drain voltage of the sense MOS 116 are equal to each other.

  The sense voltage Vs adjusted in this way is input to the negative input terminal of the amplifier 124. As described above, the amplifier 124 outputs the analog voltage V2 based on the reference voltage V1 and the sense voltage Vs.

  Here, there may be an offset voltage in the amplifier 118. In such a case, a potential difference corresponding to the offset voltage of the amplifier 118 is generated between the drain voltage of the transistor 107 and the drain voltage of the sense MOS 116. That is, the drain voltage of the transistor TR1 and the drain voltage of the sense MOS 16 are different from each other.

  Therefore, the amplifier 124 generates an output voltage V2 such that the transistor 107 and the sense MOS 116 operate in the saturation region. Accordingly, the circuit illustrated in FIG. 1 can suppress the drain current error ΔId with respect to the drain voltage variation ΔVds of the transistor 107. Thereby, the sense MOS 116 can accurately monitor the current flowing through the transistor TR1. That is, the current control circuit according to the embodiment of the present invention can supply a stable current with high accuracy regardless of the offset voltage and its temperature change.

  Note that various types of waveforms of the reference voltage V1 as shown in FIGS. 2 to 4 can be easily generated by changing the reference voltage source 120. That is, an output current similar to that in the conventional technique can be supplied to the load (motor 117).

  Here, output currents of the current control circuit (FIG. 6) of the prior art and the current control circuit (FIG. 1) according to the embodiment of the present invention are obtained. Note that the error (ΔId) of the drain current with respect to the fluctuation (ΔVds) of the drain voltage of the transistor 107 is as follows. That is, ΔId / ΔVds = 1 in the non-saturated region, and ΔId / ΔVds = 0.05 in the saturated region.

  The offset voltage of the amplifier 118 is 10 mV, the current flowing through the sense resistor 113 is I1, the resistance value of the sense resistor 113 is R1, the sense ratio (transistor 107 / sense MOS 116) is Z, and the reference voltage is Vref. It is assumed that the + input terminal voltage and the −input terminal voltage of the amplifier 118 are equal.

First, the output current Iout0 when the offset voltage is zero can be expressed by the following equation.
Iout0 = I1 × Z = (Vref / R1) × Z

Next, the output current when the offset voltage is 10 mV is obtained. First, the output current Iout1 when the transistor 107 operates in the non-saturation region as in the conventional current control circuit can be expressed by the following equation.
Iout1 = I1 × Z + ΔId / ΔVds × 10 = (Vref / R1) × Z + 1 × 10 = (Vref / R1) × Z + 10 (mA)

On the other hand, the output current Iout2 when the transistor 107 operates in the saturation region as in the current control circuit of the present invention can be expressed by the following equation.
Iout2 = I1 × Z + ΔId / ΔVds × 10 = (Vref / R1) × Z + 0.05 × 10 = (Vref / R1) × Z + 0.5 (mA)

  Thus, for example, in the case where the offset voltage is 10 mV, when the transistor 107 is operated in the saturation region, the output current fluctuation is changed from 10 mA to 0.5 mA compared to the case where the transistor 107 is operated in the non-saturation region. Can be reduced.

  The same can be said for the temperature change of the offset voltage. That is, even when the offset voltage fluctuates by 10 mV according to the temperature change, the fluctuation of the output current can be reduced from 10 mA to 0.5 mA.

  In particular, when a small current output of about several tens of mA is required, the influence of the temperature change of the offset voltage on the output current is large in the conventional circuit configuration. Therefore, the current control circuit of the prior art is not practical for small current output. Therefore, the prior art circuit has been used for outputting a large current of about 200 to 300 mA. On the other hand, the circuit configuration of the present invention can cope with a small current output of about several tens of mA.

  For example, the case where (Vref / R1) × Z = 50 mA and the temperature change of the offset voltage is 10 mV will be described. In this case, the output current of the current control circuit of the prior art is 50 mA + 10 mA. That is, the variation rate of the output current is 20%. Therefore, the prior art circuit has not been practical for small current output. On the other hand, the output current of the current control circuit of the present invention is 50 mA + 0.5 mA. That is, the variation rate of the output current is reduced to 1%. Therefore, the current control circuit of the present invention is practical for small current output.

  As described above, the current control circuit according to the embodiment of the present invention operates the transistor 107 in the saturation region by controlling the transistor 107 in an analog manner without being fully turned on. Thereby, the influence of the offset voltage and its temperature change can be reduced. That is, the current control circuit according to the embodiment of the present invention can supply a more stable current to the load. Although there is an offset voltage in the amplifier 124, there is no problem if a voltage equivalent to the offset voltage of the PWM comparator 14 used in the prior art is used.

  Compared to the circuit shown in Patent Document 2 introduced in the prior art, the current control circuit according to the embodiment of the present invention is configured so that the drain voltage of the transistor 107 and the drain voltage of the sense MOS 116 are equal to each other. A transistor 112 and an amplifier 118 are provided. That is, the current control circuit according to the embodiment of the present invention performs voltage control for accurately monitoring the current flowing through the transistor 017 by the sense MOS 116. On the other hand, the conventional circuit does not perform such voltage control. Specifically, the circuit shown in FIG. 1 of Patent Document 2 does not perform voltage control for making the drain voltage of the transistor Pc1 equal to the drain voltage of the transistor Px1.

  Furthermore, the current control circuit according to the embodiment of the present invention controls the output current to the load based on the comparison voltage controlled by the transistor 112 and the amplifier 118. That is, the comparison voltage controlled by the transistor 112 and the amplifier 118 is used as a feedback signal for controlling the output current. Therefore, the current control circuit according to the embodiment of the present invention can supply a highly accurate and stable current. On the other hand, the prior art circuit does not perform such feedback control. That is, the circuit configuration and the technical field are completely different between the circuit shown in Patent Document 2 and the current control circuit according to the embodiment of the present invention.

  Note that the present invention is not limited to the above-described embodiment, and can be changed as appropriate without departing from the spirit of the present invention. For example, although the case where the H bridge circuit 111 includes the MOS transistors 107 to 110 has been described as an example, the present invention is not limited thereto. For example, it is possible to appropriately change to a circuit configuration in which the transistors 107 and 109 are PNP bipolar transistors and the transistors 108 and 110 are NPN bipolar transistors. In addition, the circuit configuration in which the sense MOS 116 and the transistor 112 are PNP bipolar transistors can be appropriately changed.

  In the description of the embodiment of the present invention, the case where the H bridge circuit is provided as a circuit for controlling the current flowing through the load is described, but the present invention is not limited to this. For example, instead of the H-bridge circuit, it is possible to appropriately change to a circuit configuration that controls the current flowing through the load with one transistor.

12 Triangular wave generator 12a Superposition circuit 13 Reference DAC
107 transistor 108 transistor 109 transistor 110 transistor 111 H bridge circuit 112 transistor 113 sense resistor 115 pre-driver circuit 116 sense MOS
117 Motor 118 Amplifier 120 Reference voltage source 124 Amplifier 150 Current control circuit VDD High potential side power supply VM High potential side power supply GND Low potential side power supply

Claims (9)

A first transistor that controls the current flowing through the load;
A second transistor in which a current corresponding to a current flowing in the first transistor flows;
A first control signal for controlling a current flowing in the first and second transistors based on a comparison voltage determined based on a current flowing in the second transistor and a predetermined reference voltage; A first amplifier to output;
A second amplifier that outputs a second control signal so that the potential of the first terminal of the first transistor is equal to the potential of the first terminal of the second transistor;
A third transistor connected in series to the second transistor and controlling a current flowing in the second transistor based on the second control signal;
The first amplifier is
A current control circuit for outputting the first control signal so that the first and second transistors operate in a saturation region; A resistor connected in series with the second transistor;
The current control circuit according to claim 1, wherein the comparison voltage is determined based on the resistance in addition to the current flowing through the second transistor.   The current control circuit according to claim 1, wherein the second terminal of the first transistor and the second terminal of the second transistor are connected to each other.   The current control circuit according to claim 1, wherein the first transistor and the second transistor have the same electrical characteristics.   The current control circuit according to claim 1, wherein the first and second transistors are P-channel MOS transistors.   The current control circuit according to claim 1, wherein the first and second transistors are PNP-type bipolar transistors.   The current control circuit according to claim 1, wherein the third transistor is a P-channel MOS transistor.   The current control circuit according to claim 1, wherein the third transistor is a PNP bipolar transistor. A fourth transistor connected in series to the first transistor;
A fifth transistor connected in parallel to the first and fourth transistors;
A sixth transistor connected in series to the fifth transistor;
9. The load is connected between a node connecting the first and fourth transistors and a node connecting the fifth and sixth transistors. The current control circuit according to any one of the above.

Images