JP2010271867A - Memory management system and method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce power consumption by turning off power of a memory-mounted module or a memory as maintaining a function of the memory-mounted module. <P>SOLUTION: A memory management system includes: the memory-mounted module including a main memory having a specific area to which contents of a cache memory having been used by a CPU (Central Processing Unit) are written back; and a management memory. The memory management system includes a management module including a memory management/power control means which periodically reads the contents of the cache memory written back to the specific area of the main memory, which accumulates them in the management memory, and which controls setting of a power-saving state according to a memory usage of the CPU of the memory-mounted module. When the memory-mounted module receives instructions of setting of the power-saving state, the memory-mounted module takes over the contents of the cache memory accumulated in the management memory, and continues operation. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a memory management system and method, and more particularly to a memory management system and method for reducing power consumption while maintaining the function of a memory-mounted module.

  Various techniques relating to memory management for the purpose of reducing the power consumption of the entire apparatus and efficiently using the memory have been disclosed (for example, see Patent Document 1 and Patent Document 2).

  Patent Document 1 discloses a technology related to a memory backup device that turns off the power of an unnecessary DRAM (Dynamic Random Access Memory) for the purpose of reducing power consumption during suspension. Note that suspend is an operation mode that is executed when it is desired to interrupt a temporary work in the middle of work in a portable terminal, a notebook computer, or the like. If the power is completely turned off, the system must be restarted when the work is resumed, resulting in wasted startup time. In the suspend state, the processor is placed in a standby state, and the memory such as a DRAM is held in a self-refresh mode or the like. Then, when the system is restarted, processing is performed so that the system can be quickly returned to the state at the time when the work was interrupted.

  According to Patent Document 1, a processor that has been notified of a suspend request ends the work currently being processed and sets the low power consumption mode. At that time, the processor compresses the data held in the DRAM and determines the number of DRAMs sufficient to hold the compressed data. Then, the processor turns off the power of the DRAM that does not need to hold data. For example, in a system that uses four 8 MB (megabyte) DRAMs, the total memory usage as a result of data compression during suspend is 12 MB. In this case, if two DRAMs are used, the backup data can be held. Therefore, the processor reduces power consumption by turning off the power of the remaining two DRAMs.

  Patent Document 2 discloses a technique related to a memory transfer control method capable of reducing the capacity of a backup memory and an operation memory. The technology disclosed in Patent Document 2 is a technology related to memory transfer control performed between a device memory that operates the device, a backup memory that is an emergency startup memory, and an operation memory that is mounted on each board. It is. The operation memory is a memory mounted on a board that requires the contents of the in-device memory, and the same contents as the in-device memory are written. Further, the backup memory and the in-device memory are mounted on the same CPU board, and their contents always coincide.

  In Patent Document 2, two CPU (Central Processing Unit) boards are prepared, and the internal memory mounted on each CPU board also holds the contents of the internal memory mounted on the counterpart CPU board. is doing. In this state, at the time of emergency startup, the contents of the backup memory are transferred to the in-device memory and the operation memory so that the respective memory contents are matched. When one of the CPU boards is replaced, the new CPU board takes out the memory contents necessary for the own CPU board from the in-device memory of the counterpart CPU board and transfers it to the in-device memory. The transferred memory contents are transferred to the backup memory and the operation memory, respectively, so that the memory contents are matched.

Japanese Patent Laid-Open No. 11-282587 Japanese Patent Laid-Open No. 9-101919

  There is a system configured by mounting a plurality of board mounting modules on which a CPU, a memory storing programs and data necessary for the operation of the CPU, and related apparatus boards are mounted on an apparatus rack. For example, there is a system such as a communication device in which each board mounting module mounted on the device rack realizes a different function and realizes a complicated communication function as a whole. In addition, the board mounted module which implement | achieves one function by mounting such CPU and memory etc. is hereafter called a memory mounted module.

  A communication device constituting a network is generally equipped with a number of memory-equipped modules capable of continuing functions at a constant service level during a time period when the load applied to the network is the largest. However, since the load applied to the network is not always constant, it is desirable to reduce the power consumption as much as possible while maintaining the function in a time zone when the load is low.

  In the case of a memory-equipped module, the power consumption can be reduced by turning off the installed memory power supply. However, if the memory power supply is turned off, the function of the memory-equipped module stops, and the entire system Functions are lost. That is, since the memory mounted modules constituting such a communication device have different functions, it is necessary to maintain the functions even if the memory power of the memory mounted module is turned off.

  The technique disclosed in Patent Document 1 is a technique that is applied when it is possible to stop the function of the system, and the power of a part of the memory is turned on while the system is kept operating. It is not considered to turn off.

  In addition, the technique disclosed in Patent Document 2 is a technique for disclosing a memory backup method required at the time of emergency start-up or replacement of a CPU panel, and a power source of a device or a memory including a CPU is turned off. No consideration is given to reducing power consumption.

  SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned problems, and a memory management system and method for reducing power consumption by turning off the power of the memory mounted module or the memory while maintaining the function of the memory mounted module. Is to provide.

  The memory management system according to the present invention includes a memory mounting module and a management module. The memory mounted module includes a main memory having a specific area in which the contents of the cache memory used by the CPU are written back. The management module includes a management memory, periodically reads the contents of the cache memory written back to the specific area of the main memory, stores the contents in the management memory, and according to the memory usage of the CPU of the memory-equipped module Memory management / power control means for controlling the setting of the power saving state. When the memory-mounted module receives an instruction to set the power saving state, it continues the operation by taking over the contents of the cache memory stored in the management memory.

  In addition, the memory management method according to the present invention periodically writes the contents of the cache memory used by the CPU of the memory-mounted module to a specific area of the main memory of the memory-mounted module and writes back to the specific area of the main memory. The contents of the cache memory are periodically read out and stored in the management memory of the management module, and it is determined whether or not the power saving state needs to be set according to the memory usage of the CPU of the memory mounted module. When receiving a setting instruction, the memory-mounted module continues the operation by taking over the contents of the cache memory stored in the management memory.

  According to the present invention, power consumption can be reduced by turning off the power of the memory mounted module or the memory while maintaining the function of the memory mounted module.

The block block diagram which shows basic embodiment of this invention Equipment rack layout diagram in an embodiment of the present invention The block block diagram which shows the structure of 1st Embodiment. The block block diagram which shows the structure of the memory mounting module of 1st Embodiment. The block block diagram which shows the structure of the management module of 1st Embodiment. The block block diagram which shows the structure of the other memory mounting module of 1st Embodiment. 7 is a flowchart showing data write operation to the management memory according to the embodiment of the present invention. The flowchart which shows the operation | movement which determines the transfer to power saving mode of 1st Embodiment, and return from power saving mode to normal mode. The flowchart which shows operation | movement of transfer to power saving mode of 1st Embodiment. A flowchart showing an operation of returning from the power saving mode to the normal mode according to the first embodiment. The block block diagram which shows the structure of the memory mounting module of 2nd Embodiment. The flowchart which shows the operation | movement which determines transfer to power saving mode of 2nd Embodiment, and return from power saving mode to normal mode. The flowchart which shows operation | movement of transfer to the power saving mode of 2nd Embodiment. A flowchart showing an operation of returning from the power saving mode to the normal mode according to the second embodiment. The block block diagram which shows the structure of the management module of 3rd Embodiment.

  DESCRIPTION OF EMBODIMENTS Embodiments for carrying out the present invention will be described with reference to the drawings.

  FIG. 1 is a block diagram showing a basic embodiment of the present invention.

  The memory management system according to the basic embodiment of the present invention includes a memory mounting module 20 and a management module 10. The memory module 20 includes a main memory 203 having a specific area in which the contents of the cache memory 202 used by the CPU 201 are written back. The management module 10 includes a management memory 102 and memory management / power control means 101. The memory management / power control means 101 periodically reads the contents of the cache memory 202 written back to the specific area of the main memory 203 and stores them in the management memory 10. Then, the memory management / power control unit 101 controls the setting of the power saving state according to the memory usage of the CPU 201 of the memory-mounted module 20. When receiving the instruction to set the power saving state, the memory module 20 takes over the contents of the cache memory 202 stored in the management memory 102 and continues the operation.

  In the present embodiment, the contents of the cache memory 202 used by the CPU 201 are accumulated in a specific area of the main memory 203. Originally, the content of the cache memory 202 is written back to the same location of the physical address of the main memory 203 taken out as the cache memory 202. However, in the present embodiment, writing back is also performed in a specific area different from the original writing back location in the main memory 203. Then, the memory management / power control means 101 periodically reads this specific area of the main memory 203 and accumulates the memory contents in the management memory 102. This means that the latest contents of the cache memory 202 used by the CPU 201 are accumulated in the management memory 102.

  On the other hand, the memory management / power control unit 101 controls the setting of the power saving state according to the memory usage of the CPU 201 of the memory-mounted module 20. Accordingly, the memory-mounted module 20 that has received the instruction to set the power saving state continues to operate in a form in which the latest contents of the cache memory 202 stored in the management memory 102 are taken over.

  In the case where the memory usage of the CPU is small and the memory amount stored in the management memory can operate sufficiently, this embodiment takes over the memory contents stored in the management memory and continues the operation. And power saving state settings.

  More specific embodiments will be described below.

  A communication apparatus incorporating a memory management system according to the present invention will be described as an embodiment. FIG. 2 is an apparatus rack layout diagram of the communication apparatus 1 according to the embodiment of the present invention. The communication device 1 according to the embodiment of the present invention includes three device racks 100 to 300, and each device rack mounts a management module and a plurality of memory mounting modules. For example, the device rack 100 has a management module 10 and two memory mounting modules 20 and 30 mounted thereon. The device rack 200 is mounted with a management module 10a and three memory mounting modules 20a to 40a. The device rack 300 is mounted with a management module 10b and four memory mounting modules 20b to 50b.

  The communication device 1 functions as a communication device that constitutes a network, for example, by means of memory-mounted modules mounted on these three device racks.

  FIG. 3 is a block diagram showing the configuration of the first embodiment.

  FIG. 3 illustrates a block configuration of the management module 10 and the two memory mounting modules 20 and 30 mounted on the apparatus rack 100 in FIG.

  Each memory mounted module realizes a function given to the memory mounted module based on a program or data read from the main memory 203 by the CPU 201. Each memory module has a cache memory 202 in order to realize high-speed operation of the CPU.

  The management module 10 includes a memory management / power control unit 101 and a management memory 102, and controls a power saving mode according to the first embodiment to be described later. The management module 10 and the memory mounting modules 20 and 30 are connected by a bus 40 in the apparatus rack.

  3 illustrates the apparatus rack 100 in FIG. 2 as an example, but in the apparatus rack 300 in FIG. 2, the management module 10 and the four memory mounting modules 10 b to 50 b are connected to the bus 40. Of course, the embodiment of the present invention may have a configuration in which five or more memory mounting modules are mounted in one device rack. That is, in the first embodiment, n (an integer of 2 or more) memory-mounted modules may be connected to the management module 10 via the bus 40.

  A first embodiment will be described with reference to FIGS.

  The first embodiment is a communication device that realizes different functions in units of device racks, and that each memory-mounted module mounted in the same device rack realizes the same functions. In other words, each equipment rack is equipped with a number of memory-equipped modules that can continue the functions provided by the equipment rack at a certain service level during the time when the load processed by the communication equipment is the largest. Yes. In the first embodiment, when the communication device has a small processing load and it is not necessary to use all of the mounted memory mounted modules, the specific memory mounted module is left and other memory mounted modules are not used. Perform power saving mode operation to turn off the power. When entering the power saving mode, the management module transfers the contents of the management memory accumulated corresponding to the memory-mounted module to be turned off to a specific memory-mounted module. The specific memory-mounted module takes over the contents of the management memory accumulated corresponding to the transferred other memory-mounted module, and the functions of the other memory-mounted modules continue. In other words, in addition to the operation of the own memory mounting module, the specific memory mounting module continues the operation inherited from the other memory mounting module.

  In order to simplify the description, the first implementation will be described by taking as an example a configuration in which the apparatus rack 100 of FIG. 2, that is, the two memory mounting modules 20 and 30 shown in FIG. 3 are connected to the management module 20 via the bus 40. A form is demonstrated.

  4 to 6 are block configuration diagrams showing configurations of the memory-mounted module and the management module in the first embodiment. FIG. 4 shows the configuration of the memory mounting module 20. FIG. 5 shows the configuration of the management module 10. FIG. 6 shows the configuration of the memory mounting module 30.

  The memory mounting module 20 shown in FIG. 4 and the memory mounting module 30 shown in FIG. 6 are different in operation in the power saving mode. In this description, a module that is powered off in the power saving mode will be described as a memory-mounted module 20, and a module that continues to operate will be described as a memory-mounted module 30. That is, the specific memory-mounted module described above will be described as the memory-mounted module 30, and the other memory-mounted modules will be described as the memory-mounted module 20.

  With reference to FIG. 4, the configuration of the memory-mounted module 20 will be described. As a configuration other than that described with reference to FIG. 3, the memory-mounted module 20 includes a write-back buffer 204 and a power supply control unit 205. The write back buffer 204 is a buffer memory used during a write back operation for writing back the contents of the cache memory 202 to the main memory 203. The write back operation is a processing operation performed when the CPU 201 issues a cache flush instruction.

  When the cache memory 202 is used in the write back mode, the contents of the cache memory 202 and the contents of the main memory 203 do not match. When the CPU 201 issues a cache flush instruction and writes back the contents of the cache memory 202 to the main memory 203, the contents of both coincide. In the present embodiment, the CPU 201 issues a cache flush instruction periodically.

  The main memory 203 has a specific area in addition to the normal memory data area. When a write-back operation is performed, the contents of the cache memory 202 are written to the corresponding physical address of the main memory 203 via the write-back buffer 204 and at the same time are written to this specific area. At this time, data written to the specific area is written together with address identification information that can identify a physical address to be originally written in the main memory.

  That is, the contents of the cache memory 203 are written into two areas of the main memory 203 during the write back operation of this embodiment. The two areas are a physical address of the main memory when read as a cache memory and a specific area.

  The power control unit 205 performs power control to turn off the power of the memory module 20 in the power saving mode (power off) or to turn on the power of the memory module 20 when the normal mode is restored (power on). It is a device to perform.

  Next, the configuration of the management module 10 will be described with reference to FIG.

  The management module 10 includes a memory management / power control unit 101 and a management memory 102.

  The memory management / power supply control means 101 periodically performs a read operation from a specific area on the main memory of the memory-mounted module via the bus 40 to read the memory contents written in the specific area. Then, the memory management / power control unit 101 performs control to write into the storage area corresponding to the memory-mounted module read out from the management memory 102. A storage area A of the management memory 102 shown in FIG. 5 is a storage area corresponding to the memory mounted module 20, and a storage area B indicates a storage area corresponding to the memory mounted module 30.

  As described above, the memory management / power control means 101 performs control to periodically write the memory contents of the specific area on the main memory of the memory-mounted module to the storage area corresponding to the memory-mounted module of the management memory. The data read from the specific area on the main memory of the memory-mounted module and written to the management memory is data written back from the cache memory and includes the address identification information described above. Therefore, the data written in the management memory can identify the corresponding memory-mounted module by the storage area, and can identify the corresponding physical address of the main memory by the identification information in each data. .

  Further, the memory management / power control means 101 receives the report of the memory usage of the CPU of each memory mounted module, and controls the transition from the normal mode to the power saving mode and the return from the power saving mode to the normal mode. . These controls will be described later.

  Next, the memory mounting module 30 will be described with reference to FIG. FIG. 6 is a block configuration diagram showing the configuration of the memory mounting module 30. The device configuration of the memory mounting module 30 is the same as the device configuration of the memory mounting module 20, but the usage of the main memory 303 is different.

  The main memory 303 includes a work area in addition to the specific area described above, in addition to the normal memory data area. The work area is an area for writing the memory contents of the storage area of the management memory corresponding to the memory-mounted module whose power is turned off in the power saving mode described later.

  In FIG. 6, as shown as work area A, the contents of storage area A of management memory 102 in FIG. 5 are transferred to work area A in the power saving mode. The storage area A is a storage area corresponding to the memory-mounted module 20. Therefore, the data written in a specific memory-mounted module can identify the corresponding memory-mounted module by the work area, and the corresponding physical address of the main memory is identified by the identification information in each data. be able to.

  Although the configuration of each module in the first embodiment has been described above, the module in which power is cut off in the power saving mode may be referred to as the memory mounted module 30, and the module that continues to operate may be referred to as the memory mounted module 20. In this case, the memory mounting module 20 has the configuration shown in FIG. 6, and the memory mounting module 30 has the configuration shown in FIG.

  Here, the size of the specific area of the main memory, the work area, and the storage area corresponding to the memory-mounted module of the management memory 102 will be described.

  First, the size of the specific area of the main memory is determined according to the frequency of the cache flush instruction periodically issued by the CPU and the frequency of reading by the management module 10. In other words, the size of the specific area includes the data amount in which the size of each data size of the cache memory to be written back plus the address identification information size is accumulated, and the data amount that the management module 10 reads out. You should decide by balance. For example, when the write-back frequency is high and the read frequency of the management module 10 is low, the size of the specific area needs to be increased. On the contrary, when the write back frequency is low and the management module 10 reads frequently, the size of the specific area may be small.

  In addition, the size of the storage area corresponding to each memory-mounted module in the management memory needs to be a size capable of storing a data amount that can continue operation when the power saving mode is entered. As a memory space of the CPU, for example, if it is necessary to store a data amount corresponding to 5-6 pages, it is assumed that 4K bytes per page is 24K bytes, and the size of additional information is added to 30K bytes. The area size is exemplified. Therefore, the management memory requires a storage area of 30 Kbytes as many as the number of target memory modules. Note that the above is an example, and it is added that the numerical value varies depending on various conditions.

  The work area of the main memory is used as an area for transferring data of other memory mounted modules stored in the storage area corresponding to the memory mounted module of the management memory described above in the power saving mode. Accordingly, the size of the work area requires the size of the storage area corresponding to each memory mounted module in the management memory by the number of other memory mounted modules to be transferred.

  Next, the operation of the first embodiment will be described.

  FIG. 7 is a flowchart showing a data write operation to the management memory according to the embodiment of the present invention. That is, the flowchart of FIG. 7 shows operations common to the first embodiment and second and third embodiments described later.

  In this operation, the management module 10 shown in FIG. 3 reads the contents of the cache memory written back to the specific area of the main memory of each of the memory-mounted modules 20 and 30, and the storage area corresponding to the memory-mounted module in the management memory 102 It is an operation to write to. This operation is performed by the memory management / power control unit 101 of the management module 10.

  As described above, in each memory-mounted module, the CPU periodically issues a cache flush instruction, and a write-back operation is performed each time. The contents of the cache memory are written back to the memory data area of the main memory by the write back operation and simultaneously written to the specific area. The data written to the specific area at this time includes address identification information that can identify the physical address of the memory data area to be written back, in addition to the contents of the cache memory.

  The memory management / power supply control means 101 periodically reads the contents of the cache memory written back to the specific area of the main memory from each memory mounted module, and accumulates the management memory corresponding to the memory mounted module. Accumulate in the area.

  This process is started periodically. The first step S701 that is periodically activated is an operation for initially setting the number of modules with memory. That is, the memory management / power supply control means 101 designates the maximum value N of the number of target memory-equipped modules as 2 and designates the memory-equipped module number n to be processed first as 1 and starts the operation.

  Step S702 is an operation in which the memory management / power supply control means 101 reads the contents of the cache memory written back to the specific area of the specified memory-mounted module and writes them in the storage area of the management memory 102 corresponding to the memory-mounted module. is there. That is, the memory management / power control means 101 reads the contents of the cache memory written back from the specific area of the main memory 203 in FIG. Then, the memory management / power supply control means 101 takes the contents of the cache memory into the management module 10 via the bus 40 and writes it in the storage area A corresponding to the memory mounting module 20 of the management memory 102 in FIG.

  In step S703, n is incremented (n is set to 2) in order to specify the memory-mounted module number to be processed next.

  In step S704, it is determined whether the processing has been completed up to the maximum value N of the number of modules with memory. Since N = 2 and n = 2, the condition of N <n is not satisfied (S704, NO), and the process returns to step S702.

  In this step S702, since n = 2, the process is executed for the second memory-mounted module. That is, the memory management / power control unit 101 reads the contents of the cache memory written back from the specific area of the main memory 303 in FIG. Then, the memory management / power supply control means 101 takes the contents of the cache memory into the management module 10 via the bus 40 and writes it in the storage area B corresponding to the memory mounting module 30 of the management memory 102 in FIG.

  Proceeding to the next process, in this step S703, n is incremented to n = 3. Therefore, in the subsequent determination in step S704, since N = 2 and n = 3, the condition of N <n is satisfied (S704, YES). That is, since the processing has been completed up to the maximum value N of the number of modules with memory, the processing in this cycle ends.

  As described above, the memory management / power control unit 101 reads the contents of the cache memory written back to the specific area of each memory mounted module, and is designated for the memory mounted module in the management memory 102. The operation of writing to the accumulation area is periodically executed. With this operation, the latest data processed by the CPU of each memory mounted module is sequentially written in the corresponding storage area of each memory mounted module in the management memory 102. Each data in the storage area is associated with an address in the management memory based on address identification information that identifies a physical address of the main memory of each memory-mounted module. For example, each time the memory management / power supply control means 101 writes to the management memory, the memory management / power supply control means 101 performs the writing after performing sorting according to the physical address of the main memory of the memory-mounted module. Therefore, data with the same physical address is overwritten by data to be written later. Further, when the corresponding area of each memory module is full, the oldest data is overwritten with new data.

  Next, operations for determining the transition to the power saving mode and the return from the power saving mode to the normal mode according to the first embodiment will be described with reference to FIG.

  FIG. 8 is a flowchart illustrating operations for determining the transition to the power saving mode and the return from the power saving mode to the normal mode according to the first embodiment.

  The memory management / power control means 101 of the management module 10 periodically checks the memory usage status of the CPU of each memory-mounted module in the normal mode, and determines whether or not it is necessary to shift to the operation in the power saving mode. . Further, the memory management / power control means 101 periodically checks the memory usage status of the CPU of a specific memory-equipped module in the power saving mode, and determines whether or not it is necessary to return to the normal mode operation. This process is started periodically.

  The normal mode refers to an operation in a state where all the power sources of the memory mounted modules are on and each memory mounted module is processing. The power saving mode refers to an operation in a state where only a specific memory-equipped module is powered on and other memory-equipped modules are powered off. In the power saving mode, the specific memory mounted module is in a state where processing of other memory mounted modules is continued.

  When periodically activated, the memory management / power supply control means 101 identifies which mode is currently operating in step S801. As will be described later, the memory management / power control unit 101 has a power saving mode flag. In the power saving mode, the power saving mode flag is set to on, and in the normal mode, the power saving mode flag is set to off. ing. Therefore, the memory management / power control unit 101 can identify the current operation mode by identifying the setting state of the power saving mode flag.

  If the current operation mode is the normal mode (S801, NO), the memory management / power supply control means 101 starts an operation for checking the memory usage status of the CPU of each memory-mounted module in operation.

  Step S802 is an operation for initially setting the number of memory-mounted modules. That is, the memory management / power supply control means 101 designates the maximum value N of the number of target memory-equipped modules as 2 and designates the memory-equipped module number n to be processed first as 1 and starts the operation.

  In step S803, a command for reporting the memory usage amount to the CPU of the designated memory-equipped module 20 is issued. The CPU that has received the memory usage report command via the bus 40 reports the memory amount currently used by the CPU to the memory management / power control means 101. The memory management / power supply control means 101 stores the memory usage corresponding to the memory-mounted module 20 of the CPU that has received the report.

  In step S804, n is incremented (n is set to 2) in order to specify the memory-mounted module number to be processed next.

  In step S805, it is determined whether the processing has been completed up to the maximum value N of the number of modules with memory. Since N = 2 and n = 2, the condition of N <n is not satisfied (S805, NO), and the process returns to step S803.

  In this step S803, since n = 2, the process is executed for the second memory-mounted module. That is, the memory management / power supply control unit 101 issues a command for causing the CPU of the memory-mounted module 30 to report the amount of memory used. The CPU that has received the memory usage report command via the bus 40 reports the memory amount currently used by the CPU to the memory management / power control means 101. The memory management / power supply control means 101 stores the memory usage amount corresponding to the memory-equipped module 30 of the CPU that has received the report.

  Proceeding to the next process, in this step S804, n is incremented to n = 3. Therefore, in the subsequent determination in step S805, since N = 2 and n = 3, the condition of N <n is satisfied (S805, YES). That is, since the processing is completed up to the maximum value N of the number of modules with memory, the processing for checking the memory usage status of the CPU in this cycle ends.

  Next, in step S806, the memory management / power control unit 101 determines whether or not it is necessary to shift to the power saving mode. That is, the memory management / power control unit 101 determines whether or not to shift from the normal mode to the power saving mode based on the memory usage of each CPU acquired in the processing from step S802 to step S805.

  In this embodiment, the transition from the normal mode to the power saving mode is performed when the total value of the memory usage of each CPU greatly falls below the mounting capacity of the main memory. In the present embodiment, when the total memory usage amount of each CPU falls below 60% of the main memory mounting capacity, the normal mode is shifted to the power saving mode. However, this numerical value of 60% may be arbitrarily defined within a range not exceeding the mounting capacity of the main memory.

  If it is determined in step S806 that the total memory usage of each CPU does not fall below 60% of the main memory mounting capacity (NO in S806), the memory management / power control unit 101 performs the operation in the normal mode. The processing in this cycle is ended as continuing.

  On the other hand, if it is determined in step S806 that the total memory usage of each CPU is less than 60% of the main memory mounting capacity (YES in S806), the memory management / power control means 101 determines that the power saving Start the operation to enter the mode. The operation for shifting to the power saving mode will be described later with reference to FIG.

  The above is the determination operation until the transition from the normal mode to the power saving mode in the first embodiment.

  Next, with reference to FIG. 8, an operation for determining whether to return from the power saving mode to the normal mode will be described.

  If it is determined in step S801 that the current operation mode is the power saving mode (S801, YES), the memory management / power control unit 101 checks the memory usage status of the CPU of the specific memory-mounted module in operation. Start operation.

  In step S807, the memory management / power supply control unit 101 issues a command for reporting the memory usage to the CPU of a specific memory-equipped module operating in the power saving mode. The CPU that has received the memory usage report command via the bus 40 reports the memory amount currently used by the CPU to the memory management / power control means 101. The memory management / power control means 101 stores the memory usage amount in correspondence with the specific memory module number of the CPU that has received the report.

  The memory management / power control unit 101 determines whether or not it is necessary to return from the power saving mode to the normal mode based on the memory usage of the CPU of the specific memory-equipped module acquired in step S807.

  In the present embodiment, when the memory usage of the CPU of a specific memory-equipped module approaches the mounting capacity of the main memory, the return from the power saving mode to the normal mode is performed. In the present embodiment, the CPU returns to the normal mode from the power saving mode when the memory usage of the CPU of the specific memory mounting module exceeds 80% of the mounting capacity of the main memory. However, this numerical value of 80% may be arbitrarily defined within a range not exceeding the mounting capacity of the main memory.

  If it is determined in step S808 that the memory usage of the CPU of the specific memory module does not exceed 80% of the main memory mounting capacity (NO in S808), the memory management / power control means 101 is in the power saving mode. The processing in this cycle is terminated as the operation of is continued.

  On the other hand, if it is determined in step S808 that the memory usage of the CPU of the specific memory module exceeds 80% of the main memory mounting capacity (YES in S808), the memory management / power control means 101 The operation to return to the mode is started. The operation for shifting to the normal mode will be described later with reference to FIG.

  The above is the determination operation until the normal mode is restored from the power saving mode in the first embodiment.

  Next, an operation of shifting to the power saving mode that is executed when it is determined that it is necessary to shift from the normal mode to the power saving mode as described above will be described.

  FIG. 9 is a flowchart illustrating an operation of shifting to the power saving mode according to the first embodiment. If it is determined in step S806 in FIG. 8 that the transition from the normal mode to the power saving mode is necessary, the memory management / power control unit 101 starts the processing operation illustrated in FIG. In step S901, the memory management / power control unit 101 determines which memory-mounted module is designated as a specific memory-mounted module.

  In this embodiment, it is determined based on the memory usage value of each CPU collected in the processing from step S802 to step S805 in FIG. In the present embodiment, the memory management / power supply control unit 101 designates a memory-mounted module having the largest CPU memory usage value as a specific memory-mounted module. For example, it is assumed that the memory mounting module 30 is designated as a specific memory mounting module.

  Note that this specific memory module may be arbitrarily determined. Even when determining based on the value of the memory usage of each CPU, the memory mounting module having the smallest CPU memory usage value may be designated as a specific memory mounting module. Further, when there are three or more memory-mounted modules, a memory-mounted module having an intermediate CPU memory usage value may be designated as a specific memory-mounted module. Furthermore, the same memory mounting module may always be designated as a specific memory mounting module without being determined based on the value of the memory usage of each CPU. Further, a specific memory mounting module may be specified in a certain order or randomly without being determined based on the value of the memory usage of each CPU.

  In step S902, the memory management / power control unit 101 transfers the data of each memory mounted module stored in the storage area corresponding to the memory mounted module in the management memory 102 to the work area of the specific memory mounted module. As described above, this data is data in which the contents of the cache memory used by the CPU are always accumulated in the latest state.

  For example, when the memory-mounted module 30 is designated as a specific memory-mounted module, the memory management / power control unit 101 transfers the data in the storage area corresponding to the memory-mounted module 20 to the work area of the memory-mounted module 30. Each data written in the work area is associated with an address in the work area based on address identification information for identifying the physical address of the main memory of each memory-mounted module. That is, each data corresponding to the memory mounted module 20 written in the work area of the main memory 303 of the memory mounted module 30 maintains the correspondence between the address in the work area and the physical address of the main memory 203.

  When the memory management / power supply control means 101 transfers the data of another memory mounted module to the work area of the specific memory mounted module, in step S903, the memory management / power supply control means 101 sends a restart instruction to the specific memory mounted module. Subsequently, in step S904, the memory management / power control unit 101 sends a power-off instruction to another memory-mounted module.

  The specific memory-equipped module that has received the restart instruction executes the restart process of the CPU, incorporates the data transferred to the work area into the memory space of the CPU, and restarts the process. On the other hand, for other memory-mounted modules that have received a power-off instruction, the power control means turns off the power of the memory-mounted module. That is, the memory mounting module 30 takes over the data of the memory mounting module 20 and continues the processing of both the memory mounting modules 20 and 30. In the memory mounted module 20, the power control unit 205 turns off the power of the memory mounted module 20.

  With the above processing, the memory management / power control means 101 completes the transition processing from the normal mode to the power saving mode. In step S905, the memory management / power supply control unit 101 sets the power saving mode flag to ON and stores that it is operating in the power saving mode.

  The operation of the specific memory-equipped module 30 when in the power saving mode state will be described.

  The CPU 301 refers to the data incorporated in the work area of the main memory 303 and continues the process. When the CPU 301 issues a cache flush instruction and performs a write back operation, the contents of the cache memory 302 are written into the corresponding memory data area of the main memory 303 via the write back buffer 304.

  At this time, the data written in the specific memory data area of the specific memory-equipped module 30 is also written in the specific area. Then, by the operation described with reference to FIG. 7, writing is sequentially performed in the storage area corresponding to the memory mounting module 30 of the management memory 102 of the management module 10.

  On the other hand, when the write-back operation is performed on the data transferred to the work area of the memory-mounted module 30, writing is performed on the work area as it is.

  In this way, even when operating in the power saving mode state, when the CPU 301 uses data corresponding to each memory mounted module in the cache memory, the latest data is sequentially updated and accumulated in the corresponding work area. Going to be.

  Next, with reference to FIG. 10, an operation for returning to the normal mode that is executed when it is determined that it is necessary to return to the normal mode from the power saving mode will be described.

  FIG. 10 is a flowchart illustrating an operation for returning from the power saving mode to the normal mode according to the first embodiment. If it is determined in step S808 in FIG. 8 that it is necessary to shift from the power saving mode to the normal mode, the memory management / power control unit 101 starts the processing operation shown in FIG.

  In step S1001, the memory management / power control unit 101 instructs the memory-mounted module whose power is set to off in the power saving mode to turn on the power. The power control means of the memory-mounted module that has received the power-on instruction via the bus 40 turns on the power in the memory-mounted module.

  Subsequently, the memory management / power control unit 101 transfers the accumulated data in the cache memory corresponding to the other memory mounted module from the work area of the specific memory mounted module to the other memory mounted module via the management memory. To do. That is, the memory management / power supply control unit 101 reads the stored data in the cache memory corresponding to the other memory mounted module updated in the work area and writes it in the storage area corresponding to each memory mounted module in the management memory 102. Then, the memory management / power control means 101 transfers the respective data to the corresponding memory-mounted module. These processes are performed in step S1002.

  Next, in step S1003, the memory management / power control unit 101 instructs the memory-mounted module whose power is newly turned on to start the CPU.

  In the memory-mounted module in which the power is newly turned on, the data transferred from the management module 10 is overwritten on the corresponding address in the main memory. When the CPU activation instruction is received from the management module 10, the CPU is activated, and the process is resumed based on the newly overwritten main memory data.

  In step S1004, the memory management / power control unit 101 sets the power saving flag to OFF, and completes the process of returning from the power saving mode to the normal mode.

  As described above, in the first embodiment, different functions are realized in units of equipment racks, and each memory-mounted module mounted in the same equipment rack is an apparatus that realizes the same functions. . Each device rack is equipped with a number of memory-mounted modules that can continue the functions provided by the device rack at a constant service level during the time when the load processed by the device is the largest. . Therefore, when there is little processing load and it is not necessary to use all installed memory modules, leave the specific memory module and operate in the power saving mode in which the power of other memory modules is turned off. Can do. In addition, since the latest cache memory accumulated data used by the memory-equipped module that turns off the power is transferred to the specific memory-equipped module, the specific memory-equipped module must continue the functions of the other memory-equipped modules. Can do.

  In the first embodiment, in order to simplify the description, the case where two memory mounting modules are mounted has been described as an example. However, the present invention is not limited to this configuration, and any configuration may be used as long as at least two memory mounting modules are connected to the management module.

  In addition, when there are a large number of target memory-mounted modules, the number of specific memory-mounted modules that do not turn off the power is not limited to one and may be plural. In this case, the management module designates any multiple memory modules as specific memory modules and manages the correspondence with other memory modules that transfer data to each specific memory module. Good. In other words, the management module manages the correspondence relationship between the physical address of the main memory of each memory-equipped module and the physical address of the main memory of the specific memory-equipped module at the transfer destination, thereby shifting to each mode of this embodiment. Control becomes possible.

  Furthermore, the present embodiment may be configured for a plurality of device racks as long as the mounted memory-mounted module provides the same function. In this case, by installing a management module for each device rack and exchanging information between the management modules, it is possible to perform control similar to the operation when the device rack is one unit between the device racks.

  Next, a second embodiment will be described with reference to FIGS. The same configuration as that of the first embodiment will be described with reference to those drawings.

  The second embodiment is a communication apparatus in which a memory-mounted module that provides different functions is mounted on an apparatus rack. The second embodiment performs the power saving mode operation in which the memory of the memory mounted module is turned off when the load on the memory mounted module is small and it is not necessary to use all the mounted memories. The memory-mounted module set in the power saving mode of the second embodiment continues processing by taking over the latest cache memory contents stored in the storage area corresponding to the memory-mounted module of the management module.

  FIG. 2 is also applied to the second embodiment.

  However, in the second embodiment, the memory mounting modules 10, 20, 10 a to 40 a, and 10 b to 50 b mounted on each device rack shown in FIG. 2 are device modules that realize different functions.

  The second embodiment is realized in a form in which at least one memory mounting module and a management module are connected. That is, the second embodiment can be realized by one memory mounting module having a configuration shown in FIG. 11 described later and a management module.

  However, in order to make the description easy to understand, the second embodiment will be described by taking as an example a configuration in which the apparatus rack 100 of FIG. 2, that is, the two memory mounting modules 20 and 30 are connected to the management module 20.

  The management module 10 in the second embodiment has the same configuration as the management module described with reference to FIG. 5 of the first embodiment. Therefore, the second embodiment will be described with reference to the connection form of FIG. 3 described in the first embodiment.

  FIG. 11 shows the configuration of the memory-mounted module in the second embodiment.

  FIG. 11 is a block configuration diagram illustrating a configuration of a memory-mounted module according to the second embodiment.

  The configuration different from that of the first embodiment is that a memory switching unit 206 is provided, and that the target for which the power control unit 205 performs power on / off control is limited to the main memory 203. Other configurations are the same as those of the memory-mounted module of the first embodiment described with reference to FIG.

  The memory switching unit 206 has a function of switching between a memory used in the normal mode and a memory used when the power saving mode is set. That is, in the normal mode, the memory switching unit 206 connects the access path of the cache memory to the path for accessing the main memory. In the power saving mode, the memory switching unit 206 switches the access path of the cache memory to a path for accessing the management memory.

  FIG. 7 is a flowchart showing the operation of writing the contents of the cache memory into the management memory 102, and is the same as the operation described in the first embodiment.

  This operation is an operation in which the management module 10 shown in FIG. 3 reads the contents of the accumulated cache memory from the main memories of the memory-mounted modules 20 and 30 and writes them in the storage area of the management memory 102 corresponding to the memory-mounted module. It is. This operation is performed by the memory management / power control unit 101 of the management module 10.

  As described in the first embodiment, in each memory-mounted module, the contents of the cache memory are written back to the memory data area of the main memory by the write back operation and simultaneously written to the specific area. At this time, the data written to the specific area includes address identification information that can identify the original physical address of the memory data area to be written back, in addition to the contents of the cache memory.

  The memory management / power control means 101 periodically reads the contents of the cache memory stored in the specific area from each memory mounted module and stores them in the storage area of the management memory 102 corresponding to the memory mounted module. To do. Since the detailed operation of FIG. 6 has been described in the first embodiment, the description thereof is omitted here.

  The memory management / power control unit 101 periodically executes the operation shown in FIG. With this operation, the latest data processed by the CPU of each memory mounted module is sequentially written in the corresponding storage area of each memory mounted module in the management memory 102. Each data in the storage area is associated with an address in the management memory based on address identification information that identifies a physical address of the main memory of each memory-mounted module. For example, each time the memory management / power supply control means 101 writes to the management memory, the memory management / power supply control means 101 performs the writing after performing sorting according to the physical address of the main memory of the memory-mounted module. Therefore, data with the same physical address is overwritten by data to be written later. Further, when the corresponding area of each memory module is full, the oldest data is overwritten with new data.

  The concept described in the first embodiment may be applied to the specific area of the main memory and the size of the storage area of the management memory corresponding to the memory mounting module.

  In other words, the size of the specific area of the main memory is determined according to the frequency of the cache flush instruction that is periodically issued by the CPU and the frequency of reading by the management module. In other words, the size of the specific area includes the data amount in which the size of each data size of the cache memory to be written back plus the address identification information size is accumulated, and the data amount that the management module 10 reads out. You should decide by balance. For example, when the write-back frequency is high and the read frequency of the management module 10 is low, the size of the specific area needs to be increased. On the contrary, when the write back frequency is low and the management module 10 reads frequently, the size of the specific area may be small.

  In addition, the size of the storage area corresponding to each memory-mounted module in the management memory needs to be a size capable of storing a data amount that can continue operation when the power saving mode is entered. As a memory space of the CPU, for example, if it is necessary to store a data amount corresponding to 5-6 pages, it is assumed that 4K bytes per page is 24K bytes, and the size of additional information is added to 30K bytes. The area size is exemplified. Therefore, the management memory requires a storage area of 30 Kbytes as many as the number of target memory modules.

  It should be noted that the above is an example, and the numerical value changes depending on various conditions. In particular, in the second embodiment, unlike the first embodiment, it is not necessary to transfer the contents of the storage area corresponding to each memory mounted module in the management memory to a specific memory mounted module. For this reason, the capacity of the storage area of the management memory corresponding to each memory-mounted module may be larger than the capacity determined by the concept of the first embodiment.

  Next, the operation of the second embodiment will be described with reference to FIGS.

  FIG. 12 is a flowchart illustrating an operation of determining the transition to the power saving mode and the return from the power saving mode to the normal mode according to the second embodiment. This operation is performed by the memory management / power control unit 101 of the management module 10.

  The memory management / power supply control means 101 periodically checks the memory usage status of the CPU of each memory mounted module and determines whether or not the operation mode of each memory mounted module needs to be changed. That is, in the second embodiment, it is determined whether it is necessary to change the operation mode for each memory-mounted module from the normal mode to the power saving mode and from the power saving mode to the normal mode. This process is started periodically.

  Note that the normal mode in the second embodiment refers to an operation in a state where the power of the main memory of the memory-equipped module is on and the CPU performs processing using the data of the main memory of the module. The power saving mode in the second embodiment is a process in which the CPU uses data stored in the storage area corresponding to the memory mounted module in the management memory when the main memory of the memory mounted module is turned off. The operation in the state of doing.

  When periodically activated, the memory management / power control unit 101 performs an operation of initially setting the number of memory-mounted modules to be subjected to determination processing in step S1201. That is, the memory management / power supply control means 101 designates the maximum value N of the number of target memory-equipped modules as 2 and designates the memory-equipped module number n to be processed first as 1 and starts the operation.

  First, in step S1202, the memory management / power control unit 101 issues a command for reporting the memory usage amount to the CPU of the memory-equipped module 20 designated as the determination target. The CPU that has received the memory usage report command via the bus 40 reports the memory amount currently used by the CPU to the memory management / power control means 101.

  Next, in step S1203, the memory management / power control unit 101 identifies in which mode the specified memory-mounted module is currently operating. As will be described later, the memory management / power control unit 101 has a power saving mode flag for each memory-mounted module, and the power saving mode flag is set to ON in the power saving mode, and the power saving mode flag in the normal mode. Is set to off. Therefore, the memory management / power control unit 101 can identify the current operation mode for each memory-mounted module by identifying the setting state of the power saving mode flag.

  If the current operation mode is the normal mode (S1203, NO), the memory management / power supply control unit 101 determines whether or not to shift to the power saving mode in step S1204. That is, the memory management / power control unit 101 determines whether or not to shift from the normal mode to the power saving mode based on the memory usage of the CPU acquired in the process of step S1202.

  In this embodiment, when the memory usage amount of the CPU falls below the data storage amount (usage amount) of the storage area corresponding to the memory-mounted module in the management memory 102 of the management module 10, the transition from the normal mode to the power saving mode is performed. Done. In this embodiment, when the memory usage of the CPU falls below 60% of the usage of the storage area corresponding to the memory-mounted module in the management memory 102, the normal mode is shifted to the power saving mode. The value of 60% may be set arbitrarily.

  If it is determined in step S1204 that the memory usage of the CPU does not fall below 60% of the usage of the storage area corresponding to the memory-mounted module in the management memory 102 (S1204, NO), the memory management / power control means 101 The memory-mounted module is determined to continue the normal mode. In step S1205, the memory management / power control unit 101 increments n (n is set to 2) in order to specify the next memory-mounted module to be determined.

  On the other hand, if it is determined in step S1204 that the memory usage of the CPU is less than 60% of the memory usage area of the management memory 102 (S1204, YES), the memory management / power control means 101 Determines that the memory-mounted module shifts to the power saving mode. If it is determined to shift to the power saving mode, the memory management / power control unit 101 activates another task for performing the shifting operation to the power saving mode shown in FIG. 13 in step S1208. In step S1205, the memory management / power control unit 101 increments n (n is set to 2) to designate the next memory-mounted module to be determined.

  In step S1206, the memory management / power control unit 101 determines whether the processing has been completed up to the maximum value N of the number of modules with memory. Since N = 2 and n = 2, the condition of N <n is not satisfied (S1206, NO), and the process returns to step S1102.

  The memory management / power control unit 101 executes the above-described processing from step S1202 to step S1204 for the second memory-mounted module specified by n = 2.

  When the processing for the second memory mounted module specified by n = 2 is completed, the memory management / power control unit 101 increments n in order to specify the next memory mounted module to be determined in step S1205. To do. At this time, n is set to 3. In the subsequent determination in step S1206, since N = 2 and n = 3, the condition of N <n is satisfied (S1206, YES). That is, since the processing has been completed up to the maximum value N of the number of modules with memory, the memory management / power control unit 101 ends the operation mode transition determination processing in this cycle.

  The above is the determination operation until the transition from the normal mode to the power saving mode in the second embodiment.

  Next, with reference to FIG. 12, an operation for determining whether to return from the power saving mode to the normal mode will be described.

  If it is determined in step S1203 that the determination target memory mounted module is in the power saving mode (YES in S1203), the memory management / power control unit 101 determines whether or not it is necessary to return to the normal mode in step S1207. To do. That is, the memory management / power supply control unit 101 determines whether or not it is necessary to return from the power saving mode to the normal mode based on the CPU memory usage acquired in step S1202.

  In this embodiment, when the memory usage of the CPU of the memory-mounted module exceeds 80% of the usage of the storage area corresponding to the memory-mounted module in the management memory 102, the power saving mode is returned to the normal mode. . The value of 80% may be set arbitrarily.

  If it is determined in step S1207 that the memory usage of the CPU of the memory-mounted module does not exceed 80% of the usage of the area corresponding to the memory-mounted module in the management memory 102 (S1207, NO), the memory management / power control means 101 Determines to continue the operation in the power saving mode. Then, the memory management / power control unit 101 ends the determination process for the memory-mounted module, proceeds to step S1205, and designates the next memory-mounted module.

  On the other hand, if it is determined in step S1207 that the memory usage of the CPU of the memory-mounted module exceeds 80% of the usage of the area corresponding to the memory-mounted module in the management memory 102 (S1207, YES), the memory management / power supply The control means 101 determines to return to the normal mode. If it is determined to return to the normal mode, the memory management / power control unit 101 activates another task for performing the return operation to the normal mode shown in FIG. 14 in step S1209. Then, the memory management / power control unit 101 ends the determination process for the memory-mounted module, proceeds to step S1105, and designates the next memory-mounted module.

  The determination operation until the return from the power saving mode to the normal mode in the second embodiment has been described above.

  Next, an operation of shifting to the power saving mode that is executed when it is determined that it is necessary to shift from the normal mode to the power saving mode as described above will be described.

  FIG. 13 is a flowchart illustrating an operation of shifting to the power saving mode according to the second embodiment. If it is determined in step S1204 in FIG. 12 that the transition from the normal mode to the power saving mode is necessary, the memory management / power control unit 101 activates another task and executes the process shown in FIG.

  In step S1301, the memory management / power control unit 101 identifies a memory-mounted module to be transferred to the power saving mode. This identification information is given as an interface condition when the task is activated.

  In step S1302, the memory management / power control unit 101 sends a memory switching instruction to the identified memory-mounted module.

  Upon receiving a memory switching instruction from the management module 10 via the bus 40, the memory switching unit 206 of the memory-mounted module shown in FIG. 11 switches the connection from the write back buffer 204 from the main memory 203 side to the bus 40 side. By this switching, the memory access in the module is performed on the memory data in the storage area corresponding to the memory-mounted module in the management memory via the bus 40.

  In step S1303, the memory management / power control unit 101 sends a memory power-off instruction to the memory-mounted module.

  The power control unit 205 of the memory-mounted module that has received a memory power-off instruction from the management module 10 via the bus 40 sets the main memory 203 to power-off.

  With the above operation, since the shift to the power saving mode for this memory mounted module is completed, the memory management / power control means 101 sets the power saving mode flag corresponding to this memory mounted module to ON in step S1304. To finish the operation.

  The CPU of the memory mounted module that has shifted to the power saving mode takes over the memory data in the storage area corresponding to the memory mounted module of the management memory and continues the processing. At this time, the cache memory write-back by the write-back operation is performed on the memory data in the storage area corresponding to the memory-mounted module in the management memory.

  Next, the operation of returning to the normal mode that is executed when it is determined that it is necessary to return from the power saving mode to the normal mode will be described.

  FIG. 14 is a flowchart illustrating an operation of returning to the normal mode according to the second embodiment. If it is determined in step S1207 in FIG. 12 that it is necessary to return from the power saving mode to the normal mode, the memory management / power control unit 101 activates another task and executes the processing illustrated in FIG.

  In step S1401, the memory management / power control unit 101 identifies a memory-mounted module to be returned to the normal mode. This identification information is given as an interface condition when the task is activated.

  In step S1402, the memory management / power control unit 101 sends a memory power-on instruction to the identified memory-mounted module.

  The power control unit 205 of the memory-mounted module shown in FIG. 11 that has received the memory power-on instruction from the management module 10 via the bus 40 sets the power of the main memory 203 to on.

  Subsequently, in step S1403, the memory management / power control unit 101 transfers the memory data in the storage area corresponding to the memory-mounted module to the main memory 203. In the memory-mounted module in which the power supply of the main memory 203 is set to ON, the memory data transferred from the management module 10 is overwritten on the corresponding address of the main memory 203.

  In step S1404, the memory management / power control unit 101 sends a switching instruction from the memory switching unit 206 to the memory-mounted module.

  The memory switching unit 206 of the memory-mounted module that has received the memory switching instruction from the management module 10 via the bus 40 switches the connection from the write back buffer 204 from the bus 40 side to the main memory 203 side. By this switching, the memory access in the module is performed on the memory data of the main memory 203.

  As a result of the above operation, the return to the normal mode for this memory-mounted module is completed. In step S1405, the memory management / power control unit 101 sets the power-saving mode flag corresponding to this memory-mounted module to OFF. End the operation.

  As described above, the second embodiment is an apparatus in which a memory mounting module that provides different functions is mounted on an apparatus rack. The second embodiment performs a power saving mode operation in which the memory of the memory mounted module is turned off when there is little load to be processed by the memory mounted module and it is not necessary to use all of the mounted memory. . The memory-mounted module set to the power saving mode can continue processing by taking over the latest data stored in the storage area corresponding to the memory-mounted module of the management module.

  In the second embodiment, the case where two memory mounting modules are mounted has been described as an example for easy understanding. However, the present invention is not limited to this configuration, and any configuration may be used as long as at least one memory mounting module is connected to the management module. That is, in the second embodiment, even when there is one memory-mounted module, or when there are three or more modules, the transition to the power saving mode described above or the transition from the power saving mode to the normal mode is performed. Return operation is possible.

  Further, the present embodiment may be in a form that targets a plurality of equipment racks. In this case, by installing a management module for each device rack and exchanging information between the management modules, it is possible to perform control similar to the operation in the case of one device rack between the device racks.

  Next, a third embodiment will be described.

  In the third embodiment, the memory mounting module of the first embodiment and the memory mounting module of the second embodiment are mixedly mounted in an apparatus rack.

  Referring to the equipment rack 300 shown in FIG. 2, out of the four memory mounting modules mounted on the equipment rack, two are the memory mounting modules of the first embodiment, and the other two are the second implementation. A case of a memory mounted module of the form is illustrated.

  For example, the memory mounting modules 20b and 30b are the memory mounting modules of the first embodiment, respectively, and the memory mounting modules 40b and 50b are the memory mounting modules of the second embodiment. The memory mounting modules 20b and 30b are devices that each realize the same function, and the memory mounting modules 40b and 50b are devices that each realize a different function.

  Therefore, when the memory mounting modules 20b and 30b have a small processing load and it is not necessary to use both of the memory mounting modules, the power saving of cutting off the power of the other memory mounting modules while leaving one of the memory mounting modules is left. Perform mode operation. When entering the power saving mode, the management module transfers the latest accumulated data used in the memory-mounted module whose power is to be disconnected to the memory-mounted module that continues to operate. The memory-mounted module that continues to operate continues the function of the memory-mounted module that cuts off the power by taking over the latest stored data of the other memory-mounted modules that have been transferred. The configuration of the memory mounting modules 20b and 30b is the same as the configuration of the memory mounting module described with reference to FIGS.

  Further, the memory mounting modules 40b and 50b perform a power saving mode operation in which the power of the memory of the memory mounting module is turned off when the processing load is small and it is not necessary to use all the mounted memories. The memory-mounted module set in the power saving mode takes over the latest data stored in the storage area corresponding to the memory-mounted module of the management module and continues processing. The configuration of the memory mounting modules 40b and 50b is the same as the configuration of the memory mounting module described with reference to FIG.

  That is, in order to implement | achieve said operation | movement, in 3rd Embodiment, the structure of the management module 10 differs from 1st and 2nd embodiment.

  FIG. 15 is a block configuration diagram illustrating a configuration of a management module according to the third embodiment.

  In FIG. 15, the memory management / power supply control unit 111 has a configuration capable of executing both the control described in the first embodiment and the control described in the second embodiment. The memory management / power supply control unit 111 is preliminarily provided with module type information that can identify which memory-mounted module is a memory-mounted module that performs an operation corresponding to which embodiment.

  The management memory A112 is a management memory having a storage area corresponding to the memory mounting modules 20b and 30b of the first embodiment, and the management memory B112 is a storage area corresponding to the memory mounting modules 40b and 50b of the second embodiment. Is a management memory.

  As described with reference to FIG. 7, the memory management / power control unit 111 reads the contents of the cache memory accumulated in the specific area of the main memory of each memory-mounted module. Then, the memory management / power supply control unit 111 performs an operation of writing the contents of the read cache memory in the storage area corresponding to the memory-mounted module in either the management memory A 112 or the management memory B 113 according to the module type information.

  As described above, in each memory-mounted module, the CPU periodically issues a cache flush instruction, and a write-back operation is performed each time. The contents of the cache memory are written back to the memory data area of the main memory by the write back operation and simultaneously written to the specific area. The data written to the specific area at this time includes address identification information that can identify the physical address of the memory data area to be written back, in addition to the contents of the cache memory.

  The memory management / power control unit 111 periodically reads out the contents of the cache memory accumulated in this way from each memory mounted module, and accumulates them in the management memory corresponding to the module type information. Regarding this operation, the operation of the memory management / power control unit 111 other than the above operation is the same as the operation of the memory management / power control unit 101 described with reference to FIG.

  Therefore, also in the third embodiment, the latest contents of the cache memory processed by the CPU of each memory-mounted module are sequentially written in the corresponding storage areas of the memory-mounted modules of the management memory A112 and the management memory B113. . Each data in the storage area is associated with an address in the management memory based on address identification information that identifies a physical address of the main memory of each memory-mounted module. For example, each time the memory management / power supply control means 101 writes to the management memory, the memory management / power supply control means 101 performs the writing after performing sorting according to the physical address of the main memory of the memory-mounted module. Therefore, data with the same physical address is overwritten by data to be written later. Further, when the corresponding area of each memory module is full, the oldest data is overwritten with new data.

  Further, the memory management / power supply control unit 111 executes two types of operations based on the module type information regarding the operation for determining the transition to the power saving mode and the return from the power saving mode to the normal mode. That is, the determination operation described in FIG. 8 is executed for the memory mounting modules 20b and 30b corresponding to the first embodiment, and the memory mounting modules 40b and 50b corresponding to the second embodiment are illustrated in FIG. The determination operation described in 12 is executed.

  Then, the memory management / power control unit 111 performs an operation of shifting to the power saving mode and an operation of returning from the power saving mode to the normal mode in accordance with the status of each memory-mounted module. That is, the memory management / power control unit 111 executes the operations described with reference to FIGS. 9 and 10 for the memory-mounted modules 20b and 30b, and FIGS. 13 and 14 for the memory-mounted modules 40b and 50b. Perform the action described.

  Thus, also in the third embodiment, the power saving mode operation can be performed in a form corresponding to the module type information.

  In other words, the memory-mounted modules 20b and 30b have a low processing load, and when it is not necessary to use both of the memory-mounted modules, the power is saved by leaving one of the memory-mounted modules and turning off the other memory-mounted modules. Mode operation can be performed. In the power saving mode, the management module transfers the latest accumulated data used in the memory-mounted module whose power is turned off to the memory-mounted module that continues to operate. As a result, the memory-mounted module that continues to operate can continue the function of the memory-mounted module that cuts off the power supply by taking over the latest stored data of the other memory-mounted modules that have been transferred.

  Further, the memory mounting modules 40b and 50b can perform a power saving mode operation in which the power of the memory mounted modules is turned off when the processing load is small and it is not necessary to use all the mounted memories. Then, the memory mounted module set to the power saving mode can continue the process by taking over the latest data stored in the storage area corresponding to the memory mounted module of the management module.

  In the third embodiment, in order to make the explanation easy to understand, two memory mounting modules of the first embodiment and two memory mounting modules of the second embodiment are mixedly mounted in an apparatus rack. This has been described as an example. However, the present invention is not limited to this configuration, and any configuration may be used as long as at least two memory mounting modules of the first embodiment and at least one memory mounting module of the second embodiment are connected to the management module.

  The present invention can be applied not only to a communication apparatus but also to an apparatus that provides a function in units of modules mounted on an apparatus rack.

DESCRIPTION OF SYMBOLS 1 Communication apparatus 10, 10a, 10b Management module 20, 20a, 20b Memory mounting module 30, 30a, 30b Memory mounting module 40a, 40b, 50b Memory mounting module 100, 200, 300 Equipment rack 101, 111 Memory management / power control means 102 Management memory 112 Management memory A
113 Management memory B
201, 301 CPU
202, 302 Cache memory 203, 303 Main memory 204, 304 Write-back buffer 205, 305 Power control means 206 Memory switching unit

Claims (26)

A memory-mounted module including a main memory having a specific area in which the contents of the cache memory used by the CPU are written back;
A management memory is provided, and the contents of the cache memory written back to the specific area of the main memory are periodically read out and stored in the management memory, and the power saving state according to the memory usage of the CPU of the memory-equipped module And a management module including a memory management / power control means for controlling the setting of
When the memory-mounted module receives an instruction to set the power-saving state, the memory-mounted module takes over the contents of the cache memory stored in the management memory and continues the operation. Including at least two memory-mounted modules;
The memory management / power supply control means, when the total memory usage of the CPU of each of the memory-mounted modules falls below a predetermined first reference value, Transfer the contents of the accumulated cache memory of the memory-mounted module, turn off the power of the other memory-mounted module, and set the power-saving state,
When the specific memory module receives an instruction to set the power saving state, it continues the operation of the other memory module by taking over the transferred cache memory contents of the other memory module. The memory management system according to claim 1, wherein: The memory management / power control means includes each memory mounted module provided in the management memory with the contents of the cache memory written back to the specific area of the main memory periodically read from each memory mounted module. The memory management system according to claim 2, wherein the memory management system stores data in a storage area corresponding to. 4. The memory management system according to claim 3, wherein the contents of the cache memory stored in the storage area include information for specifying a physical address on a main memory of the corresponding memory-mounted module. The memory management / power supply control means stores the memory contents of the storage area corresponding to the other memory mounted module in a work area corresponding to the other memory mounted module provided in the main memory of the specific memory mounted module. Forward,
When the specific memory mounted module receives the instruction to set the power saving state, the specific memory mounted module takes over the contents of the accumulated cache memory of the other memory mounted module transferred to the work area. 5. The memory management system according to claim 4, wherein the operation is continued. The memory management / power control means turns on the power of the other memory-mounted module when the memory usage of the CPU of the specific memory-mounted module exceeds a predetermined second reference value, 6. The memory management system according to claim 5, wherein the memory contents of the work area corresponding to another memory-mounted module are transferred to a main memory of the corresponding other memory-mounted module and returned to a normal state. . 7. The memory management system according to claim 6, wherein the first reference value and the second reference value are values determined based on a main memory mounting capacity of the memory mounting module. 8. The memory management / power source control means determines the specific memory mounted module according to the memory usage of the CPU of each of the memory mounted modules. Memory management system described in 1. The memory management / power control means issues an instruction to set a power saving state to the memory-mounted module when the memory usage of the CPU of the memory-mounted module falls below a predetermined first reference value,
Upon receiving the instruction for setting the power saving state, the memory module switches the access path of the cache memory from a path for accessing the main memory to a path for accessing the management memory, and is stored in the management memory. 2. The memory management system according to claim 1, wherein the operation is continued by taking over the contents of the cache memory, and the power supply of the main memory is set to an off state. The memory management / power control means stores the contents of the cache memory periodically read from a specific area of the main memory of the memory-mounted module in a storage area corresponding to the memory-mounted module of the management memory. The memory management system according to claim 9, wherein: 11. The memory management system according to claim 10, wherein the contents of the cache memory stored in the storage area include information for specifying a physical address on a main memory of the corresponding memory-mounted module. The memory management / power control means, when the memory usage of the CPU of the memory mounted module exceeds a predetermined second reference value, instructs the memory mounted module to return to a normal state, Transfer the memory contents stored in the storage area corresponding to the memory mounted module to the memory mounted module,
When the memory-mounted module receives an instruction to return to the normal state, the memory-mounted module sets the power of the main memory to ON, and writes the memory contents stored in the transferred storage area back to the main memory. 12. The memory management system according to claim 11, wherein: 13. The first reference value and the second reference value are values determined based on a usage amount of the storage area of the management memory corresponding to the memory mounted module. Memory management system. The contents of the cache memory used by the CPU of the memory mounted module are periodically written to a specific area of the main memory of the memory mounted module,
The contents of the cache memory written back to the specific area of the main memory are periodically read and stored in the management memory of the management module,
Determining whether or not to set the power saving state according to the memory usage of the CPU of the memory-equipped module;
The memory management method according to claim 1, wherein, upon receiving an instruction to set the power saving state, the memory-mounted module takes over the contents of the cache memory stored in the management memory and continues the operation. Including at least two memory-mounted modules;
When the total memory usage of the CPU of each of the memory-mounted modules falls below a predetermined first reference value, the accumulated cache memory of other memory-mounted modules is stored in the main memory of a specific memory-mounted module Transfer the contents of the above, turn off the power of the other memory module, set to the power saving state,
When receiving the instruction to set the power saving state, the specific memory module continues the operation of the other memory module by taking over the stored cache memory contents of the other memory module transferred. The memory management method according to claim 14, wherein: The contents of the cache memory written back to the specific area of the main memory periodically read out from the respective memory mounted modules are stored in the storage areas corresponding to the respective memory mounted modules provided in the management memory. The memory management method according to claim 15. 17. The memory management method according to claim 16, wherein the contents of the cache memory stored in the storage area include information for specifying a physical address on a main memory of the corresponding memory-mounted module. The memory contents of the storage area corresponding to the other memory mounted module are transferred to the work area corresponding to the other memory mounted module provided in the main memory of the specific memory mounted module,
When receiving the instruction to set the power saving state, the specific memory-mounted module takes over the contents of the accumulated cache memory of the other memory-mounted module transferred to the work area, and the other memory-mounted module The memory management method according to claim 17, wherein the operation is continued. When the memory usage of the CPU of the specific memory-mounted module exceeds a predetermined second reference value,
Turn on the other memory module,
The memory contents of the work area corresponding to the other memory mounted module of the specific memory mounted module are transferred to the main memory of the corresponding other memory mounted module and returned to the normal state. Item 19. The memory management method according to Item 18. The memory management method according to claim 19, wherein the first reference value and the second reference value are values determined based on a mounting capacity of a main memory of the memory mounting module. The memory management method according to any one of claims 15 to 19, wherein the specific memory mounting module is determined according to a memory usage amount of a CPU of each of the memory mounting modules. When the memory usage of the CPU of the memory-mounted module falls below a predetermined first reference value, the memory-mounted module is instructed to set a power saving state,
Upon receiving an instruction to set the power saving state, the memory-mounted module
Switching the cache memory access path from the main memory access path to the management memory access path;
Continue operation by taking over the contents of the cache memory stored in the management memory,
The memory management method according to claim 14, wherein the power source of the main memory is set to an off state. The content of the cache memory periodically read from a specific area of the main memory of the memory-mounted module is stored in a storage area corresponding to the memory-mounted module of the management memory. Memory management method. 24. The memory management method according to claim 23, wherein the contents of the cache memory stored in the storage area include information for specifying a physical address on a main memory of the corresponding memory-mounted module. When the memory usage of the CPU of the memory-mounted module exceeds a predetermined second reference value,
The management module
Instructing the memory module to return to the normal state,
Transferring the memory contents stored in the storage area corresponding to the memory mounted module to the memory mounted module;
Upon receiving an instruction to return to the normal state, the memory-mounted module
Set the main memory power on,
The memory management method according to claim 24, wherein the transferred memory contents stored in the storage area are written back to the main memory. The said 1st reference value and the said 2nd reference value are the values defined based on the usage-amount of the said storage area of the said management memory corresponding to the said memory mounting module. Memory management method.

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