JP2010258268A - Solid-state imaging element, imaging device, and method of manufacturing solid-state imaging element - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a solid-state imaging element capable of restraining the occurrence of white defects effectively even when a cell size is reduced. <P>SOLUTION: The solid-state imaging element 100 in which two photoelectric conversion part arrays share one vertical charge transfer path 13 includes a readout gate 12 provided between a vertical charge transfer path 13 and each photoelectric conversion part 11 of a photoelectric conversion part array adjoining the vertical charge transfer path 13, a surface low-concentration "p" layer 23 provided on a surface of the photoelectric conversion part 11, a surface high-concentration "p" layer 22 provided on a surface of the surface low-concentration "p" layer 23 at a distance from the readout gate 12 and having a higher impurity concentration than the surface low-concentration "p" layer 23, and a p-type element isolation layer 36, the surface high-concentration "p" layer 22 extending onto a part of the element isolation layer 36 between two photoelectric conversion parts 11 adjoining each other not across the vertical charge transfer path 13. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a solid-state imaging device, an imaging apparatus, and a method for manufacturing a solid-state imaging device.

  In Patent Document 1, a CCD (Charge Coupled Device) type solid-state imaging device is formed with a relatively low-concentration p-type impurity layer on the surface of a photodiode made of n-type impurities, and this low-concentration p-type impurity layer A structure is disclosed in which a p-type impurity layer having a higher concentration than the low-concentration p-type impurity layer is formed at a position remote from the read gate.

  By using a surface shield layer that combines two concentrations of p-type impurities in this way, the voltage required to read out charges from the photodiode to the vertical charge transfer path while effectively suppressing white scratches in the pixel portion. Can be kept low.

  However, in the configuration of Patent Document 1, when the cell size is reduced, the interval between the low-concentration and high-concentration p-type impurity layers is required to be greater than a certain level. The ratio of the surface area will decrease. The lower the concentration of the surface shield layer, the lower the white scratch suppression effect. Therefore, there is a concern that white scratches may increase when the cell size is reduced.

  Patent Documents 2 and 3 disclose a solid-state imaging device having a configuration in which two photodiode arrays share one vertical charge transfer path. However, in each document, the configuration of the surface shield layer and the cell are disclosed. The problem of increasing white scratches due to size reduction is not described.

JP 2007-201088 A JP 2001-168315 A JP-A-55-160477

  The present invention has been made in view of the above circumstances, and a solid-state imaging device capable of effectively suppressing white scratches even when the cell size is reduced, an imaging device including the same, and a manufacturing method thereof The purpose is to provide.

  A solid-state imaging device according to the present invention is a solid-state imaging device having a plurality of photoelectric conversion units arranged in a column direction and a row direction perpendicular to the column direction in a semiconductor substrate, and is provided corresponding to the photoelectric conversion unit. A charge transfer path for transferring the charge generated in the photoelectric conversion unit in the column direction, and the photoelectric conversion unit and the charge transfer path corresponding to the charge transfer path. Conductivity opposite to the impurities constituting the photoelectric conversion unit provided to separate the charge reading unit for reading out to the charge transfer channel, the photoelectric conversion unit, and the photoelectric conversion unit and the charge transfer channel around the photoelectric conversion unit Type element isolation layer, a first impurity layer provided on the surface of the photoelectric conversion unit and having a conductivity type opposite to the impurities constituting the photoelectric conversion unit, and the charge readout unit on the surface of the first impurity layer Set a distance from A second impurity layer having the same conductivity type as that of the first impurity layer and having an impurity concentration higher than that of the first impurity layer, and the second impurity layer includes the second impurity layer. It extends to the direction away from the vertical charge transfer path corresponding to the formed photoelectric conversion part and is formed on the element isolation layer.

  The imaging device of the present invention includes the solid-state imaging device.

  The method for manufacturing a solid-state imaging element according to the present invention is a method for manufacturing the solid-state imaging element, wherein the first step of forming the element isolation layer and the second impurity layer are formed after the first step. And a third step of forming the transfer electrode after the second step.

  According to the present invention, it is possible to provide a solid-state imaging device capable of effectively suppressing white scratches even when the cell size is reduced, an imaging device including the same, and a manufacturing method thereof.

1 is a schematic plan view showing a schematic configuration of a solid-state imaging device for explaining an embodiment of the present invention. Partial enlarged schematic view of the solid-state imaging device shown in FIG. Schematic cross-sectional view taken along line A-A 'shown in FIG. The figure which showed the modification of the surface high concentration layer of the photoelectric conversion part of the solid-state image sensor shown in FIG. The figure which showed the modification of the surface high concentration layer of the photoelectric conversion part of the solid-state image sensor shown in FIG. The plane schematic diagram which shows another structural example of the solid-state image sensor for describing one Embodiment of this invention Partial enlarged schematic diagram of the solid-state imaging device shown in FIG. Schematic cross-sectional view taken along line B-B 'shown in FIG. The figure for demonstrating the effect of the solid-state image sensor shown in FIG. The figure which showed the modification of the surface high concentration layer of the photoelectric conversion part of the solid-state image sensor shown in FIG. The figure which showed the modification of the surface high concentration layer of the photoelectric conversion part of the solid-state image sensor shown in FIG. The figure for demonstrating the manufacturing method of the solid-state image sensor shown in FIG. The plane schematic diagram which shows another structural example of the solid-state image sensor for describing one Embodiment of this invention Partial enlarged schematic diagram of the solid-state imaging device shown in FIG. Schematic cross-sectional view taken along line C-C 'shown in FIG. The figure explaining the structure of the solid-state image sensor of a reference example A plan view schematically showing a part of a solid-state image sensor of a reference example FIG. 17 is a cross-sectional view taken along line H-H ′ of FIG. Diagram explaining the impurity distribution and ion implantation direction of a photodiode The top view which shows the other structural example of the solid-state image sensor of a reference example The top view which shows the other structural example of the solid-state image sensor of a reference example

  Embodiments of the present invention will be described below with reference to the drawings.

  FIG. 1 is a schematic plan view of a solid-state imaging device for explaining an embodiment of the present invention. The solid-state imaging device is used by being mounted on an imaging device such as a digital camera or a video camera, an electronic endoscope or a camera-equipped mobile phone.

  A solid-state imaging device 100 illustrated in FIG. 1 includes a plurality of photoelectric conversion units 11 arranged in a two-dimensional shape (here, in a lattice shape) in a column direction in a semiconductor substrate S and in a row direction perpendicular thereto. The arrangement of the plurality of photoelectric conversion units 11 is such that a plurality of photoelectric conversion unit columns composed of a plurality of photoelectric conversion units 11 arranged in the column direction are arranged in the row direction.

  The solid-state imaging device 100 includes a vertical charge transfer path 13 that is a charge transfer path for transferring charges generated in the photoelectric conversion units 11 of the photoelectric conversion unit column in the column direction. Every other vertical charge transfer path 13 is arranged between the photoelectric conversion unit columns arranged in the row direction. In the solid-state imaging device 100, the vertical charge transfer path 13 is shared by two photoelectric conversion unit rows adjacent to each other with the vertical charge transfer path 13 interposed therebetween. This configuration can also be said to be a configuration in which one vertical charge transfer path 13 shared by two adjacent photoelectric conversion unit columns is provided correspondingly.

  “Two adjacent photoelectric conversion unit rows that are adjacent to each other across the vertical charge transfer path 13 share the vertical charge transfer path 13” is generated and accumulated in each photoelectric conversion unit 11 of the two photoelectric conversion unit columns. This means that the charges are transferred in the column direction through the vertical charge transfer path 13. For this reason, a readout gate 12 as a charge readout unit is formed between the vertical charge transfer path 13 and each photoelectric conversion unit 11 of the two photoelectric conversion unit columns adjacent to the vertical charge transfer path 13. Thus, charges can be read from the two photoelectric conversion unit rows to the vertical charge transfer path 13 between them. Note that the readout gate 12 is formed at different positions in the column direction between the photoelectric conversion units 11 adjacent in the row direction, and two photoelectric conversion unit columns sharing the same with respect to one vertical charge transfer path 13. The charges can be read independently from each other.

  The solid-state imaging device 100 further includes an element isolation layer 16 (only part of which is shown in FIG. 1) provided to separate the photoelectric conversion unit 11 from the surrounding photoelectric conversion unit 11 and the vertical charge transfer path 13. ), The horizontal charge transfer path 14 for transferring the charge transferred through the vertical charge transfer path 13 in the row direction, and the charge transferred through the horizontal charge transfer path 14 as a signal corresponding to the charge amount. And an output unit 15 for converting and outputting.

  FIG. 2 is a partially enlarged schematic view of the solid-state imaging device shown in FIG. As shown in FIG. 2, two transfer electrodes 17 and 18 are provided above the semiconductor substrate S of the solid-state imaging device 100 for each photoelectric conversion unit row including the photoelectric conversion units 11 arranged in the row direction. The transfer electrodes 17 and 18 are electrodes for controlling the charge transfer operation in the vertical charge transfer path 13 and are alternately arranged in the column direction above the vertical charge transfer path 13.

  The transfer electrode 17 is formed to extend in the row direction along the upper side portion of the corresponding photoelectric conversion unit row, and is formed so as to cover the readout gate 12 of the photoelectric conversion unit 13 in the even-numbered photoelectric conversion unit column. Yes. For this reason, the transfer electrode 17 also functions as a read electrode for reading charges from the even-numbered photoelectric conversion unit row to the vertical charge transfer path 13.

  The transfer electrode 18 is formed to extend in the row direction along the lower side portion of the corresponding photoelectric conversion unit row, and is formed so as to cover the readout gate 12 of the photoelectric conversion unit 13 in the odd-numbered photoelectric conversion unit column. ing. Therefore, the transfer electrode 18 also functions as a read electrode for reading charges from the odd-numbered photoelectric conversion unit row to the vertical charge transfer path 13.

  By controlling the pulses applied to the transfer electrodes 17 and 18, the charges read out to the vertical charge transfer path 13 can be transferred in the column direction. Further, since the transfer electrodes 17 and 18 also have a portion that overlaps with the read gate 12, the charge can be read from the photoelectric conversion unit 11 to the vertical charge transfer path 13 by applying a read pulse here.

  3 is a schematic cross-sectional view taken along line A-A ′ of the solid-state imaging device shown in FIG. 2. As shown in FIG. 3, the photoelectric conversion unit 11, the read gate 12, the vertical charge transfer path 13, and the element isolation layer 16 are all formed in a p-well layer 21 formed on an n-type silicon substrate 20. Yes. The n-type silicon substrate 20 and the p-well layer 21 constitute a semiconductor substrate S.

  The photoelectric conversion unit 11 is composed of an n-type impurity layer formed in the p-well layer 21, and generates a charge corresponding to incident light by a pn junction between the n-type impurity layer and the p-well layer 21. It functions as a photoelectric conversion unit (photodiode) that accumulates this. The photoelectric conversion unit 11 is provided with a low-concentration p-type impurity layer 23 (hereinafter referred to as a surface low-concentration p layer 23) on the surface, and further, a surface low-concentration p-layer on the surface of the surface low-concentration p-layer 23. This is a so-called embedded photodiode provided with a p-type impurity layer 22 (hereinafter referred to as a surface high-concentration p layer 22) having a higher concentration than that of 23.

  The vertical charge transfer path 13 is composed of an n-type impurity layer formed in the p well layer 21. The read gate 12 is composed of a p-type impurity layer formed in the p well layer 21. The element isolation layer 16 is composed of a p-type impurity layer having a higher concentration than the readout gate 12 and the surface low-concentration p-layer 23, and the photoelectric conversion unit 11, the vertical charge transfer path 13, and the p-well layer 21 other than the readout gate 12. Formed in the region.

  Transfer electrodes 17 and 18 are formed on the read gate 12 and the vertical charge transfer path 13 via a gate insulating film GS. Above the transfer electrodes 17 and 18, a light shielding film 19 made of tungsten or the like having an opening K above a part of the photoelectric conversion unit 11 is provided. On the light shielding film 19, a color filter, a micro lens, and the like (not shown) are provided.

  Next, the surface low concentration p layer 23 and the surface high concentration p layer 22 formed on the surface of the photoelectric conversion 11 will be described in detail.

  The surface low-concentration p layer 23 is formed by performing ion implantation on the surface of the photoelectric conversion unit 11, and as shown in FIG. It is a configuration that overlaps with Further, as shown in FIG. 3, the surface low-concentration p layers 23 of the two photoelectric conversion units 11 adjacent in the row direction without sandwiching the vertical charge transfer path 13 are separated by the element isolation layer 16. .

  The surface high-concentration p layer 22 is formed by performing ion implantation on the surface of the surface low-concentration p layer 23, and as shown in FIGS. The surface low concentration p layer 23 is interposed between the read gate 12 and the read gate 12. Further, it is formed to extend over a part of the element isolation layer 16 between the photoelectric conversion units 11 adjacent in the row direction without sandwiching the vertical charge transfer path 13.

  In this solid-state imaging device 100, one vertical charge transfer path 13 is shared by two photoelectric conversion unit rows, and the surface high-concentration p layer 22 is converted into a photoelectric conversion in which the surface high-concentration p layer 22 is formed on the surface. The vertical charge transfer path 13 corresponding to the portion 11 does not extend to the side where the vertical charge transfer path 13 does not exist, and the area is secured (in other words, beyond the end of the surface low-concentration p layer 24) Thus, the surface low-concentration p layer 24 extends in a direction away from the vertical charge transfer path 13 corresponding to the photoelectric conversion unit 11 formed on the surface. For this reason, even when the cell size is reduced, the ratio of the surface area of the surface high-concentration p layer 22 to the surface area of the photoelectric conversion unit 11 can be maintained above a certain level, and white scratches can be effectively suppressed. it can. Even if the surface high-concentration p layer 22 is extended, there is a sufficient distance to the adjacent vertical charge transfer path 13 on the extended side, so that there is no concern about leakage between the adjacent vertical charge transfer paths 13. The area of the surface high concentration p layer 22 can be increased.

  In addition, according to the solid-state imaging device 100, the surface low-concentration p layer 23 having a certain width is interposed between the readout gate 12 and the surface high-concentration p layer 22, and therefore, from the photoelectric conversion unit 11 to the vertical charge transfer path 13. It is also possible to lower the voltage for reading the charges. Further, in the direction perpendicular to the surface of the semiconductor substrate S, since the surface low concentration p layer 23 is interposed between the photoelectric conversion portion 11 and the surface high concentration p layer 22, the photoelectric conversion portion 11 and the surface high concentration p. The electric field between the layers 22 can be relieved, and the white scar suppression effect by this can also be acquired.

  In the example of FIGS. 2 and 3, the surface height of the photoelectric conversion unit 11 adjacent in the row direction without sandwiching the high-concentration p layer 22 of the photoelectric conversion unit 11 and the vertical charge transfer path 13 of the photoelectric conversion unit 11. As shown in FIG. 4, a gap exists between the p-type layer 22 and the two high-concentration p-layers 22 adjacent to each other in the row direction without interposing the vertical charge transfer path 13 as shown in FIG. 4. It is good also as a structure which formed these integrally. By doing in this way, the ratio of the surface area of the surface high concentration p layer 22 with respect to the surface area of the photoelectric conversion part 11 can be enlarged further, and a white crack can be suppressed more. In addition, since the mask pattern for forming the surface high-concentration p layer 22 becomes simple, it is possible to easily cope with miniaturization.

  Further, as shown in FIG. 5, the surface high-concentration p layers 22 shown in FIG. 4 are connected to each other adjacent to each other in the column direction, and two adjacent photoelectric conversion unit columns are not sandwiched between the vertical charge transfer paths 13. It is good also as a structure which integrated the surface high concentration p layer 22 provided in the surface of each photoelectric conversion part 11. FIG. By doing in this way, the ratio of the surface area of the surface high concentration p layer 22 with respect to the surface area of the photoelectric conversion part 11 can be enlarged further, and a white crack can be suppressed more. Further, since the mask pattern for forming the surface high-concentration p layer 22 becomes simpler, it is possible to easily cope with miniaturization.

  Next, another configuration example of the solid-state imaging device for describing one embodiment of the present invention will be described.

  FIG. 6 is a schematic plan view showing another configuration example of the solid-state imaging device for describing one embodiment of the present invention. The solid-state imaging device is used by being mounted on an imaging device such as a digital camera or a video camera, an electronic endoscope or a camera-equipped mobile phone.

  The solid-state imaging device 200 illustrated in FIG. 6 includes a plurality of photoelectric conversion units 31 arranged in a two-dimensional shape (here, substantially checkered) in a column direction in the semiconductor substrate S ′ and a row direction perpendicular thereto. The plurality of photoelectric conversion units 31 are arranged by arranging a plurality of photoelectric conversion unit columns including a plurality of photoelectric conversion units 31 arranged at a predetermined pitch in the column direction in the row direction. Further, in the plurality of photoelectric conversion unit columns, the odd number column and the even number column are shifted from each other in the column direction by 1/2 of the arrangement pitch of the respective photoelectric conversion units 31.

  The solid-state imaging device 200 includes a vertical charge transfer path 33 that is a charge transfer path for transferring charges generated in the photoelectric conversion units 31 of the photoelectric conversion unit column in the column direction. Between the photoelectric conversion unit columns arranged in the row direction, every other vertical charge transfer path 33 is arranged in the row direction. In the solid-state imaging device 200, the vertical charge transfer path 33 is shared by two photoelectric conversion unit rows adjacent to each other with the vertical charge transfer path 33 interposed therebetween. This configuration can also be said to be a configuration in which one vertical charge transfer path 33 shared by two adjacent photoelectric conversion unit columns is provided correspondingly.

  “Two adjacent photoelectric conversion unit arrays that are adjacent to each other across the vertical charge transfer path 33 share the vertical charge transfer path 33” is generated and accumulated in each photoelectric conversion unit 31 of the two photoelectric conversion unit columns. This means that the charges are transferred in the column direction through the vertical charge transfer path 33. For this reason, a read gate 32 that is a charge read unit is formed between the vertical charge transfer path 33 and each photoelectric conversion unit 31 of two photoelectric conversion unit columns adjacent to the vertical charge transfer path 33. Thus, charges can be read from the two photoelectric conversion unit rows to the vertical charge transfer path 33 between them. Note that the readout gate 32 is formed at a position where the photoelectric conversion units 31 adjacent in the row direction do not face each other, and each of the vertical charge transfer paths 33 is shared by two photoelectric conversion unit columns. The charge can be read independently.

  The solid-state imaging device 200 further includes an element isolation layer 36 (only part of which is shown in FIG. 6) provided to separate the photoelectric conversion unit 31 from the surrounding photoelectric conversion unit 31 and the vertical charge transfer path 33. ), The horizontal charge transfer path 34 for transferring the charge transferred through the vertical charge transfer path 33 in the row direction, and the charge transferred through the horizontal charge transfer path 34 as a signal corresponding to the charge amount. And an output unit 35 for converting and outputting.

  FIG. 7 is a partially enlarged schematic view of the solid-state imaging device shown in FIG. As shown in FIG. 7, four transfer electrodes 37, 38, 39, and 40 are provided per photoelectric conversion unit row including the photoelectric conversion units 31 arranged in the row direction above the semiconductor substrate S ′ of the solid-state imaging device 200. It has been. The transfer electrodes 37, 38, 39 and 40 are electrodes for controlling the charge transfer operation in the vertical charge transfer path 33, and are arranged in the column direction above the vertical charge transfer path 33. The transfer electrodes 37, 38, 39, and 40 have a shape that meanders and extends in the row direction between the photoelectric conversion unit rows so as to avoid the photoelectric conversion units 31 of the photoelectric conversion unit rows.

  The transfer electrode 38 is also formed so as to cover the read gate 32 of the photoelectric conversion unit 33 of the even-numbered photoelectric conversion unit row, and read for reading out charges from the even-numbered photoelectric conversion unit row to the vertical charge transfer path 33. It also functions as an electrode.

  The transfer electrode 40 is also formed so as to cover the read gate 32 of the photoelectric conversion unit 33 of the odd-numbered photoelectric conversion unit row, and read for reading out charges from the odd-numbered photoelectric conversion unit row to the vertical charge transfer path 33. It also functions as an electrode.

  By controlling the pulses applied to the transfer electrodes 37, 38, 39, and 40, the charges read to the vertical charge transfer path 33 can be transferred in the column direction. Further, since the transfer electrodes 38 and 40 also have a portion that overlaps with the read gate 32, the charge can be read from the photoelectric conversion unit 31 to the vertical charge transfer path 33 by applying a read pulse thereto.

  FIG. 8 is a schematic cross-sectional view taken along line B-B ′ of the solid-state imaging device shown in FIG. 7. As shown in FIG. 8, the photoelectric conversion unit 31, the read gate 32, the vertical charge transfer path 33, and the element isolation layer 36 are all formed in a p-well layer 42 formed on an n-type silicon substrate 41. Yes. The n-type silicon substrate 41 and the p-well layer 42 constitute a semiconductor substrate S ′.

  The photoelectric conversion unit 31 is composed of an n-type impurity layer formed in the p-well layer 42, and generates a charge corresponding to incident light by a pn junction between the n-type impurity layer and the p-well layer 42. It functions as a photoelectric conversion unit (photodiode) that accumulates this. The photoelectric conversion unit 31 is provided with a low-concentration p-type impurity layer 43 (hereinafter referred to as a surface low-concentration p layer 43) on the surface, and further, a surface low-concentration p layer on the surface of the surface low-concentration p layer 43. This is a so-called embedded photodiode in which a p-type impurity layer 44 (hereinafter referred to as a surface high-concentration p layer 44) having a higher concentration than 43 is provided.

  The vertical charge transfer path 33 is composed of an n-type impurity layer formed in the p-well layer 42. The read gate 32 is composed of a p-type impurity layer formed in the p well layer 42. The element isolation layer 36 is composed of a p-type impurity layer having a higher concentration than the readout gate 32 and the surface low-concentration p layer 43, and the photoelectric conversion unit 31, the vertical charge transfer path 33, and the p-well layer 42 other than the readout gate 32. Formed in the region.

  On the read gate 32 and the vertical charge transfer path 33, transfer electrodes 37 to 40 are formed via a gate insulating film GS. A light shielding film W made of tungsten or the like having an opening K above a part of the photoelectric conversion unit 31 is provided above the transfer electrodes 37 to 40. On the light shielding film W, a color filter, a microlens, and the like (not shown) are provided.

  Next, the surface low concentration p layer 43 and the surface high concentration p layer 44 formed on the surface of the photoelectric conversion unit 31 will be described in detail.

  The surface low-concentration p layer 43 is formed by performing ion implantation on the surface of the photoelectric conversion unit 31, and as shown in FIG. It is a configuration that overlaps with Further, as shown in FIG. 8, the surface low-concentration p layer 43 of each of the two adjacent photoelectric conversion units 31 without the vertical charge transfer path 33 interposed therebetween is separated by the element isolation layer 36.

  The surface high-concentration p layer 44 is formed by performing ion implantation on the surface of the surface low-concentration p layer 43. As shown in FIGS. The low-concentration surface p layer 43 is interposed between the read gate 32 and the read gate 32). Further, it is formed to extend over a part of the element isolation layer 36 between the adjacent photoelectric conversion portions 31 without sandwiching the vertical charge transfer path 33.

  In the solid-state imaging device 200, two photoelectric conversion unit arrays share one vertical charge transfer path 33, and the surface high-concentration p layer 44 is converted into a photoelectric conversion in which the surface high-concentration p layer 44 is formed on the surface. The vertical charge transfer path 33 corresponding to the portion 31 does not extend to the side where the vertical charge transfer path 33 does not exist, and the area is secured (in other words, beyond the end of the surface low-concentration p layer 43) The surface low-concentration p layer 43 extends in a direction away from the vertical charge transfer path 33 corresponding to the photoelectric conversion unit 31 formed on the surface. For this reason, even when the cell size is reduced, the ratio of the surface area of the surface high-concentration p layer 44 to the surface area of the photoelectric conversion unit 31 can be maintained above a certain level, and white scratches can be effectively suppressed. it can. Even if the surface high-concentration p layer 44 is extended, there is a sufficient distance to the adjacent vertical charge transfer path 33 on the extended side, so that there is no concern about leakage between the adjacent vertical charge transfer paths 33. The area of the surface high-concentration p layer 44 can be increased.

  Further, according to the solid-state imaging device 200, the surface low-concentration p layer 43 having a certain width is interposed between the readout gate 32 and the surface high-concentration p layer 44, and therefore, from the photoelectric conversion unit 31 to the vertical charge transfer path 33. It is also possible to lower the voltage for reading the charges. Further, in the direction perpendicular to the surface of the semiconductor substrate S ′, since the low surface concentration p layer 43 is interposed between the photoelectric conversion portion 31 and the high surface concentration p layer 44, the photoelectric conversion portion 31 and the high surface concentration are obtained. The electric field between the p layer 44 and the p layer 44 can be relaxed, and a white scratch suppressing effect can be obtained.

  As in the case of the solid-state imaging device 200, in the configuration in which the photoelectric conversion unit columns are shifted in the column direction between the odd-numbered columns and the even-numbered columns and the one vertical charge transfer path 33 is shared by the two photoelectric conversion unit columns. The transfer electrodes 37 to 40 are also present above the device isolation layer 36 between the photoelectric conversion units 31 of two adjacent photoelectric conversion unit rows without sandwiching 33, but the device isolation layer 36 between them is Since the main purpose is element isolation, the ability to shield the surface of the semiconductor substrate S ′ is insufficient. Therefore, as shown in FIG. 9, in the configuration shown in FIG. 7, in the configuration in which the surface high-concentration p layer 44 of each photoelectric conversion unit 31 is formed inside the surface low-concentration p layer 43, the transfer electrode 37. When a voltage is applied to ˜40, the surface of this portion of the semiconductor substrate S ′ is easily depleted. As a result, there is a problem that white scratches are likely to occur.

  In the solid-state imaging device 200, the surface high-concentration p layer 22 is extended to the top of the element isolation layer 36 between the photoelectric conversion units 31 of two adjacent photoelectric conversion unit rows without sandwiching the vertical charge transfer path 33. Therefore, this makes it possible to supplement the ability to shield the surface of the semiconductor substrate S ′ and solve the above-described problems.

  In the configuration shown in FIG. 9, in a solid-state imaging device having a conventional general configuration in which the vertical charge transfer path 33 is provided between two adjacent photoelectric conversion unit rows without the vertical charge transfer path 33 interposed therebetween. In this case, white scratches due to the surface of the semiconductor substrate S ′ being easily depleted occur in the vertical charge transfer path. However, in the vertical charge transfer path, the time during which the charge accumulation packet stays at one defective portion is short. Such white scratches have little effect on image quality. However, in the case of a configuration in which one vertical charge transfer path is shared by two photoelectric conversion unit rows as in the solid-state imaging device 200, there is a concern about the influence on image quality due to such white scratches. A configuration extending the p layer 44 is effective. In the configuration shown in FIG. 2, since the transfer electrode does not exist above the element isolation layer between the photoelectric conversion units 11, the above-described problem does not occur. However, when the spatial sampling frequency is improved, FIG. 6 is used. The configuration shown in is effective.

  7 and 8, the surface high-concentration p-layer 44 of the odd-numbered photoelectric conversion units 31 extends to the element isolation layer 36 between the photoelectric conversion unit 31 adjacent to the upper right of the photoelectric conversion unit 31. Although it should be extended, it is not limited to this. For example, the surface high-concentration p layer 44 of the odd-numbered photoelectric conversion units 31 may be extended to the element isolation layer 36 between the photoelectric conversion units 31 adjacent to the lower right of the photoelectric conversion unit 31.

  7 and 8, the surface high-concentration p layer 44 of the photoelectric conversion unit 31 and the surface high-concentration p layer of the adjacent photoelectric conversion unit 31 without sandwiching the vertical charge transfer path 33 of the photoelectric conversion unit 31. As shown in FIG. 10, the gap is eliminated, and two adjacent surface high-concentration p layers 44 are integrally formed without sandwiching the vertical charge transfer path 33, as shown in FIG. It is good also as a structure. By doing in this way, the ratio of the surface area of the surface high concentration p layer 44 with respect to the surface area of the photoelectric conversion part 31 can be further enlarged, and a white crack can be suppressed more. In addition, since the mask pattern for forming the surface high-concentration p layer 44 is simple, it is possible to easily cope with miniaturization.

  Further, as shown in FIG. 11, the surface high-concentration p layers 44 shown in FIG. 10 are connected by adjacent ones in the column direction, and two adjacent photoelectric conversion unit rows without sandwiching the vertical charge transfer path 33. The surface high-concentration p layer 44 provided on the surface of each photoelectric conversion unit 31 may be integrated. By doing in this way, the ratio of the surface area of the surface high concentration p layer 44 with respect to the surface area of the photoelectric conversion part 31 can be further enlarged, and a white crack can be suppressed more. Further, since the mask pattern for forming the surface high concentration p layer 44 becomes simpler, it is possible to easily cope with miniaturization.

  Next, a method for manufacturing the solid-state imaging device 200 will be described.

  12 is a diagram for explaining a method of manufacturing the solid-state imaging device shown in FIG. 7, and is a diagram showing a cross section taken along line BB of FIG. 7 in each manufacturing process. First, the photoelectric conversion unit 31, the read gate 32, the vertical charge transfer path 33, and the element isolation layer 36 are formed in the p-well layer 42 by ion implantation (FIG. 12A).

  Next, a distance from the readout gate 32 on the surface of the photoelectric conversion unit 31 is set, and the upper part of the element isolation layer 36 between the two adjacent photoelectric conversion units 31 without the vertical charge transfer path 33 interposed therebetween. The surface high-concentration p layer 44 is formed by performing ion implantation near the surface of the photoelectric conversion unit 31 so as to extend to (FIG. 12B).

  Next, a conductive material is deposited on the gate insulating film GS and patterned to form transfer electrodes 37 to 40 (FIG. 12C). The transfer electrodes 37 to 40 are formed into a two-layer structure by forming the transfer electrodes 38 and 40 first, thermally oxidizing and covering them with an insulating film, and then forming the transfer electrodes 37 and 39. The transfer electrodes 37 to 40 may have a single-layer electrode structure.

  Next, using the transfer electrodes 37 to 40 as a mask, ion implantation is performed in a region where the photoelectric conversion unit 31 between the transfer electrodes 37 to 40 is exposed, thereby forming a surface low-concentration p layer 43 (FIG. 12D). . Thereafter, a light shielding film W is formed, and a color filter and a microlens are formed to complete the manufacture of the solid-state imaging device.

  As described above, the surface high-concentration p layer 44 is formed after the element isolation layer 36 is formed, and then the transfer electrodes 37 to 40 are formed, thereby increasing the surface area of the surface high-concentration p layer 44. Can suppress white scratches.

  Further, in the above method, since the surface low concentration p layer 43 is formed by self-alignment using the transfer electrodes 37 to 40 as a mask, the shape control of the surface low concentration p layer 43 is facilitated, and the charge readout characteristics are stabilized. Can be achieved. Further, since the transfer electrodes 37 to 40 have a two-layer structure, a gap between adjacent transfer electrodes 37 to 40 can be eliminated in plan view, and transfer is performed when the surface low concentration p layer 43 is formed by self-alignment. Ion implantation from the gap between the electrodes can be easily prevented.

  When the configuration shown in FIGS. 10 and 11 is realized, the mask pattern for forming the surface high-concentration p layer 44 is appropriately set to a shape corresponding to the shape shown in FIGS. Change it.

  In the above description, the surface low-concentration p layer 43 is formed by self-alignment using the transfer electrodes 37 to 40 as a mask. However, the surface low-concentration p layer 43 is formed before the transfer electrodes 37 to 40 are formed. May be. In this case, since the surface low-concentration p layer 43 can be formed in a state where the surface high-concentration p layer 44 is not formed on the surface of the photoelectric conversion unit 31, ion implantation control for forming the surface low-concentration p layer 43 is performed. It becomes easy.

  FIG. 13 is a schematic plan view showing another configuration example of the solid-state imaging device for describing one embodiment of the present invention. The solid-state imaging device is used by being mounted on an imaging device such as a digital camera or a video camera, an electronic endoscope or a camera-equipped mobile phone.

  A solid-state imaging device 300 illustrated in FIG. 13 includes a plurality of photoelectric conversion units 51 arranged in a two-dimensional shape (in this case, a square lattice shape) in a column direction in a semiconductor substrate S ″ and a row direction perpendicular thereto. . The arrangement of the plurality of photoelectric conversion units 51 is such that a plurality of photoelectric conversion unit columns composed of a plurality of photoelectric conversion units 51 arranged in the column direction are arranged in the row direction.

  The solid-state imaging device 300 is provided corresponding to each photoelectric conversion unit 51 of the photoelectric conversion unit column, and a vertical charge transfer path 53 that transfers charges generated in each photoelectric conversion unit 51 in the column direction, and each photoelectric conversion unit 51. And a vertical charge transfer path 53 corresponding thereto, a read gate 52 that is a charge read section for reading out the charges generated in each photoelectric conversion section 51 to the vertical charge transfer path 53, and the photoelectric conversion section 51. The device isolation layer 56 (only part of which is shown in FIG. 13) provided for separating the photoelectric conversion unit 51 and the vertical charge transfer path 53 from the surroundings and the vertical charge transfer path 53 have been transferred. A horizontal charge transfer path 54 for transferring the charged charges in the row direction, and an output unit 55 for converting the charges transferred through the horizontal charge transfer path 54 into a signal corresponding to the charge amount and outputting the signal.

  14 is a partially enlarged schematic diagram of the solid-state imaging device shown in FIG. 13, and FIG. 15 is a schematic sectional view taken along line C-C ′ of the solid-state imaging device shown in FIG. As shown in FIG. 15, the photoelectric conversion unit 51, the read gate 52, the vertical charge transfer path 53, and the element isolation layer 56 are all formed in a p-well layer 61 formed on an n-type silicon substrate 60. Yes. The n-type silicon substrate 60 and the p-well layer 61 constitute a semiconductor substrate S ″.

  The photoelectric conversion unit 51 is composed of an n-type impurity layer formed in the p-well layer 61, and generates a charge corresponding to incident light by a pn junction between the n-type impurity layer and the p-well layer 61. It functions as a photoelectric conversion unit (photodiode) that accumulates this. The photoelectric conversion unit 61 is provided with a low-concentration p-type impurity layer 57 (hereinafter referred to as a surface low-concentration p layer 57) on the surface thereof, and further, a surface low-concentration p layer on the surface of the surface low-concentration p layer 57. This is a so-called embedded photodiode in which a p-type impurity layer 58 (hereinafter referred to as a surface high-concentration p layer 58) having a higher concentration than 57 is provided.

  The vertical charge transfer path 53 is composed of an n-type impurity layer formed in the p well layer 61. The read gate 52 is composed of a p-type impurity layer formed in the p well layer 61. The element isolation layer 56 is composed of a p-type impurity layer having a higher concentration than the readout gate 52 and the surface low-concentration p layer 57, and the photoelectric conversion unit 51, the vertical charge transfer path 53, and the p-well layer 61 other than the readout gate 52. Formed in the region.

  A transfer electrode V is formed on the read gate 52 and the vertical charge transfer path 53 via a gate insulating film GS. Above the transfer electrode V, a light shielding film 59 made of tungsten or the like having an opening above a part of the photoelectric conversion unit 51 is provided. On the light shielding film 59, a color filter, a micro lens, and the like (not shown) are provided.

  Next, the surface low concentration p layer 57 and the surface high concentration p layer 58 formed on the surface of the photoelectric conversion 51 will be described in detail.

  The surface low-concentration p layer 57 is formed, for example, by performing ion implantation on the surface of the photoelectric conversion unit 51. As shown in FIG. It is a completely overlapping configuration).

  The surface high-concentration p layer 58 is formed, for example, by performing ion implantation on the surface of the surface low-concentration p layer 57, and the surface high-concentration p layer 58 is formed as shown in FIGS. The photoelectric conversion portion 51 is formed at a distance from the readout gate 52 (that is, the surface low-concentration p layer 57 is interposed between the readout gate 52). Further, the surface high-concentration p layer 58 goes beyond the edge of the surface low-concentration p layer 57 and moves away from the vertical charge transfer path 53 corresponding to the photoelectric conversion unit 51 in which the surface high-concentration p layer 58 is formed. It extends in the direction and is formed on the element isolation layer 56.

  In this solid-state imaging device 300, the surface high-concentration p layer 58 does not extend to the corresponding vertical charge transfer path 53 side, and the vertical charge corresponding to the photoelectric conversion unit 51 formed on the surface with the surface high-concentration p layer 58. The area is secured by extending in a direction away from the transfer path 53. For this reason, even when the cell size is reduced, the ratio of the surface area of the surface high-concentration p layer 58 to the surface area of the photoelectric conversion unit 51 can be maintained above a certain level, and white scratches can be effectively suppressed. it can. Further, since the low surface concentration p layer 57 is interposed between the read gate 52 and the surface high concentration p layer 58, the voltage for reading the charge from the photoelectric conversion unit 51 to the vertical charge transfer path 53 is lowered. Can do.

  In the solid-state imaging device 300 as well, the effect of suppressing white scratches can be enhanced by integrating the surface high-concentration p layer 58 adjacent in the column direction. In the solid-state imaging device 300, the odd-numbered columns and the even-numbered columns of the photoelectric conversion unit columns may be shifted in the ½ column direction of the arrangement pitch of the photoelectric conversion unit columns.

  In the description so far, the charge read out as a signal from the photoelectric conversion unit 11 or the photoelectric conversion unit 31 is described as an electron, but this may be a hole. In the case of using holes, all of the n-type and p-type may be reversed in the above description and drawings.

  Hereinafter, a solid-state imaging device in which the position of the readout gate is not unified in all photoelectric conversion units will be described as a reference example. In addition, the code | symbol used in each drawing of the following reference examples is applied only to description of this reference example. In other words, the reference numerals used in the drawings of the reference example overlap those shown in FIGS. 1 to 15, but even if the reference numerals are the same, they are read as different reference numerals.

(Reference example)
A solid-state imaging device 10 shown in FIG. 16 includes a plurality of photodiodes 12 arranged in a square lattice pattern in a row direction and a column direction orthogonal to the row direction on the surface of a semiconductor substrate such as silicon. Here, the row direction corresponds to the X direction in FIG. 16, and is hereinafter referred to as the X direction. The column direction corresponds to the Y direction in FIG. 16, and is hereinafter referred to as the Y direction.

  A vertical shift register (VCCD) 14 formed so as to extend in the Y direction is formed between the plurality of photodiodes 12. The vertical shift register 3 is a region formed linearly with a constant width on the surface of the semiconductor substrate.

  In the solid-state imaging device 10 of this configuration example, the plurality of photodiodes 12 includes a first photodiode 12a from which charges are read to the vertical shift register on the left side in the row direction and a second photodiode from which charges are read to the vertical shift register on the right side in the row direction. And a photodiode 12b. The plurality of photodiodes 12 have an arrangement in which rows in which only the first photodiodes 12a are arranged in the row direction and rows in which only the second photodiodes 12b are arranged in the row direction are alternately arranged in the column direction. . The first photodiode 12a and the second photodiode 12b are collectively referred to simply as the photodiode 12.

  A read gate 15 is provided between the first photodiode 12a and the vertical shift register 3 on the side from which charges of the first photodiode 12a are read (left side in the configuration of FIG. 16). Similarly, a read gate 15 is provided between the second photodiode 12b and the vertical shift register 3 on the side from which charges of the second photodiode 12b are read (right side in the configuration of FIG. 16). In other words, the first photodiode 12a and the second photodiode 12b have opposite charge reading directions.

  The vertical shift register 3, the transfer electrodes V 1, V 2, V 3, V 4 and the read gate 15 function as a vertical charge transfer unit that transfers charges generated by the photodiode 12 in the Y direction (vertical transfer).

  A plurality of transfer electrodes V 1, V 2, V 3 and V 4 are formed above the vertical shift register 3. When a transfer pulse is applied to the transfer electrodes V1 to V4, the charge accumulated in the vertical shift register 3 is transferred in the Y direction.

  The end of the vertical shift register 3 in the Y direction is connected to the horizontal shift register 16. Above the horizontal shift register 16, a plurality of horizontal charge transfer electrodes (not shown) are arranged in the row direction. When a transfer pulse is applied to the plurality of horizontal charge transfer electrodes, the charges accumulated in the horizontal shift register 16 are transferred in the X direction. The horizontal shift register 16 and the plurality of horizontal charge transfer electrodes function as a horizontal charge transfer unit that transfers charges in the X direction (horizontal transfer).

  An output amplifier 18 is provided at the end of the horizontal shift register 16 in the X direction. The output amplifier 18 is composed of, for example, a floating diffusion amplifier, and converts the transferred charge into a voltage signal.

  A color filter (not shown) is provided above the semiconductor substrate. The arrangement of the color filters is arbitrary. As an example of the arrangement of the color filters, a Bayer arrangement including three colors of R (red), G (green), and B (blue) can be used.

  As shown in FIG. 17, the plurality of photodiodes 12a and 12b are formed so as to partially overlap the transfer electrodes V1 and V3 on the side from which the charges of the photodiodes 12a and 12b are read.

  In this configuration example, the first photodiode 12a is configured to overlap the transfer electrode V1 located above the vertical shift register 3 from which the charge of the first photodiode 12a is read. The second photodiode 12b is configured to overlap the transfer electrode V3 located above the vertical shift register 3 from which the charge of the second photodiode 12b is read.

  As shown in FIG. 18, a p-well region 1 is formed on the surface of the semiconductor substrate. On the surface of the p-well region 1, there are a high-concentration n-type impurity diffusion region 2b indicated by n + in the drawing and a high-concentration p-type impurity diffusion region 2a formed on the surface side of the impurity diffusion region 2b. Is provided. The impurity diffusion region 2a is provided to suppress dark current. The p-well region 1 and the n-type impurity diffusion region 2b form a pn junction to form a photodiode 12a. In FIG. 18, it is represented as a photodiode 12a including the impurity diffusion regions 2a and 2b.

  In FIG. 18, a vertical shift register 3 is provided between adjacent photodiodes 12. A read gate 4 is provided between the vertical shift register 3 and the photodiode 12 a from which charges are read to the vertical shift register 3. The p well region 1 is provided with an element isolation region 6 adjacent to the vertical shift register 3 on the opposite side of the read gate 4 and an element isolation region 5 located below the vertical shift register 3. Yes.

  A gate insulating film 7 including a nitride film or an oxide film is formed on the surface of the p well region 1.

  A transfer electrode V1 made of polysilicon or the like is provided above each photodiode 12a via a gate insulating film 7.

  An interlayer insulating film 13 is formed on the upper surface of the gate insulating film 7 so as to cover the transfer electrode V1. Further, a light shielding film 15 made of a light shielding material such as aluminum or tungsten is formed so as to cover the side and upper portion of the transfer electrode V1 with the interlayer insulating film 13 interposed therebetween. A part of the light shielding film 15 is opened above the photodiode 12a, allows incident light to pass through the opened region, and causes the photodiode 12a to receive the incident light.

  A part of the photodiode 12a on the side of the read gate 4 is formed so as to sink under the transfer electrode V1.

  Next, formation of the photodiode 12 will be described. The photodiode 12 is formed by ion-implanting impurities into the p-well region of the semiconductor substrate. When ion implantation is performed perpendicularly to the surface of the semiconductor substrate, the distribution of impurity diffusion regions formed by the impurities is formed substantially straight from the surface of the semiconductor substrate in the depth direction. On the other hand, when ion implantation is performed from a direction oblique to the surface of the semiconductor substrate, the distribution of the impurity diffusion region is formed obliquely from the surface of the semiconductor substrate to the depth direction. The ion-implanted impurity diffuses in the vicinity of the periphery of the semiconductor substrate, but is ignored here because it is a very small ratio with respect to the entire impurity diffusion region.

  As in the solid-state imaging device 10 of FIG. 16, the first photodiode 12a and the second photodiode 12b are different in the direction of reading out charges, and need to be formed so as to partially enter the transfer electrode on the reading side. is there. Here, it is assumed that ion implantation is performed twice in total by changing the direction of ion implantation in accordance with the direction in which the charges of the first photodiode 12a and the second photodiode 12b are read. Specifically, in the first photodiode 12a, ions are implanted obliquely from the right in the X direction with respect to the surface of the semiconductor substrate, and in the second photodiode 12b, ions are obliquely formed from the left in the X direction with respect to the surface of the semiconductor substrate. Make an injection. In this case, since different ion implantation is performed for the first photodiode 12a and the second photodiode 12b, there is a difference in characteristics such as charge readout between the first photodiode 12a and the second photodiode 12b. End up.

  In this configuration example, the first photodiode 12a and the second photodiode 12b are formed once by the same ion implantation.

  FIG. 19A shows the impurity distribution and ion implantation direction in the X direction in the semiconductor substrate, and FIG. 19B shows the impurity distribution and ion implantation direction in the Y direction in the semiconductor substrate. In FIGS. 19A and 19B, an element isolation region and a read gate are not shown and are omitted.

  As shown in FIG. 19A, by ion implantation, impurities are distributed symmetrically in the X direction without tilting in the X direction with respect to the surface of the semiconductor substrate. Here, the symmetrical distribution means that the distribution of impurities from the surface of the semiconductor substrate is equal at any position in the X direction of the photodiode 12. At this time, impurities are distributed in a substantially rectangular shape in the p-well region 1 of the semiconductor substrate.

  At this time, the direction of ion implantation is inclined in the Y direction with respect to the surface of the semiconductor substrate, as shown in FIG. That is, the direction of ion implantation is inclined in the direction in which charges are transferred. At this time, the impurities are distributed in a direction inclined in the direction of transferring charges from the surface of the semiconductor substrate in the Y direction. At this time, impurities are distributed in a substantially parallelogram shape in the p-well region 1 of the semiconductor substrate. Note that the direction of ion implantation in the Y direction may be inclined from the surface of the semiconductor substrate toward the side opposite to the direction in which charges are transferred. The reason why the ion implantation is performed obliquely in the Y direction is to stabilize the distribution of the implanted impurities.

  Regardless of the difference in charge reading direction between the first photodiode 12a and the second photodiode 12b, the first photodiode 12a and the second photodiode 12b are formed in the same direction and by one ion implantation.

  According to this solid-state imaging device, when the direction in which charges are read in a part of a plurality of photodiodes is different from the X direction, ions are implanted so that impurities are distributed symmetrically in the X direction. The relationship between the direction of reading out charges and the direction of ion implantation is the same between the photodiodes. For this reason, it is possible to avoid the occurrence of a difference in the readout characteristics of the plurality of photodiodes.

  As a procedure for forming the photodiode in this way, first, ion implantation for forming the photodiode is performed on the surface of the semiconductor substrate. Then, after forming the photodiode, a transfer electrode or the like is formed on the upper layer of the semiconductor substrate. In this case, the transfer electrode can be formed in a subsequent process so as to overlap with a part of the photodiode without performing ion implantation obliquely with respect to the X direction.

  Specifically, first, an ion implantation process for forming a photodiode on the surface of the semiconductor substrate is performed. In the ion implantation step, a plurality of ions are implanted so that impurities are distributed symmetrically in the row direction and obliquely distributed in the column direction toward the direction in which charges are transferred from the surface of the semiconductor substrate. A photodiode is formed.

  After forming a plurality of photodiodes, a transfer electrode is formed above the semiconductor substrate. At this time, the transfer electrode is formed so as to overlap a part of the already formed photodiode.

  The insulating film or the like provided on the upper layer of the semiconductor substrate can be appropriately formed by employing a well-known manufacturing procedure. At this time, they are formed in an order that does not interfere with the procedure of ion implantation and the procedure of forming the transfer electrode.

  In this way, it is possible to obtain a solid-state imaging device having no difference in characteristics among a plurality of photodiodes and to form a photodiode by only one ion implantation. The process will not increase.

The configuration of the solid-state imaging device is not limited to the above configuration example.
The solid-state imaging device shown in FIG. 20 has a plurality of photodiodes arranged in a lattice pattern in the X and Y directions on the surface of the semiconductor substrate, as in the above configuration example. The plurality of photodiodes includes a first photodiode 12a and a second photodiode 12b in which a read gate is formed so that charges are read to the vertical shift registers 3 on both sides with respect to the X direction.

  The first photodiode 12a is formed so as to partially overlap the transfer electrodes V1 and V4 on the side from which charges are read. Similarly, the second photodiode 12b is formed so as to partially overlap the transfer electrodes V2 and V3 on the side from which charges are read.

  The electric charge generated by the first photodiode 12a is read out to the vertical shift register 3 located below the transfer electrode V1 or the vertical shift register 3 located below the transfer electrode V4.

  The charge generated by the second photodiode 12b is read out to the vertical shift register 3 located below the transfer electrode V3 or the vertical shift register 3 located below the transfer electrode V2.

  In the configuration example of the solid-state imaging device in FIG. 20, as in the above configuration example, the ion implantation direction is perpendicular to the surface of the semiconductor substrate without being inclined in the X direction. By doing so, impurities are distributed symmetrically in the X direction on the surface of the semiconductor substrate. In the Y direction, ion implantation is performed so as to be inclined with respect to the surface of the semiconductor substrate. At this time, the impurities are distributed in a direction inclined in the direction of transferring charges from the surface of the semiconductor substrate in the Y direction.

  According to this solid-state imaging device, when the charge readout direction in a part of the plurality of photodiodes is different from the X direction, ions are implanted so that the impurities are distributed symmetrically in the X direction. The relationship between the direction of reading out charges and the direction of ion implantation between the plurality of photodiodes is the same. Since ion implantation is performed obliquely with respect to the Y direction, the distribution of impurities in the X direction can be made symmetric, and by performing ion implantation in the oblique direction, the distribution of implanted impurities is stabilized. For this reason, it is possible to avoid the occurrence of a difference in the readout characteristics of the plurality of photodiodes.

  In the solid-state imaging device shown in FIG. 21, the plurality of photodiodes are in the opposite direction of the first photodiode 12a and the first photodiode 22a in which the readout gate is formed so that the charge is read out in one direction with respect to the X direction. And a second photodiode 22b in which a read gate is formed so that charges are read out.

  The first photodiode 22a is formed so as to partially overlap the transfer electrodes V2 and V4 on the side from which charges are read. Similarly, the second photodiode 22b is formed so as to partially overlap the transfer electrodes V1 and V3 on the charge reading side.

  The charges generated by the first photodiode 22a are read out to the vertical shift register 3 located below the transfer electrodes V2 and V4.

  The charges generated by the second photodiode 22b are read out to the vertical shift register 3 located below the transfer electrodes V1 and V3.

  In this configuration example, charges are read out only to the vertical shift register 3 between the first photodiode 22a and the second photodiode 22b adjacent to each other so that the directions in which the charges are read out face each other. The vertical shift register 3 and the transfer electrodes V <b> 1 to V <b> 4 are not provided between the first photodiode 22 a and the second photodiode 22 b adjacent to each other so that the charge reading directions do not face each other. Alternatively, the vertical shift register 3 and the transfer electrodes V1 to V4 are provided between the first photodiode 22a and the second photodiode 22b adjacent to each other so that the charge reading directions do not face each other. 3 may be configured such that no charge is read out.

  In the configuration example of the solid-state imaging device in FIG. 21, as in the above configuration example, the ion implantation direction is perpendicular to the surface of the semiconductor substrate without being inclined in the X direction. By doing so, impurities are distributed symmetrically in the X direction on the surface of the semiconductor substrate. In the Y direction, ion implantation is performed so as to be inclined with respect to the surface of the semiconductor substrate. At this time, the impurities are distributed in a direction inclined in the direction of transferring charges from the surface of the semiconductor substrate in the Y direction.

  According to this solid-state imaging device, when the charge readout direction in a part of the plurality of photodiodes is different from the X direction, ions are implanted so that the impurities are distributed symmetrically in the X direction. The relationship between the direction of reading out charges and the direction of ion implantation between the plurality of photodiodes is the same. Since ion implantation is performed obliquely with respect to the Y direction, the distribution of impurities in the X direction can be made symmetric, and by performing ion implantation obliquely, the distribution of the implanted impurities is stabilized. For this reason, it is possible to avoid the occurrence of a difference in the readout characteristics of the plurality of photodiodes.

  As described above, the following items are disclosed in this specification.

  The disclosed solid-state imaging device is a solid-state imaging device having a plurality of photoelectric conversion units arranged in a semiconductor substrate in a column direction and a row direction orthogonal thereto, and is provided corresponding to the photoelectric conversion unit. A charge transfer path for transferring the charge generated in the photoelectric conversion unit in the column direction, and the photoelectric conversion unit and the charge transfer path corresponding to the charge transfer path. Conductivity opposite to that of impurities constituting the photoelectric conversion unit provided to separate the charge reading unit for reading out to the charge transfer path, the photoelectric conversion unit, and the photoelectric conversion unit and the charge transfer path around the photoelectric conversion unit Type element isolation layer, a first impurity layer provided on the surface of the photoelectric conversion unit and having a conductivity type opposite to the impurities constituting the photoelectric conversion unit, and the charge readout unit on the surface of the first impurity layer Set a distance from And a second impurity layer having the same conductivity type as that of the first impurity layer and having an impurity concentration higher than that of the first impurity layer, wherein the second impurity layer includes the second impurity layer. It extends to the direction away from the vertical charge transfer path corresponding to the formed photoelectric conversion part and is formed on the element isolation layer.

  With this configuration, even when the cell size is reduced, the ratio of the surface area of the second impurity layer to the surface area of the photoelectric conversion portion can be maintained. For this reason, white scratches can be suppressed. In addition, since the first impurity layer is interposed between the charge reading portion and the second impurity layer, the voltage for reading the charge from the photoelectric conversion portion to the charge transfer path can be lowered.

  In the disclosed solid-state imaging device, the plurality of photoelectric conversion units are arranged in a row direction perpendicular to the column direction. The photoelectric conversion unit column includes the plurality of photoelectric conversion units arranged in the column direction in the semiconductor substrate. It is configured in a plurality of arrangements, the charge transfer path is arranged between every other plurality of photoelectric conversion unit rows, and is shared by two adjacent photoelectric conversion unit rows across it, The second impurity layer extends to a portion of the element isolation layer that is between the photoelectric conversion units of the two adjacent photoelectric conversion unit columns without sandwiching the charge transfer path.

  With this configuration, the occurrence of leakage between the surface high-concentration p layer and the adjacent charge transfer path is suppressed, so that white scratches can be further reduced.

  In the disclosed solid-state imaging device, the plurality of photoelectric conversion unit columns have the same arrangement pitch, and the odd-numbered column and the even-numbered column are ½ of the arrangement pitch of the photoelectric conversion units, respectively, in the column direction. In order to control the charge transfer operation in the charge transfer path above the portion between the two photoelectric conversion units adjacent to each other without sandwiching the charge transfer path in the element isolation layer. There are several transfer electrodes.

  With this configuration, even when a voltage is applied to the transfer electrode, the surface of the semiconductor substrate between the two adjacent photoelectric conversion units is shielded by the second impurity layer without sandwiching the charge transfer path. Becomes difficult to be depleted, and the occurrence of white scratches can be suppressed.

  In the disclosed solid-state imaging device, the two adjacent second impurity layers are integrated without sandwiching the charge transfer path.

  With this configuration, the ratio of the surface area of the second impurity layer to the surface area of the photoelectric conversion portion can be further increased, and white scratches can be further suppressed.

  In the disclosed solid-state imaging device, the second impurity layer of each photoelectric conversion unit of two adjacent photoelectric conversion unit rows is integrated without sandwiching the charge transfer path.

  With this configuration, the ratio of the surface area of the second impurity layer to the surface area of the photoelectric conversion portion can be further increased, and white scratches can be further suppressed.

  In the disclosed solid-state imaging device, one charge transfer path is provided for one photoelectric conversion unit row, and the second impurity layer of each photoelectric conversion unit corresponding to the charge transfer path is integrated. ing.

  With this configuration, the ratio of the surface area of the second impurity layer to the surface area of the photoelectric conversion portion can be further increased, and white scratches can be further suppressed.

  The disclosed imaging device includes the solid-state imaging device.

  The disclosed method for manufacturing a solid-state imaging device is a method for manufacturing the solid-state imaging device, wherein the first step of forming the element isolation layer and the second impurity layer are formed after the first step. And a third step of forming the transfer electrode after the second step.

  The disclosed method for manufacturing a solid-state imaging device includes, after the third step, a fourth step of forming the first impurity layer by ion implantation using the transfer electrode as a mask.

  By this method, the charge readout characteristic can be stabilized.

  In the disclosed method for manufacturing a solid-state imaging device, in the second step, two adjacent second impurity layers are integrally formed without sandwiching the charge transfer path.

  By this method, the mask pattern for forming the second impurity layer can be simplified, and manufacture is facilitated even when miniaturization is advanced.

  In the disclosed method for manufacturing a solid-state imaging device, in the second step, the second impurity layers of the photoelectric conversion units of the two adjacent photoelectric conversion unit columns are integrated without interposing the charge transfer path. To form.

  By this method, the mask pattern for forming the second impurity layer can be simplified, and manufacture is facilitated even when miniaturization is advanced.

DESCRIPTION OF SYMBOLS 11 Photoelectric conversion part 12 Read-out gate 13 Vertical charge transfer path 22 Surface high concentration p layer 23 Surface low concentration p layer 36 Element isolation layer 100 Solid-state image sensor

Claims (11)

A solid-state imaging device having a plurality of photoelectric conversion units arranged in a column direction and a row direction orthogonal to the column direction in a semiconductor substrate,
A charge transfer path provided corresponding to the photoelectric conversion unit and transferring charges generated in the photoelectric conversion unit in the column direction;
A charge reading unit provided between the photoelectric conversion unit and the charge transfer path corresponding to the photoelectric conversion unit, for reading out the charge generated in the photoelectric conversion unit to the charge transfer path;
An element isolation layer having a conductivity type opposite to that of the impurity constituting the photoelectric conversion unit provided to separate the photoelectric conversion unit from the photoelectric conversion unit and the charge transfer path around the photoelectric conversion unit;
A first impurity layer having a conductivity type opposite to that of the impurity provided on the surface of the photoelectric conversion unit;
A second impurity layer provided on the surface of the first impurity layer at a distance from the charge readout portion, having the same conductivity type as the first impurity layer and having an impurity concentration higher than that of the first impurity layer; And
The second impurity layer is a solid that extends in a direction away from the vertical charge transfer path corresponding to the photoelectric conversion portion on which the second impurity layer is formed and is formed above the element isolation layer. Image sensor. The solid-state imaging device according to claim 1,
The plurality of photoelectric conversion units have a configuration in which a plurality of photoelectric conversion unit columns each including the plurality of photoelectric conversion units arranged in the column direction in the semiconductor substrate are arranged in a row direction orthogonal to the column direction. ,
The charge transfer path is arranged between every other plurality of photoelectric conversion unit rows, and is shared by two adjacent photoelectric conversion unit rows across it,
The second impurity layer is a solid that extends to a portion of the element isolation layer between the photoelectric conversion units of the two adjacent photoelectric conversion units without sandwiching the charge transfer path. Image sensor. The solid-state imaging device according to claim 2,
The plurality of photoelectric conversion unit columns have the same arrangement pitch, and the odd and even columns are shifted from each other in the column direction by 1/2 of the arrangement pitch of the photoelectric conversion units,
A transfer electrode for controlling a charge transfer operation in the charge transfer path is disposed above a portion between the two photoelectric conversion units adjacent to each other without sandwiching the charge transfer path in the element isolation layer. An existing photoelectric conversion element. The solid-state imaging device according to claim 2 or 3,
A solid-state imaging device in which two adjacent second impurity layers are integrated without sandwiching the charge transfer path. The solid-state imaging device according to claim 2 or 3,
A solid-state imaging device in which the second impurity layers of the photoelectric conversion units of two adjacent photoelectric conversion unit rows are integrated without sandwiching the charge transfer path. The solid-state imaging device according to claim 1,
One charge transfer path is provided for one photoelectric conversion unit row,
A solid-state imaging device in which the second impurity layer of each photoelectric conversion unit corresponding to the charge transfer path is integrated.   An imaging device provided with the solid-state image sensor of any one of Claims 1-6. It is a manufacturing method of the solid-state image sensing device according to claim 3,
A first step of forming the element isolation layer;
A second step of forming the second impurity layer after the first step;
And a third step of forming the transfer electrode after the second step. It is a manufacturing method of the solid-state image sensing device according to claim 8,
A method for manufacturing a solid-state imaging device, comprising a fourth step of forming the first impurity layer by ion implantation using the transfer electrode as a mask after the third step. It is a manufacturing method of the solid-state image sensing device according to claim 8 or 9,
In the second step, a method of manufacturing a solid-state imaging device, in which two adjacent second impurity layers are integrally formed without sandwiching the charge transfer path. It is a manufacturing method of the solid-state image sensing device according to claim 8 or 9,
In the second step, there is provided a method for manufacturing a solid-state imaging device, in which the second impurity layer of each photoelectric conversion unit of two adjacent photoelectric conversion unit columns is integrally formed without sandwiching the charge transfer path.

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