JP2010258062A - Interposer and method of manufacturing the same, and semiconductor device using the interposer and method of manufacturing the same - Google Patents

Interposer and method of manufacturing the same, and semiconductor device using the interposer and method of manufacturing the same Download PDF

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JP2010258062A
JP2010258062A JP2009103685A JP2009103685A JP2010258062A JP 2010258062 A JP2010258062 A JP 2010258062A JP 2009103685 A JP2009103685 A JP 2009103685A JP 2009103685 A JP2009103685 A JP 2009103685A JP 2010258062 A JP2010258062 A JP 2010258062A
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core material
mounting
interposer
hole
side electrode
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JP5630965B2 (en
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Tomoaki Taira
智晃 平
Toshihiro Ogata
敏洋 緒方
Seiichiro Ihara
清一郎 井原
Hironori Terasaki
浩則 寺崎
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New Japan Radio Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15313—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a land array, e.g. LGA

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  • Wire Bonding (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide an interposer which is not curved even when a through-hole is formed by irradiation with laser light and a method of manufacturing the same, and to provide a semiconductor device using the same and a method of manufacturing the same. <P>SOLUTION: A through-hole 5 formed in a substrate core material 1 of the interposer includes a through-hole 5a formed from a semiconductor chip mounting side and a through-hole 5b formed from a mounting side. Those through-holes 5 are both arranged in a unit region constituting one semiconductor device. The interposer which is thus formed is free of curvature, and the semiconductor device having the interposer which is free of curvature is formed when the semiconductor device is formed using the interposer. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

本発明は、有機基板からなるインターポーザとその製造方法、並びにそのインターポーザを用いた半導体装置及びその製造方法に関する。   The present invention relates to an interposer made of an organic substrate, a manufacturing method thereof, a semiconductor device using the interposer, and a manufacturing method thereof.

携帯電話等の通信機器、液晶、プラズマテレビ等の映像機器などの電気、電子機器の軽量化、薄型化、小型化の進展に伴い、実装される半導体装置についても、薄型化、小型化の要求が一段と高まっている。具体的には、マザーボードに実装される半導体装置の厚さが、従来は０．６〜０．８ｍｍ程度であったものが、０．３〜０．５ｍｍ程度まで薄くするように要求されるようになっている。一方、端子数が６程度の半導体装置では、１．０ｍｍ□程度以下まで小型化するように要求されるようになっている。   With the progress of lighter, thinner, and smaller electrical and electronic equipment such as communication equipment such as mobile phones and video equipment such as liquid crystal and plasma televisions, there is a demand for thinner and smaller semiconductor devices to be mounted. Has increased further. Specifically, the thickness of the semiconductor device mounted on the mother board is conventionally about 0.6 to 0.8 mm, but is required to be reduced to about 0.3 to 0.5 mm. It has become. On the other hand, a semiconductor device having about 6 terminals is required to be downsized to about 1.0 mm □ or less.

このような要求に対し、ＣＳＰ（Chip Scale Package）型の半導体パッケージが採用されている。このＣＳＰ型の半導体パッケージは、インターポーザと呼ばれる基板上に、複数の半導体チップを搭載して樹脂封止した後、封止樹脂及びインターポーザを切断することで、個々の半導体装置に分離する構成となっている。   In response to such a demand, a CSP (Chip Scale Package) type semiconductor package is employed. This CSP type semiconductor package is configured to be separated into individual semiconductor devices by mounting a plurality of semiconductor chips on a substrate called an interposer and sealing the resin, and then cutting the sealing resin and the interposer. ing.

このインターポーザは、半導体チップを搭載するチップ搭載側電極と実装基板と接続する実装側電極を接続するため、基板コア材に貫通孔が形成されており、この貫通孔内に導体を備える構造となっている。ここで、基板コア材が有機基板からなるインターポーザを用いる場合、ドリルを用いた切削やレーザー光を照射することにより形成するのが一般的である。   This interposer has a structure in which a through hole is formed in a substrate core material and a conductor is provided in the through hole in order to connect a chip mounting side electrode for mounting a semiconductor chip and a mounting side electrode to be connected to a mounting substrate. ing. Here, when an interposer whose substrate core material is an organic substrate is used, it is generally formed by cutting using a drill or irradiating laser light.

有機基板からなるインターポーザにレーザー光を照射して貫通孔を形成する一般的な方法を図３に示す。ガラスクロスを含有したエポキシ樹脂からなる厚さ０．０７ｍｍ程度の基板コア材１の両面（半導体チップ搭載側と実装基板に接続する実装側）に、それぞれ１２μｍ程度の厚さの搭載側銅箔２ａ、実装側銅箔３ａが形成された基板を用意する（図３ａ）。次に実装側銅箔３ａ上にホトレジスト４を全面塗布し、貫通孔形成予定領域の銅箔３ａが露出するようにパターニングする。その後、露出する実装側銅箔３ａを選択エッチングして基板コア材１の一部を露出させる（３ｂ）。   A general method for forming a through hole by irradiating a laser beam to an interposer made of an organic substrate is shown in FIG. Mounting side copper foil 2a having a thickness of about 12 μm on both surfaces (the semiconductor chip mounting side and the mounting side connected to the mounting substrate) of the substrate core material 1 made of epoxy resin containing glass cloth and having a thickness of about 0.07 mm. A substrate on which the mounting-side copper foil 3a is formed is prepared (FIG. 3a). Next, a photoresist 4 is applied over the entire surface of the mounting-side copper foil 3a, and patterned so that the copper foil 3a in the through-hole formation scheduled region is exposed. Thereafter, the exposed mounting-side copper foil 3a is selectively etched to expose a part of the substrate core material 1 (3b).

ホトレジスト４を除去した後、貫通孔形成予定領域の基板コア材１が露出するようにパターニングした実装側銅箔３ａをマスクとして使用し、露出する基板コア材１にレーザー光を照射することにより、貫通孔５を形成する（図３ｃ）。一般的にインターポーザは、複数の半導体チップを搭載し、個片化して複数の半導体装置を同時に形成できる構造となっており、１つの半導体装置を構成する単位領域が複数集合した構造となっている。   After removing the photoresist 4, using the mounting-side copper foil 3a patterned so that the substrate core material 1 in the through-hole formation scheduled region is exposed as a mask, and irradiating the exposed substrate core material 1 with laser light, A through hole 5 is formed (FIG. 3c). In general, an interposer has a structure in which a plurality of semiconductor chips are mounted and separated into a plurality of semiconductor devices can be formed at the same time, and a plurality of unit regions constituting one semiconductor device are assembled. .

インターポーザ全体に貫通孔５を形成した（図３ｄ）後、貫通孔に銅などの導体６を充填し、搭載側銅箔２ａと実装側銅箔３ａを導通させる。その後、搭載側銅箔２ａと実装側銅箔３ａをパターニングし、チップ搭載側電極２および実装側電極３を形成してインターポーザを形成する（図３ｅ）。   After the through hole 5 is formed in the entire interposer (FIG. 3d), the through hole is filled with a conductor 6 such as copper, and the mounting side copper foil 2a and the mounting side copper foil 3a are made conductive. Thereafter, the mounting side copper foil 2a and the mounting side copper foil 3a are patterned to form the chip mounting side electrode 2 and the mounting side electrode 3 to form an interposer (FIG. 3e).

次に、以上のように形成したインターポーザを使用して半導体装置を形成する場合について説明する。インターポーザは、一つの半導体装置を構成する単位領域を複数備えた構造となっているので、その単位領域毎に、チップ搭載側電極２と半導体チップ７の電極８が接続するように実装する。その後、複数の半導体チップ７を一括封止し、ダイシングソーを用いて個々の半導体装置に個片化する。   Next, a case where a semiconductor device is formed using the interposer formed as described above will be described. Since the interposer has a structure including a plurality of unit regions constituting one semiconductor device, the interposer is mounted so that the chip mounting side electrode 2 and the electrode 8 of the semiconductor chip 7 are connected to each unit region. Thereafter, the plurality of semiconductor chips 7 are collectively sealed and separated into individual semiconductor devices using a dicing saw.

このように形成された半導体装置の断面図を図４に示す。図４（ａ）は断面図を示し、図４（ｂ）はチップ搭載側電極２を、図４（ｃ）は実装側電極３をそれぞれ示している。図４（ａ）の９は樹脂部である。従来の半導体装置は、貫通孔５は、すべて実装側電極３が形成される側から形成されていた。貫通孔５は、すべてチップ搭載側電極２が形成される側から形成される場合もある。   A cross-sectional view of the semiconductor device thus formed is shown in FIG. 4A shows a cross-sectional view, FIG. 4B shows the chip mounting side electrode 2, and FIG. 4C shows the mounting side electrode 3. Reference numeral 9 in FIG. 4A denotes a resin portion. In the conventional semiconductor device, all the through holes 5 are formed from the side on which the mounting side electrode 3 is formed. The through holes 5 may all be formed from the side on which the chip mounting side electrode 2 is formed.

このようにインターポーザを用いた半導体装置は、例えば特許文献１に記載されている。   A semiconductor device using an interposer as described above is described in Patent Document 1, for example.

特開２００１−３５２０００号公報JP 2001-352000 A

半導体装置の薄型化の要請に伴い、インターポーザを薄くする必要がある。ところが、薄いインターボーザを用いて、レーザー光を照射することにより貫通孔を形成すると、熱の影響により、インターポーザが反ってしまうという問題が生じていた。特に、基板コア材がガラスクロスを含有するエポキシ樹脂から構成されるような有機基板からなるインターポーザでは、基板コア材の厚さが０．２ｍｍ程度以下となると、レーザー光の照射による熱の影響によって、照射面側に反りが生じてしまう。   In response to the demand for thinner semiconductor devices, it is necessary to make the interposer thinner. However, when a through hole is formed by irradiating a laser beam using a thin interposer, there has been a problem that the interposer warps due to the influence of heat. In particular, in an interposer composed of an organic substrate in which the substrate core material is composed of an epoxy resin containing glass cloth, if the thickness of the substrate core material is about 0.2 mm or less, it is affected by the heat of laser light irradiation. Warpage occurs on the irradiated surface side.

図５は、レーザー光の照射により有機基板が変形する様子を示している。一辺が４００ｍｍで、基板コア材の厚さが０．０７ｍｍ、銅箔の厚さが１２μｍの有機基板に、直径０．１ｍｍ程度の貫通孔を３８万個形成すると、図６に従来例として示すように、最大２ｍｍ程度の反りが生じてしまうという問題があった。   FIG. 5 shows a state in which the organic substrate is deformed by laser light irradiation. When 380,000 through holes having a diameter of about 0.1 mm are formed on an organic substrate having a side of 400 mm, a substrate core material thickness of 0.07 mm, and a copper foil thickness of 12 μm, FIG. 6 shows a conventional example. As described above, there is a problem that warping of about 2 mm at maximum occurs.

本発明は、レーザー光の照射によって貫通孔を形成する場合であっても、反りの発生しないインターポーザとその製造方法、並びにそれを用いた半導体装置とその製造方法を提供することを目的とする。   An object of the present invention is to provide an interposer that does not warp even when a through-hole is formed by laser light irradiation, a manufacturing method thereof, a semiconductor device using the interposer, and a manufacturing method thereof.

上記目的を達成するため、本願請求項１に係るインターポーザは、複数の半導体チップを搭載し、個片化して半導体装置を形成するために用いられるインターポーザであって、基板コア材の一方の主面に形成された、半導体チップの電極と接続するチップ搭載側電極と、前記基板コア材の他方の主面に形成された、実装基板と接続する実装側電極と、前記基板コア材を貫通する貫通孔と、該貫通孔内に形成された前記チップ搭載側電極と前記実装側電極とを接続する導体とを備え、前記貫通孔は、前記他方の主面側から前記基板コア材が除去されて前記チップ搭載側電極に達する第１の貫通孔と、前記一方の主面側から前記基板コア材が除去されて前記実装側電極に達する第２の貫通孔とからなり、１つの前記半導体装置を構成する単位領域に、前記第１の貫通孔および前記第２の貫通孔が配置していることを特徴とする。   In order to achieve the above object, an interposer according to claim 1 of the present application is an interposer used for mounting a plurality of semiconductor chips and separating them into a semiconductor device to form one main surface of a substrate core material. Formed on the chip mounting side electrode connected to the electrode of the semiconductor chip, the mounting side electrode connected to the mounting substrate formed on the other main surface of the substrate core material, and the through hole penetrating the substrate core material A hole and a conductor connecting the chip mounting side electrode and the mounting side electrode formed in the through hole, and the substrate core material is removed from the other main surface side of the through hole. One semiconductor device comprising a first through hole reaching the chip mounting side electrode and a second through hole reaching the mounting side electrode by removing the substrate core material from the one main surface side. Configured unit area , Wherein the first through-hole and the second through-holes are arranged.

本願請求項２に係るインターポーザの製造方法は、基板コア材の一方の主面に形成された、半導体チップの電極と接続するチップ搭載側電極と、前記基板コア材の他方の主面に形成された、実装基板と接続する実装側電極と、前記基板コア材を貫通する貫通孔と、該貫通孔内に形成された前記チップ搭載側電極と前記実装側電極とを接続する導体とを備え、複数の半導体チップを搭載し、個片化して半導体装置を形成するために用いられるインターポーザの製造方法であって、１つの半導体装置を構成する単位領域に、前記基板コア材の一方の主面側に前記チップ搭載側電極を形成し、該チップ搭載側電極に達する第１の貫通孔を、前記他方の主面側から前記基板コア材が除去して形成する第１工程と、前記基板コア材の他方の主面側に前記実装側電極を形成し、該実装側電極に達する第２の貫通孔を、前記一方の主面側から前記基板コア材を除去して形成する第２工程とを含むことを特徴とする。   The interposer manufacturing method according to claim 2 of the present invention is formed on one main surface of the substrate core material, the chip mounting side electrode connected to the electrode of the semiconductor chip, and the other main surface of the substrate core material. In addition, a mounting side electrode connected to the mounting substrate, a through hole penetrating the substrate core material, and a conductor connecting the chip mounting side electrode and the mounting side electrode formed in the through hole, A method of manufacturing an interposer used to mount a plurality of semiconductor chips and singulate to form a semiconductor device, wherein one main surface side of the substrate core material is formed in a unit region constituting one semiconductor device Forming the chip mounting side electrode and forming the first through hole reaching the chip mounting side electrode by removing the substrate core material from the other main surface side; and the substrate core material On the other main surface side of Forming a Sogawa electrode, the second through-hole reaching to the mounting side electrode, characterized in that from the one main surface and a second step of forming and removing the substrate core material.

本願請求項２に係る半導体装置は、基板コア材の一方の主面に形成された、半導体チップの電極と接続するチップ搭載側電極と、前記基板コア材の他方の主面に形成された、実装基板と接続する実装側電極と、前記他方の主面側から前記基板コア材が除去された前記チップ搭載側電極に達する第１の貫通孔と、前記一方の主面側から前記基板コア材が除去されて前記実装側電極に達する第２の貫通孔と、前記チップ搭載側電極に電極が接続されるように実装された半導体チップと、前記半導体チップの樹脂封止する樹脂部とを備えたことを特徴とする。   The semiconductor device according to claim 2 of the present invention is formed on one main surface of the substrate core material, the chip mounting side electrode connected to the electrode of the semiconductor chip, and formed on the other main surface of the substrate core material, A mounting-side electrode connected to the mounting substrate; a first through hole reaching the chip mounting-side electrode from which the substrate core material is removed from the other main surface side; and the substrate core material from the one main surface side And a second through hole reaching the mounting side electrode, a semiconductor chip mounted so that the electrode is connected to the chip mounting side electrode, and a resin portion for resin-sealing the semiconductor chip It is characterized by that.

本願請求項４に係る半導体装置の製造方法は、複数の半導体チップをインターポーザに搭載し、樹脂封止した後、個片化する半導体装置の形成方法において、基板コア材の一方の主面に形成された、半導体チップの電極と接続するチップ搭載側電極と、前記基板コア材の他方の主面に形成された、実装基板と接続する実装側電極と、前記他方の主面側から前記基板コア材が除去され、前記チップ搭載側電極に達する第１の貫通孔と、前記一方の主面側から前記基板コア材が除去され、前記実装側電極に達する第２の貫通孔と、前記第１の貫通孔および前記第２の貫通孔内に形成された前記チップ電極側電極と前記実装側電極とを接続する導体とを備えたインターポーザ上に、１つの半導体装置を構成する単位領域に、前記第１の貫通孔と前記第２の貫通孔が含まれるように半導体チップを実装する工程と、前記インターポーザ上に実装した半導体チップを樹脂封止する工程と、該樹脂封止されたインターポーザを個片化し、複数の半導体装置に分離する工程とを含むことを特徴とする。   According to a fourth aspect of the present invention, there is provided a method for manufacturing a semiconductor device, comprising: forming a plurality of semiconductor chips on an interposer; sealing a resin; A chip mounting side electrode connected to the electrode of the semiconductor chip, a mounting side electrode formed on the other main surface of the substrate core material, connected to the mounting substrate, and the substrate core from the other main surface side A first through hole from which the material is removed and reaching the chip mounting side electrode; a second through hole from which the substrate core material is removed from the one main surface side and reaching the mounting side electrode; A unit region constituting one semiconductor device on an interposer including a through hole and a conductor connecting the chip electrode side electrode and the mounting side electrode formed in the second through hole; The first through hole and the A step of mounting a semiconductor chip so as to include two through-holes, a step of resin-sealing the semiconductor chip mounted on the interposer, and separating the resin-sealed interposer into a plurality of semiconductor devices. And a step of separating.

本発明のインターポーザは、基板コア材の薄型化が可能であり、薄型の半導体装置の製造に好適である。また本発明のインターポーザの製造方法は、基板コア材の一方の面からレーザー光を照射して貫通孔を形成する工程と、その裏面からレーザー光を照射して貫通孔を形成する工程とに分けて貫通孔を形成すれば良く、従来の製造装置をそのまま使用することができ、簡便に形成することができる。   The interposer of the present invention can reduce the thickness of the substrate core material and is suitable for manufacturing a thin semiconductor device. The interposer manufacturing method of the present invention is divided into a step of forming a through hole by irradiating a laser beam from one surface of the substrate core material and a step of forming a through hole by irradiating a laser beam from the back surface thereof. It is sufficient to form a through hole, a conventional manufacturing apparatus can be used as it is, and it can be formed easily.

本発明の半導体装置は、反りのない、薄いインターポーザを備えるため、薄型化が可能となる。また本発明の半導体装置の製造方法は、反りのないインターポーザを用いるため、反りに起因する製造工程の不具合、例えば、搬送時のミス、半導体チップの実装時の位置ズレ、切断時の位置ズレなどがなく、歩留まり良く形成することができる。   Since the semiconductor device of the present invention includes a thin interposer without warping, the semiconductor device can be thinned. In addition, since the semiconductor device manufacturing method of the present invention uses an interposer without warping, defects in the manufacturing process due to warping, for example, errors during transport, misalignment when mounting semiconductor chips, misalignment when cutting, etc. And can be formed with high yield.

本発明のインターポーザの製造方法の説明図である。It is explanatory drawing of the manufacturing method of the interposer of this invention. 本発明の半導体装置の説明図である。It is explanatory drawing of the semiconductor device of this invention. 従来のインターポーザの製造方法の説明図である。It is explanatory drawing of the manufacturing method of the conventional interposer. 従来の半導体装置の説明図である。It is explanatory drawing of the conventional semiconductor device. レーザー光の照射により有機基板が変形する様子を説明する図である。It is a figure explaining a mode that an organic substrate changes by irradiation of a laser beam. 有機基板の反り量を説明するグラフである。It is a graph explaining the amount of curvature of an organic substrate.

本発明は、インターポーザを構成する基板コア材に貫通孔を形成する際、表面側からレーザー光を照射して形成する貫通孔と、その裏面側からレーザー光を照射して形成する貫通孔とを備える構成とすることで、インターポーザの反りをなくしている。以下、本発明のインターポーザとその製造方法、並びにそれを用いた半導体装置とその製造方法について、詳細に説明する。   The present invention provides a through hole formed by irradiating a laser beam from the front surface side and a through hole formed by irradiating a laser beam from the back surface side when forming the through hole in the substrate core material constituting the interposer. By adopting the configuration, the warp of the interposer is eliminated. Hereinafter, the interposer of the present invention and the manufacturing method thereof, and the semiconductor device using the interposer and the manufacturing method thereof will be described in detail.

まず、本発明のインターポーザとその製造方法について説明する。ガラスクロスを含有するエポキシ樹脂からなる厚さ０．０７ｍｍ程度の基板コア材１の両面に、それぞれ１２μｍ程度の厚さの搭載側銅箔２ａ、実装側銅箔３ａが形成された基板を用意する（図１ａ）。次に搭載側銅箔２ａ上及び実装側銅箔３ａ上にホトレジスト４を全面塗布し、貫通孔形成予定領域の銅箔を露出するようにパターニングする。具体的には、搭載側銅箔２ａの貫通孔形成予定領域を露出するようにパターニングするため、搭載側銅箔２ａ側の露光（図１ｃ）と実装側銅箔３ａ側の露光（図１ｄ）を行い、同時に現像することにより両面のパターニングを同時に行うことができる。   First, the interposer of the present invention and the manufacturing method thereof will be described. A substrate is prepared in which a mounting-side copper foil 2a and a mounting-side copper foil 3a each having a thickness of about 12 μm are formed on both surfaces of a substrate core material 1 made of an epoxy resin containing glass cloth and having a thickness of about 0.07 mm. (FIG. 1a). Next, a photoresist 4 is applied on the entire surface of the mounting-side copper foil 2a and the mounting-side copper foil 3a, and is patterned so as to expose the copper foil in the through-hole formation scheduled region. Specifically, in order to perform patterning so as to expose the through hole formation planned region of the mounting side copper foil 2a, the exposure on the mounting side copper foil 2a side (FIG. 1c) and the exposure on the mounting side copper foil 3a side (FIG. 1d). And patterning on both sides can be performed at the same time.

ホトレジスト４をパターニングした後、露出する搭載側銅箔２ａの一部及び実装側銅箔３ａの一部をエッチング除去する（図１ｅ）。そして、半導体チップ搭載側に露出する基板コア材１にレーザー光を照射し、貫通孔５ａを形成する（図１ｆ）。さらに実装側に露出する基板コア材１にレーザ光を照射し、貫通孔５ｂを形成する（図１ｇ）。このように本発明では、搭載側から形成する貫通孔５ａと、実装側から形成する貫通孔５ｂを備える構成としている（図１ｈ）。前述の通り、有機基板にレーザー光を照射する場合、照射面側に反りが生じるが、本発明では、有機基板の両面からレーザー光を照射する構成となっているので、反りの発生がなくなる。また、一つの半導体装置の構成する単位領域には、搭載側から形成する貫通孔と実装側から形成する貫通孔を同数か、あるいはいずれかが１、２個程度多くなるように配置することも可能である。   After patterning the photoresist 4, the exposed part of the mounting-side copper foil 2a and the part of the mounting-side copper foil 3a are removed by etching (FIG. 1e). Then, the substrate core material 1 exposed on the semiconductor chip mounting side is irradiated with laser light to form a through hole 5a (FIG. 1f). Further, the substrate core material 1 exposed on the mounting side is irradiated with laser light to form a through hole 5b (FIG. 1g). Thus, in this invention, it is set as the structure provided with the through-hole 5a formed from the mounting side, and the through-hole 5b formed from the mounting side (FIG. 1h). As described above, when the organic substrate is irradiated with laser light, warpage occurs on the irradiation surface side, but in the present invention, since the laser light is irradiated from both surfaces of the organic substrate, the occurrence of warpage is eliminated. In addition, in the unit region of one semiconductor device, the same number of through holes formed from the mounting side and the number of through holes formed from the mounting side, or either one or two may be arranged to increase. Is possible.

インターポーザ全体に貫通孔５ａ、５ｂを形成した後、貫通孔に銅などの導体６を充填し、搭載側銅箔２ａと実装側銅箔３ａを導通させる（図１ｉ）。その後、搭載側銅箔２ａと実装側銅箔３ａをパターニングし、チップ搭載側電極２および実装側電極３を形成してインターポーザを完成する（図１ｊ）。以上のように形成したインターポーザは、１つの半導体チップを搭載する単位領域が複数集合した構成となる。   After the through holes 5a and 5b are formed in the entire interposer, the through holes are filled with a conductor 6 such as copper, and the mounting side copper foil 2a and the mounting side copper foil 3a are made conductive (FIG. 1i). Thereafter, the mounting side copper foil 2a and the mounting side copper foil 3a are patterned to form the chip mounting side electrode 2 and the mounting side electrode 3 to complete the interposer (FIG. 1j). The interposer formed as described above has a configuration in which a plurality of unit regions on which one semiconductor chip is mounted are assembled.

次に、第１の実施例で説明したインターポーザを用いた半導体装置とその製造方法について説明する。第１の実施例同様、ガラスクロスを含有するエポキシ樹脂からなる厚さ０．０７ｍｍ程度の基板コア材１の両面に、それぞれ１２μｍ程度の厚さの搭載側銅箔２ａ、実装側銅箔３ａが形成された基板を用意する（図１ａ）。次に搭載側銅箔２ａ上及び実装側銅箔３ａ上にホトレジスト４を全面塗布し、貫通孔形成予定領域の銅箔を露出するようにパターニングする。本発明では、搭載側銅箔２ａの貫通孔形成予定領域を露出するようにパターニングするため、搭載側銅箔２ａ側の露光（図１ｃ）と実装側銅箔３ａ側の露光（図１ｄ）を行う必要がある。   Next, a semiconductor device using the interposer described in the first embodiment and a manufacturing method thereof will be described. As in the first embodiment, the mounting side copper foil 2a and the mounting side copper foil 3a each having a thickness of about 12 μm are formed on both surfaces of the substrate core material 1 made of an epoxy resin containing glass cloth and having a thickness of about 0.07 mm. A formed substrate is prepared (FIG. 1a). Next, a photoresist 4 is applied on the entire surface of the mounting-side copper foil 2a and the mounting-side copper foil 3a, and is patterned so as to expose the copper foil in the through-hole formation scheduled region. In this invention, in order to pattern so that the through-hole formation scheduled area | region of the mounting side copper foil 2a may be exposed, the exposure (FIG. 1c) of the mounting side copper foil 2a side and the exposure (FIG. 1d) of the mounting side copper foil 3a side are performed. There is a need to do.

ホトレジスト４をパターニングした後、露出する搭載側銅箔２ａの一部及び実装側銅箔３ａの一部をエッチング除去する（図１ｅ）。そして、半導体チップ搭載側に露出する基板コア材１にレーザー光を照射し、貫通孔５を形成する（図１ｆ）。さらに実装側に露出する基板コア材１にレーザ光を照射し、貫通孔５を形成する（図１ｇ）。   After patterning the photoresist 4, the exposed part of the mounting-side copper foil 2a and the part of the mounting-side copper foil 3a are removed by etching (FIG. 1e). Then, the substrate core material 1 exposed on the semiconductor chip mounting side is irradiated with laser light to form a through hole 5 (FIG. 1f). Further, the substrate core material 1 exposed on the mounting side is irradiated with a laser beam to form a through hole 5 (FIG. 1g).

インターポーザ全体に貫通孔５ａ、５ｂを形成した後、貫通孔に銅などの導体６を充填し、搭載側銅箔２ａと実装側銅箔３ａを導通させる（図１ｉ）。その後、搭載側銅箔２ａと実装側銅箔３ａをパターニングし、チップ搭載側電極２および実装側電極３を形成してインターポーザを完成する（図１ｋ）。   After the through holes 5a and 5b are formed in the entire interposer, the through holes are filled with a conductor 6 such as copper, and the mounting side copper foil 2a and the mounting side copper foil 3a are made conductive (FIG. 1i). Thereafter, the mounting side copper foil 2a and the mounting side copper foil 3a are patterned to form the chip mounting side electrode 2 and the mounting side electrode 3 to complete the interposer (FIG. 1k).

次に、一つの半導体装置を構成する単位領域のチップ搭載側電極２に、それぞれ半導体チップ７上に形成した電極８（図２ではバンプ電極となる）を接続する。インターポーザ上に形成されたチップ搭載側電極２に半導体チップを搭載した後、全面を封止樹脂で封止する。その後、例えばダイシングソーを用いて切断することにより個片化し、複数の半導体装置（図２）を形成することができる。   Next, the electrodes 8 (which are bump electrodes in FIG. 2) formed on the semiconductor chip 7 are connected to the chip mounting side electrodes 2 in the unit region constituting one semiconductor device. After mounting the semiconductor chip on the chip mounting side electrode 2 formed on the interposer, the entire surface is sealed with a sealing resin. After that, for example, a plurality of semiconductor devices (FIG. 2) can be formed by cutting using a dicing saw.

このように形成された半導体装置の断面図を図２に示す。図２（ａ）は断面図を示し、図２（ｂ）はチップ搭載側電極２を、図２（ｃ）は実装側電極３をそれぞれ示している。図２（ａ）の９は樹脂部である。本発明の半導体装置は、半導体チップ搭載側から形成された貫通孔５ａと、実装側から形成された貫通孔５ｂが、１つの半導体装置の含まれていることがわかる。図２に示す例では、１つの半導体装置に６個の貫通孔が形成されており、貫通孔５ａと貫通孔５ｂがそれぞれ３個ずつ形成されている。このようにそれぞれの貫通孔の数を同数程度にすると、１つの半導体装置を構成するインターポーザの反りもなくなる。なお、１つの半導体装置に形成される貫通孔の数が奇数個の場合には、いずれかの貫通孔を１個多くなるように構成することで、反りの発生を小さくすることが可能となる。   A cross-sectional view of the semiconductor device thus formed is shown in FIG. 2A shows a cross-sectional view, FIG. 2B shows the chip mounting side electrode 2, and FIG. 2C shows the mounting side electrode 3. Reference numeral 9 in FIG. 2A denotes a resin portion. It can be seen that the semiconductor device of the present invention includes one through hole 5a formed from the semiconductor chip mounting side and a through hole 5b formed from the mounting side. In the example shown in FIG. 2, six through holes are formed in one semiconductor device, and three through holes 5a and three through holes 5b are formed. Thus, if the number of through holes is about the same, warping of the interposer constituting one semiconductor device is eliminated. In the case where the number of through holes formed in one semiconductor device is an odd number, it is possible to reduce the occurrence of warping by configuring one of the through holes to be one. .

本発明では、薄いインターポーザを用いることにより、半導体装置の薄型化が可能となる。また、インターポーザに反りがないため、半導体チップをチップ搭載側電極に実装する工程、樹脂封止工程、切断工程において、位置ズレ等の発生がなく、歩留まり良く半導体装置を形成することができる。   In the present invention, it is possible to reduce the thickness of the semiconductor device by using a thin interposer. Further, since the interposer is not warped, a semiconductor device can be formed with high yield without occurrence of positional deviation in the process of mounting the semiconductor chip on the chip mounting side electrode, the resin sealing process, and the cutting process.

１；基板コア材、２；チップ搭載側電極、２ａ；搭載側銅箔、３；実装側電極、３ｂ；実装側銅箔、４；ホトレジスト、５、５ａ、５ｂ；貫通孔、６；導体、７；半導体チップ、８；電極、９；樹脂部 DESCRIPTION OF SYMBOLS 1; Board | substrate core material, 2; Chip mounting side electrode, 2a; Mounting side copper foil, 3; Mounting side electrode, 3b; Mounting side copper foil, 4; Photoresist, 5, 5a, 5b; 7; Semiconductor chip, 8; Electrode, 9; Resin part

Claims (4)

複数の半導体チップを搭載し、個片化して半導体装置を形成するために用いられるインターポーザであって、
基板コア材の一方の主面に形成された、半導体チップの電極と接続するチップ搭載側電極と、前記基板コア材の他方の主面に形成された、実装基板と接続する実装側電極と、前記基板コア材を貫通する貫通孔と、該貫通孔内に形成された前記チップ搭載側電極と前記実装側電極とを接続する導体とを備え、
前記貫通孔は、前記他方の主面側から前記基板コア材が除去されて前記チップ搭載側電極に達する第１の貫通孔と、前記一方の主面側から前記基板コア材が除去されて前記実装側電極に達する第２の貫通孔とからなり、
１つの前記半導体装置を構成する単位領域に、前記第１の貫通孔および前記第２の貫通孔が配置していることを特徴とするインターポーザ。 An interposer that is mounted to form a semiconductor device by mounting a plurality of semiconductor chips into individual pieces,
A chip mounting side electrode connected to an electrode of a semiconductor chip formed on one main surface of the substrate core material; a mounting side electrode connected to a mounting substrate formed on the other main surface of the substrate core material; A through hole penetrating the substrate core material, and a conductor connecting the chip mounting side electrode and the mounting side electrode formed in the through hole,
The through-hole is formed by removing the substrate core material from the other main surface side to reach the chip mounting side electrode, and removing the substrate core material from the one main surface side. A second through hole reaching the mounting side electrode;
The interposer, wherein the first through hole and the second through hole are arranged in a unit region constituting one semiconductor device. 基板コア材の一方の主面に形成された、半導体チップの電極と接続するチップ搭載側電極と、前記基板コア材の他方の主面に形成された、実装基板と接続する実装側電極と、前記基板コア材を貫通する貫通孔と、該貫通孔内に形成された前記チップ搭載側電極と前記実装側電極とを接続する導体とを備え、複数の半導体チップを搭載し、個片化して半導体装置を形成するために用いられるインターポーザの製造方法であって、
１つの半導体装置を構成する単位領域に、
前記基板コア材の一方の主面側に前記チップ搭載側電極を形成し、該チップ搭載側電極に達する第１の貫通孔を、前記他方の主面側から前記基板コア材が除去して形成する第１工程と、
前記基板コア材の他方の主面側に前記実装側電極を形成し、該実装側電極に達する第２の貫通孔を、前記一方の主面側から前記基板コア材を除去して形成する第２工程とを含むことを特徴とするインターポーザの製造方法。 A chip mounting side electrode connected to an electrode of a semiconductor chip formed on one main surface of the substrate core material; a mounting side electrode connected to a mounting substrate formed on the other main surface of the substrate core material; A through hole penetrating the substrate core material, and a conductor connecting the chip mounting side electrode and the mounting side electrode formed in the through hole, mounting a plurality of semiconductor chips, A method of manufacturing an interposer used for forming a semiconductor device,
In a unit region constituting one semiconductor device,
The chip mounting side electrode is formed on one main surface side of the substrate core material, and the first through hole reaching the chip mounting side electrode is formed by removing the substrate core material from the other main surface side. A first step of
The mounting-side electrode is formed on the other main surface side of the substrate core material, and a second through hole reaching the mounting-side electrode is formed by removing the substrate core material from the one main surface side. A process for producing an interposer, comprising two steps. 基板コア材の一方の主面に形成された、半導体チップの電極と接続するチップ搭載側電極と、
前記基板コア材の他方の主面に形成された、実装基板と接続する実装側電極と、
前記他方の主面側から前記基板コア材が除去された前記チップ搭載側電極に達する第１の貫通孔と、
前記一方の主面側から前記基板コア材が除去されて前記実装側電極に達する第２の貫通孔と、
前記チップ搭載側電極に電極が接続されるように実装された半導体チップと、
前記半導体チップの樹脂封止する樹脂部とを備えたことを特徴とする半導体装置。 A chip mounting side electrode connected to the electrode of the semiconductor chip formed on one main surface of the substrate core material;
A mounting-side electrode connected to the mounting substrate, formed on the other main surface of the substrate core material;
A first through hole reaching the chip mounting side electrode from which the substrate core material is removed from the other main surface side;
A second through hole in which the substrate core material is removed from the one main surface side to reach the mounting side electrode;
A semiconductor chip mounted such that an electrode is connected to the chip mounting side electrode;
A semiconductor device comprising: a resin portion for resin-sealing the semiconductor chip. 複数の半導体チップをインターポーザに搭載し、樹脂封止した後、個片化する半導体装置の形成方法において、
基板コア材の一方の主面に形成された、半導体チップの電極と接続するチップ搭載側電極と、前記基板コア材の他方の主面に形成された、実装基板と接続する実装側電極と、前記他方の主面側から前記基板コア材が除去され、前記チップ搭載側電極に達する第１の貫通孔と、前記一方の主面側から前記基板コア材が除去され、前記実装側電極に達する第２の貫通孔と、前記第１の貫通孔および前記第２の貫通孔内に形成された前記チップ電極側電極と前記実装側電極とを接続する導体とを備えたインターポーザ上に、１つの半導体装置を構成する単位領域に、前記第１の貫通孔と前記第２の貫通孔が含まれるように半導体チップを実装する工程と、
前記インターポーザ上に実装した半導体チップを樹脂封止する工程と、
該樹脂封止されたインターポーザを個片化し、複数の半導体装置に分離する工程とを含むことを特徴とする半導体装置の製造方法。 In a method for forming a semiconductor device in which a plurality of semiconductor chips are mounted on an interposer, sealed with resin, and separated into pieces,
A chip mounting side electrode connected to an electrode of a semiconductor chip formed on one main surface of the substrate core material; a mounting side electrode connected to a mounting substrate formed on the other main surface of the substrate core material; The substrate core material is removed from the other main surface side to reach the chip mounting side electrode, and the substrate core material is removed from the one main surface side to reach the mounting side electrode. On the interposer comprising a second through hole and a conductor connecting the chip electrode side electrode and the mounting side electrode formed in the first through hole and the second through hole. Mounting a semiconductor chip so that the first through hole and the second through hole are included in a unit region constituting the semiconductor device;
A step of resin-sealing a semiconductor chip mounted on the interposer;
And a step of separating the resin-sealed interposer into pieces and separating it into a plurality of semiconductor devices.
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