JP2010257492A - Capacitive input device, display device with input function, and electronic apparatus - Google Patents

Capacitive input device, display device with input function, and electronic apparatus Download PDF

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JP2010257492A
JP2010257492A JP2010183030A JP2010183030A JP2010257492A JP 2010257492 A JP2010257492 A JP 2010257492A JP 2010183030 A JP2010183030 A JP 2010183030A JP 2010183030 A JP2010183030 A JP 2010183030A JP 2010257492 A JP2010257492 A JP 2010257492A
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translucent
film
electrode pattern
translucent electrode
light
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JP4888589B2 (en
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Mutsumi Matsuo
睦 松尾
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Sony Corp
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2203/00Indexing scheme relating to G06F3/00 - G06F3/048
    • G06F2203/041Indexing scheme relating to G06F3/041 - G06F3/045
    • G06F2203/04111Cross over in capacitive digitiser, i.e. details of structures for connecting electrodes of the sensing pattern where the connections cross each other, e.g. bridge structures comprising an insulating layer, or vias through substrate

Abstract

<P>PROBLEM TO BE SOLVED: To provide a capacitive input device which can make the presence of patterns on a light-transmitting substrate and a crossing part of the patterns less noticeable while simplifying a manufacturing process, and to provide a display device provided with an input function, and an electronic apparatus. <P>SOLUTION: The input device 10 of a display device 100 with an input function serves as a capacitive touch panel, a first light-transmitting electrode pattern 11 and a second light-transmitting electrode pattern 12 made of an ITO film with film thickness of 20 nm and the refractive index of 1.91 are formed on one surface of a light-transmitting substrate 15. A multilayer film made of a niobium oxide film with the film thickness of 5 nm and the refractive index of 2.30 and a silicon oxide film with the film thickness of 55 nm and the refractive index of 1.45 is formed on a lower layer side of the first light-transmitting electrode pattern 11 and the second light-transmitting electrode pattern 12. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

本発明は、指の接触位置を静電容量の変化として検出可能な静電容量型入力装置、入力機能付き表示装置および電子機器に関するものである。   The present invention relates to a capacitance type input device capable of detecting a contact position of a finger as a change in capacitance, a display device with an input function, and an electronic apparatus.

携帯電話、カーナビゲーション、パーソナルコンピュータ、券売機、銀行の端末などの電子機器では、近年、液晶装置などの表面にタブレット型の入力装置が配置され、液晶装置の画像表示領域に表示された指示画像を参照しながら、この指示画像が表示されている箇所に指などを触れることで、指示画像に対応する情報の入力が行えるものがある。   In recent years, electronic devices such as mobile phones, car navigation systems, personal computers, ticket vending machines, and bank terminals have been equipped with a tablet-type input device on the surface of a liquid crystal device, etc., and an instruction image displayed in the image display area of the liquid crystal device In some cases, information corresponding to the instruction image can be input by touching a part where the instruction image is displayed with a finger or the like.

このような入力装置(タッチパネル)には、抵抗膜型、静電容量型などがあるが、抵抗膜型の入力装置は、フィルムとガラスの2枚構造でフィルムを押下してショートさせる構造のため、動作温度範囲の狭さや、経時変化に弱いという欠点を有している。   Such an input device (touch panel) includes a resistance film type and a capacitance type, but the resistance film type input device has a structure in which a film is pressed and short-circuited by a two-layer structure of film and glass. However, it has the disadvantage that the operating temperature range is narrow and it is vulnerable to changes over time.

これに対して、静電容量型の入力装置は、一枚の基板に透光性導電膜を形成すればよいという利点がある。かかる静電容量型の入力装置では、例えば、互いに交差する方向に電極を延在させて、指などが接触した際、電極間の静電容量が変化することを検知して入力位置を検出するタイプのものがある(例えば、特許文献1)。   On the other hand, the capacitive input device has an advantage that a light-transmitting conductive film is formed on a single substrate. In such a capacitance-type input device, for example, the electrodes are extended in directions intersecting each other, and when the finger or the like comes into contact, the capacitance between the electrodes is detected to detect the input position. There is a type (for example, Patent Document 1).

また、静電容量型の入力装置としては、透光性導電膜の両端に同相、同電位の交流を印加し、指が接触あるいは近接してキャパシタが形成される際に流れる微弱電流を検知して入力位置を検出するタイプのものもある。   In addition, as an electrostatic capacitance type input device, an alternating current of the same phase and the same potential is applied to both ends of the translucent conductive film to detect a weak current flowing when a capacitor is formed in contact with or close to a finger. Some types detect the input position.

特開2007−122326号公報JP 2007-122326 A

静電容量型入力装置においては、例えば、液晶装置で表示された画像を入力装置の入力面側から透過して視認するため、基板および電極には透光性に優れたものが用いられるが、それでも、透光性電極などが形成されている領域と、透光性電極などが形成されていない領域との間で反射率が大きく異なると、透光性電極の存在が目立ってしまい、好ましくない。しかるに第1の透光性電極と第2の透光性電極を透光性基板の表面および裏面に各々形成すると、第1の透光性電極と第2の透光性電極との間に透光性基板が介在するため、第1の透光性電極が形成されている領域、第2の透光性電極が形成されている領域、これらの透光性電極が形成されていない領域で光学的な構成が大きく相違する結果、各領域間で反射率に大きな差が発生し、透光性電極の存在が目立ってしまうという問題点がある。   In the capacitance type input device, for example, an image displayed on the liquid crystal device is transmitted through the input surface side of the input device for visual recognition. Nevertheless, if the reflectance is greatly different between the region where the translucent electrode or the like is formed and the region where the translucent electrode or the like is not formed, the presence of the translucent electrode becomes conspicuous, which is not preferable. . However, when the first translucent electrode and the second translucent electrode are respectively formed on the front surface and the back surface of the translucent substrate, the translucent film is interposed between the first translucent electrode and the second translucent electrode. Since a light-transmitting substrate is interposed, optical regions are formed in a region where the first light-transmitting electrode is formed, a region where the second light-transmitting electrode is formed, and a region where these light-transmitting electrodes are not formed. As a result, there is a problem that a large difference in reflectance occurs between the respective regions, and the presence of the translucent electrode becomes conspicuous.

また、透光性基板の同一面側に第1の透光性電極および第2の透光性電極を形成した場合でも、透光性基板に通常用いられるガラス基板と、透光性電極に通常用いられるITO膜(Indium Tin Oxide)との間には屈折率に大きな差があるため、透光性電極が形成されている領域と、透光性電極が形成されていない領域との間で反射率に差が生じ、透光性電極の存在が目立ってしまい、好ましくない。   In addition, even when the first light-transmitting electrode and the second light-transmitting electrode are formed on the same surface side of the light-transmitting substrate, the glass substrate normally used for the light-transmitting substrate and the light-transmitting electrode are usually used. Since there is a large difference in refractive index between the ITO film (Indium Tin Oxide) used, reflection occurs between the area where the translucent electrode is formed and the area where the translucent electrode is not formed. A difference occurs in the rate, and the presence of the translucent electrode becomes conspicuous, which is not preferable.

以上の問題点に鑑みて、本発明の課題は、製造プロセスの簡素化を図りながら、透光性基板上の透光性電極の存在を目立たなくすることのできる静電容量型入力装置、入力機能付き表示装置および電子機器を提供することにある。   In view of the above problems, an object of the present invention is to provide a capacitance-type input device and an input that can make the presence of a light-transmitting electrode on a light-transmitting substrate inconspicuous while simplifying a manufacturing process. It is to provide a display device with a function and an electronic device.

上記課題を解決するために、本発明の静電容量型入力装置では、透光性基板と、前記透光性基板の一方の面に形成され、異なる屈折率を備えた複数の透光性薄膜を含み、当該複数の透光性薄膜の一つの透光性薄膜がニオブ酸化膜である多層膜と、第1の方向に延在する複数の第1の透光性電極と、前記第1の方向に交差する第2の方向に延在する複数の第2の透光性電極と、を備え、前記第1および第2の透光性電極は、前記透光性基板の入力領域の前記多層膜上の同層に形成され、前記第1および第2の透光性電極と前記多層膜とにより光干渉を利用した反射防止膜を構成する。   In order to solve the above-described problems, in the capacitive input device of the present invention, a translucent substrate and a plurality of translucent thin films formed on one surface of the translucent substrate and having different refractive indexes. A multilayer film in which one of the plurality of translucent thin films is a niobium oxide film, a plurality of first translucent electrodes extending in a first direction, and the first A plurality of second translucent electrodes extending in a second direction intersecting the direction, wherein the first and second translucent electrodes are the multilayer of the input region of the translucent substrate. An antireflection film is formed in the same layer on the film, and the first and second translucent electrodes and the multilayer film use an optical interference.

本発明に係る静電容量型入力装置では、透光性基板の同一面上に第1の透光性電極および第2の透光性電極が形成されているため、第1の透光性電極と第2の透光性電極との間に透光性基板が介在しないので、反射防止技術を用いれば、第1の透光性電極が形成されている領域、第2の透光性電極が形成されている領域、これらの透光性電極が形成されていない領域での反射率の差を小さくして、透光性電極を目立たなくするのが容易であるとともに、製造プロセスを簡素化できる。また、本発明では、反射防止技術として、第1の透光性電極と透光性基板との層間、および第2の透光性電極と透光性基板との層間に、ニオブ酸化膜を含み、異なる屈折率を備えた透光性薄膜の多層膜を形成し、逆位相の光によって、透光性電極が形成されている領域と、透光性電極が形成されていない領域での反射率の差を圧縮しているため、透光性電極を目立たなくすることができる。すなわち、屈折率が異なる界面を透過する際、媒体間の界面で反射が発生するため、透光性基板上に透光性電極が形成されている場合には、透光性電極に対して入力面側の媒体層/透光性電極の界面と、透光性電極/透光性基板との界面とが存在するため、透光性電極が形成されている領域と、透光性電極が形成されていない領域とでは反射率に差が発生し、透光性電極の存在が見えてしまう結果になるが、多層膜を用い、各界面で反射した光の位相を逆転させ打ち消し合うようにすれば、透光性電極が形成されている領域と、透光性電極が形成されていない領域との反射率の差を解消できるので、透光性電極の存在を目立たなくすることができる。ここで、本発明では、多層膜には、屈折率の高いニオブ酸化膜を用いたため、透光性電極にITO膜などの屈折率の高い材料を用いても透光性電極を目立たなくすることができるとともに、透光性電極に膜厚の厚いITO膜などを用いることができ、透光性電極の低抵抗化を図ることができる。   In the capacitance-type input device according to the present invention, the first translucent electrode and the second translucent electrode are formed on the same surface of the translucent substrate. Since the translucent substrate is not interposed between the second translucent electrode and the second translucent electrode, if the antireflection technique is used, the region where the first translucent electrode is formed, the second translucent electrode It is easy to make the translucent electrode inconspicuous by reducing the difference in reflectance between the formed region and the region where the translucent electrode is not formed, and the manufacturing process can be simplified. . Further, in the present invention, as an antireflection technique, a niobium oxide film is included between the first translucent electrode and the translucent substrate and between the second translucent electrode and the translucent substrate. , Forming a multi-layer film of translucent thin films with different refractive indexes, and the reflectance in the region where the translucent electrode is formed and the region where the translucent electrode is not formed by the light of opposite phase Since the difference is compressed, the translucent electrode can be made inconspicuous. That is, when light is transmitted through an interface having a different refractive index, reflection occurs at the interface between the media. Therefore, when a light-transmitting electrode is formed on the light-transmitting substrate, the light is input to the light-transmitting electrode. Since there is an interface of the medium layer / translucent electrode on the surface side and an interface of the translucent electrode / translucent substrate, the region where the translucent electrode is formed and the translucent electrode are formed. Although there is a difference in reflectivity from the non-applied area and the presence of the translucent electrode can be seen, a multilayer film is used to reverse the phases of the light reflected at each interface and cancel each other. For example, since the difference in reflectance between the region where the translucent electrode is formed and the region where the translucent electrode is not formed can be eliminated, the presence of the translucent electrode can be made inconspicuous. Here, in the present invention, since the niobium oxide film having a high refractive index is used as the multilayer film, the transparent electrode is made inconspicuous even if a material having a high refractive index such as an ITO film is used for the transparent electrode. In addition, a thick ITO film or the like can be used for the translucent electrode, so that the resistance of the translucent electrode can be reduced.

本発明において、前記第1の透光性電極と前記第2の透光性電極とは、同一構成の前記多層膜上に同一材料で形成され、前記第1の透光性電極と前記第2の透光性電極との交差部分では、前記第1の透光性電極および前記第2の透光性電極のうちの一方の電極が互いに繋がっている一方、他方の電極は互いに途切れており、少なくとも前記交差部分における前記一方の電極の上層側に透光性の層間絶縁膜が形成されているとともに、当該層間絶縁膜の上層には、当該交差部分で途切れている前記他方の電極同士を電気的に接続する透光性の中継電極が形成されていることが好ましい。このように構成すると、第1の透光性電極と第2の透光性電極とが同一構成であるので、第1の透光性電極および第2の透光性電極を同一プロセスで形成することができ、製造プロセスの簡素化を図ることができる。また、第1の透光性電極と第2の透光性電極とを異なる層間に形成して交差させると、かかる交差部分の膜構成は、第1の透光性電極および第2の透光性電極と相違してしまい、液晶装置などで表示された画像を入力装置の入力面側からみた際、透光性電極などが形成されている領域と、透光性電極などが形成されていない領域との間での反射率の差が小さくなるように透光性電極を形成して、透光性電極を目立たなくしても交差部分が目立ってしまうことになるが、本発明では、交差部分において電極が途切れており、かかる途切れた電極同士は、透光性の層間絶縁膜の上層に形成された透光性の中継電極によって電気的に接続されている。このため、交差部分が占める面積が狭い。また、交差部分は、透光性の薄膜が積層された構造になっているので、交差部分の存在を目立たなくすることができる。それ故、本発明によれば、入力装置の入力面側からみた際、交差部分の存在が目立たないので、入力装置の背面側に画像生成装置を配置した場合、品位の高い画像を表示することができる。   In the present invention, the first translucent electrode and the second translucent electrode are formed of the same material on the multilayer film having the same configuration, and the first translucent electrode and the second translucent electrode are formed. In the intersection with the translucent electrode, one electrode of the first translucent electrode and the second translucent electrode is connected to each other, while the other electrode is disconnected from each other, A translucent interlayer insulating film is formed at least on the upper layer side of the one electrode at the intersecting portion, and the other electrode interrupted at the intersecting portion is electrically connected to the upper layer of the interlayer insulating film. It is preferable that a translucent relay electrode to be connected is formed. If comprised in this way, since the 1st translucent electrode and the 2nd translucent electrode are the same structures, the 1st translucent electrode and the 2nd translucent electrode are formed in the same process. Therefore, the manufacturing process can be simplified. Further, when the first light-transmitting electrode and the second light-transmitting electrode are formed between different layers and crossed, the film configuration of the intersecting portion is the first light-transmitting electrode and the second light-transmitting electrode. When the image displayed on the liquid crystal device or the like is viewed from the input surface side of the input device, the region where the translucent electrode is formed and the translucent electrode are not formed. Even if the translucent electrode is formed so that the difference in reflectance from the region is small and the translucent electrode is not conspicuous, the crossing portion will be conspicuous. In FIG. 2, the electrodes are disconnected, and the disconnected electrodes are electrically connected to each other by a translucent relay electrode formed in an upper layer of the translucent interlayer insulating film. For this reason, the area occupied by the intersection is small. In addition, since the intersecting portion has a structure in which translucent thin films are laminated, the presence of the intersecting portion can be made inconspicuous. Therefore, according to the present invention, when the image generation device is arranged on the back side of the input device, it is possible to display a high-quality image because the presence of the intersection is not noticeable when viewed from the input surface side of the input device. Can do.

本発明において、前記多層膜は、前記入力領域において前記第1の透光性電極および前記第2の透光性電極が形成されていない領域を含む全領域に形成されていることが好ましい。このように構成すると、第1の透光性電極および第2の透光性電極のパターニング形成を容易かつ効率よく行うことができるので、製造プロセスの簡素化を図ることができる。   In the present invention, it is preferable that the multilayer film is formed in the entire region including a region where the first light transmitting electrode and the second light transmitting electrode are not formed in the input region. If comprised in this way, since the pattern formation formation of the 1st translucent electrode and the 2nd translucent electrode can be performed easily and efficiently, the simplification of a manufacturing process can be achieved.

本発明において、前記中継電極は透光性の膜であることが好ましい。
本発明において、前記中継電極は、前記第1の透光性電極および前記第2の透光性電極のうちの前記他方の電極の幅よりも狭い細幅形状であることが好ましい。
In the present invention, the relay electrode is preferably a translucent film.
In the present invention, it is preferable that the relay electrode has a narrow shape that is narrower than a width of the other electrode of the first light transmitting electrode and the second light transmitting electrode.

本発明において、前記透光性基板はガラス基板であり、前記第1の透光性電極および前記第2の透光性電極は、ITO膜からなり、前記多層膜は、前記透光性基板上に形成されたニオブ酸化膜と、該ニオブ酸化膜上に積層されたシリコン酸化膜とからなる構成を採用することができる。   In the present invention, the translucent substrate is a glass substrate, the first translucent electrode and the second translucent electrode are made of an ITO film, and the multilayer film is formed on the translucent substrate. A structure comprising a niobium oxide film formed on the silicon oxide film and a silicon oxide film stacked on the niobium oxide film can be employed.

この場合、前記ニオブ酸化膜は、膜厚が4nm〜6nm、かつ、屈折率が2.22〜2.37であり、前記シリコン酸化膜は、膜厚が52nm〜60nmあるいは70nm〜78nm、かつ、屈折率が1.425〜1.49であり、前記ITO膜は、膜厚が17nm〜23nm、かつ、屈折率が1.87〜1.945であることが好ましい。このように構成すると、第1の透光性電極および第2の透光性電極を構成するITO膜の膜厚が厚いので、透光性電極の低抵抗化を図ることができる。   In this case, the niobium oxide film has a thickness of 4 nm to 6 nm and a refractive index of 2.22 to 2.37, and the silicon oxide film has a thickness of 52 nm to 60 nm, or 70 nm to 78 nm, and The refractive index is 1.425 to 1.49, and the ITO film preferably has a film thickness of 17 nm to 23 nm and a refractive index of 1.87 to 1.945. If comprised in this way, since the film thickness of the ITO film | membrane which comprises the 1st translucent electrode and the 2nd translucent electrode is thick, the resistance of a translucent electrode can be reduced.

本発明では、前記透光性基板において前記第1の透光性電極および前記第2の透光性電極が形成されている側の面は、少なくとも透光性樹脂層で覆われている構成を採用することができ、このような透光性樹脂層は、層間絶縁膜や粘着剤層によって構成される。このように構成すると、透光性樹脂層を設ける前の状態で透光性電極の存在が多少目立っても、透光性樹脂層を設けた後は、透光性電極の存在が目立たなくなる。   In the present invention, the surface on the side where the first light transmitting electrode and the second light transmitting electrode are formed in the light transmitting substrate is covered with at least a light transmitting resin layer. Such a translucent resin layer is constituted by an interlayer insulating film or an adhesive layer. If comprised in this way, even if the presence of a translucent electrode is somewhat conspicuous in the state before providing the translucent resin layer, after the translucent resin layer is provided, the presence of the translucent electrode becomes inconspicuous.

本発明を適用した静電容量型入力装置を用いて入力機能付き表示装置を構成する場合、前記静電容量型入力装置における入力面とは反対側に画像生成装置が重ねて配置される。   In the case of configuring a display device with an input function using a capacitive input device to which the present invention is applied, an image generating device is placed on the opposite side of the input surface of the capacitive input device.

本発明を適用した入力機能付き表示装置は、携帯電話、電子手帳、POS端末などの端末装置などといった電子機器に用いることができる。   The display device with an input function to which the present invention is applied can be used for electronic devices such as a mobile phone, an electronic notebook, and a terminal device such as a POS terminal.

(a)、(b)は各々、本発明を適用した入力機能付き表示装置の構成を模式的に示す説明図、およびこの入力機能付き表示装置の平面的な構成を模式的に示す説明図。(A), (b) is explanatory drawing which shows typically the structure of the display apparatus with an input function to which this invention is applied, respectively, and explanatory drawing which shows typically the planar structure of this display apparatus with an input function. 本発明の実施の形態1に係る入力装置に形成した第1の透光性電極パターンおよび第2の透光性電極パターンの平面的な構成を示す説明図。Explanatory drawing which shows the planar structure of the 1st translucent electrode pattern formed in the input device which concerns on Embodiment 1 of this invention, and a 2nd translucent electrode pattern. (a)、(b)、(c)は各々、本発明の実施の形態1に係る入力装置を図2のA1−A1'線に相当する位置で切断したときの様子を模式的に示す断面図、透光性電極パターンと金属配線との接続構造を示す断面図、および光学干渉を利用した反射防止技術の説明図。(A), (b), (c) is a cross section schematically showing a state when the input device according to Embodiment 1 of the present invention is cut at a position corresponding to the line A1-A1 ′ of FIG. The figure, sectional drawing which shows the connection structure of a translucent electrode pattern and metal wiring, and explanatory drawing of the reflection preventing technique using optical interference. (a)、(b)は各々、本発明を適用した入力装置におけるニオブ酸化膜の膜厚および屈折率と、ITO膜(透光性電極パターン)の有無による反射率差との関係を示すグラフ。(A), (b) is a graph which respectively shows the relationship between the film thickness and refractive index of the niobium oxide film in the input device to which this invention is applied, and the reflectance difference by the presence or absence of an ITO film (translucent electrode pattern). . (a)、(b)は各々、本発明を適用した入力装置におけるシリコン酸化膜の膜厚および屈折率と、ITO膜(透光性電極パターン)の有無による反射率差との関係を示すグラフ。(A), (b) is a graph which respectively shows the relationship between the film thickness and refractive index of a silicon oxide film, and the reflectance difference by the presence or absence of an ITO film (translucent electrode pattern) in the input device to which the present invention is applied. . (a)、(b)は各々、本発明を適用した入力装置におけるITO膜の膜厚および屈折率と、ITO膜(透光性電極パターン)の有無による反射率差との関係を示すグラフ。(A), (b) is a graph which respectively shows the relationship between the film thickness and refractive index of the ITO film | membrane in the input device to which this invention is applied, and the reflectance difference by the presence or absence of an ITO film | membrane (translucent electrode pattern). 本発明の実施の形態1に係る入力装置の製造方法を示す工程断面図。Process sectional drawing which shows the manufacturing method of the input device which concerns on Embodiment 1 of this invention. 本発明の実施の形態2に係る入力装置に形成した第1の透光性電極パターンおよび第2の透光性電極パターンの平面的な構成を示す説明図。Explanatory drawing which shows the planar structure of the 1st translucent electrode pattern and 2nd translucent electrode pattern which were formed in the input device which concerns on Embodiment 2 of this invention. (a)、(b)は各々、本発明の実施の形態2に係る入力装置を図8のA2−A2'線に相当する位置で切断したときの様子を模式的に示す断面図、および透光性電極パターンと金属配線との接続構造を示す断面図。(A), (b) is sectional drawing which shows typically a mode when the input device which concerns on Embodiment 2 of this invention is cut | disconnected in the position corresponding to the A2-A2 'line of FIG. Sectional drawing which shows the connection structure of a photoelectrode pattern and metal wiring. 本発明の実施の形態2に係る入力装置の製造方法を示す工程断面図。Process sectional drawing which shows the manufacturing method of the input device which concerns on Embodiment 2 of this invention. 本発明に係る入力機能付き表示装置を用いた電子機器の説明図。Explanatory drawing of the electronic device using the display apparatus with an input function which concerns on this invention.

図面を参照して、本発明の実施の形態を説明する。なお、以下の説明で参照する図においては、各層や各部材を図面上で認識可能な程度の大きさとするため、各層や各部材毎に縮尺を異ならしめてある。   Embodiments of the present invention will be described with reference to the drawings. In the drawings to be referred to in the following description, the scales are different for each layer and each member so that each layer and each member have a size that can be recognized on the drawing.

[実施の形態1]
(全体構成)
図1(a)、図1(b)は各々、本発明を適用した入力機能付き表示装置の構成を模式的に示す説明図、およびこの入力機能付き表示装置の平面的な構成を模式的に示す説明図である。なお、図1(b)において、第1の透光性電極パターン(第1の透光性電極)および第2の透光性電極パターン(第2の透光性電極)について実線で簡略化して示してあり、それらの数も減らして示してある。
[Embodiment 1]
(overall structure)
1 (a) and 1 (b) are explanatory diagrams schematically showing the configuration of a display device with an input function to which the present invention is applied, and schematically showing the planar configuration of the display device with an input function. It is explanatory drawing shown. In FIG. 1B, the first translucent electrode pattern (first translucent electrode) and the second translucent electrode pattern (second translucent electrode) are simplified by solid lines. The numbers are also reduced.

図1(a)において、本形態の入力機能付き表示装置100は概ね、画像生成装置としての液晶装置50と、この画像生成装置において表示光を出射する側の面に重ねて配置されたパネル状の入力装置10(タッチパネル)とを有している。液晶装置50は、透過型、反射型あるいは半透過反射型のアクティブマトリクス型の液晶パネル50aを備えており、透過型あるいは半透過反射型の液晶パネルの場合、表示光の出射側とは反対側にバックライト装置(図示せず)が配置される。また、液晶装置50においては、液晶パネル50aに対して位相差板や偏光板(図示せず)が重ねて配置される。液晶パネル50aは、素子基板51と、素子基板51に対して対向配置された対向基板52と、対向基板52と素子基板51との間に保持された液晶層とを備えており、素子基板51において、対向基板52の縁から張り出した領域にはフレキシブル基板53が接続されている。素子基板51には駆動用ICがCOG実装されることもある。いずれの場合も、液晶装置50は動画や静止画を表示可能であり、入力装置10に対する入力を行う際、入力情報に対応する指示画像を表示する。従って、利用者は、入力装置10で表示された指示画像を指で接触すれば、情報の入力を行うことができる。   In FIG. 1A, the display device 100 with an input function according to the present embodiment is generally a liquid crystal device 50 as an image generating device and a panel-like shape arranged on the surface on the display light emitting side in this image generating device. Input device 10 (touch panel). The liquid crystal device 50 includes a transmissive, reflective, or transflective active matrix liquid crystal panel 50a. In the case of a transmissive or transflective liquid crystal panel, the side opposite to the display light exit side is provided. A backlight device (not shown) is arranged. In the liquid crystal device 50, a phase difference plate and a polarizing plate (not shown) are arranged so as to overlap the liquid crystal panel 50a. The liquid crystal panel 50 a includes an element substrate 51, a counter substrate 52 disposed to face the element substrate 51, and a liquid crystal layer held between the counter substrate 52 and the element substrate 51. , A flexible substrate 53 is connected to a region protruding from the edge of the counter substrate 52. A driving IC may be COG mounted on the element substrate 51. In any case, the liquid crystal device 50 can display a moving image or a still image, and displays an instruction image corresponding to the input information when performing input to the input device 10. Therefore, the user can input information by touching the instruction image displayed on the input device 10 with a finger.

入力装置10は静電容量型のタッチパネルであり、透光性基板15と、この透光性基板15に後述する粘着剤層(透光性樹脂層)を介して貼り合わされた透光性のカバー基板40と、透光性基板15の端部に接続されたフレキシブル基板19とを備えている。フレキシブル基板19には、入力装置10において入力位置の検出を行うための駆動回路(図示せず)が接続されている。入力装置10においては、カバー基板40の上面によって入力面10bが構成されており、カバー基板40の略中央領域が指先による入力が行われる入力領域10aになっている。   The input device 10 is a capacitive touch panel, and a translucent cover that is bonded to the translucent substrate 15 via an adhesive layer (translucent resin layer) described later. A substrate 40 and a flexible substrate 19 connected to an end portion of the translucent substrate 15 are provided. A driving circuit (not shown) for detecting an input position in the input device 10 is connected to the flexible substrate 19. In the input device 10, an input surface 10 b is configured by the upper surface of the cover substrate 40, and a substantially central region of the cover substrate 40 is an input region 10 a where input with a fingertip is performed.

図1(b)に示すように、透光性基板15の入力面10b側の面のうち、入力領域10aに相当する領域には、矢印Xで示す第1の方向に延在する複数列の第1の透光性電極パターン11と、矢印Yで示す第1の方向に交差する第2の方向に延在する複数列の第2の透光性電極パターン12とが形成されている。   As shown in FIG. 1B, a plurality of rows extending in the first direction indicated by the arrow X are formed in the region corresponding to the input region 10 a among the surfaces on the input surface 10 b side of the translucent substrate 15. A first translucent electrode pattern 11 and a plurality of rows of second translucent electrode patterns 12 extending in a second direction intersecting the first direction indicated by the arrow Y are formed.

このような構成の入力装置10では、複数の第1の透光性電極パターン11および複数の第2の透光性電極パターン12に順次、電圧印加し、電荷を与えた際、入力領域10aにおけるいずれかの箇所に導電体である指が触れると、第1の透光性電極パターン11および第2の透光性電極パターン12と、指との間でも容量を持ち、その結果として静電容量が低下するので、いずれの箇所に指が触れたかを検出することができる。   In the input device 10 having such a configuration, when voltage is sequentially applied to the plurality of first light transmissive electrode patterns 11 and the plurality of second light transmissive electrode patterns 12 to apply electric charges, When a finger, which is a conductor, touches any part, there is a capacitance between the first translucent electrode pattern 11 and the second translucent electrode pattern 12 and the finger, and as a result, the capacitance Therefore, it is possible to detect which part is touched by the finger.

(入力装置10の詳細構成)
図2は、本発明の実施の形態1に係る入力装置に形成した第1の透光性電極パターンおよび第2の透光性電極パターンの平面的な構成を示す説明図である。図3(a)、図3(b)、図3(c)は各々、本発明の実施の形態1に係る入力装置を図2のA1−A1'線に相当する位置で切断したときの様子を模式的に示す断面図、透光性電極パターンと金属配線との接続構造を示す断面図、および光学干渉を利用した反射防止技術の説明図である。なお、図2においては、第1の透光性電極パターンおよび第2の透光性電極パターンの一部を抜粋して示してある。
(Detailed configuration of the input device 10)
FIG. 2 is an explanatory diagram showing a planar configuration of the first light transmissive electrode pattern and the second light transmissive electrode pattern formed in the input device according to the first embodiment of the present invention. 3 (a), 3 (b), and 3 (c) each show a state when the input device according to Embodiment 1 of the present invention is cut at a position corresponding to the line A1-A1 ′ of FIG. FIG. 2 is a cross-sectional view schematically showing a cross-sectional view, a cross-sectional view showing a connection structure between a translucent electrode pattern and a metal wiring, and an explanatory view of an antireflection technique using optical interference. In FIG. 2, a part of the first translucent electrode pattern and the second translucent electrode pattern are extracted and shown.

図1(b)、図2および図3(a)に示すように、本形態の入力装置10において、第1の透光性電極パターン11と第2の透光性電極パターン12とは透光性基板15の同一面上に同一層により形成されている。また、入力領域10aにおいて、第1の透光性電極パターン11と第2の透光性電極パターン12とは透光性基板15の同一面上に同一層により形成されているため、第1の透光性電極パターン11と第2の透光性電極パターン12との交差部分18が複数、存在する。   As shown in FIG. 1B, FIG. 2 and FIG. 3A, in the input device 10 of this embodiment, the first translucent electrode pattern 11 and the second translucent electrode pattern 12 are translucent. The same layer is formed on the same surface of the conductive substrate 15. Further, in the input region 10a, the first translucent electrode pattern 11 and the second translucent electrode pattern 12 are formed on the same surface of the translucent substrate 15 by the same layer. There are a plurality of intersecting portions 18 between the translucent electrode pattern 11 and the second translucent electrode pattern 12.

そこで、本形態では、複数の交差部分18のいずれにおいても、第1の透光性電極パターン11および第2の透光性電極パターン12のうちの一方の電極パターンは、交差部分18でも繋がっている一方、他方の電極パターンは途切れている構成になっている。本形態では、複数の交差部分18のいずれにおいても、第1の透光性電極パターン11が繋がっている一方、第2の透光性電極パターン12は途切れている構成になっている。   Therefore, in this embodiment, in any of the plurality of intersecting portions 18, one of the first translucent electrode pattern 11 and the second translucent electrode pattern 12 is connected to the intersecting portion 18. On the other hand, the other electrode pattern is interrupted. In this embodiment, the first translucent electrode pattern 11 is connected to any of the plurality of intersecting portions 18, while the second translucent electrode pattern 12 is interrupted.

また、交差部分18における第1の透光性電極パターン11の上層側には、透光性の層間絶縁膜4aが形成されているとともに、この層間絶縁膜4aの上層には、交差部分18で途切れている第2の透光性電極パターン12同士を電気的に接続する透光性の中継電極5aが形成されている。このため、第2の透光性電極パターン12は第2の方向で電気的に接続されている。   Further, a translucent interlayer insulating film 4a is formed on the upper side of the first translucent electrode pattern 11 in the intersecting portion 18, and the upper portion of the interlayer insulating film 4a is crossed at the intersecting portion 18. A translucent relay electrode 5a that electrically connects the discontinuous second translucent electrode patterns 12 is formed. For this reason, the 2nd translucent electrode pattern 12 is electrically connected by the 2nd direction.

ここで、第1の透光性電極パターン11および第2の透光性電極パターン12は各々、交差部分18で挟まれた領域に菱形形状の大面積のパッド部(大面積部分)11a,12aを備えており、第1の透光性電極パターン11において交差部分18に位置する接続部分11cは、パッド部(大面積部分)11aより幅の狭い細幅形状になっている。また、中継電極5aも、パッド部(大面積部分)11a,12aより幅の狭い細幅形状で短冊状に形成されている。   Here, each of the first translucent electrode pattern 11 and the second translucent electrode pattern 12 has a rhombic large-area pad portion (large area portion) 11a, 12a in a region sandwiched by the intersecting portions 18. In the first translucent electrode pattern 11, the connecting portion 11c located at the intersecting portion 18 has a narrow shape that is narrower than the pad portion (large area portion) 11a. The relay electrode 5a is also formed in a strip shape having a narrow width narrower than the pad portions (large area portions) 11a and 12a.

さらに、透光性基板15において第1の透光性電極パターン11および第2の透光性電極パターン12が形成されている側の面には、入力領域10aに粘着剤層30(透光性樹脂層)により透光性のカバー基板40が貼られている。   Furthermore, the pressure-sensitive adhesive layer 30 (light-transmitting property) is formed on the input region 10a on the surface of the light-transmitting substrate 15 where the first light-transmitting electrode pattern 11 and the second light-transmitting electrode pattern 12 are formed. A translucent cover substrate 40 is affixed by the resin layer.

図1(a)、図1(b)、および図3(b)に示すように、透光性基板15において入力領域10aの外側領域には、第1の透光性電極パターン11および第2の透光性電極パターン12の各々に電気的に接続する複数の金属配線9aが形成されており、これらの金属配線9aの端部は、フレキシブル基板19を接続するための端子19aを構成している。   As shown in FIG. 1A, FIG. 1B, and FIG. 3B, in the translucent substrate 15, the first translucent electrode pattern 11 and the second translucent substrate are formed in the outer region of the input region 10a. A plurality of metal wirings 9a electrically connected to each of the translucent electrode patterns 12 are formed, and the end portions of these metal wirings 9a constitute terminals 19a for connecting the flexible substrate 19. Yes.

このように構成した入力装置10において、本形態では、第1の透光性電極パターン11および第2の透光性電極パターン12が形成されている領域と、第1の透光性電極パターン11および第2の透光性電極パターン12が形成されていない領域との反射率の差に起因して、第1の透光性電極パターン11および第2の透光性電極パターン12の存在が見えてしまい、見栄えを低下させる。本形態では、かかる見栄えの低下を防止することを目的に、図3(c)を参照して以下に説明する光学干渉を利用した反射防止技術に基づいて、第1の透光性電極パターン11および第2の透光性電極パターン12の材質および厚さを設定してある。   In the input device 10 configured as described above, in this embodiment, a region where the first light-transmissive electrode pattern 11 and the second light-transmissive electrode pattern 12 are formed, and the first light-transmissive electrode pattern 11. Due to the difference in reflectance from the region where the second light-transmissive electrode pattern 12 is not formed, the presence of the first light-transmissive electrode pattern 11 and the second light-transmissive electrode pattern 12 is visible. End up deteriorating the appearance. In the present embodiment, the first translucent electrode pattern 11 is based on an antireflection technique using optical interference, which will be described below with reference to FIG. The material and thickness of the second translucent electrode pattern 12 are set.

光学干渉を利用した反射防止技術とは、図3(c)に示すように、射光が薄膜の表面、および基板と薄膜の界面で反射した際、この表面反射光と界面反射光の位相を逆転させ打ち消しあうことで反射光を軽減する技術である。すなわち、図3(c)において、空気層の屈折率(n0)と、薄膜の屈折率(n1)と膜厚(d1)と、基板の屈折率(n2)が、下記の式
(n12=n0×n2
1×d1=λ/4
As shown in Fig. 3 (c), the antireflection technology using optical interference reverses the phase of the surface reflected light and the interface reflected light when the reflected light is reflected at the surface of the thin film and at the interface between the substrate and the thin film. It is a technology that reduces reflected light by canceling them. That is, in FIG. 3C, the refractive index (n 0 ) of the air layer, the refractive index (n 1 ) and the film thickness (d 1 ) of the thin film, and the refractive index (n 2 ) of the substrate are (N 1 ) 2 = n 0 × n 2
n 1 × d 1 = λ / 4

を満たす場合、波長λ(nm)における反射率が0%となる。ここで、反射防止効果は波長依存性があり、薄膜の膜依存性もあることから、光学シミュレーションを行ったところ、第1の透光性電極パターン11および第2の透光性電極パターン12も含めて、上記の光学干渉を利用した反射防止技術を利用すれば、第1の透光性電極パターン11および第2の透光性電極パターン12が形成されている領域と、第1の透光性電極パターン11および第2の透光性電極パターン12が形成されていない領域との反射率の差が解消され、第1の透光性電極パターン11および第2の透光性電極パターン12の存在を見えなくできるという結論を得た。   When satisfying, the reflectance at the wavelength λ (nm) becomes 0%. Here, since the antireflection effect has a wavelength dependency and a film dependency of a thin film, when an optical simulation is performed, the first translucent electrode pattern 11 and the second translucent electrode pattern 12 are also obtained. In addition, if the above-described antireflection technology using optical interference is used, the region where the first light-transmitting electrode pattern 11 and the second light-transmitting electrode pattern 12 are formed, and the first light-transmitting electrode pattern. The difference in reflectance from the region where the conductive electrode pattern 11 and the second transparent electrode pattern 12 are not formed is eliminated, and the first transparent electrode pattern 11 and the second transparent electrode pattern 12 The conclusion was reached that the existence could be made invisible.

そこで、本形態では、まず、第1の透光性電極パターン11および第2の透光性電極パターン12はITO膜3aにより形成され、第1の透光性電極パターン11と透光性基板15との層間、および第2の透光性電極パターン12と透光性基板15との層間には、第1の透光性電極パターン11および第2の透光性電極パターン12とともに、図3(c)を参照して説明した反射防止構造を実現するための多層膜20が形成されている。   Therefore, in this embodiment, first, the first translucent electrode pattern 11 and the second translucent electrode pattern 12 are formed of the ITO film 3a, and the first translucent electrode pattern 11 and the translucent substrate 15 are formed. 3 and the second translucent electrode pattern 12 and the translucent substrate 15 together with the first translucent electrode pattern 11 and the second translucent electrode pattern 12, FIG. A multilayer film 20 for realizing the antireflection structure described with reference to c) is formed.

本形態では、多層膜20として、透光性基板15の表面に形成されたニオブ酸化膜1aと、このニオブ酸化膜1aの上層に形成されたシリコン酸化膜2aとが用いられ、かかる多層膜20は、第1の透光性電極パターン11および第2の透光性電極パターン12の下層側に下地膜として、パターニングされずにベタパターンとして形成され、入力領域において第1の透光性電極パターン11および第2の透光性電極パターン12が形成されていない領域を含む全領域に形成されている。ニオブ酸化膜1aはNb25と表されるが、成膜条件によってはニオブ原子と酸素原子との比がシフトすることがあり、このようなシフトによって屈折率もシフトする。また、シリコン酸化膜2aはSiO2と表されるが、成膜条件によってはシリコン原子と酸素原子との比がシフトすることもあり、このようなシフトによって屈折率もシフトする。また、ITO膜3aも、成膜条件によっては、インジウム原子や錫原子と酸素原子の比がシフトすることもあり、このようなシフトによって屈折率もシフトする。 In this embodiment, as the multilayer film 20, a niobium oxide film 1a formed on the surface of the translucent substrate 15 and a silicon oxide film 2a formed on the niobium oxide film 1a are used. Is formed as a solid pattern on the lower layer side of the first translucent electrode pattern 11 and the second translucent electrode pattern 12 as a base film without patterning, and the first translucent electrode pattern is formed in the input region. 11 and the 2nd translucent electrode pattern 12 are formed in all the area | regions including the area | region in which it is not formed. Although the niobium oxide film 1a is expressed as Nb 2 O 5 , the ratio of niobium atoms to oxygen atoms may shift depending on the film forming conditions, and the refractive index also shifts due to such a shift. Further, although the silicon oxide film 2a is expressed as SiO 2 , the ratio of silicon atoms to oxygen atoms may shift depending on the film forming conditions, and the refractive index also shifts due to such a shift. In addition, the ITO film 3a may shift the ratio of indium atoms, tin atoms, and oxygen atoms depending on the film formation conditions, and the refractive index also shifts due to such a shift.

このような多層膜20を用いて反射防止構造を実現するにあたって、本形態では、透光性基板15の屈折率、第1の透光性電極パターン11および第2の透光性電極パターン12を構成するITO膜3aの膜厚や屈折率などを考慮して、ニオブ酸化膜1aおよびシリコン酸化膜2aの膜厚を最適化してある。また、ニオブ酸化膜1a、シリコン酸化膜2a、およびITO膜3aについては成膜条件によって、屈折率が相違することから、本形態では、図4〜図6に示す検討結果に基づいて、各層の屈折率や膜厚は、以下に示す条件
粘着剤層30:屈折率=1.48、厚さ=225000nm
ITO膜3a:屈折率=1.91、厚さ=20nm
シリコン酸化膜2a:屈折率=1.45、厚さ=55nmあるいは75nm
ニオブ酸化膜1a:屈折率=2.30、厚さ=5nm
透光性基板15(ガラス):屈折率=1.52、厚さ=500000nm
に設定してある。
In realizing an antireflection structure using such a multilayer film 20, in this embodiment, the refractive index of the translucent substrate 15, the first translucent electrode pattern 11, and the second translucent electrode pattern 12 are changed. The thicknesses of the niobium oxide film 1a and the silicon oxide film 2a are optimized in consideration of the thickness and refractive index of the ITO film 3a to be formed. Further, since the refractive index of the niobium oxide film 1a, the silicon oxide film 2a, and the ITO film 3a differs depending on the film forming conditions, in this embodiment, each layer is formed based on the examination results shown in FIGS. Refractive index and film thickness are the following conditions: Adhesive layer 30: Refractive index = 1.48, Thickness = 25,000 nm
ITO film 3a: refractive index = 1.91, thickness = 20 nm
Silicon oxide film 2a: refractive index = 1.45, thickness = 55 nm or 75 nm
Niobium oxide film 1a: refractive index = 2.30, thickness = 5 nm
Translucent substrate 15 (glass): refractive index = 1.52, thickness = 500000 nm
It is set to.

(ニオブ酸化膜1aの構成と、ITO膜3aの有無での反射率差との関係)
図4を参照して、本発明を適用した入力装置におけるニオブ酸化膜1aの屈折率および膜厚と、ITO膜3aの有無による反射率差との関係を説明する。図4(a)、図4(b)は各々、本発明を適用した入力装置におけるニオブ酸化膜1aの膜厚および屈折率と、ITO膜3a(透光性電極パターン)の有無による反射率差との関係を示すグラフである。
(Relationship between the configuration of the niobium oxide film 1a and the difference in reflectance with and without the ITO film 3a)
With reference to FIG. 4, the relationship between the refractive index and film thickness of the niobium oxide film 1a in the input device to which the present invention is applied and the difference in reflectance depending on the presence or absence of the ITO film 3a will be described. 4 (a) and 4 (b) respectively show the difference in reflectance between the thickness and refractive index of the niobium oxide film 1a and the presence or absence of the ITO film 3a (translucent electrode pattern) in the input device to which the present invention is applied. It is a graph which shows the relationship.

図4(a)には、各種検討結果のうち、以下の条件
粘着剤層30:屈折率=1.48、厚さ=225000nm
ITO膜3a:屈折率=1.91、厚さ=20nm
シリコン酸化膜2a:屈折率=1.45、厚さ=55nm
ニオブ酸化膜1a:屈折率=2.30
透光性基板15(ガラス):屈折率=1.52、厚さ=500000nm
を固定して、ニオブ酸化膜1aの膜厚を変えた場合におけるITO膜3a(透光性電極パターン)の有無による反射率差の変化を示してある。
FIG. 4A shows the following conditions among the various examination results: Adhesive layer 30: Refractive index = 1.48, Thickness = 25,000 nm
ITO film 3a: refractive index = 1.91, thickness = 20 nm
Silicon oxide film 2a: refractive index = 1.45, thickness = 55 nm
Niobium oxide film 1a: Refractive index = 2.30
Translucent substrate 15 (glass): refractive index = 1.52, thickness = 500000 nm
The change in reflectance difference depending on the presence or absence of the ITO film 3a (translucent electrode pattern) when the thickness of the niobium oxide film 1a is changed is shown.

また、図4(b)には、以下の条件
粘着剤層30:屈折率=1.48、厚さ=225000nm
ITO膜3a:屈折率=1.91、厚さ=20nm
シリコン酸化膜2a:屈折率=1.45、厚さ=55nm
ニオブ酸化膜1a:厚さ=5nm
透光性基板15(ガラス):屈折率=1.52、厚さ=500000nm
を固定して、ニオブ酸化膜1aの屈折率を変えた場合におけるITO膜3a(透光性電極パターン)の有無による反射率差の変化を示してある。
FIG. 4B shows the following conditions: Adhesive layer 30: Refractive index = 1.48, Thickness = 225000 nm
ITO film 3a: refractive index = 1.91, thickness = 20 nm
Silicon oxide film 2a: refractive index = 1.45, thickness = 55 nm
Niobium oxide film 1a: thickness = 5 nm
Translucent substrate 15 (glass): refractive index = 1.52, thickness = 500000 nm
Is shown, and changes in the reflectance difference depending on the presence or absence of the ITO film 3a (translucent electrode pattern) when the refractive index of the niobium oxide film 1a is changed are shown.

図4(a)、図4(b)に示すように、ニオブ酸化膜1aの膜厚を5nmとし、屈折率を2.30に設定すると、ITO膜3a(透光性電極パターン)の有無による反射率差を最小とすることができ、第1の透光性電極パターン11および第2の透光性電極パターン12の存在を目立たなくすることができる。   As shown in FIGS. 4A and 4B, when the thickness of the niobium oxide film 1a is set to 5 nm and the refractive index is set to 2.30, depending on the presence or absence of the ITO film 3a (translucent electrode pattern). The difference in reflectance can be minimized, and the presence of the first translucent electrode pattern 11 and the second translucent electrode pattern 12 can be made inconspicuous.

ニオブ酸化膜1aは、膜厚を5nm、屈折率を2.30に設定した場合にITO膜3a(透光性電極パターン)の有無による反射率差が最小となるが、図4(a)、図4(b)に示すように、反射率差が0.1%以下となる範囲の膜厚(4nm〜6nm)および屈折率(2.22〜2.37)に設定すれば、第1の透光性電極パターン11および第2の透光性電極パターン12の存在を目立たなくする効果が得られる。   The niobium oxide film 1a has a minimum difference in reflectance depending on the presence or absence of the ITO film 3a (translucent electrode pattern) when the film thickness is set to 5 nm and the refractive index is set to 2.30. As shown in FIG. 4B, if the film thickness (4 nm to 6 nm) and the refractive index (2.22 to 2.37) are set in a range where the difference in reflectance is 0.1% or less, the first The effect of making the presence of the translucent electrode pattern 11 and the second translucent electrode pattern 12 inconspicuous is obtained.

(シリコン酸化膜2aの構成と、ITO膜3aの有無での反射率差との関係)
図5を参照して、本発明を適用した入力装置におけるシリコン酸化膜2aの屈折率および膜厚と、ITO膜3aの有無による反射率差との関係を説明する。図5(a)、図5(b)は各々、本発明を適用した入力装置におけるシリコン酸化膜2aの膜厚および屈折率と、ITO膜3a(透光性電極パターン)の有無による反射率差との関係を示すグラフである。
(Relation between the structure of the silicon oxide film 2a and the difference in reflectance with and without the ITO film 3a)
With reference to FIG. 5, the relationship between the refractive index and film thickness of the silicon oxide film 2a in the input device to which the present invention is applied and the difference in reflectance depending on the presence or absence of the ITO film 3a will be described. 5 (a) and 5 (b) respectively show the difference in reflectance between the thickness and refractive index of the silicon oxide film 2a and the presence or absence of the ITO film 3a (translucent electrode pattern) in the input device to which the present invention is applied. It is a graph which shows the relationship.

図5(a)には、各種検討結果のうち、以下の条件
粘着剤層30:屈折率=1.48、厚さ=225000nm
ITO膜3a:屈折率=1.91、厚さ=20nm
シリコン酸化膜2a:屈折率=1.45
ニオブ酸化膜1a:屈折率=2.30、厚さ=5nm
透光性基板15(ガラス):屈折率=1.52、厚さ=500000nm
を固定して、シリコン酸化膜2aの膜厚を変えた場合におけるITO膜3a(透光性電極パターン)の有無による反射率差の変化を示してある。
FIG. 5 (a) shows the following conditions among the various examination results: Adhesive layer 30: Refractive index = 1.48, Thickness = 25,000 nm
ITO film 3a: refractive index = 1.91, thickness = 20 nm
Silicon oxide film 2a: Refractive index = 1.45
Niobium oxide film 1a: refractive index = 2.30, thickness = 5 nm
Translucent substrate 15 (glass): refractive index = 1.52, thickness = 500000 nm
The change in reflectance difference depending on the presence or absence of the ITO film 3a (translucent electrode pattern) when the film thickness of the silicon oxide film 2a is changed is shown.

また、図5(b)には、以下の条件
粘着剤層30:屈折率=1.48、厚さ=225000nm
ITO膜3a:屈折率=1.91、厚さ=20nm
シリコン酸化膜2a:厚さ=55nm
ニオブ酸化膜1a:屈折率=2.30、厚さ=5nm
透光性基板15(ガラス):屈折率=1.52、厚さ=500000nm
を固定して、シリコン酸化膜2aの屈折率を変えた場合におけるITO膜3a(透光性電極パターン)の有無による反射率差の変化を示してある。
FIG. 5B shows the following conditions: Adhesive layer 30: Refractive index = 1.48, Thickness = 225000 nm
ITO film 3a: refractive index = 1.91, thickness = 20 nm
Silicon oxide film 2a: thickness = 55 nm
Niobium oxide film 1a: refractive index = 2.30, thickness = 5 nm
Translucent substrate 15 (glass): refractive index = 1.52, thickness = 500000 nm
The change of the reflectance difference depending on the presence or absence of the ITO film 3a (translucent electrode pattern) when the refractive index of the silicon oxide film 2a is changed while fixing is shown.

図5(a)、図5(b)に示すように、シリコン酸化膜2aの膜厚を55nmあるいは75nmとし、屈折率を1.45に設定すると、ITO膜3a(透光性電極パターン)の有無による反射率差を最小とすることができ、第1の透光性電極パターン11および第2の透光性電極パターン12の存在を目立たなくすることができる。   As shown in FIGS. 5A and 5B, when the thickness of the silicon oxide film 2a is 55 nm or 75 nm and the refractive index is set to 1.45, the ITO film 3a (translucent electrode pattern) is formed. The difference in reflectance due to the presence or absence can be minimized, and the presence of the first light transmissive electrode pattern 11 and the second light transmissive electrode pattern 12 can be made inconspicuous.

シリコン酸化膜2aは、膜厚を55nmあるいは75nm、屈折率を1.45に設定した場合にITO膜3a(透光性電極パターン)の有無による反射率差が最小となるが、図5(a)、図5(b)に示すように、反射率差が0.05%以下となる範囲の膜厚(52nm〜60nmあるいは70nm〜78nm)および屈折率(1.425〜1.49)に設定すれば、第1の透光性電極パターン11および第2の透光性電極パターン12の存在を目立たなくする効果が得られる。   In the silicon oxide film 2a, when the film thickness is set to 55 nm or 75 nm and the refractive index is set to 1.45, the difference in reflectance due to the presence or absence of the ITO film 3a (translucent electrode pattern) is minimized. ), As shown in FIG. 5B, the film thickness (52 nm to 60 nm or 70 nm to 78 nm) and the refractive index (1.425 to 1.49) are set so that the difference in reflectance is 0.05% or less. If it does so, the effect which makes the presence of the 1st translucent electrode pattern 11 and the 2nd translucent electrode pattern 12 inconspicuous will be acquired.

(ITO膜3aの構成と、ITO膜3aの有無での反射率差との関係)
図6を参照して、本発明を適用した入力装置におけるITO膜3aの屈折率および膜厚と、ITO膜3aの有無による反射率差との関係を説明する。図6(a)、図6(b)は各々、本発明を適用した入力装置におけるITO膜3aの膜厚および屈折率と、ITO膜3a(透光性電極パターン)の有無による反射率差との関係を示すグラフである。
(Relationship between the configuration of the ITO film 3a and the difference in reflectance with and without the ITO film 3a)
With reference to FIG. 6, the relationship between the refractive index and film thickness of the ITO film 3a in the input device to which the present invention is applied and the difference in reflectance depending on the presence or absence of the ITO film 3a will be described. 6 (a) and 6 (b) respectively show the film thickness and refractive index of the ITO film 3a in the input device to which the present invention is applied, and the difference in reflectance depending on the presence or absence of the ITO film 3a (translucent electrode pattern). It is a graph which shows the relationship.

図6(a)には、各種検討結果のうち、以下の条件
粘着剤層30:屈折率=1.48、厚さ=225000nm
ITO膜3a:屈折率=1.91
シリコン酸化膜2a:屈折率=1.45、厚さ=55nm
ニオブ酸化膜1a:屈折率=2.30、厚さ=5nm
透光性基板15(ガラス):屈折率=1.52、厚さ=500000nm
を固定して、ITO膜3aの膜厚を変えた場合におけるITO膜3a(透光性電極パターン)の有無による反射率差の変化を示してある。
FIG. 6A shows the following conditions among the various examination results: Adhesive layer 30: Refractive index = 1.48, Thickness = 25,000 nm
ITO film 3a: Refractive index = 1.91
Silicon oxide film 2a: refractive index = 1.45, thickness = 55 nm
Niobium oxide film 1a: refractive index = 2.30, thickness = 5 nm
Translucent substrate 15 (glass): refractive index = 1.52, thickness = 500000 nm
The change in reflectance difference depending on the presence or absence of the ITO film 3a (translucent electrode pattern) when the film thickness of the ITO film 3a is changed is shown.

また、図6(b)には、以下の条件
粘着剤層30:屈折率=1.48、厚さ=225000nm
ITO膜3a:厚さ=20nm
シリコン酸化膜2a:厚さ=55nm
ニオブ酸化膜1a:屈折率=2.30、厚さ=5nm
透光性基板15(ガラス):屈折率=1.52、厚さ=500000nm
を固定して、ITO膜3aの屈折率を変えた場合におけるITO膜3a(透光性電極パターン)の有無による反射率差の変化を示してある。
FIG. 6B shows the following conditions: Adhesive layer 30: Refractive index = 1.48, Thickness = 225000 nm
ITO film 3a: thickness = 20 nm
Silicon oxide film 2a: thickness = 55 nm
Niobium oxide film 1a: refractive index = 2.30, thickness = 5 nm
Translucent substrate 15 (glass): refractive index = 1.52, thickness = 500000 nm
Is shown, and changes in the reflectance difference depending on the presence or absence of the ITO film 3a (translucent electrode pattern) when the refractive index of the ITO film 3a is changed are shown.

図6(a)、図6(b)に示すように、ITO膜3aの膜厚を20nmとし、屈折率を1.91に設定すると、ITO膜3a(透光性電極パターン)の有無による反射率差を最小とすることができ、第1の透光性電極パターン11および第2の透光性電極パターン12の存在を目立たなくすることができる。   As shown in FIGS. 6A and 6B, when the thickness of the ITO film 3a is set to 20 nm and the refractive index is set to 1.91, reflection due to the presence or absence of the ITO film 3a (translucent electrode pattern). The difference in rate can be minimized, and the presence of the first translucent electrode pattern 11 and the second translucent electrode pattern 12 can be made inconspicuous.

ITO膜3aは、膜厚を20nm、屈折率を1.91に設定した場合にITO膜3a(透光性電極パターン)の有無による反射率差が最小となるが、図6(a)、図6(b)に示すように、反射率差が0.1%以下となる範囲の膜厚(17nm〜23nm)および屈折率(1.87〜1.945)に設定すれば、第1の透光性電極パターン11および第2の透光性電極パターン12の存在を目立たなくする効果が得られる。   The ITO film 3a has a minimum difference in reflectance depending on the presence or absence of the ITO film 3a (translucent electrode pattern) when the film thickness is set to 20 nm and the refractive index is set to 1.91. As shown in FIG. 6B, if the film thickness (17 nm to 23 nm) and the refractive index (1.87 to 1.945) are set so that the difference in reflectance is 0.1% or less, An effect of making the presence of the photoelectrode pattern 11 and the second translucent electrode pattern 12 inconspicuous is obtained.

(入力装置10の製造方法)
図7(a)〜図7(e)は、本発明の実施の形態1に係る入力装置の製造方法を示す工程断面図である。なお、図7(a)〜図7(e)には、透光性電極パターン、交差部および金属配線を纏めて示してあり、左側には図3(a)に相当する部分を示し、右側には図3(b)に相当する部分を示してある。
(Manufacturing method of the input device 10)
FIG. 7A to FIG. 7E are process cross-sectional views illustrating the method for manufacturing the input device according to the first embodiment of the present invention. 7 (a) to 7 (e) collectively show the translucent electrode pattern, the intersecting portion, and the metal wiring, and the left side shows a portion corresponding to FIG. 3 (a), and the right side. FIG. 3 shows a portion corresponding to FIG.

本形態の入力装置10を製造するには、まず、図7(a)に示すように、透光性基板15(ガラス基板)の一方の面全体に、膜厚が5nmのニオブ酸化膜1a、膜厚が55nmのシリコン酸化膜2、および膜厚が20nmの多結晶のITO膜3を形成した後、金属膜9を形成する。このようにして、ニオブ酸化膜1aとシリコン酸化膜2との多層膜20(下地膜)の上にITO膜3および金属膜9を積層した状態とする。   In order to manufacture the input device 10 of the present embodiment, first, as shown in FIG. 7A, the niobium oxide film 1a having a film thickness of 5 nm is formed on one whole surface of the translucent substrate 15 (glass substrate). After forming the silicon oxide film 2 having a thickness of 55 nm and the polycrystalline ITO film 3 having a thickness of 20 nm, a metal film 9 is formed. In this way, the ITO film 3 and the metal film 9 are laminated on the multilayer film 20 (underlying film) of the niobium oxide film 1a and the silicon oxide film 2.

次に、金属膜の表面に感光性樹脂などからなるエッチングマスクを形成した状態で金属膜をエッチングし、図7(b)に示すように、金属配線9aをパターニング形成した後、エッチングマスクを除去する。   Next, the metal film is etched in a state where an etching mask made of a photosensitive resin or the like is formed on the surface of the metal film, and after forming the metal wiring 9a as shown in FIG. 7B, the etching mask is removed. To do.

次に、金属配線9aおよびITO膜3などの上層側に感光性樹脂などからなるエッチングマスクを形成した状態で、ITO膜3をエッチングし、図7(c)に示すように、第1の透光性電極パターン11および第2の透光性電極パターン12を同時にパターニング形成した後、エッチングマスクを除去する。このようにして形成した第1の透光性電極パターン11と第2の透光性電極パターン12との交差部分18において、第1の透光性電極パターン11は、パッド部(大面積部分)11aが接続部分11cを介して繋がっている一方、第2の透光性電極パターン12は途切れている。本形態でも、第1の透光性電極パターン11および第2の透光性電極パターン12をパターニング形成する際、多層膜20をパターニングしない分、第1の透光性電極パターン11および第2の透光性電極パターン12のパターニング形成を容易かつ効率よく行うことができるので、製造プロセスの簡素化を図ることができる。   Next, the ITO film 3 is etched in a state where an etching mask made of a photosensitive resin or the like is formed on the upper side of the metal wiring 9a and the ITO film 3 and the like, as shown in FIG. After the photoelectrode pattern 11 and the second translucent electrode pattern 12 are simultaneously formed by patterning, the etching mask is removed. At the intersection 18 between the first translucent electrode pattern 11 and the second translucent electrode pattern 12 formed in this way, the first translucent electrode pattern 11 has a pad portion (large area portion). While 11a is connected via the connection part 11c, the 2nd translucent electrode pattern 12 is interrupted. Also in this embodiment, when the first light transmissive electrode pattern 11 and the second light transmissive electrode pattern 12 are formed by patterning, the first light transmissive electrode pattern 11 and the second light transmissive electrode pattern 11 and the second light transmissive electrode pattern 12 are not patterned. Since the patterning formation of the translucent electrode pattern 12 can be performed easily and efficiently, the manufacturing process can be simplified.

次に、第1の透光性電極パターン11および第2の透光性電極パターン12の表面側にアクリル樹脂を塗布した後、露光現像し、図7(d)に示すように、第1の透光性電極パターン11の接続部分11cを覆うように層間絶縁膜4aを形成する。   Next, after acrylic resin is applied to the surface side of the first light-transmissive electrode pattern 11 and the second light-transmissive electrode pattern 12, exposure and development are performed, and as shown in FIG. An interlayer insulating film 4 a is formed so as to cover the connection portion 11 c of the translucent electrode pattern 11.

次に、層間絶縁膜4aの上層側にアモルファスのITO膜を形成した後、ITO膜の表面に感光性樹脂などからなるエッチングマスクを形成した状態でITO膜をエッチングし、図7(e)に示すように、層間絶縁膜4aの上層に、第2の透光性電極パターン12の途切れ部分を繋ぐように中継電極5aを形成する。しかる後には、温度が200℃以上の条件、例えば、温度が220℃、時間が20分〜30分の条件で焼成を行い、中継電極5aを構成するITO膜を多結晶のITO膜とする。アモルファスのITO膜であればシュウ酸などでエッチングでき、シュウ酸であれば多結晶のITO膜をエッチングしないので、中継電極5aをパターニング形成する際、第1の透光性電極パターン11および第2の透光性電極パターン12を構成するITO膜3aが損傷することがない。また、焼成により、中継電極5aを構成するITO膜を多結晶のITO膜とするため、中継電極5aの電気的抵抗を低減することもできる。   Next, after an amorphous ITO film is formed on the upper side of the interlayer insulating film 4a, the ITO film is etched with an etching mask made of a photosensitive resin or the like formed on the surface of the ITO film, and FIG. As shown, the relay electrode 5a is formed on the interlayer insulating film 4a so as to connect the discontinuous portion of the second light transmissive electrode pattern 12. Thereafter, baking is performed under conditions where the temperature is 200 ° C. or higher, for example, the temperature is 220 ° C. and the time is 20 minutes to 30 minutes, and the ITO film constituting the relay electrode 5a is made into a polycrystalline ITO film. If it is an amorphous ITO film, it can be etched with oxalic acid or the like, and if it is oxalic acid, the polycrystalline ITO film is not etched. Therefore, when the relay electrode 5a is formed by patterning, the first translucent electrode pattern 11 and the second translucent electrode pattern 11 are formed. The ITO film 3a constituting the translucent electrode pattern 12 is not damaged. Moreover, since the ITO film which comprises the relay electrode 5a is made into a polycrystalline ITO film | membrane by baking, the electrical resistance of the relay electrode 5a can also be reduced.

(本形態の主な効果)
以上説明したように、本形態では、第1の透光性電極パターン11および第2の透光性電極パターン12の下層側は、異なる屈折率を備えた透光性薄膜同士が重なるように形成された多層膜20(ニオブ酸化膜1a、シリコン酸化膜2a)が形成されているため、第1の透光性電極パターン11および第2の透光性電極パターン12が形成されている領域と、第1の透光性電極パターン11および第2の透光性電極パターン12が形成されていない領域との反射率の差を解消することできる。すなわち、本形態では、透光性基板15がガラス基板であって、厚さが20nmのITO膜3aからなる第1の透光性電極パターン11および第2の透光性電極パターン12に対して、膜厚が5nmのニオブ酸化膜1aと膜厚が55nmのシリコン酸化膜2aからなる多層膜20を下地膜として積層し、各界面で反射した光の位相を逆転させ打ち消し合う構成になっている。このため、第1の透光性電極パターン11および第2の透光性電極パターン12が形成されている領域と、第1の透光性電極パターン11および第2の透光性電極パターン12が形成されていない領域との反射率の差を解消できるので、第1の透光性電極パターン11および第2の透光性電極パターン12の存在が見えてしまうことを防止することができる。
(Main effects of this form)
As described above, in this embodiment, the lower layers of the first and second translucent electrode patterns 11 and 12 are formed so that the translucent thin films having different refractive indexes overlap each other. Since the multilayer film 20 (niobium oxide film 1a, silicon oxide film 2a) formed is formed, a region where the first light-transmissive electrode pattern 11 and the second light-transmissive electrode pattern 12 are formed, It is possible to eliminate the difference in reflectance from the region where the first light transmissive electrode pattern 11 and the second light transmissive electrode pattern 12 are not formed. That is, in this embodiment, the light-transmitting substrate 15 is a glass substrate, and the first light-transmitting electrode pattern 11 and the second light-transmitting electrode pattern 12 made of the ITO film 3a having a thickness of 20 nm are used. A multilayer film 20 composed of a niobium oxide film 1a having a thickness of 5 nm and a silicon oxide film 2a having a thickness of 55 nm is laminated as a base film, and the phases of the light reflected at each interface are reversed to cancel each other. . For this reason, the area | region in which the 1st translucent electrode pattern 11 and the 2nd translucent electrode pattern 12 are formed, and the 1st translucent electrode pattern 11 and the 2nd translucent electrode pattern 12 are Since the difference in reflectance from the region where the film is not formed can be eliminated, it is possible to prevent the presence of the first light-transmissive electrode pattern 11 and the second light-transmissive electrode pattern 12 from being seen.

逆に言えば、本発明では、第1の透光性電極パターン11および第2の透光性電極パターン12に対して、膜厚が5nmのニオブ酸化膜1aと膜厚が55nmのシリコン酸化膜2aからなる多層膜20を下地膜として積層してあるため、第1の透光性電極パターン11および第2の透光性電極パターン12として、20nmという厚いITO膜3aを用いることができ、第1の透光性電極パターン11および第2の透光性電極パターン12の電気抵抗を低減した場合でも、第1の透光性電極パターン11および第2の透光性電極パターン12の存在が見えてしまうことを防止することができる。   Conversely, in the present invention, the niobium oxide film 1a having a film thickness of 5 nm and the silicon oxide film having a film thickness of 55 nm with respect to the first light-transmitting electrode pattern 11 and the second light-transmitting electrode pattern 12. Since the multilayer film 20 made of 2a is laminated as a base film, a thick ITO film 3a of 20 nm can be used as the first translucent electrode pattern 11 and the second translucent electrode pattern 12, Even when the electrical resistance of the first translucent electrode pattern 11 and the second translucent electrode pattern 12 is reduced, the presence of the first translucent electrode pattern 11 and the second translucent electrode pattern 12 is visible. Can be prevented.

特に本形態では、第1の透光性電極パターン11および第2の透光性電極パターン12が大面積のパッド部(大面積部分)11a,12aを備えているため、目立ちやすい形状であるが、本発明を適用すれば、かかる形状の第1の透光性電極パターン11および第2の透光性電極パターン12を形成した場合でも、目立つのを確実に防止することができる。   In particular, in this embodiment, the first translucent electrode pattern 11 and the second translucent electrode pattern 12 have large-area pad portions (large-area portions) 11a and 12a, so that the shape is easily noticeable. When the present invention is applied, even when the first light-transmitting electrode pattern 11 and the second light-transmitting electrode pattern 12 having such a shape are formed, the conspicuousness can be reliably prevented.

また、本形態では、透光性基板15の同一面上に第1の透光性電極パターン11および第2の透光性電極パターン12が形成されているため、透光性基板15の表面および裏面の各々に第1の透光性電極パターン11および第2の透光性電極パターン12を形成した場合と比較して製造プロセスを簡素化できる。しかも、第1の透光性電極パターン11と第2の透光性電極パターン12とが同一層により形成されているため、第1の透光性電極パターン11および第2の透光性電極パターン12を異なる層により形成した場合と比較して製造プロセスを簡素化することができる。   In the present embodiment, since the first translucent electrode pattern 11 and the second translucent electrode pattern 12 are formed on the same surface of the translucent substrate 15, the surface of the translucent substrate 15 and A manufacturing process can be simplified compared with the case where the 1st translucent electrode pattern 11 and the 2nd translucent electrode pattern 12 are formed in each of the back surface. In addition, since the first translucent electrode pattern 11 and the second translucent electrode pattern 12 are formed of the same layer, the first translucent electrode pattern 11 and the second translucent electrode pattern. The manufacturing process can be simplified as compared with the case where 12 is formed of different layers.

ここで、第1の透光性電極パターン11および第2の透光性電極パターン12を透光性板15の同一面側に同一層により形成すると、第1の透光性電極パターン11と第2の透光性電極パターン12とを交差させる必要があり、かかる交差部分18の膜構成は、第1の透光性電極パターン11および第2の透光性電極パターン12と相違してしまう。このため、第1の透光性電極パターン11および第2の透光性電極パターン12の存在を目立たなくしても、交差部分18の存在が目立ってしまう。しかるに本形態では、第2の透光性電極パターン12の途切れ部分については、層間絶縁膜4aの上層に形成された中継電極5aによって、電気的に接続する構成を採用し、かつ、第1の透光性電極パターン11において交差部分18に位置する接続部分11c、および中継電極5aを細幅にしたため、交差部分18が占める面積が狭い。また、中継電極5aは膜厚が10nm〜15nmのITO膜からなり、層間絶縁膜4aは、アクリル樹脂からなるため、交差部分18についても、その存在が目立たない。それ故、本発明によれば、入力装置10の入力面10b側からみた際、交差部分18の存在が目立たないので、液晶装置50などで表示された画像を入力装置10の入力面10b側からみた際、画像の品位が高い。   Here, when the first translucent electrode pattern 11 and the second translucent electrode pattern 12 are formed of the same layer on the same surface side of the translucent plate 15, the first translucent electrode pattern 11 and the second translucent electrode pattern 11 are formed. It is necessary to cross the two translucent electrode patterns 12, and the film configuration of the intersecting portion 18 is different from the first translucent electrode pattern 11 and the second translucent electrode pattern 12. For this reason, even if the presence of the first translucent electrode pattern 11 and the second translucent electrode pattern 12 is inconspicuous, the presence of the intersecting portion 18 becomes conspicuous. However, in the present embodiment, the discontinuous portion of the second translucent electrode pattern 12 employs a configuration in which it is electrically connected by the relay electrode 5a formed in the upper layer of the interlayer insulating film 4a, and the first In the translucent electrode pattern 11, the connecting portion 11c located at the intersecting portion 18 and the relay electrode 5a are made narrow, so that the area occupied by the intersecting portion 18 is small. Further, since the relay electrode 5a is made of an ITO film having a film thickness of 10 nm to 15 nm, and the interlayer insulating film 4a is made of acrylic resin, the presence of the intersecting portion 18 is also unnoticeable. Therefore, according to the present invention, the presence of the intersection 18 is not noticeable when viewed from the input surface 10b side of the input device 10. Therefore, an image displayed on the liquid crystal device 50 or the like is displayed from the input surface 10b side of the input device 10. When viewed, the image quality is high.

[実施の形態2]
(全体構成)
図8は、本発明の実施の形態2に係る入力装置に形成した第1の透光性電極パターンおよび第2の透光性電極パターンの平面的な構成を示す説明図である。図9(a)、図9(b)は各々、本発明の実施の形態2に係る入力装置を図8のA2−A2'線に相当する位置で切断したときの様子を模式的に示す断面図、および透光性電極パターンと金属配線との接続構造を示す断面図である。なお、本形態の基本的な構成は実施の形態1と同様であるため、共通する部分には同一の符号を付して図示することにしてそれらの説明を省略する。
[Embodiment 2]
(overall structure)
FIG. 8 is an explanatory diagram showing a planar configuration of the first and second translucent electrode patterns formed in the input device according to the second embodiment of the present invention. 9 (a) and 9 (b) are cross-sectional views schematically showing a state when the input device according to the second embodiment of the present invention is cut at a position corresponding to the line A2-A2 ′ of FIG. It is sectional drawing which shows the connection structure of a figure and a translucent electrode pattern and metal wiring. Since the basic configuration of the present embodiment is the same as that of the first embodiment, common portions are denoted by the same reference numerals, and description thereof is omitted.

図8および図9(a)において、本形態の入力装置10も、実施の形態1と同様、静電容量型のタッチパネルであり、透光性基板15の入力面10bのうち、入力領域10aには、第1の方向に延在する複数列の第1の透光性電極パターン11と、第1の方向に交差する第2の方向に延在する複数列の第2の透光性電極パターン12とが形成されている。第1の透光性電極パターン11および第2の透光性電極パターン12はいずれも、透光性基板15の同一面上に対してITO膜3aにより構成され、その下層側には、多層膜20(ニオブ酸化膜1a、シリコン酸化膜2a)が形成されている。また、第1の透光性電極パターン11と第2の透光性電極パターン12との交差部分18において、第1の透光性電極パターン11は繋がっている一方、第2の透光性電極パターン12は途切れている。さらに、透光性基板15において第1の透光性電極パターン11および第2の透光性電極パターン12が形成されている側の面には、入力領域10aに粘着剤層30(透光性樹脂層)により透光性のカバー基板40が貼られている。   In FIG. 8 and FIG. 9A, the input device 10 of this embodiment is also a capacitive touch panel as in the first embodiment, and the input area 10a of the input surface 10b of the translucent substrate 15 is placed in the input region 10a. Are a plurality of rows of first translucent electrode patterns 11 extending in a first direction and a plurality of rows of second translucent electrode patterns extending in a second direction intersecting the first direction. 12 are formed. Both the first translucent electrode pattern 11 and the second translucent electrode pattern 12 are formed of the ITO film 3a on the same surface of the translucent substrate 15, and a multilayer film is formed on the lower layer side thereof. 20 (niobium oxide film 1a, silicon oxide film 2a) is formed. In addition, at the intersection 18 between the first translucent electrode pattern 11 and the second translucent electrode pattern 12, the first translucent electrode pattern 11 is connected to the second translucent electrode. The pattern 12 is interrupted. Furthermore, the pressure-sensitive adhesive layer 30 (light-transmitting property) is formed on the input region 10a on the surface of the light-transmitting substrate 15 where the first light-transmitting electrode pattern 11 and the second light-transmitting electrode pattern 12 are formed. A translucent cover substrate 40 is affixed by the resin layer.

ここで、第1の透光性電極パターン11および第2の透光性電極パターン12の上層側には、透光性の層間絶縁膜4b(透光性樹脂層)が入力領域10aの略全体に形成され、かかる層間絶縁膜4bの上層には、層間絶縁膜4bのコンタクトホール4cを介して、交差部分18で途切れている第2の透光性電極パターン12同士を電気的に接続する透光性の中継電極5aが形成されている。このため、第2の透光性電極パターン12は第2の方向で電気的に接続されている。   Here, on the upper layer side of the first translucent electrode pattern 11 and the second translucent electrode pattern 12, a translucent interlayer insulating film 4b (translucent resin layer) is formed on the entire input region 10a. In the upper layer of the interlayer insulating film 4b, the second translucent electrode patterns 12 that are interrupted at the intersection 18 are electrically connected to each other through the contact hole 4c of the interlayer insulating film 4b. An optical relay electrode 5a is formed. For this reason, the 2nd translucent electrode pattern 12 is electrically connected by the 2nd direction.

本形態においても、実施の形態1と略同様、各層の屈折率や膜厚は、以下のリスト
粘着剤層30:屈折率=1.48、厚さ=225000nm
層間絶縁膜4b:屈折率=1.52、厚さ=1500nm
ITO膜3a:屈折率=1.91、厚さ=20nm
シリコン酸化膜2a:屈折率=1.45、厚さ=55nm
ニオブ酸化膜1a:屈折率=2.30、厚さ=5nm
透光性基板15(ガラス):屈折率=1.52、厚さ=500000nm
に示す条件に設定してある。
Also in this embodiment, as in Embodiment 1, the refractive index and film thickness of each layer are as follows: Adhesive layer 30: Refractive index = 1.48, Thickness = 25,000 nm
Interlayer insulating film 4b: refractive index = 1.52, thickness = 1500 nm
ITO film 3a: refractive index = 1.91, thickness = 20 nm
Silicon oxide film 2a: refractive index = 1.45, thickness = 55 nm
Niobium oxide film 1a: refractive index = 2.30, thickness = 5 nm
Translucent substrate 15 (glass): refractive index = 1.52, thickness = 500000 nm
Is set to the conditions shown in

実施の形態1の図4(a)、図4(b)は、ニオブ酸化膜の膜厚と屈折率、図5(a)、図5(b)は、シリコン酸化膜の膜厚と屈折率、図6(a)、図6(b)は、ITO膜の膜厚と屈折率を変化させた場合であり、かつ層間絶縁膜4b無し(厚さ=0nm)で粘着剤層を有した場合におけるITO膜3a(透光性電極パターン)の有無による反射率差の変化を示したものである。本実の施形態2は、層間絶縁膜4bの屈折率(=1.52)が粘着剤層の屈折率(=1.48)に近く、層間絶縁膜4bの膜厚(=1500nm)が粘着剤層の膜厚(=225000nm)に比べ著しく薄いため、ITO膜3a(透光性電極パターン)の有無による反射率差の数値の結果は略同等である。すなわち、図4(a)、図4(b)は、ニオブ酸化膜の膜厚と屈折率、図5(a)、図5(b)は、シリコン酸化膜の膜厚と屈折率、図6(a)、図6(b)は、ITO膜の膜厚と屈折率を変化させた場合であり、かつ層間絶縁膜4b(厚さ=1500nm、屈折率=1.52)で粘着剤層(厚さ=225000nm、屈折率=1.48)を有した場合におけるITO膜3a(透光性電極パターン)の有無による反射率差の変化を示したものである。   4A and 4B of the first embodiment are the thickness and refractive index of the niobium oxide film, and FIGS. 5A and 5B are the thickness and refractive index of the silicon oxide film. 6 (a) and 6 (b) show the case where the thickness and refractive index of the ITO film are changed, and the case where the adhesive layer is provided without the interlayer insulating film 4b (thickness = 0 nm). 4 shows changes in reflectance difference depending on the presence or absence of the ITO film 3a (translucent electrode pattern). In the actual embodiment 2, the refractive index (= 1.52) of the interlayer insulating film 4b is close to the refractive index (= 1.48) of the adhesive layer, and the film thickness (= 1500 nm) of the interlayer insulating film 4b is adhesive. Since it is remarkably thinner than the film thickness (= 225000 nm) of the agent layer, the numerical results of the difference in reflectance depending on the presence or absence of the ITO film 3a (translucent electrode pattern) are substantially the same. 4A and 4B show the thickness and refractive index of the niobium oxide film, FIGS. 5A and 5B show the thickness and refractive index of the silicon oxide film, and FIG. 6A and 6B show the case where the thickness and refractive index of the ITO film are changed, and the adhesive layer (thickness = 1500 nm, refractive index = 1.52) is used as the adhesive layer ( This shows the change in the reflectance difference depending on the presence or absence of the ITO film 3a (translucent electrode pattern) when it has a thickness = 25,000 nm and a refractive index = 1.48.

第1の透光性電極パターン11および第2の透光性電極パターン12は各々、交差部分18で挟まれた領域に菱形形状のパッド部を備えており、第1の電極パターンにおいて交差部分18に位置する接続部分11cは、パッド部より幅の狭い細幅形状になっている。また、中継電極5aも、パッド部より幅の狭い細幅形状で短冊状に形成されている。   Each of the first translucent electrode pattern 11 and the second translucent electrode pattern 12 includes a rhombus-shaped pad portion in a region sandwiched between the intersecting portions 18, and the intersecting portion 18 in the first electrode pattern. The connecting portion 11c located in the shape of the narrow portion is narrower than the pad portion. The relay electrode 5a is also formed in a strip shape having a narrow width narrower than the pad portion.

図9(b)に示すように、透光性基板15において入力領域10aの外側領域には、第1の透光性電極パターン11および第2の透光性電極パターン12の各々に電気的に接続する複数の金属配線9aが形成されており、これらの金属配線9aの端部は、フレキシブル基板を接続するための端子19aを構成している。   As shown in FIG. 9B, in the translucent substrate 15, the first translucent electrode pattern 11 and the second translucent electrode pattern 12 are electrically connected to the outer region of the input region 10 a. A plurality of metal wirings 9a to be connected are formed, and ends of these metal wirings 9a constitute terminals 19a for connecting a flexible substrate.

(入力装置10の製造方法)
図10(a)〜図10(e)は、本発明の実施の形態2に係る入力装置の製造方法を示す工程断面図である。なお、図10(a)〜図10(e)には、透光性電極パターン、交差部および金属配線を纏めて示してあり、左側には図9(a)に相当する部分を示し、右側には図9(b)に相当する部分を示してある。
(Manufacturing method of the input device 10)
FIG. 10A to FIG. 10E are process cross-sectional views illustrating a method for manufacturing an input device according to Embodiment 2 of the present invention. 10 (a) to 10 (e) collectively show the translucent electrode pattern, the intersecting portion, and the metal wiring, and the left side shows a portion corresponding to FIG. 9 (a), and the right side. FIG. 9 shows a portion corresponding to FIG.

本形態の入力装置10を製造するには、まず、図10(a)に示すように、透光性基板15(ガラス基板)の一方の面全体に、膜厚が5nmの多結晶のニオブ酸化膜1a、膜厚が55nmのシリコン酸化膜2、および膜厚が20nmの多結晶のITO膜3を形成した後、金属膜9を形成する。   In order to manufacture the input device 10 of this embodiment, first, as shown in FIG. 10A, a polycrystalline niobium oxide film having a film thickness of 5 nm is formed on one whole surface of a light-transmitting substrate 15 (glass substrate). After forming the film 1a, the silicon oxide film 2 having a thickness of 55 nm, and the polycrystalline ITO film 3 having a thickness of 20 nm, a metal film 9 is formed.

次に、金属膜9の表面に感光性樹脂などからなるエッチングマスクを形成した状態で金属膜をエッチングし、図10(b)に示すように、金属配線9aをパターニング形成した後、エッチングマスクを除去する。   Next, the metal film is etched in a state where an etching mask made of a photosensitive resin or the like is formed on the surface of the metal film 9, and the metal wiring 9a is formed by patterning as shown in FIG. Remove.

次に、金属配線9aなどの上層側に感光性樹脂などからなるエッチングマスクを形成した状態で、ITO膜3をエッチングし、図10(c)に示すように、第1の透光性電極パターン11および第2の透光性電極パターン12を構成するITO膜3aをパターニング形成する。次に、エッチングマスクを除去する。   Next, the ITO film 3 is etched in a state where an etching mask made of a photosensitive resin or the like is formed on the upper layer side of the metal wiring 9a or the like, and as shown in FIG. The ITO film 3a constituting the 11 and the second translucent electrode pattern 12 is formed by patterning. Next, the etching mask is removed.

次に、第1の透光性電極パターン11および第2の透光性電極パターン12の表面側にアクリル樹脂を塗布した後、露光現像し、図10(d)に示すように、第1の透光性電極パターン11と第2の透光性電極パターン12の交差部分18に重なるように層間絶縁膜4bを形成する。その際、層間絶縁膜4bにはコンタクトホール4cが同時形成される。   Next, after an acrylic resin is applied to the surface side of the first translucent electrode pattern 11 and the second translucent electrode pattern 12, exposure and development are performed, and as shown in FIG. An interlayer insulating film 4 b is formed so as to overlap the intersecting portion 18 of the translucent electrode pattern 11 and the second translucent electrode pattern 12. At that time, a contact hole 4c is simultaneously formed in the interlayer insulating film 4b.

次に、層間絶縁膜4bの上層側に多結晶のITO膜を形成した後、ITO膜の表面に感光性樹脂などからなるエッチングマスクを形成した状態でITO膜をエッチングし、中継電極5aを形成する。その際、第1の透光性電極パターン11および第2の透光性電極パターン12は、層間絶縁膜4bで覆われているので、第1の透光性電極パターン11および第2の透光性電極パターン12が損傷することがない。また、多結晶のITO膜の代わりに、アモルファスのITO膜を形成し、感光性樹脂などからなるエッチングマスクを形成した状態でシュウ酸によりエッチングし、パターン形成後にアニールして多結晶のITO膜にしてもよい。   Next, after forming a polycrystalline ITO film on the upper side of the interlayer insulating film 4b, the ITO film is etched with an etching mask made of a photosensitive resin or the like formed on the surface of the ITO film to form the relay electrode 5a. To do. At that time, since the first light-transmissive electrode pattern 11 and the second light-transmissive electrode pattern 12 are covered with the interlayer insulating film 4b, the first light-transmissive electrode pattern 11 and the second light-transmissive electrode pattern 11 are covered. The conductive electrode pattern 12 is not damaged. Also, instead of the polycrystalline ITO film, an amorphous ITO film is formed, etched with oxalic acid with an etching mask made of photosensitive resin, etc., and annealed after pattern formation to form a polycrystalline ITO film. May be.

(本形態の主な効果)
以上説明したように、本形態でも、実施の形態1と同様、第1の透光性電極パターン11および第2の透光性電極パターン12の下層側には多層膜(ニオブ酸化膜1aおよびシリコン酸化膜2a)が形成されているため、透光性電極パターンが形成されている領域と、透光性電極パターンが形成されていない領域との反射率の差を解消することできるので、第1の透光性電極パターン11および第2の透光性電極パターン12の存在が目立たないなど、実施の形態1と同様な効果を奏する。
(Main effects of this form)
As described above, also in this embodiment, as in the first embodiment, a multilayer film (niobium oxide film 1a and silicon) is formed on the lower layer side of the first translucent electrode pattern 11 and the second translucent electrode pattern 12. Since the oxide film 2a) is formed, the difference in reflectance between the region where the translucent electrode pattern is formed and the region where the translucent electrode pattern is not formed can be eliminated. The same effects as those of the first embodiment are obtained, for example, the presence of the translucent electrode pattern 11 and the second translucent electrode pattern 12 is inconspicuous.

[その他の実施の形態]
上記形態では、金属配線9aの端部をそのまま、端子19aとして利用したが、金属配線9aの端部の上層にITO層を中継電極5aと同時形成し、端子19aとしてもよい。また、実施の形態2では、入力領域10aのみに層間絶縁膜4bを形成したが、端子19aの表面を除く略全面に層間絶縁膜4bを形成してもよい。
[Other embodiments]
In the above embodiment, the end of the metal wiring 9a is used as it is as the terminal 19a. However, an ITO layer may be formed simultaneously with the relay electrode 5a on the upper end of the metal wiring 9a to form the terminal 19a. In the second embodiment, the interlayer insulating film 4b is formed only in the input region 10a. However, the interlayer insulating film 4b may be formed on substantially the entire surface except the surface of the terminal 19a.

また、上記実施の形態では、薄膜光学干渉を用いた多層膜構成の例として、シリコン酸化膜2aの膜厚を厚さ=55nmを中心に説明したが、図5(a)に示す結果に基づいて75nmとしてもよい。   In the above embodiment, as an example of the multilayer structure using thin film optical interference, the thickness of the silicon oxide film 2a has been described centering on the thickness = 55 nm. However, based on the result shown in FIG. It may be 75 nm.

また、ニオブ酸化膜1a、シリコン酸化膜2aおよびITO膜3aの膜厚、屈折率については、10%程度の許容範囲を設定しても、透光性電極パターンが形成されている領域と、透光性電極パターンが形成されていない領域との反射率の差をかなり圧縮することができる。   Further, the film thickness and refractive index of the niobium oxide film 1a, the silicon oxide film 2a, and the ITO film 3a are not limited to the region where the translucent electrode pattern is formed, even though the allowable range of about 10% is set. The difference in reflectance from the region where the photoelectrode pattern is not formed can be considerably compressed.

上記形態では、画像生成装置としての液晶装置50を用いたが、有機エレクトロルミネッセンス装置やプラズマ表示装置を画像生成装置として用いてもよい。   In the above embodiment, the liquid crystal device 50 as the image generation device is used, but an organic electroluminescence device or a plasma display device may be used as the image generation device.

[電子機器への搭載例]
次に、上述した実施の形態に係る入力機能付き表示装置100を適用した電子機器について説明する。図11(a)に、入力機能付き表示装置100を備えたモバイル型のパーソナルコンピュータの構成を示す。パーソナルコンピュータ2000は、表示ユニットとしての入力機能付き表示装置100と本体部2010を備える。本体部2010には、電源スイッチ2001およびキーボード2002が設けられている。図11(b)に、入力機能付き表示装置100を備えた携帯電話機の構成を示す。携帯電話機3000は、複数の操作ボタン3001およびスクロールボタン3002、並びに表示ユニットとしての入力機能付き表示装置100を備える。スクロールボタン3002を操作することによって、入力機能付き表示装置100に表示される画面がスクロールされる。図11(c)に、入力機能付き表示装置100を適用した情報携帯端末(PDA:Personal Digital Assistants)の構成を示す。情報携帯端末4000は、複数の操作ボタン4001および電源スイッチ4002、並びに表示ユニットとしての入力機能付き表示装置100を備える。電源スイッチ4002を操作すると、住所録やスケジュール帳といった各種の情報が入力機能付き表示装置100に表示される。
[Example of mounting on electronic devices]
Next, an electronic apparatus to which the display device with an input function 100 according to the above-described embodiment is applied will be described. FIG. 11A shows a configuration of a mobile personal computer including the display device 100 with an input function. The personal computer 2000 includes a display device 100 with an input function as a display unit and a main body 2010. The main body 2010 is provided with a power switch 2001 and a keyboard 2002. FIG. 11B shows a configuration of a mobile phone including the display device 100 with an input function. A cellular phone 3000 includes a plurality of operation buttons 3001, scroll buttons 3002, and the display device 100 with an input function as a display unit. By operating the scroll button 3002, the screen displayed on the display device 100 with an input function is scrolled. FIG. 11C shows a configuration of a portable information terminal (PDA: Personal Digital Assistants) to which the display device 100 with an input function is applied. The information portable terminal 4000 includes a plurality of operation buttons 4001, a power switch 4002, and the display device 100 with an input function as a display unit. When the power switch 4002 is operated, various kinds of information such as an address book and a schedule book are displayed on the display device 100 with an input function.

なお、入力機能付き表示装置100が適用される電子機器としては、図11に示すものの他、デジタルスチルカメラ、液晶テレビ、カーナビゲーション装置、ページャ、電子手帳、電卓、ワードプロセッサ、ワークステーション、テレビ電話、POS端末などの端末機器等などが挙げられる。   Note that electronic devices to which the display device 100 with an input function is applied include those shown in FIG. 11, a digital still camera, a liquid crystal television, a car navigation device, a pager, an electronic notebook, a calculator, a word processor, a workstation, a videophone, Examples thereof include terminal devices such as POS terminals.

1a…ニオブ酸化膜、2a…シリコン酸化膜、3a…ITO膜、4a,4b…層間絶縁膜、5a…中継電極、9a…金属配線、10…入力装置、11…第1の透光性電極パターン、12…第2の透光性電極パターン、15…透光性基板、18…交差部分、11a,12a…パッド部(大面積部分)、11c…接続部分、50…画像生成装置としての液晶装置、100…表示ユニットとしての入力機能付き表示装置。   DESCRIPTION OF SYMBOLS 1a ... Niobium oxide film, 2a ... Silicon oxide film, 3a ... ITO film, 4a, 4b ... Interlayer insulation film, 5a ... Relay electrode, 9a ... Metal wiring, 10 ... Input device, 11 ... 1st translucent electrode pattern , 12 ... 2nd translucent electrode pattern, 15 ... Translucent substrate, 18 ... Crossing part, 11a, 12a ... Pad part (large area part), 11c ... Connection part, 50 ... Liquid crystal device as an image generation apparatus , 100... Display device with input function as a display unit.

Claims (11)

透光性基板と、
前記透光性基板の一方の面に形成され、異なる屈折率を備えた複数の透光性薄膜を含み、当該複数の透光性薄膜の一つの透光性薄膜がニオブ酸化膜である多層膜と、
第1の方向に延在する複数の第1の透光性電極と、
前記第1の方向に交差する第2の方向に延在する複数の第2の透光性電極と、を備え、
前記第1および第2の透光性電極は、前記透光性基板の入力領域の前記多層膜上の同層に形成され、前記第1および第2の透光性電極と前記多層膜とにより光干渉を利用した反射防止膜を構成する
静電容量型入力装置。
A translucent substrate;
A multilayer film formed on one surface of the translucent substrate, including a plurality of translucent thin films having different refractive indexes, wherein one translucent thin film of the translucent thin films is a niobium oxide film When,
A plurality of first translucent electrodes extending in a first direction;
A plurality of second translucent electrodes extending in a second direction intersecting the first direction,
The first and second translucent electrodes are formed in the same layer on the multi-layer film in the input region of the translucent substrate, and are formed by the first and second translucent electrodes and the multi-layer film. A capacitive input device that constitutes an antireflection film using optical interference.
前記第1の透光性電極と前記第2の透光性電極との交差部分では、前記第1の透光性電極および前記第2の透光性電極のうちの一方の電極が互いに繋がっている一方、他方の電極は互いに途切れており、
少なくとも前記交差部分における前記一方の電極の上層側に透光性の層間絶縁膜が形成されているとともに、当該層間絶縁膜の上層には、当該交差部分で途切れている前記他方の電極同士を電気的に接続する透光性の中継電極が形成されている
請求項1に記載の静電容量型入力装置。
At the intersection of the first translucent electrode and the second translucent electrode, one of the first translucent electrode and the second translucent electrode is connected to each other. While the other electrode is disconnected from each other,
A translucent interlayer insulating film is formed at least on the upper layer side of the one electrode at the intersecting portion, and the other electrode interrupted at the intersecting portion is electrically connected to the upper layer of the interlayer insulating film. The capacitive input device according to claim 1, wherein a translucent relay electrode to be connected is formed.
前記多層膜は、前記入力領域において前記第1の透光性電極および前記第2の透光性電極が形成されていない領域を含む全領域に形成されている
請求項1または請求項2に記載の静電容量型入力装置。
The multilayer film is formed in the entire region including a region where the first light-transmissive electrode and the second light-transmissive electrode are not formed in the input region. Capacitive input device.
前記第1および第2の透光性電極は、同一材料、かつ、同一膜厚の透光性電極膜を形成し、
前記反射防止膜は、前記透光性基板、前記多層膜、および前記透光性電極膜が形成する界面での反射光が互いに打ち消しあい、外部から入射した光の反射を低減するように前記多層膜の各膜および前記透光性電極膜の屈折率および膜厚が設定されている
請求項1乃至請求項3のいずれか一項に記載の静電容量型入力装置。
The first and second translucent electrodes form a translucent electrode film having the same material and the same film thickness,
The antireflection film is formed so that reflected light at an interface formed by the translucent substrate, the multilayer film, and the translucent electrode film cancels each other and reduces reflection of light incident from the outside. The electrostatic capacity type input device according to any one of claims 1 to 3, wherein a refractive index and a film thickness of each film of the film and the translucent electrode film are set.
前記透光性基板はガラス基板であり、
前記第1の透光性電極および前記第2の透光性電極は、ITO膜からなり、
前記多層膜は、前記透光性基板上に形成されたニオブ酸化膜と、該ニオブ酸化膜上に積層されたシリコン酸化膜とからなる
請求項1乃至請求項4のいずれか一項に記載の静電容量型入力装置。
The translucent substrate is a glass substrate;
The first translucent electrode and the second translucent electrode are made of an ITO film,
The multilayer film includes a niobium oxide film formed on the translucent substrate and a silicon oxide film stacked on the niobium oxide film. Capacitance type input device.
前記ニオブ酸化膜は、膜厚が4nm〜6nm、かつ、屈折率が2.22〜2.37であり、
前記シリコン酸化膜は、膜厚が52nm〜60nmあるいは70nm〜78nm、かつ、屈折率が1.425〜1.49であり、
前記ITO膜は、膜厚が17nm〜23nm、かつ、屈折率が1.87〜1.945である
請求項5に記載の静電容量型入力装置。
The niobium oxide film has a thickness of 4 nm to 6 nm and a refractive index of 2.22 to 2.37.
The silicon oxide film has a thickness of 52 nm to 60 nm or 70 nm to 78 nm, and a refractive index of 1.425 to 1.49.
The capacitive input device according to claim 5, wherein the ITO film has a thickness of 17 nm to 23 nm and a refractive index of 1.87 to 1.945.
前記透光性基板において前記第1の透光性電極および前記第2の透光性電極が形成されている側の面は、少なくとも透光性樹脂層で覆われている
請求項1乃至請求項6のいずれか一項に記載の静電容量型入力装置。
The surface of the light-transmitting substrate on which the first light-transmitting electrode and the second light-transmitting electrode are formed is covered with at least a light-transmitting resin layer. 6. The capacitance-type input device according to any one of claims 6.
前記第1の透光性電極および前記第2の透光性電極は前記交差部分で挟まれた領域に菱形のパッド部を有し、前記第1の透光性電極において前記交差部分に位置する接続部分は、前記パッド部より幅の狭い細幅形状になっており、前記中継電極も、前記パッド部より幅の狭い細幅形状で短冊状に形成されている
請求項2に記載の静電容量型入力装置。
The first translucent electrode and the second translucent electrode have a diamond-shaped pad portion in a region sandwiched between the intersecting portions, and are located at the intersecting portion in the first translucent electrode. The electrostatic connection according to claim 2, wherein the connection portion has a narrow shape that is narrower than the pad portion, and the relay electrode is also formed in a narrow shape that is narrower than the pad portion. Capacitive input device.
前記入力領域の外側領域には、基板と接続するための端子を有し、
前記端子は、前記中継電極と同じ材料で形成されている
請求項2に記載の静電容量型入力装置。
In the outer area of the input area, there is a terminal for connecting to the substrate,
The capacitive input device according to claim 2, wherein the terminal is made of the same material as the relay electrode.
請求項1乃至請求項9のいずれか一項に記載の静電容量型入力装置を備えた入力機能付き表示装置であって、
前記静電容量型入力装置における入力面とは反対側に画像生成装置が重ねて配置されている
入力機能付き表示装置。
A display device with an input function comprising the capacitive input device according to any one of claims 1 to 9,
A display device with an input function, in which an image generating device is disposed on the opposite side of the input surface of the capacitance type input device.
請求項10に記載の入力機能付き表示装置を備えている
電子機器。
An electronic device comprising the display device with an input function according to claim 10.
JP2010183030A 2008-03-25 2010-08-18 Capacitance type input device, display device with input function, and electronic device Expired - Fee Related JP4888589B2 (en)

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