JP2010245962A - Modulation apparatus and modulation method - Google Patents

Modulation apparatus and modulation method Download PDF

Info

Publication number
JP2010245962A
JP2010245962A JP2009094185A JP2009094185A JP2010245962A JP 2010245962 A JP2010245962 A JP 2010245962A JP 2009094185 A JP2009094185 A JP 2009094185A JP 2009094185 A JP2009094185 A JP 2009094185A JP 2010245962 A JP2010245962 A JP 2010245962A
Authority
JP
Japan
Prior art keywords
signal
timing
modulation
reference frequency
timing signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2009094185A
Other languages
Japanese (ja)
Inventor
Mitsuru Otani
満 大谷
Takashi Fukuyama
高志 福山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP2009094185A priority Critical patent/JP2010245962A/en
Publication of JP2010245962A publication Critical patent/JP2010245962A/en
Withdrawn legal-status Critical Current

Links

Images

Landscapes

  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a modulation apparatus capable of reducing cost, while reducing circuit scale. <P>SOLUTION: A modulation apparatus includes a signal processor 11 for performing quadrature modulation on a digital signal and converting the digital signal into an I-signal and a Q-signal; a timing generator 13 for generating a first timing signal of a reference frequency; first and second D/A converters 12a, 12b each for performing analog conversion on the I signal and the Q-signal in accordance with a clock of 1/4 reference frequency; and a gate control switch 14 for polarity-inverting the I-signal and the Q-signal, in accordance with a second timing signal which is obtained by frequency-dividing the first timing signal into two, and alternately outputting the I signal and the Q-signal, in accordance with the first timing signal. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

この発明は、無線基地局等に用いられる変調装置及び変調方法に関する。   The present invention relates to a modulation apparatus and a modulation method used for a radio base station or the like.

携帯電話の基地局と携帯電話端末との間の無線通信を中継するROF(Radio Over Fiber)の送信器や基地局の送信器などの変調信号をRF信号の無線電波にして出力する装置は、まず、送信信号にデジタル信号処理を行った後にD/Aコンバータを用いてアナログ変換してRF周波数に変換する処理を行う。   A device that outputs a modulated signal such as a transmitter of a radio over fiber (ROF) or a transmitter of a base station that relays wireless communication between a mobile phone base station and a mobile phone terminal as a radio wave of an RF signal, First, after performing digital signal processing on the transmission signal, analog signal conversion using a D / A converter is performed to convert the signal to an RF frequency.

このRF周波数への変換処理は、アナログ信号をアナログ変調回路もしくは周波数変換回路によってRF周波数へ変換するか、または、デジタル信号をD/Aコンバータに高速動作させて直接RF周波数を得るかの何れかにより実現される。前者の場合は回路規模が増大し、後者の場合はデバイス自体が高価になり、いずれの方式においてもコストの負担が大きかった。   This RF frequency conversion process is either an analog signal is converted to an RF frequency by an analog modulation circuit or a frequency conversion circuit, or a digital signal is operated at a high speed by a D / A converter to directly obtain an RF frequency. It is realized by. In the former case, the circuit scale is increased, and in the latter case, the device itself is expensive, and the cost burden is large in any of the methods.

なお、本願に関連する公知文献としては、例えば次のようなものがある(特許文献1を参照。)。   In addition, as a well-known document relevant to this application, there exist the following, for example (refer patent document 1).

特開平6−244876号公報JP-A-6-2444876

この発明は上記事情に着目してなされたもので、その目的とするところは、回路規模を小型化しつつ、コストの低減を図ることができる変調装置及び変調方法を提供することにある。   The present invention has been made paying attention to the above circumstances, and an object thereof is to provide a modulation device and a modulation method capable of reducing the cost while reducing the circuit scale.

上記目的を達成するためにこの発明の一態様は、デジタル信号を直交変調してI信号及びQ信号に変換する信号処理部と、基準周波数の第1のタイミング信号を生成するタイミング生成器と、前記I信号及びQ信号を前記基準周波数の1/4のクロックでアナログ変換する第1及び第2のD/A変換器と、前記第1のタイミング信号を2分周した第2のタイミング信号にしたがって前記I信号及びQ信号を極性反転させ、前記第1のタイミング信号にしたがって前記I信号及びQ信号を交互に出力するゲート手段とを具備する変調装置を提供する。   In order to achieve the above object, an aspect of the present invention includes a signal processing unit that orthogonally modulates a digital signal to convert it into an I signal and a Q signal, a timing generator that generates a first timing signal of a reference frequency, First and second D / A converters for analog conversion of the I signal and Q signal with a clock of 1/4 of the reference frequency, and a second timing signal obtained by dividing the first timing signal by two Accordingly, there is provided a modulation apparatus comprising gate means for inverting the polarity of the I signal and the Q signal and alternately outputting the I signal and the Q signal according to the first timing signal.

また、この発明の他の態様は、デジタル信号を直交変調してI信号及びQ信号に変換し、基準周波数の第1のタイミング信号を生成し、前記I信号及びQ信号を前記基準周波数の1/4のクロックでアナログ変換し、前記第1のタイミング信号を2分周した第2のタイミング信号にしたがって前記I信号及びQ信号を極性反転させ、前記第1のタイミング信号にしたがって前記I信号及びQ信号を交互に出力する変調方法を提供する。   According to another aspect of the present invention, a digital signal is orthogonally modulated and converted into an I signal and a Q signal to generate a first timing signal having a reference frequency, and the I signal and the Q signal are The analog signal is converted with a clock of / 4, the I signal and the Q signal are inverted in polarity according to the second timing signal obtained by dividing the first timing signal by 2, and the I signal and the I signal according to the first timing signal A modulation method for alternately outputting Q signals is provided.

したがってこの発明によれば、回路規模を小型化しつつ、コストの低減を図ることができる変調装置及び変調方法を提供することができる。   Therefore, according to the present invention, it is possible to provide a modulation device and a modulation method capable of reducing the cost while reducing the circuit scale.

この発明に係る変調装置の一実施形態を示す構成図。The block diagram which shows one Embodiment of the modulation apparatus which concerns on this invention. 図1の変調装置における各部の出力信号の時間領域での波形を示す図。The figure which shows the waveform in the time domain of the output signal of each part in the modulation apparatus of FIG. 図1の変調装置における各部の出力信号の周波数領域での波形を示す図。The figure which shows the waveform in the frequency domain of the output signal of each part in the modulation apparatus of FIG.

以下、図面を参照しながら本発明の実施の形態を詳細に説明する。
本実施形態では、送信用のデジタル信号をアナログRF信号に直接変換する変調装置及び変調方法を提案する。図1は、本発明に係る変調装置の一実施形態を示す構成図である。この変調装置は、信号処理部11と、第1のD/Aコンバータ12a(DAC0)と、第2のD/Aコンバータ12b(DAC1)と、タイミング生成部13と、ゲート制御スイッチ14とを備える。また、変調装置の先には、増幅器15及びアンテナ16が設けられ、この変調装置により変調されたアナログRF信号は、増幅器15により電力増幅された後に、アンテナ16から送出される。
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
In this embodiment, a modulation apparatus and a modulation method for directly converting a digital signal for transmission into an analog RF signal are proposed. FIG. 1 is a block diagram showing an embodiment of a modulation device according to the present invention. The modulation device includes a signal processing unit 11, a first D / A converter 12a (DAC0), a second D / A converter 12b (DAC1), a timing generation unit 13, and a gate control switch 14. . Further, an amplifier 15 and an antenna 16 are provided at the end of the modulation device, and an analog RF signal modulated by the modulation device is amplified by the amplifier 15 and then transmitted from the antenna 16.

図2は、図1の変調装置における各部の出力信号の時間領域での波形を示したものである。信号処理部11は、送信用のデジタル信号を直交変調してI/Q信号に変換し、I信号をDAC0へ、Q信号をDAC1へ出力する。タイミング生成部13は、基準周波数Fs(500MHz)の選択タイミング信号を生成し、DAC0及びDAC1を基準周波数Fsの1/4のサンプリングクロック(125MHz)で動作させる。DAC0及びDAC1でアナログ変換されたI信号及びQ信号を観測すると、時間領域での波形は図2のようになる(図2中DAC0出力,DAC1出力)。   FIG. 2 shows the waveform in the time domain of the output signal of each part in the modulation device of FIG. The signal processing unit 11 orthogonally modulates the digital signal for transmission and converts it into an I / Q signal, and outputs the I signal to the DAC 0 and the Q signal to the DAC 1. The timing generation unit 13 generates a selection timing signal of the reference frequency Fs (500 MHz), and operates the DAC0 and DAC1 with a sampling clock (125 MHz) that is ¼ of the reference frequency Fs. Observing the I and Q signals analog-converted by DAC0 and DAC1, the waveforms in the time domain are as shown in FIG. 2 (DAC0 output, DAC1 output in FIG. 2).

タイミング生成部13は、上記生成した選択タイミング信号をゲート制御スイッチ14に与える(図2中選択タイミング0)。ゲート制御スイッチ14は、選択タイミング信号を2分周(図2中の選択タイミング1)し、DAC0から出力されるI信号に対して、選択タイミング1がHighであるときに×1(正転)し、Lowであるときに×−1(極性反転)する(図2中DAC0スイッチ)。同様に、ゲート制御スイッチ14は、DAC0から出力されるQ信号に対して、選択タイミング1がHighであるときに×1(正転)し、Lowであるときに×−1(極性反転)する(図2中DAC1スイッチ)。さらに、ゲート制御スイッチ14は、選択タイミング0がHighであるときにDAC0スイッチを選択し、LowであるときにDAC1スイッチを選択して、I信号及びQ信号を合成したゲート信号を出力する(図2中ゲート出力)。   The timing generation unit 13 gives the generated selection timing signal to the gate control switch 14 (selection timing 0 in FIG. 2). The gate control switch 14 divides the selection timing signal by 2 (selection timing 1 in FIG. 2), and x1 (normal rotation) when the selection timing 1 is High with respect to the I signal output from the DAC0. When it is low, x-1 (polarity inversion) is performed (DAC0 switch in FIG. 2). Similarly, the gate control switch 14 performs x1 (normal rotation) when the selection timing 1 is High, and x-1 (polarity inversion) when the selection timing 1 is Low, with respect to the Q signal output from the DAC0. (DAC1 switch in FIG. 2). Further, the gate control switch 14 selects the DAC0 switch when the selection timing 0 is High, selects the DAC1 switch when the selection timing 0 is Low, and outputs a gate signal obtained by combining the I signal and the Q signal (see FIG. 2 middle gate output).

図3に、図1の変調装置における各部の出力信号の周波数領域での波形を示す。このように、DAC出力に対して選択タイミング信号により切替を行うことはI成分側のDAC0はCOS(250MHz×t)、Q成分側のDAC1はSIN(250MHz×t)を掛け合わせてIQ合成することになり、複素変調を行うことと同じ動作となる。   FIG. 3 shows a waveform in the frequency domain of the output signal of each part in the modulation device of FIG. Thus, switching the DAC output by the selection timing signal means that the I component DAC0 is multiplied by COS (250 MHz × t), and the Q component DAC1 is multiplied by SIN (250 MHz × t) to perform IQ synthesis. In other words, the operation is the same as performing complex modulation.

通常インターポレーションを行う際には、DACを1個のみ用いて行うがこれでは、標本化の原理上再現できる帯域が基準周波数Fsの1/8でしかとることが出来ない。また、電力がインターポレーションによって発生した各イメージに分散されるので、所望の周波数の電力値がインターポレーションした分だけ電力が低下してしまう。本実施形態では基準周波数の1/4と2倍の帯域が利用できるようになる。また電力もイメージに重み付けがなされるので、ほぼ劣化無く出力することができる。   In normal interpolation, only one DAC is used. However, in this case, the band that can be reproduced is only 1/8 of the reference frequency Fs based on the principle of sampling. Further, since the power is distributed to each image generated by the interpolation, the power is reduced by the amount corresponding to the interpolation of the power value of the desired frequency. In the present embodiment, a band that is 1/4 and twice the reference frequency can be used. Also, since power is weighted on the image, it can be output with almost no deterioration.

したがって、上記実施形態によれば、比較的低速な安価なD/Aコンバータを用いて簡易な構成でデジタル信号を直接アナログRF信号へ変換する変調装置を実現することができる。   Therefore, according to the above embodiment, it is possible to realize a modulation device that directly converts a digital signal into an analog RF signal with a simple configuration using an inexpensive D / A converter that is relatively slow.

なお、この発明は、上記実施形態そのままに限定されるものではなく、実施段階ではその要旨を逸脱しない範囲で構成要素を変形して具体化できる。例えば、ここではDACへのクロックとゲートスイッチとの比が1:4で有る場合で動作説明を行ったが、これと異なる整数比でも良い。また、上記実施形態に開示されている複数の構成要素の適宜な組み合せにより種々の発明を形成できる。例えば、実施形態に示される全構成要素から幾つかの構成要素を削除してもよい。さらに、異なる実施形態に亘る構成要素を適宜組み合せてもよい。   Note that the present invention is not limited to the above-described embodiment as it is, and can be embodied by modifying the constituent elements without departing from the scope of the invention in the implementation stage. For example, here, the operation has been described when the ratio of the clock to the DAC and the gate switch is 1: 4, but an integer ratio different from this may be used. Further, various inventions can be formed by appropriately combining a plurality of constituent elements disclosed in the embodiment. For example, some components may be deleted from all the components shown in the embodiment. Furthermore, you may combine suitably the component covering different embodiment.

11…信号処理部、12a…第1のD/Aコンバータ(DAC0)、12b…第2のD/Aコンバータ(DAC1)、13…タイミング生成部、14…ゲート制御スイッチ、15…増幅器、16…アンテナ。   DESCRIPTION OF SYMBOLS 11 ... Signal processing part, 12a ... 1st D / A converter (DAC0), 12b ... 2nd D / A converter (DAC1), 13 ... Timing generation part, 14 ... Gate control switch, 15 ... Amplifier, 16 ... antenna.

Claims (2)

デジタル信号を直交変調してI信号及びQ信号に変換する信号処理部と、
基準周波数の第1のタイミング信号を生成するタイミング生成器と、
前記I信号及びQ信号を前記基準周波数の1/4のクロックでアナログ変換する第1及び第2のD/A変換器と、
前記第1のタイミング信号を2分周した第2のタイミング信号にしたがって前記I信号及びQ信号を極性反転させ、前記第1のタイミング信号にしたがって前記I信号及びQ信号を交互に出力するゲート手段と
を具備することを特徴とする変調装置。
A signal processing unit that orthogonally modulates a digital signal to convert it into an I signal and a Q signal;
A timing generator for generating a first timing signal of a reference frequency;
First and second D / A converters for analog conversion of the I signal and the Q signal with a clock of 1/4 of the reference frequency;
Gate means for inverting the polarity of the I signal and the Q signal according to a second timing signal obtained by dividing the first timing signal by 2, and alternately outputting the I signal and the Q signal according to the first timing signal And a modulation device.
デジタル信号を直交変調してI信号及びQ信号に変換し、
基準周波数の第1のタイミング信号を生成し、
前記I信号及びQ信号を前記基準周波数の1/4のクロックでアナログ変換し、
前記第1のタイミング信号を2分周した第2のタイミング信号にしたがって前記I信号及びQ信号を極性反転させ、前記第1のタイミング信号にしたがって前記I信号及びQ信号を交互に出力することを特徴とする変調方法。
Digital signal is quadrature modulated and converted into I signal and Q signal,
Generating a first timing signal of a reference frequency;
The I signal and the Q signal are converted into analog signals with a clock of 1/4 of the reference frequency,
Inverting the polarity of the I signal and the Q signal according to the second timing signal obtained by dividing the first timing signal by 2, and alternately outputting the I signal and the Q signal according to the first timing signal. A characteristic modulation method.
JP2009094185A 2009-04-08 2009-04-08 Modulation apparatus and modulation method Withdrawn JP2010245962A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2009094185A JP2010245962A (en) 2009-04-08 2009-04-08 Modulation apparatus and modulation method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009094185A JP2010245962A (en) 2009-04-08 2009-04-08 Modulation apparatus and modulation method

Publications (1)

Publication Number Publication Date
JP2010245962A true JP2010245962A (en) 2010-10-28

Family

ID=43098472

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009094185A Withdrawn JP2010245962A (en) 2009-04-08 2009-04-08 Modulation apparatus and modulation method

Country Status (1)

Country Link
JP (1) JP2010245962A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2012164876A1 (en) * 2011-06-03 2012-12-06 旭化成エレクトロニクス株式会社 Transmitter

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2012164876A1 (en) * 2011-06-03 2012-12-06 旭化成エレクトロニクス株式会社 Transmitter
JP5416281B2 (en) * 2011-06-03 2014-02-12 旭化成エレクトロニクス株式会社 Transmitter
US8929480B2 (en) 2011-06-03 2015-01-06 Asahi Kasei Microdevices Corporation Transmitter

Similar Documents

Publication Publication Date Title
JP5006403B2 (en) Switch modulation of radio frequency amplifiers
US9813086B2 (en) RF transmitter, integrated circuit device, wireless communication unit and method therefor
JPH10304001A (en) Modulator and modulation method
JP2008539602A (en) Polar modulation transmission circuit and communication device
Lemberg et al. Digital interpolating phase modulator for wideband outphasing transmitters
JP2006203673A (en) Transmission amplifier circuit
KR20080113083A (en) Phase modulator
US20080225980A1 (en) Transmission Signal Producing Apparatus
JP2017225147A (en) Switched-mode high-linearity transmitter using pulse width modulation
JP2010245962A (en) Modulation apparatus and modulation method
KR100457175B1 (en) Quadrature modulation transmitter
US20050197076A1 (en) Radio communication device and control method of amplification circuit thereof
JP2008259201A (en) System and method for digital modulation
JPWO2015114702A1 (en) Transmitting apparatus and control method thereof
JP4083862B2 (en) Transmission device with aperture characteristic correction circuit
KR101292667B1 (en) Digital RF converter and digital RF modulator and transmitter including the same
JP2005039725A (en) Data converter and transmitter
JP5111629B2 (en) Waveform generator, signal generating apparatus including the same, waveform generating method, and signal generating method
JP2004072734A (en) Data generation method, data generator, and transmitter using same
JP2012095071A (en) Radio communication apparatus
JP4420241B2 (en) Modulator
JP4424081B2 (en) Amplitude modulation apparatus, amplitude limiting method, and computer-readable program
JP4497116B2 (en) Signal generation circuit
CN103888155A (en) Rf Transmitter, Integrated Circuit Device, Wireless Communication Unit And Method Therefor
Yang et al. Reconfigurable Architecture of a Fully Digital Transmitter with Carrier-Frequency Pulse-Width Modulation

Legal Events

Date Code Title Description
A300 Withdrawal of application because of no request for examination

Free format text: JAPANESE INTERMEDIATE CODE: A300

Effective date: 20120703