JP2010244773A - Current protecting element structure, and method of manufacturing the same - Google Patents

Current protecting element structure, and method of manufacturing the same Download PDF

Info

Publication number
JP2010244773A
JP2010244773A JP2009090698A JP2009090698A JP2010244773A JP 2010244773 A JP2010244773 A JP 2010244773A JP 2009090698 A JP2009090698 A JP 2009090698A JP 2009090698 A JP2009090698 A JP 2009090698A JP 2010244773 A JP2010244773 A JP 2010244773A
Authority
JP
Japan
Prior art keywords
cavity
layer portion
molten
current protection
melting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2009090698A
Other languages
Japanese (ja)
Inventor
Hung-Jr Chiou
邱鴻智
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to JP2009090698A priority Critical patent/JP2010244773A/en
Publication of JP2010244773A publication Critical patent/JP2010244773A/en
Pending legal-status Critical Current

Links

Images

Landscapes

  • Fuses (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a current protecting element structure and a method of manufacturing the same. <P>SOLUTION: The current protecting element structure includes a base material, a cavity, a melting element, and an electrode terminal. The base material has an upper layer and a lower layer. The melting element is disposed between the upper layer and the lower layer of the base material, and the outer edge of the melting element is exposed to the outside of the base material. The cavity is disposed on the surface of the melting element to form a melting space for the melting element. The electrode terminal forms a conductive electrode. The method of manufacturing the current protecting element includes a step of providing the base material and forming the upper layer and the lower layer using the base material, a step of forming the cavity in the upper layer or lower layer, a step of disposing the melting element between the upper layer and the lower layer, a step of exposing the edge of the melting element to the outside of the base material, a step of forming the electrode terminal out of the edge, and a step of obtaining an element having the cavity. Hence the base material, cavity, melting element, and electrode terminal exert an effect of protecting various currents of different sizes. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

本発明は、電流保護の素子に関するものであって、特に、基材、キャビティ、融解元素、および、電極端子の組成応用を利用して、回路中に、多種の大小の異なる電流の保護効果を形成する電流保護素子に関するものである。   The present invention relates to a current protection device, and in particular, uses a composition application of a substrate, a cavity, a melting element, and an electrode terminal to provide various current protection effects of various sizes in a circuit. The present invention relates to a current protection element to be formed.

現在、市場には、一体成型の方式で製造されたヒューズがあり、図1は公知のヒューズを示す図で、米国特許第6034589号を示し、表面粘着に応用するチップ融解素子100は、多層と融解元素の構造を改善する。米国特許第7268661号の実施例中でもこのような技術方案が開示され、それは、大電流の保護回路で、発明内容は、融解元素の成分と防電気アークの材料に関するものである。また、米国特許第5726621号の明細書中でも類似の技術方案が開示され、保護回路を表面粘着したセラミック素子で、発明内容は、多回路融解元素の構造と製造工程に関するものである。公知技術は、どれも、一体成型の方式で製造されるが、これらの製品の融解元素は、セラミックパウダーの均一性に制限を受けて、融解領域の温度分布に影響するので、信頼度が低い。   Currently, there are fuses manufactured in an integral molding method on the market, FIG. 1 is a diagram showing a known fuse, US Pat. No. 6,034,589, and a chip melting element 100 applied to surface adhesion is multi-layered. Improve the structure of the molten element. US Pat. No. 7,268,661 discloses an example of such a technical scheme, which is a high-current protection circuit, which relates to a component of a molten element and a material for an electric arc. Further, a similar technical method is disclosed in the specification of US Pat. No. 5,726,621, and the invention relates to a structure of a multi-circuit melting element and a manufacturing process with a ceramic element having a protective circuit adhered to the surface. All known techniques are manufactured in a one-piece process, but the melting element of these products is limited by the uniformity of the ceramic powder and affects the temperature distribution in the melting region, so it is not reliable. .

本発明の目的は、電流保護の素子構造、および、製造方法を提供し、特に、基材、キャビティ、融解元素、および、電極端子の組成応用を利用して、回路中に多種の大小が異なる電流の保護効果を形成することである。
本発明の別の目的は、低温一体成型の方法で製造し、電気アーク効果を防止することである。
本考案の更なる目的は、簡潔なキャビティ、融解元素、および、低温緻密化材料を使用し、小尺寸、高定格電流の電流保護に適用し、低消耗ロス、および、体積小型化、最少層積数使用等の長所を達成することである。
本発明の最後の目的は、更に、抗電気アーク層を融解元素上に設置し、融解元素に抵抗する融解電気アークを形成して、抗電気アーク効果を提供することである。
An object of the present invention is to provide a device structure and a manufacturing method for current protection, and in particular, by using composition application of a substrate, a cavity, a molten element, and an electrode terminal, various sizes are different in a circuit. It is to form a current protection effect.
Another object of the present invention is to manufacture by the low temperature integral molding method to prevent the electric arc effect.
A further object of the present invention is to use simple cavities, melting elements, and low-temperature densified materials, and to apply current protection for small-scale, high-rated currents, low consumption loss, and small volume, minimum layer It is to achieve the advantages such as use of product number.
The final object of the present invention is further to provide an anti-electric arc effect by placing an anti-electric arc layer on the molten element to form a molten electric arc that resists the molten element.

本発明は、電流保護の素子構造、および、製造方法を提供する。電流保護の素子構造は、基材、キャビティ、融解元素、および、電極端子からなる。基材は、上層部と下層部を有し、融解元素は、基材の上層部と下層部間に設置され、その外縁は基材の外部に露出する。キャビティは、融解元素の表面に設置されて、融解元素の融解空間を形成する。電極端子は導電電極を形成する。
本発明の電流保護の素子の製造方法は、基材を提供し、基材が上層部と下層部を形成するステップと、上層部、或いは、下層部がキャビティを形成するステップと、融解元素を、上層部と下層部間に設置するステップと、基材の外部に融解元素端部が露出するステップと、端部が電極端子を形成するステップと、キャビティを有する素子を得るステップと、からなる。
The present invention provides a current protection device structure and a manufacturing method. The element structure for current protection includes a base material, a cavity, a molten element, and an electrode terminal. The substrate has an upper layer portion and a lower layer portion, and the melting element is placed between the upper layer portion and the lower layer portion of the substrate, and the outer edge thereof is exposed to the outside of the substrate. The cavity is placed on the surface of the melting element to form a melting space for the melting element. The electrode terminal forms a conductive electrode.
The method for manufacturing a current protection element of the present invention provides a base material, the base material forms an upper layer portion and a lower layer portion, the upper layer portion or the lower layer portion forms a cavity, and a melting element. The step of installing between the upper layer portion and the lower layer portion, the step of exposing the end portion of the molten element to the outside of the substrate, the step of forming an electrode terminal at the end portion, and the step of obtaining an element having a cavity .

本発明により、安定、安全性を増加し、生産競争力を向上し、電流保護の素子の定格電流空間を拡大し、回路板の空間の利用度が増加し、効果が高く、コストが低く、体積が小さく、表面粘着が実行できるので、利用価値と需要が高まる。   The present invention increases stability, safety, improves production competitiveness, expands the rated current space of current protection elements, increases the utilization of circuit board space, is highly effective, and low in cost, Since the volume is small and surface adhesion can be performed, utility value and demand increase.

公知のヒューズを示す図である。It is a figure which shows a well-known fuse. 本発明の第一実施例図である。It is a 1st Example figure of this invention. 本発明の第二実施例図である。It is a 2nd Example figure of this invention. 本発明の第三実施例図である。It is a 3rd Example figure of this invention. 本発明の第四実施例図である。It is a 4th Example figure of this invention. 本発明の第五実施例図である。It is a 5th Example figure of this invention. 本発明の第六実施例図である。It is a 6th Example figure of this invention. 本発明の第七実施例図である。It is a 7th Example figure of this invention. 本発明の第八実施例図である。It is an 8th Example figure of this invention. 本発明の九一実施例図である。It is a ninety-one embodiment diagram of the present invention. 本発明の第十実施例図である。It is a 10th Example figure of this invention. 本発明の第十一実施例図である。It is an 11th Example figure of this invention.

図2〜図12は、本発明の第一〜第十一実施例を示す図である。本発明の電流保護の素子1構造は、基材2、融解元素3、キャビティ4、および、電極端子5、からなる。
基材2は、上層部21と下層部22を有し、素子1の上端基礎と下端基礎を形成する。
融解元素3は、基材2の上層部21と下層部22間に設置され、その外縁31は基材2の外部に露出する。
キャビティ4は、融解元素3の表面32に設置されて、融解元素3の融解空間41を形成する。
電極端子5は三層あり、銀薄層51、ニッケル薄層52、および、スズ箔層53から形成され、基材2の端縁に設置されて、導電電極を形成する。
本発明の実施時、電流保護素子1構造は、更に、少なくとも一つの抗電気アーク層6を融解元素3上に設置して、融解元素に抵抗する融解電気アークを形成する(図3、図5〜図8、および、図10、図11を参照する)。基材2は、ガラス、カルシウム(Ca)-ホウ素(B)-シリコン(Si)セラミック、ガラスと酸化アルミ二ウムの混合、或いは、低温焼結してなる材料のどれかである。低温焼結の組成材料は、緻密化温度が摂氏1000℃以下である。融解元素3は、銀(Ag)、銅(Cu)、アルミ二ウム(Al)、金(Au)、或いは、金属混合体のどれかである。また、金属混合体は、金属合金か混合金属である。キャビティ4は、空間尺寸が素子尺寸のキャビティより小さく、融解元素3の近接箇所に設置されて、融解元素3の間接融解空間を形成する。また、抗電気アーク層6は、ガラス、ガラスと金属酸化物の混合、或いは、低温焼結してなる材料のどれかである。低温焼結の組成材料は、緻密化温度が摂氏1000℃以下である。
本発明の更なる実施において、上層部21と下層部22の間に挟層7を有する。挟層7の上表部71と上層部21の間、および、下表部72と下層部22の間に、融解元素3を設置して、定格電流量を増加する(図9〜図11で示される)。挟層7は、キャビティ4を融解元素3近くに形成し、融解元素3の間接融解空間を形成する(図12で示される)。
また、本領域の技術者なら分かるように、電流保護の素子1の実施例は、単一層、或いは、多層電極端子5を設置する電流保護の素子中で実施することができる。キャビティ4、および、挟層7の層数により、更に多層の融解元素3を設置して、定格電流を拡大し、相同の保護効果を達成することができる。
続いて、電流保護の素子の製造方法を説明し、本方法は、
1.基材2を提供し、基材が上層部21と下層部22を形成するステップ
2.上層部21、或いは、下層部22がキャビティ4を形成するステップ
3.その後、融解元素3を、上層部21と下層部22間に設置するステップ
4.基材2の外部に融解元素3端部が露出するステップ
5.端部が電極端子を形成するステップ
6.キャビティ4を有する素子1を得るステップ、
からなる。
本発明の電流保護の素子の製造方法は、更に、融解元素3形成後、抗電気アーク層6を融解元素3の上表面321、或いは、下表面322に形成し、後続のプログラムを経て、キャビティ4を有する素子1を得るステップを含む。また、更に、キャビティ4を形成後、融解元素3を挟層7の上表部71と下表部72に形成し、その後、融解元素3を設置する挟層7を、上層部21と下層部22間に設置し、後続のプログラムを経て、キャビティ4を有する素子1を得るステップを含む。
本発明の長所は以下のようである。
1.キャビティを有し、融解元素の融解補助功能を発揮し、使用効果、安定、安全性を増加する。
2.抗電気アーク層を有し、抗電気アーク層により、融解元素の融解電気アークを圧制して、回路の安全を保護し、生産競争力を向上する。
3.挟層は、設置しなくてもよいし、設置する場合は複数層でもよく、電流保護の素子の定格電流空間を拡大する。
4.使用時、空間を節約し、一体化の方式で製造され、回路板の空間の利用度が増加する。
5.効果が高く、コストが低く、体積が小さく、表面粘着が実行できるので、利用価値と需要が高まる。
本発明では好ましい実施例を前述の通り開示したが、これらは決して本発明に限定するものではなく、当該技術を熟知する者なら誰でも、本発明の精神と領域を脱しない範囲内で各種の変動や潤色を加えることができ、従って本発明の保護範囲は、特許請求の範囲で指定した内容を基準とする。
2 to 12 are views showing first to eleventh embodiments of the present invention. The current protection element 1 structure of the present invention includes a base material 2, a melting element 3, a cavity 4, and an electrode terminal 5.
The base material 2 has an upper layer portion 21 and a lower layer portion 22, and forms an upper end foundation and a lower end foundation of the element 1.
The molten element 3 is placed between the upper layer portion 21 and the lower layer portion 22 of the base material 2, and the outer edge 31 is exposed to the outside of the base material 2.
The cavity 4 is installed on the surface 32 of the melting element 3 to form a melting space 41 of the melting element 3.
The electrode terminal 5 has three layers, which are formed of a silver thin layer 51, a nickel thin layer 52, and a tin foil layer 53, and are placed on the edge of the substrate 2 to form a conductive electrode.
In the practice of the present invention, the current protection element 1 structure further includes placing at least one anti-electric arc layer 6 on the molten element 3 to form a molten electric arc that resists the molten element (FIGS. 3 and 5). To FIG. 8, FIG. 10, and FIG. 11). The substrate 2 is one of glass, calcium (Ca) -boron (B) -silicon (Si) ceramic, a mixture of glass and aluminum oxide, or a material formed by low-temperature sintering. The composition material for low-temperature sintering has a densification temperature of 1000 ° C. or lower. The molten element 3 is silver (Ag), copper (Cu), aluminum (Al), gold (Au), or a metal mixture. The metal mixture is a metal alloy or a mixed metal. The cavity 4 has a smaller space dimension than the element-sized cavity, and is installed in the vicinity of the melting element 3 to form an indirect melting space for the melting element 3. The anti-electric arc layer 6 is any one of glass, a mixture of glass and metal oxide, or a material formed by low-temperature sintering. The composition material for low-temperature sintering has a densification temperature of 1000 ° C. or lower.
In a further implementation of the present invention, the sandwich layer 7 is provided between the upper layer portion 21 and the lower layer portion 22. Between the upper surface portion 71 and the upper layer portion 21 of the sandwich layer 7 and between the lower surface portion 72 and the lower layer portion 22, the melting element 3 is installed to increase the rated current amount (in FIGS. 9 to 11). Indicated). The sandwich layer 7 forms the cavity 4 near the melting element 3 and forms an indirect melting space of the melting element 3 (shown in FIG. 12).
As can be understood by those skilled in the art, the embodiment of the current protection element 1 can be implemented in a current protection element in which a single layer or multilayer electrode terminal 5 is provided. Depending on the number of layers of the cavity 4 and the sandwiching layer 7, a multilayered melting element 3 can be further installed to increase the rated current and achieve a homologous protective effect.
Subsequently, a method for manufacturing a current protection element will be described.
1. 1. Providing the base material 2, and the base material forms the upper layer portion 21 and the lower layer portion 22. 2. Upper layer portion 21 or lower layer portion 22 forms cavity 4 Thereafter, the molten element 3 is placed between the upper layer portion 21 and the lower layer portion 22. 4. The end of the molten element 3 is exposed to the outside of the substrate 2 5. The end forms an electrode terminal. Obtaining an element 1 having a cavity 4;
Consists of.
In the method of manufacturing a current protection element of the present invention, the anti-electric arc layer 6 is further formed on the upper surface 321 or the lower surface 322 of the molten element 3 after the molten element 3 is formed. A device 1 having 4 is obtained. Further, after forming the cavity 4, the molten element 3 is formed on the upper surface portion 71 and the lower surface portion 72 of the sandwich layer 7, and then the sandwich layer 7 on which the molten element 3 is placed is formed on the upper layer portion 21 and the lower layer portion. 22 to obtain an element 1 having a cavity 4 through a subsequent program.
The advantages of the present invention are as follows.
1. It has a cavity and demonstrates the ability to assist melting of melting elements, increasing the use effect, stability, and safety.
2. Having an anti-electric arc layer, the anti-electric arc layer suppresses the melting electric arc of the melting element to protect the safety of the circuit and improve the production competitiveness.
3. The sandwiching layer may not be installed or may be provided with a plurality of layers, and expands the rated current space of the current protection element.
4). When used, it saves space and is manufactured in an integrated manner, increasing the utilization of space on the circuit board.
5). Since the effect is high, the cost is low, the volume is small, and surface adhesion can be performed, the utility value and demand increase.
In the present invention, preferred embodiments have been disclosed as described above. However, the present invention is not limited to the present invention, and any person who is familiar with the technology can use various methods within the spirit and scope of the present invention. Variations and moist colors can be added, so the protection scope of the present invention is based on what is specified in the claims.

チップ融解素子100
本発明の電流保護の素子1
基材2
上層部21と下層部22
融解元素3
キャビティ4
電極端子5
抗電気アーク層6
挟層7
外縁31
融解空間41を形成する。
銀薄層51
ニッケル薄層52
スズ箔層53
Chip melting element 100
Current protection device 1 of the present invention
Base material 2
Upper layer portion 21 and lower layer portion 22
Molten element 3
Cavity 4
Electrode terminal 5
Anti-electric arc layer 6
Sandwich layer 7
Outer edge 31
A melting space 41 is formed.
Silver thin layer 51
Nickel thin layer 52
Tin foil layer 53

Claims (10)

電流保護の素子構造であって、その特徴は、基材、キャビティ、融解元素、および、電極端子からなり、
前記基材は、上層部と下層部を有し、前記素子の上端基礎と下端基礎を形成し、
前記融解元素は、前記基材の上層部と下層部間に設置され、その外縁は前記基材の外部に露出し、
前記キャビティは、前記融解元素の表面に設置されて、前記融解元素の融解空間を形成し、
前記電極端子は三層あり、銀薄層、ニッケル薄層、および、スズ箔層から形成され、前記基材の端縁に設置されて、導電電極を形成し、
これにより、前記基材、前記キャビティ、前記融解元素、および、前記電極端子が、回路中に、多種の異なる大きさの電流の保護効果を形成することを特徴とする電流保護の素子構造。
The element structure of current protection is characterized by a substrate, a cavity, a molten element, and an electrode terminal.
The base material has an upper layer portion and a lower layer portion, and forms an upper end base and a lower end base of the element,
The melting element is installed between the upper layer portion and the lower layer portion of the base material, the outer edge thereof is exposed to the outside of the base material,
The cavity is disposed on a surface of the molten element to form a melting space of the molten element;
The electrode terminal has three layers, formed from a silver thin layer, a nickel thin layer, and a tin foil layer, and is installed at an edge of the base material to form a conductive electrode,
Thereby, the base material, the cavity, the melting element, and the electrode terminal form a current protection effect of various different magnitudes in the circuit.
更に、少なくとも一つの抗電気アーク層を前記融解元素上に設置して、前記融解元素に抵抗する融解電気アークを形成することを特徴とする請求項1に記載の電流保護の素子構造。 The device structure for current protection according to claim 1, further comprising: forming at least one anti-electric arc layer on the molten element to form a molten electric arc that resists the molten element. 前記基材は、ガラス、カルシウム(Ca)-ホウ素(B)-シリコン(Si)セラミック、ガラスと酸化アルミ二ウムの混合、或いは、低温焼結してなる材料のどれかであることを特徴とする請求項1、或いは、2に記載の電流保護の素子構造。 The base material is one of glass, calcium (Ca) -boron (B) -silicon (Si) ceramic, a mixture of glass and aluminum oxide, or a low-temperature sintered material. The element structure for current protection according to claim 1 or 2. 前記融解元素は、銀(Ag)、銅(Cu)、アルミ二ウム(Al)、金(Au)、或いは、金属混合体のどれかであることを特徴とする請求項1、或いは、2に記載の電流保護の素子構造。 The molten element is any one of silver (Ag), copper (Cu), aluminum (Al), gold (Au), or a metal mixture. The element structure of current protection as described. 前記キャビティは、空間尺寸が前記素子の尺寸より小さ九、前記融解元素に近い箇所に設置されて、前記融解元素の間接融解空間を形成することを特徴とする請求項1、或いは、2に記載の電流保護の素子構造。 3. The cavity according to claim 1 or 2, wherein the cavity is installed at a location having a spatial dimension smaller than that of the element and close to the melting element to form an indirect melting space of the melting element. Current protection element structure. 前記抗電気アーク層は、ガラス、ガラスと金属酸化物の混合、或いは、低温焼結してなる材料のどれかであり、前記低温焼結の組成材料は、緻密化温度が摂氏1000℃以下であることを特徴とする請求項2に記載の電流保護の素子構造。 The anti-electric arc layer is one of glass, a mixture of glass and metal oxide, or a low-temperature sintered material, and the low-temperature sintered composition material has a densification temperature of 1000 ° C. or less. 3. The element structure for current protection according to claim 2, wherein the element structure is provided. 前記上層部と前記下層部間に、更に、挟層を有し、前記挟層の上表面と前記上層部の間、および、前記挟層の下表部と前記下層部間に、前記融解元素を設置して、定額電流を増大することを特徴とする請求項1に記載の電流保護の素子構造。 The molten element further includes a sandwich layer between the upper layer portion and the lower layer portion, and between the upper surface of the sandwich layer and the upper layer portion, and between the lower surface portion and the lower layer portion of the sandwich layer. The device structure for current protection according to claim 1, wherein a fixed amount of current is increased by installing a current-carrying element. 電流保護の素子の製造方法であって、本方法は、
基材を提供し、前記基材が上層部と下層部を形成するステップと、
前記上層部、或いは、前記下層部がキャビティを形成するステップと、
前記融解元素を、前記上層部と前記下層部間に設置するステップと、
前記基材の外部に、前記融解元素端部が露出するステップと、
前記端部が電極端子を形成するステップと、
前記キャビティを有する素子を得るステップと、
からなることを特徴とする電流保護の素子の製造方法。
A method of manufacturing a current protection element, the method comprising:
Providing a substrate, wherein the substrate forms an upper layer portion and a lower layer portion;
The upper layer part or the lower layer part forming a cavity;
Installing the molten element between the upper layer portion and the lower layer portion;
Exposing the end of the melting element to the outside of the substrate;
The end forming an electrode terminal;
Obtaining an element having the cavity;
A method of manufacturing a current protection element comprising:
更に、融解元素形成後、抗電気アーク層を前記融解元素の上表面か下表面に形成し、後続のプログラムを経て、前記キャビティを有する前記素子を得るステップを含むことを特徴とする請求項8に記載の電流保護の素子の製造方法。 The method further comprises forming an anti-electric arc layer on the upper surface or the lower surface of the molten element after forming the molten element, and obtaining the device having the cavity through a subsequent program. A method for producing an element for current protection as described in 1. above. 更に、前記キャビティ形成後、前記融解元素を挟層の上表部と下表部に形成し、その後、前記融解元素を有する前記挟層が、前記上層部と前記下層部の間に設置され、更に、後続のプログラムを経て、前記キャビティを有する前記素子を得るステップを含むことを特徴とする請求項8、或いは、9に記載の電流保護の素子の製造方法。
Furthermore, after forming the cavity, the molten element is formed in the upper surface portion and the lower surface portion of the sandwich layer, and then the sandwich layer having the molten element is installed between the upper layer portion and the lower layer portion, 10. The method of manufacturing a current protection device according to claim 8, further comprising a step of obtaining the device having the cavity through a subsequent program.
JP2009090698A 2009-04-03 2009-04-03 Current protecting element structure, and method of manufacturing the same Pending JP2010244773A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2009090698A JP2010244773A (en) 2009-04-03 2009-04-03 Current protecting element structure, and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009090698A JP2010244773A (en) 2009-04-03 2009-04-03 Current protecting element structure, and method of manufacturing the same

Publications (1)

Publication Number Publication Date
JP2010244773A true JP2010244773A (en) 2010-10-28

Family

ID=43097578

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009090698A Pending JP2010244773A (en) 2009-04-03 2009-04-03 Current protecting element structure, and method of manufacturing the same

Country Status (1)

Country Link
JP (1) JP2010244773A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011175957A (en) * 2010-01-28 2011-09-08 Kyocera Corp Fuse device
JP2013041829A (en) * 2011-08-18 2013-02-28 Industrial Technology Research Institute Protection element and protection apparatus using the same
CN102956413A (en) * 2011-08-18 2013-03-06 财团法人工业技术研究院 Protection element and protection device using same
JP2014049553A (en) * 2012-08-30 2014-03-17 Nichicon Corp Solid electrolytic capacitor
US11211221B2 (en) 2017-09-29 2021-12-28 Murata Manufacturing Co., Ltd. Chip-type fuse

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1996008832A1 (en) * 1994-09-12 1996-03-21 Cooper Industries Improvements in ceramic chip fuses
JPH1050198A (en) * 1996-07-30 1998-02-20 Kyocera Corp Chip fuse element
JPH10308157A (en) * 1997-05-08 1998-11-17 Daito Tsushinki Kk Fuse
US6034589A (en) * 1998-12-17 2000-03-07 Aem, Inc. Multi-layer and multi-element monolithic surface mount fuse and method of making the same
JP2001076609A (en) * 1999-09-06 2001-03-23 Koa Corp Circuit protective element and its manufacture
JP2006339106A (en) * 2005-06-06 2006-12-14 Tdk Corp Chip type fuse element
JP2007115601A (en) * 2005-10-21 2007-05-10 Tdk Corp Chip type fuse element and its manufacturing method

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1996008832A1 (en) * 1994-09-12 1996-03-21 Cooper Industries Improvements in ceramic chip fuses
JPH1050198A (en) * 1996-07-30 1998-02-20 Kyocera Corp Chip fuse element
JPH10308157A (en) * 1997-05-08 1998-11-17 Daito Tsushinki Kk Fuse
US6034589A (en) * 1998-12-17 2000-03-07 Aem, Inc. Multi-layer and multi-element monolithic surface mount fuse and method of making the same
JP2001076609A (en) * 1999-09-06 2001-03-23 Koa Corp Circuit protective element and its manufacture
JP2006339106A (en) * 2005-06-06 2006-12-14 Tdk Corp Chip type fuse element
JP2007115601A (en) * 2005-10-21 2007-05-10 Tdk Corp Chip type fuse element and its manufacturing method

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011175957A (en) * 2010-01-28 2011-09-08 Kyocera Corp Fuse device
JP2013041829A (en) * 2011-08-18 2013-02-28 Industrial Technology Research Institute Protection element and protection apparatus using the same
CN102956414A (en) * 2011-08-18 2013-03-06 财团法人工业技术研究院 Protection element and protection device using same
CN102956413A (en) * 2011-08-18 2013-03-06 财团法人工业技术研究院 Protection element and protection device using same
US9019678B2 (en) 2011-08-18 2015-04-28 Industrial Technology Research Institute Protection component and protection device using the same
TWI488208B (en) * 2011-08-18 2015-06-11 Ind Tech Res Inst Protection component and protection device using the same
JP2014049553A (en) * 2012-08-30 2014-03-17 Nichicon Corp Solid electrolytic capacitor
US11211221B2 (en) 2017-09-29 2021-12-28 Murata Manufacturing Co., Ltd. Chip-type fuse

Similar Documents

Publication Publication Date Title
US20100289612A1 (en) Current protection device and the method for forming the same
TWI323474B (en) Surface mount capacitor and method of making the same
WO2009133766A1 (en) Multilayer coil component and method for producing the same
CN107403678A (en) Multilayer coil component
KR101667140B1 (en) Electronic component, method of manufacturing the electronic component, and electronic apparatus
JP6575773B2 (en) Coil component and method for manufacturing the coil component
JP2010244773A (en) Current protecting element structure, and method of manufacturing the same
CN111069611B (en) Preparation method of graphite-graphene-metal composite material
WO2002089160A3 (en) Electrical multilayer component and method for the production thereof
TWI594336B (en) Insulation bonding wire
JP4881192B2 (en) Manufacturing method of electronic parts
TWI459517B (en) Package substrate, semiconductor package and method of forming same
US9474162B2 (en) Circuit substrate and method of manufacturing same
CN101620954B (en) SMT fuse and manufacturing method thereof
JPWO2014156393A1 (en) Insulating ceramic paste, ceramic electronic component and manufacturing method thereof
JP2007165086A (en) Fuse element and its manufacturing method
JP2005513777A5 (en)
CN104319206B (en) Suspended sheet-metal electronic component and batch manufacturing method thereof
US11952316B2 (en) Composite green sheet and ceramic member
JP2018063998A (en) Composition for electrode, method of manufacturing base electrode, method of manufacturing electronic component, and electronic component
JP2006339105A (en) Chip type fuse element and manufacturing method thereof
TW202213391A (en) Conducting wire with high conductivity, alloy and manufacturing method of new-shape terminal electrode for converting the thick-film aluminum electrode into a thick-film metal or alloy electrode with high conductivity by chemical redox conversion
JP2018063995A (en) Chip inductor and method for manufacturing the same
CN105575573B (en) A kind of multilayer chip varistor and preparation method thereof
JP5265256B2 (en) Ceramic wiring board

Legal Events

Date Code Title Description
A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20110616

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20110623

RD02 Notification of acceptance of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7422

Effective date: 20110909

A601 Written request for extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A601

Effective date: 20110920

A602 Written permission of extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A602

Effective date: 20110926

A601 Written request for extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A601

Effective date: 20111020

RD04 Notification of resignation of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7424

Effective date: 20111025

A602 Written permission of extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A602

Effective date: 20111104

A601 Written request for extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A601

Effective date: 20111117

A602 Written permission of extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A602

Effective date: 20111208

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20111213

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20120514

A601 Written request for extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A601

Effective date: 20120809

A602 Written permission of extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A602

Effective date: 20120829

A601 Written request for extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A601

Effective date: 20120905

A601 Written request for extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A601

Effective date: 20121011

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20121010

A602 Written permission of extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A602

Effective date: 20120925

Free format text: JAPANESE INTERMEDIATE CODE: A602

Effective date: 20121031

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20121108

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20130225