JP2010243643A - Display device and inspection device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a display device precisely measuring a leak current and an inspection device. <P>SOLUTION: A liquid crystal panel 1 includes: a gate dummy pixel 14Dg and a source dummy pixel 14Ds arranged on the outer peripheral side of a display area 2; a test switch line 31 connected to dummy TFTs 13Dg and 13Ds of the gate dummy pixel 14Dg and the source dummy pixel 14Ds to switch their conduction states; a test gate line 32 connected to a dummy pixel electrode 12Dg, which is arranged in gate lines G not adjacent to each other among a plurality of gate lines G, to divide the gate lines G into two or more phases; a test source line 33 connected to a dummy pixel electrode 12Ds, which is arranged in source lines S not adjacent to each other among a plurality of source lines S, to divide the source lines S into two or more phases; and a test common electrode line 35 connecting the test gate line 32, the test source line 33, and the test switch line 31 mutually. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a display device that displays an image and an inspection device that inspects leakage current in the display device.

  Conventionally, in a display device such as a liquid crystal panel, an inspection device and an inspection method for inspecting a display abnormality are known (for example, see Patent Document 1).

  The device described in Patent Document 1 relates to an inspection device for a liquid crystal display device in which a plurality of source lines and gate lines are wired. In this inspection apparatus, three source-side inspection wirings, two gate-side inspection wirings, inspection gate wirings, and storage procedure dedicated inspection wirings are drawn out and formed outside the display range of the liquid crystal display device. The pixel defect in the liquid crystal display device is inspected by applying a predetermined voltage to the wiring for use.

JP 2003-157053 A

By the way, in the inspection apparatus as described in Patent Document 1, it is necessary to wire each inspection wiring outside the liquid crystal display device. However, in recent years, the resolution of liquid crystal display devices has increased, and the number of source lines and gate lines has increased. Therefore, in order to connect each inspection wiring, which is a panel inspection terminal, to these source lines and gate lines, it is necessary to provide a dedicated inspection circuit, and there is a problem that the configuration becomes complicated.
On the other hand, in a display device, a display device is known in which dummy pixels for electrostatic protection are provided in a peripheral portion of a display area where an image is actually displayed. In this case, a display device and inspection method for inspecting leakage current in the display device by connecting inspection wiring to the pixel electrode of such a dummy pixel and outputting a signal from the dummy pixel to each source line or each gate line is also considered. It is done. However, there are cases in which the leakage current cannot be measured accurately due to foreign matter adhering between the terminals connected to the inspection wiring or the electrostatic countermeasure elements connected to these terminal portions.

  In view of the above problems, an object of the present invention is to provide a display device and an inspection device that can accurately measure a leakage current.

  The display device of the present invention includes a drive substrate and a counter substrate facing each other, an electro-optical material sealed between the drive substrate and the counter substrate, and a plurality of source lines provided on the drive substrate and orthogonal to each other And a plurality of gate lines, a plurality of pixel electrodes provided in the vicinity of intersections of the plurality of source lines and the plurality of gate lines, and applying a charge output to the source lines to the electro-optic material, A switching device connected to a gate line and switching a conduction state between the source line and the pixel electrode, the display device being provided on one end side of the gate line and charged from the gate line Are connected to the dummy pixel electrode, the gate line and the dummy pixel electrode, and the gate line and the dummy pixel electrode. A gate dummy pixel having a gate dummy switching element that switches a conduction state between the pixel electrode and a dummy pixel electrode that is provided on one end side of the source line and applies a charge from the source line to the electro-optic material; A source dummy pixel having a source dummy switching element that connects the source line and the dummy pixel electrode and switches a conduction state between the source line and the dummy pixel electrode; and the gate dummy switching element; A test switch line that is connected to the source dummy switching element and transmits a control signal for controlling switching of a conduction state to the gate dummy switching element and the source dummy switching element; and a plurality of gate lines that are not adjacent to each other Provided in the gate line A plurality of test gate lines that are connected to the dummy pixel electrode of the gate dummy pixel and divide the gate line into two or more phases, and of the source dummy pixels provided on the source lines that are not adjacent to each other among the plurality of source lines. A plurality of test source lines that are connected to the dummy pixel electrode and divide the source line into two or more phases, and a test common electrode that connects the plurality of test gate lines, the plurality of test source lines, and the test switch lines. And a line.

According to the present invention, the gate dummy pixel and the source dummy pixel for electrostatic protection provided outside the display area of the display device are used as an inspection circuit for detecting a leak defect. That is, each dummy switching element is rendered conductive by outputting an ON signal to the test switch line, and each display of the display device is sequentially output to a predetermined test gate line and test source line. Display defect detection in pixels can be performed. Therefore, it is not necessary to connect inspection wiring or a probe to each source line or each gate line at the time of inspection, and display defects of the display device can be easily detected with a simpler configuration.
Further, a test gate line for transmitting a drive signal from each dummy pixel to a source line or a gate line, a test source line, and a test switch line for controlling driving of the dummy pixel are connected by a test common electrode line. Here, when each dummy pixel is driven and a drive signal is input to each source line or each gate line, the test source line, the test gate line, and the test switch line are provided independently. In this case, however, a leakage current may be generated between the test wirings, such as between these test source lines, between the test gate lines, or between the test gate line and the test source line. On the other hand, in the above invention, each inspection wiring such as a test gate line, a source gate line, and a test switch line is connected by a test common electrode line. In the display device having such a configuration, when a display defect is inspected, a leakage current generated between inspection wirings can be excluded by grounding the test common electrode line and setting it to an off voltage. Therefore, unnecessary leakage current can be removed and only leakage current generated in the display area can be detected well, so that leakage defect detection can be performed with high accuracy.

  In the display device according to the aspect of the invention, it is preferable that the test gate line, the test source line, and the test switch line are connected to the test common electrode line through an electrostatic protection element.

Here, as the electrostatic protection element, a bidirectional transistor having a higher resistance as the potential difference increases or a nonlinear resistance element can be used.
According to the present invention, the electrostatic protection element can prevent inconvenience that a signal is input from an inspection wiring such as a test gate line, a test source line, and a test switch line to another inspection wiring. Therefore, at the time of detecting a leak defect in the display area of the display device, a leak between inspection wirings can be more reliably excluded, and a more accurate leak defect detection process can be performed.

  In the display device of the present invention, a test gate terminal connected to each of the plurality of test gate lines, a test source terminal connected to each of the plurality of test source lines, and a test connected to the test switch line A terminal unit including a switch terminal and a plurality of test common terminals connected to the test common line, wherein the terminal unit includes the plurality of test gate terminals, the plurality of test source terminals, and the test switch terminal. Are arranged along a straight line, and at least one or more test common terminals are preferably arranged between these terminals.

  In the present invention, in the terminal portion, the test common terminal is disposed between the terminals connected to each inspection wiring. In such a configuration, by setting a predetermined off voltage such as grounding the test common terminal, for example, even when foreign matter adheres between the terminals, leakage due to the foreign matter can be released from the test common terminal. Therefore, it is possible to detect leak defects in the display area with higher accuracy.

  The inspection apparatus according to the present invention includes a drive substrate and a counter substrate facing each other, an electro-optical material sealed between the drive substrate and the counter substrate, and a plurality of source lines provided on the drive substrate and orthogonal to each other. And a plurality of gate lines, a plurality of pixel electrodes provided in the vicinity of intersections of the plurality of source lines and the plurality of gate lines, and applying a charge output to the source lines to the electro-optic material, A switching element that is connected to a gate line and switches a conduction state between the source line and the pixel electrode, and a dummy that is provided on one end side of the gate line and applies a charge from the gate line to the electro-optic material A pixel electrode, and the gate line and the dummy pixel electrode are connected, and a conductive state between the gate line and the dummy pixel electrode A gate dummy pixel having a gate dummy switching element to be switched; a dummy pixel electrode which is provided on one end side of the source line and applies a charge from the source line to the electro-optic material; and the source line and the dummy pixel electrode Are connected to the source dummy pixel having a source dummy switching element that switches a conduction state between the source line and the dummy pixel electrode, and to the gate dummy switching element and the source dummy switching element. A test switch line for transmitting a control signal for controlling switching of a conduction state to the gate dummy switching element and the source dummy switching element, and the gate dummy pixel provided on the gate lines not adjacent to each other among a plurality of gate lines The Dami of A plurality of test gate lines connected to a pixel electrode and dividing the gate line into two or more phases, and a dummy pixel electrode of the source dummy pixel provided on the source line not adjacent to each other among the plurality of source lines A plurality of test source lines connected to divide the source line into two or more phases; and a plurality of test gate lines, a plurality of the test source lines, and a test common electrode line connecting the test switch lines. An inspection apparatus for inspecting a leakage current generated in a display device comprising test switch control means for outputting the control signal to the test switch line, and outputting a predetermined drive signal to the test gate line and the source gate line Output from the test target line, the test gate line and the source gate line. Current measuring means for measuring the current to be measured, and grounding means for grounding the test common electrode line.

  The present invention is an inspection apparatus for a display device as described above, wherein the test switch control means controls on / off of the gate dummy switching element and the source dummy switching element, and the test drive control means controls the predetermined test source. A test drive signal for detecting a leakage current is output to the line and a predetermined test gate line. Then, the leakage current is detected by the current measuring means and the presence / absence of the leakage defect is checked. At this time, since the test common electrode line is grounded by the grounding means, the inspection wiring between the test gate lines, between the test source lines, or between the test gate lines and the test source lines, as in the invention of the display device described above. The leakage current between them can be excluded, and only the leak defect in the display area of the display device can be detected satisfactorily.

  In the inspection apparatus of the present invention, the display device includes a test gate terminal connected to each of the plurality of test gate lines, a test source terminal connected to each of the plurality of test source lines, and the test switch line. A test switch terminal connected to the test common line, and a plurality of test common terminals connected to the test common line, and a terminal portion including a plurality of the test gate terminals, a plurality of the test source terminals, And the test switch terminals are arranged along a straight line, and at least one test common terminal is arranged between the terminals, and the inspection apparatus is connected to the test switch control means. A test switch terminal connectable to the test switch terminal, the test switch control means and the front An inspection gate terminal connected to the current measuring means and connectable to the test gate terminal; an inspection source terminal connected to the test switch control means and the current measuring means and connectable to the test source terminal; A test terminal unit that is grounded and connectable to the test common terminal, wherein the test terminal unit includes a plurality of test gate terminals, a plurality of test source terminals, and the test terminal unit. Preferably, the switch terminal is disposed along a straight line corresponding to the terminal portion, and the ground terminal is disposed between these terminals corresponding to the test common terminal.

  According to the present invention, the inspection gate terminal, the inspection source terminal, and the inspection switch are provided in the inspection terminal portion of the inspection apparatus corresponding to the test gate terminal, the test source terminal, the test switch terminal, and the test common terminal of the terminal portion of the display device. A terminal and a ground terminal are provided. In addition, as described above, in the terminal portion, the test common terminal is arranged between the terminals connected to each inspection wiring, and the ground terminal is connected between the other terminals in the inspection terminal portion correspondingly. Between the two. Therefore, when the display device is inspected, by connecting the terminal portion to the inspection terminal portion, a test common terminal connected to the ground terminal is provided between the terminals. For example, foreign matters such as dust adhere to the terminal portion. Even in this case, the leakage current due to these foreign substances can be excluded, and the leak defect of the display device can be detected with high accuracy.

It is a figure which shows the circuit structure of the liquid crystal panel of embodiment which concerns on this invention. It is a figure which shows the electrical property of the ring transistor arrange | positioned in a ring transistor circuit etc. It is a figure which shows schematic structure of the test | inspection terminal part of the test | inspection apparatus corresponding to the terminal part of a liquid crystal panel, and a terminal part. It is a figure showing a schematic structure of an inspection device of an embodiment concerning the present invention. It is a flowchart in the leak defect detection process of a liquid crystal panel. It is a timing chart which shows the output timing of the various signals in the leak defect detection process of a liquid crystal panel. In the conventional liquid crystal panel and the liquid crystal panel of this Embodiment, it is a figure which compares the terminal used at the time of leak defect detection processing, and the terminal used in order to display an image when a liquid crystal panel is integrated in a module. It is a figure which shows the example which the foreign material adhered to the liquid crystal panel in which a test common terminal is not provided in a terminal part. FIG. 8 is an electrical characteristic detection model in a foreign matter adhesion portion in FIG. It is a figure which shows the example which the foreign material adhered to the terminal part of this Embodiment. FIG. 10 is an electrical characteristic detection model in a foreign matter adhesion part.

Hereinafter, a liquid crystal panel as a display device according to an embodiment of the present invention and an inspection device for inspecting the liquid crystal panel will be described with reference to the drawings.
FIG. 1 is a diagram showing a circuit configuration of a liquid crystal panel according to an embodiment of the present invention.

[Configuration of LCD panel]
In FIG. 1, reference numeral 1 denotes a liquid crystal panel (liquid crystal TFT (Thin Film Transistor) panel) as a display device. The liquid crystal panel 1 has, for example, red (R), green (G), and blue (B) as basic colors. Is a device that displays a color image by mixing colors. In this embodiment, an amorphous TFT panel in which amorphous silicon is used as a liquid crystal that is an electro-optic material is exemplified. For example, an LTPS-TFT panel (Low-Temperature Poly-Silicon TFT) A TFT using polysilicon as the liquid crystal may be used, such as an HTPS-TFT panel (High Temperature Poly-Sillicon TFT). Moreover, although the liquid crystal panel 1 was illustrated as a display apparatus, it is not limited to this, For example, display apparatuses, such as an OLED panel (Organic Light Emitting Diode: organic EL) which employ | adopted organic substances, such as a diamine and anthracene, as an electro-optical material. Can also be used.

  Although this liquid crystal panel 1 omits detailed drawings, a pair of transparent substrates (a driving substrate and a counter substrate) opposed to each other in a housing and a spacer that divides the transparent substrates into a plurality of regions are provided. In addition, pixels (display pixels 11 and dummy pixels 14) are formed in a region surrounded by the pair of transparent substrates and spacers. Here, in the liquid crystal panel 1, display pixels 11 that emit a single basic color (R, G, B) are arranged along the column direction, and these display pixels 11 are arranged along the row direction. Repeatedly arranged in the order of B. The liquid crystal panel 1 includes a display area 2 for displaying an image, a ring transistor circuit 3 formed on the outer periphery of the display area 2, a gate dummy area 4A, and a source dummy area 4B.

  A plurality of gate lines G and source lines S orthogonal to each other are arranged on the drive substrate.

Each gate line G is wired substantially along, for example, the horizontal direction (row direction) of each display pixel 11 in the display area 2. These gate lines G are provided with gate terminals 21 at one end on the gate dummy region 4A side, and these gate terminals 21 are provided when the liquid crystal panel 1 is incorporated in a module such as a liquid crystal television or a projector. It is connected to a gate electrode provided in a driver that drives the liquid crystal panel 1.
A ring transistor 25 is connected to the other end side of the ring transistor circuit 3 opposite to the one end side where the gate terminal of each gate line G is provided. Each gate line G is connected to the common gate line 22 via the ring transistor 25. That is, all the gate lines G are connected by the common gate line 22 on the other end side. This common gate line 22 is connected via a ring transistor 25 to a common electrode line 26 having a counter electrode Vcom provided on the counter substrate.
In the present embodiment, the configuration in which the gate terminal 21 is formed on one end side of the liquid crystal panel 1 is exemplified, but the present invention is not limited to this. For example, the gate terminal 21 is provided at both ends in the horizontal direction of the liquid crystal panel 1. It is good also as a structure. In this case, the gate line G in which the gate terminal 21 is arranged on the left side and the gate line in which the gate terminal 21 is arranged on the right side may be alternately arranged, and the gate terminal 21 is arranged on the left side. The lines G and the gate lines G on which the gate terminals 21 are arranged on the right side may be divided into upper and lower parts.

Each source line S is wired substantially along the vertical direction (column direction) of each display pixel in the display area 2. Here, the source line S connecting the red basic color display pixels 11 substantially along the column direction is the red source line Sr, the source line S connecting the green basic color display pixels 11 is the green source line Sg, blue. The source line S connecting the basic color display pixels 11 is referred to as a blue source line Sb.
Each source line S has a source terminal 23 at one end on the source dummy region 4B side, and these source terminals 23 are used when the liquid crystal panel 1 is incorporated in a module such as a liquid crystal television or a projector. The source electrode provided in the driver for driving the liquid crystal panel 1 is connected.
Similarly to the gate line G, a ring transistor 25 is connected to the other end side of the ring transistor circuit 3 on the side opposite to the one end side where the source terminal of each source line S is provided. Each source line S is connected to the common source line 24 via the ring transistor 25, and the common source line 24 is connected to the counter electrode Vcom provided on the counter substrate via the ring transistor 25.

Here, FIG. 2 is a diagram showing electrical characteristics of the ring transistor 25 arranged in the ring transistor circuit 3 or the like. In FIG. 2, the ring Tr is an abbreviation for a ring transistor. As shown in FIG. 2, the ring transistor 25 has a characteristic that the current is allowed to pass as the potential difference between the connection portions sandwiching the ring transistor 25 is larger, and the current is hardly allowed to pass when the potential difference is small. Therefore, when the liquid crystal panel 1 is incorporated in the module, a current flows backward from the common gate line 22 or the common source line 24 in a state where no signal is input to the gate line G or the source line S in the display region 2. There is no.
In addition, these ring transistors 25 remove static electricity generated in the circuit and perform electrostatic protection processing, and also maintain a constant amount of current flowing through the gate line G and the source line S. Thereby, excessive current passage to the gate line G and the source line S is suppressed, and power consumption can be reduced.

In the display area 2 of the liquid crystal panel 1, a pixel that applies a voltage to a liquid crystal cell Cmain in which liquid crystal as an electro-optic material constituting the display pixel 11 is sealed in the vicinity of each intersection of the gate line G and the source line S. An electrode 12 is formed. These pixel electrodes 12 are formed of, for example, an ITO (Idium Tin Oxide) film.
In addition, as a switching element that connects each source line S and each pixel electrode 12 to the driving substrate, and switches a voltage application state to the pixel electrode 12 according to the voltage output to the gate line G. A TFT (Thin Film Transistor) 13 is provided. These TFTs 13 include a gate connected to the gate line G, a source connected to the source line S, and a drain D connected to the pixel electrode 12.

When an ON voltage (for example, +15 V) as a gate drive signal is applied to the gate of the TFT 13 via a gate line G from a driver (not shown) that drives the liquid crystal panel 1, the TFT 13 is turned on (the source-drain D is connected). A low impedance state), and current conduction between the source and drain D is allowed. In this state, when a video signal is applied to the source from the driver or the inspection apparatus via the source line S, the charge related to the video signal is conducted between the source and the drain D, and the pixel electrode connected to the drain D 12 is applied.
On the other hand, when an off voltage (for example, −10 V), which is a gate drive signal, is applied to the gate through the gate line G from the driver, the TFT 13 is turned off (a high impedance state between the source and the drain D). Current conduction between the drains D is restricted. Therefore, even if a charge related to the video signal is applied to the source line S connected to the source, the current is not conducted between the source and the drain D, and the application of the charge to the pixel electrode 12 is restricted.

  The pixel electrode 12 is connected to the liquid crystal cell Cmain and is also connected to the holding capacitor Ck0. This holding capacitor Ck0 is intended to suppress the voltage amplitude necessary for driving the liquid crystal panel 1 to be low, and to save power and prevent flicker of the liquid crystal panel 1. The liquid crystal cell Cmain and the holding capacitor Ck0 are connected not only to the pixel electrode 12 but also to the counter electrode of the counter substrate. In the liquid crystal cell Cmain and the holding capacitor Ck0, charges corresponding to the potential difference between the voltage applied to the pixel electrode 12 from the source line S via the TFT 13 and the voltage applied to the counter electrode are written. Retained.

  Each display pixel 11 is configured by the TFT 13, the pixel electrode 12, the liquid crystal cell Cmain and the holding capacitor Ck 0, and the display area 2 of the liquid crystal panel 1 is configured by all these display pixels 11.

  In addition, a gate dummy pixel 14Dg is formed on one end side of each gate line G in the gate dummy region 4A of the liquid crystal panel 1, and a source dummy is formed on one end side of each source line S in the source dummy region 4B of the liquid crystal panel 1. Pixels 14Ds are formed.

  The gate dummy pixel 14Dg is provided with a liquid crystal cell Cmain, a dummy pixel electrode 12Dg for applying a charge to the liquid crystal cell Cmain, and a gate dummy TFT 13Dg as a gate dummy switching element for connecting the gate line G and the dummy pixel electrode 12Dg. . These gate dummy TFTs 13Dg have a gate line G connected to the source, a dummy pixel electrode 12Dg connected to the drain D, and a test switch line 31 to be described later connected to the gate.

  In the gate dummy region 4A, the plurality of gate lines G are divided into a plurality of phases (two phases in the present embodiment) by the gate lines G that are not adjacent to each other, and are connected by the test gate lines 32. Specifically, the test gate line 32 connects the dummy pixel electrodes 12Dg connected to the gate lines G that are not adjacent to each other via the gate dummy TFT 13Dg. For example, the dummy pixel electrodes 12Dg of the odd-numbered gate lines G (G1, G3, G5... G (2n + 1)) are connected by one test gate line 32, and the even-numbered gate lines G are arranged. The dummy pixel electrodes 12Dg of (G2, G4, G6... G (2n)) are connected by another test gate line 32. Further, these test gate lines 32 include test gate terminals Tg (Tg1, Tg2), and a predetermined test voltage is applied to the test gate terminals Tg when the display defect in the liquid crystal panel 1 is inspected.

  Each test gate line 32 is connected to the other end side opposite to the one end side where the test gate terminal Tg is formed by a test common electrode line 35 described later. Each test gate line 32 is connected to the test common electrode line 35 via the ring transistor 25. Thereby, for example, the inconvenience that the drive signal input to the test gate line 32 connected to the test gate terminal Tg2 enters the test gate line 32 connected to the test gate terminal Tg1 via the test common electrode line 35 is avoided. .

  The source dummy pixel 14Ds is substantially the same as the gate dummy pixel 14Dg, as a liquid crystal cell Cmain, a dummy pixel electrode 12Ds that applies a charge to the liquid crystal cell Cmain, and a source dummy switching element that connects the source line S and the dummy pixel electrode 12Ds. Source dummy TFTs 13Ds are provided. These source dummy TFTs 13Ds have a source line S connected to the source, a dummy pixel electrode 12Ds connected to the drain, and a test switch line 31 described later connected to the gate. Further, the source dummy pixel 14Ds is provided in a plurality of stages (for example, three stages in the present embodiment) on one end side of the source line S.

In the source dummy region 4 </ b> B, the plurality of source lines S are divided by the source lines S that are not adjacent to each other and connected by the test source line 33. Specifically, the test source line 33 connects the dummy pixel electrodes 12Ds connected to the drains of the source dummy TFTs 13Ds of the source lines S that are not adjacent to each other. At this time, among the dummy pixel electrodes 12Ds of the first-stage source dummy pixel 14Ds closest to the display area 2, the dummy pixel electrodes 12Ds connected to the red source line Sr are connected to each other by the red test source line 33r, and the green source The dummy pixel electrodes 12Ds connected to the line Sg are connected by a green test source line 33g, and the dummy pixel electrodes 12Ds connected to the blue source line Sb are connected by a blue test source line 33b.
For example, among the source dummy pixels 14Ds connected to the red source line Sr, the dummy pixel electrodes 12Ds of the first stage source dummy pixel 14Ds closest to the display region 2 are connected to each other by the red test source line 33r, and the green Among the source dummy pixels 14Ds connected to the source line Sg, the dummy pixel electrodes 12Ds of the second-stage source dummy pixel 14Ds closest to the display area 2 are connected by the green test source line 33g, and the blue source line Of the source dummy pixels 14Ds connected to Sb, the dummy pixel electrodes 12Ds of the third-stage source dummy pixel 14Ds farthest from the display region 2 may be connected by the blue test source line 33b. In the present embodiment, each source line S is divided into three phases, but may be divided into two phases, four phases or more, for example.
These test source lines 33 include test source terminals Ts (Tsr, Tsg, Tsb), and a predetermined test voltage is applied to the test source terminals Ts when a display defect is inspected in the liquid crystal panel 1.

  Similarly to the test gate line 32, each test source line 33 is connected to the other end side opposite to the one end side where the test source terminal Ts is formed by a test common electrode line 35 described later. Each test source line 33 is connected to the test common electrode line 35 via the ring transistor 25. Thereby, for example, the inconvenience that the drive signal input to the test source line 33r enters the test source lines 33g and 33b via the test common electrode line 35 is avoided.

  As shown in FIG. 1, the test switch line 31 connected to the gates of the gate dummy TFTs 13Dg and the source dummy TFTs 13Ds has a test switch terminal Tenb at one end. Tenb outputs a control signal for controlling the switching of each of the dummy TFTs 13Dg and 13Ds, that is, an on-voltage that makes the source-drain D conductive, or an off-voltage that makes the source-drain D non-conductive. The

The test switch line 31 is connected to the common gate line 22 and the test common electrode line 35 via the ring transistor 25. Thereby, when the liquid crystal panel 1 is incorporated in the module, a configuration for applying an off voltage to the test switch terminal Tenb becomes unnecessary. That is, when the liquid crystal panel 1 is incorporated into a module and the liquid crystal panel 1 is driven, an on voltage (+15 V) is applied to one of the plurality of gate lines G, and an off voltage is applied to the other gate lines G. By applying (−10V), the liquid crystal cell Cmain of the predetermined display pixel 11 on the gate line G to which the ON voltage is applied is charged. Then, by sequentially applying an ON voltage to each gate line G, each display pixel 11 is sequentially charged, and an image corresponding to the video signal is displayed on the display region 2. Here, 240 gate lines G and 960 source lines S are arranged in the liquid crystal panel 1 even in the case of QVGA (Quarter Video Graphics Array) resolution (320 × 240 pixels), for example. Will be. Therefore, even when any one of the 240 gate lines G is applied with a + 15V on-voltage, the common gate line 22 is also turned off because a −10V off-voltage is applied to the other gate lines G. The voltage is “−10V”. Here, since the test switch line 31 is connected to the common gate line 22, the potential of the test switch line 31 is also “−10 V”, and even when the test switch terminal Tenb is in an open state, The off-voltage is applied to the dummy TFTs 13Dg and 13Ds, and the dummy TFTs 13Dg and 13Ds are turned off so that the source-drain D is not conductive.
In addition, the inconvenience of the control signal input to the test switch terminal Tenb being input to the test gate line 32 and the test source line 33 via the test common electrode line 35 is also avoided.

  As described above, the test common electrode line 35 is connected to the test gate line 32, the test source line 33, and the test switch line 31 via the ring transistor 25, and one end thereof is connected to the test common terminal Tcom. The test common electrode line 35 is grounded when the liquid crystal panel 1 is inspected for leakage current, so that the GND potential is maintained. This makes it impossible for each inspection wiring (test gate line 32, test source line 33, test switch line 31) to transmit and receive signals via the test common electrode line 35, thereby preventing leakage current between the inspection wirings. .

Next, the terminal part 40 in which the terminal connected to each test | inspection wiring of the liquid crystal panel 1 is arrange | positioned is demonstrated based on FIG. FIG. 3 is a diagram illustrating a schematic configuration of the terminal portion 40 of the liquid crystal panel 1 and the inspection terminal portion 110 of the inspection apparatus 100 corresponding to the terminal portion 40.
The terminal unit 40 is a part connected to an inspection apparatus 100 described later when performing leak defect detection of the liquid crystal panel 1, and includes a test switch terminal Tenb, a test gate terminal Tg (Tg1, Tg2), and a test source terminal Ts. (Tsr, Tsg, Tsb), the common electrode terminal Vcom, and the test common terminal Tcom are arranged along the straight line at predetermined intervals. Here, only one test common terminal Tcom is shown in FIG. 1, but actually, the test common terminal Tcom is divided into a plurality of parts as shown in FIG. 3, and these divided test common terminals Tcom are shown in FIG. Are disposed between the other terminals. Since the test common terminal Tcom is grounded when the liquid crystal panel 1 has a leak defect, a ground potential portion is provided between the inspection terminals. For example, conductive foreign matters adhere to the terminal portion, and the inspection terminal Even when a current flows from the first to the foreign object, it can be released to the test common terminal Tcom.

[Configuration of inspection equipment]
Next, an inspection apparatus for inspecting the display pixels 11 of the liquid crystal panel 1 as described above will be described.
FIG. 4 is a diagram showing a schematic configuration of an inspection apparatus for inspecting the liquid crystal panel 1.
In FIG. 4, the inspection apparatus 100 is an inspection terminal unit 110 to which the terminal unit 40 of the liquid crystal panel 1 can be connected, an inspection control unit 120 for inspecting the liquid crystal panel 1, and grounding means for grounding the test common terminal Tcom. A grounding circuit 130 is provided.

As shown in FIG. 3, the inspection terminal unit 110 corresponds to the terminals corresponding to the terminal unit 40 of the liquid crystal panel 1, that is, the inspection switch terminal CTenb corresponding to the test switch terminal Tenb and the test gate terminals Tg (Tg1, Tg2). Inspection gate terminals CTg (CTg1, CTg2), inspection source terminals CTs (CTsr, CTsg, CTsb) corresponding to the test source terminals Ts (Tsr, Tsg, Tsb), inspection common electrode terminals CVcom corresponding to the common electrode terminal Vcom, And a ground terminal CTcom corresponding to the test common terminal Tcom, which is arranged along a straight line. That is, the plurality of ground terminals CTcom are respectively disposed between the other terminals CTenb, Ctg, Cts, and Cvcom.
The ground terminal CTcom is grounded by the ground circuit 130, thereby grounding each test common terminal Tcom.

  As shown in FIG. 4, the inspection control unit 120 includes a test switch control unit 121, a test drive control unit 122, and a current measurement unit 123.

The test switch control means 121 is connected to the inspection switch terminal CTenb of the inspection terminal unit 110, and outputs a control signal for switching the driving state of the dummy TFTs 13Dg and 13Ds.
The test drive control means 122 is connected to the inspection gate terminal CTg and the inspection source terminal CTs, and sequentially applies test voltages to charge the display pixels 11 in the liquid crystal panel 1.

  The current measuring means 123 measures the current flowing from the inspection source terminal CTs and the inspection gate terminal CTg. For example, when the green and blue display pixels 11 are charged, the current flowing through the red test source terminal Tsr is detected. The current measuring unit 123 may also perform a process of determining whether or not the liquid crystal panel 1 has a leak defect based on the measured current value.

[LCD panel inspection method]
Next, a leak defect detection process for detecting a leak defect in the liquid crystal panel 1 using the inspection apparatus 100 will be described.
FIG. 5 is a flowchart of the leak defect detection process of the liquid crystal panel 1. FIG. 6 is a timing chart showing output timings of various signals in the leak defect detection process of the liquid crystal panel 1.

In the leak defect detection processing of the liquid crystal panel 1, first, the liquid crystal panel 1 is installed in the inspection device 100, and various terminals of the terminal unit 40 are brought into contact with terminals of the inspection terminal unit 110 of the inspection device 100.
Then, the test switch control means 121 of the inspection apparatus 100 applies the ON voltage VenbH (for example, VenbH = + 30 V) as a control signal to the test switch terminal Tenb (step S101: timing T1). As a result, each gate dummy TFT 13Dg and each source dummy TFT 13Ds are turned on, and conduction between the source and drain D is allowed.
Further, when the on-voltage VenbH is applied to each gate dummy TFT 13Dg and each source dummy TFT 13Ds for a long period during the leak detection process, the test switch control means 121 changes the threshold voltage Vth of the dummy TFTs 13Dg and 13Ds in the positive direction. Since the circuit operation is hindered, the off voltage VenbL is applied as a control signal to each gate dummy TFT 13Dg and each source dummy TFT 13Ds for a predetermined period Ttime_enb (for example, 1 msec) at a constant cycle.
Although the on-voltage VenbH is set to +30 V and the off-voltage VenbL is set to −10 V as the control signal, the on-voltage VenbH applied as the control signal may be equal to or higher than the on-voltage Vgh output to the gate terminal 21. The off voltage VenbL to be applied may be equal to or less than the off voltage Vgl output to the gate terminal 21. Therefore, in the liquid crystal panel 1 of the present embodiment, among the drive voltages applied to the gate terminal 21, the on voltage Vgh is + 15V and the off voltage Vgl is −10V. The off voltage VenbL may be −10V or less.

  Next, the test drive control unit 122 of the inspection apparatus 100 applies a drive voltage to the inspection gate terminal CTg (CTg1, CTg2) and the inspection source terminal CTs (CTsr, CTsg, CTsb) to detect the presence or absence of a leakage current. Perform the detection process. Below, a specific example of this detection process is shown.

That is, the test drive control means 122 applies the ON voltage Vgh (for example, +15 V) to the test gate terminal CTg1 at the timing T2 shown in FIG. 6, and turns on the TFTs 13 connected to the odd-numbered gate lines G. And Here, the time during which the on-voltage Vgh is applied by the test drive control unit 122 may be a time for sufficiently charging the corresponding pixel, and is set to 1 msec, for example.
Further, at this timing T2, the test drive control means 122 applies an off voltage Vgl (for example, −10 V) to the test gate terminal Tg2, and turns off the TFTs 13 connected to the even-numbered gate lines G. (Step S102: gate 1 driving state).

  Further, at this timing T2, the test drive control means 122 applies the gradation signal Vx to the inspection source terminal CTsg (green inspection source terminal CTsg) corresponding to green and the inspection source terminal CTsb (blue inspection source terminal CTsb) corresponding to blue. (5V) is applied. At this time, the current measuring unit 123 measures the current value Ar1 flowing from the inspection source terminal CTsr (red inspection source terminal CTsr) corresponding to red (step S103).

  Thereafter, at timing T3 in FIG. 6, the test drive control unit 122 applies the ON voltage Vgh (for example, + 15V) to the inspection gate terminal CTg1 again, and turns on the TFTs 13 connected to the odd-numbered gate lines G. State. At this timing T3, as shown in FIG. 6, the test drive control means 122 applies the gradation signal Vx (0 V) to the green inspection source terminal CTsg and the blue inspection source terminal CTsb, and discharges the charges charged in the pixels. To do.

  Next, the test drive control unit 122 applies the gradation signal Vx (for example, +5 V) to the red inspection source terminal CTsr and the blue inspection source terminal CTsb while maintaining the gate 1 driving state. Then, the current measuring unit 123 measures the current value Ag1 flowing from the green inspection source terminal CTsg (step S104). Further, after the measurement of the current value Ag1, the charge charged in the pixels corresponding to red and blue is discharged as in the case of measuring Ar1.

  Further, the test drive controller 122 applies the gradation signal Vx (for example, + 5V) to the red inspection source terminal CTsr and the green inspection source terminal CTsg while maintaining the gate 1 driving state. Then, the current measuring unit 123 measures the current value Ab1 flowing from the blue inspection source terminal CTsb (step S105). Further, after the measurement of the current value Ab1, the charges charged in the pixels corresponding to red and green are discharged in the same manner as in the measurement of Ar1.

  Thereafter, the test drive control means 122 applies an off signal Vgl (for example, −10 V) to the inspection gate terminal Tg1, turns off the TFTs 13 connected to the odd-numbered gate lines G, and supplies the inspection gate terminal CTg2. An on-voltage (for example, +15 V) is applied to turn on the TFTs 13 connected to the even-numbered gate lines G (step S106: gate 2 driving state).

  Thereafter, substantially the same processing as the operations in steps S103 to S105 is performed. That is, the test drive control unit 122 maintains the gate 2 drive state, applies a grayscale signal (for example, + 5V) to the green inspection source terminal CTsg and the blue inspection source terminal CTsb, and the current measurement unit 123 determines the red inspection source. The current value Ar2 flowing from the terminal CTsr is measured (step S107). Further, the test drive control unit 122 discharges the charges of the green pixel and the blue pixel, and then applies a gradation signal (for example, +5 V) to the red inspection source terminal CTsr and the blue inspection source terminal CTsb. The current value Ag2 flowing from the green inspection source terminal CTsg is measured (step S108). Further, the test drive control unit 122 discharges the charges of the red pixel and the blue pixel, and then applies a gradation signal (for example, +5 V) to the red inspection source terminal CTsr and the green inspection source terminal CTsg. The current value Ab2 flowing from the blue inspection source terminal CTsb is measured (step S109). Note that the signal output timing from step S104 to step S109 is the same as that in step S103, and the timing shown in the timing chart of FIG. 6 can be used.

Thereafter, the inspection apparatus 100 performs a defect detection process based on each current value obtained in the detection process (steps S102 to S109) (step S110).
Specifically, the inspection apparatus 100 calculates a difference value between current values obtained at each inspection source terminal CTs, that is, a difference value between Ar1 and Ar2, a difference value between Ag1 and Ag2, and a difference value between Ab1 and Ab2. To do. Then, the inspection apparatus 100 determines whether or not these difference values are equal to or greater than a predetermined threshold value. If the difference values are equal to or greater than the predetermined threshold value, the liquid crystal panel 1 determines that there is a leak defect and is smaller than the threshold value. Determines that there is no leak defect in the liquid crystal panel 1.

FIG. 7 shows a comparison between terminals used for leak defect detection processing and terminals used to display an image when the liquid crystal panel 1 is incorporated in a module in the conventional liquid crystal panel and the liquid crystal panel 1 of the present embodiment. It is a figure to do.
As shown in FIG. 7, conventionally, when inspecting a liquid crystal panel, a drive signal is output to each gate line, each source line, and each common electrode line, and the current value output from the line to be inspected is calculated. I was measuring. In this case, for example, in the case of QVGA (Quarter Video Graphics Array) resolution (320 × 240 pixels), it is necessary to connect 320 gate lines and 720 source lines to the inspection apparatus, and a highly accurate probe is required. There is a problem of being. On the other hand, in the present embodiment, terminals as shown in FIG. 3, that is, test switch terminal Tenb, test gate terminal Tg (Tg1, Tg2), test source terminal Ts (Tsr, Tsg, Tsb), common test It is only necessary to connect a total of 15 terminals Tcom and common electrode terminals Vcom, the configuration of the probe (inspection terminal unit 110) can be simplified, and connection errors during terminal connection can be suppressed.
When the liquid crystal panel 1 is assembled in a module and assembled as an actual product, the test switch terminal Tenb, the test gate terminal Tg (Tg1, Tg2), the test source terminal Ts (Tsr, Tsg, Tsb), and the test common terminal Tcom are opened. Thus, it is only necessary to connect each gate terminal 21, each source terminal 23, and common electrode terminal Vcom to a driver, and for example, it is not necessary to perform a cutting process of the liquid crystal panel 1 or the like. Therefore, problems such as deterioration of manufacturability can be avoided.

[Operation when foreign matter adheres to the terminal or inspection terminal]
When leak inspection is performed on the liquid crystal panel 1 of the present embodiment by the inspection apparatus 100, normal leakage defect detection can be performed even if foreign matter is attached to the terminal portion 40 or the inspection terminal portion 110. .
FIG. 8 is a diagram illustrating an example in which foreign matter is attached to a liquid crystal panel in which a test common terminal is not provided in the terminal portion. FIG. 9 is an electrical characteristic detection model in the foreign material adhesion part in FIG. FIG. 10 is a diagram illustrating an example in which foreign matter is attached to the terminal portion of the present embodiment. FIG. 11 is an electrical characteristic detection model in the foreign material adhesion part in FIG.

As shown in FIG. 8, when the conductive foreign material 200 adheres to the terminal portion of the liquid crystal panel where the test common electrode is not provided, for example, when the foreign material 200 adheres between the test source terminals Tsr and Tsg, FIG. As shown, a leak current is generated from the test source terminal Tsg to the test source terminal Tsr via a foreign substance (resistance value: Rdust, capacity: Cdust).
In this case, the current value I (InpectSignal) flowing out from the test source terminal Tsr is expressed by the following equation (1).

[Equation 1]
I (InspectSignal) = Vcc / (Rdust × Rf / (Rdust + Rf)) (1)

  In the above formula (1), Vcc is a voltage applied to the test source terminal Tsg. Rf is a leak defect existing in the display area 2 of the liquid crystal panel. As shown in the equation (1), in such a terminal portion, when a foreign substance adheres, the leak defect (Rf) existing in the display area 2 cannot be accurately detected, and the display area 2 Even when there is no leak defect, current is detected, which causes false detection.

  On the other hand, in the terminal portion 40 of the present embodiment, as shown in FIG. 10, when the foreign material 200 adheres, as shown in FIG. 11, the current that flows through the foreign material 200 flows from the test common electrode Tcom to It is possible to escape through the ground terminal CTcom. In this case, when the current value I (InspectSignal) flowing from the test source terminal Tsr is measured by the current measuring unit 123, a value represented by the following equation (2) is measured.

[Equation 2]
I (InspectSignal) = Vcc / Rf + 0 / Rdust2 (2)

  As shown in the above formula (2), the influence of foreign matter can be eliminated. That is, when there is a leak defect in the display area 2, the current measuring unit 123 can accurately detect a leak current value caused by the leak defect, and when there is no leak defect in the display area 2, “0 Can be measured.

[Effects of liquid crystal panel and inspection device]
As described above, the liquid crystal panel 1 according to the above embodiment includes the gate dummy pixel 14Dg and the source dummy pixel 14Ds outside the display region 2, and the gate dummy TFT 13Dg constituting the gate dummy pixel 14Dg and the source dummy pixel 14Ds. The gates of the source dummy TFTs 13Ds are connected by a test switch line 31, respectively. The test gate lines 32 are connected to the dummy pixel electrodes 12Dg connected to the odd-numbered gate lines G and to the dummy pixel electrodes 12Dg connected to the even-numbered gate lines G, respectively. Further, the red test source line 33r is connected to the dummy pixel electrode 12Ds connected to the red source line Sr, and the green test source line 33g is connected to the dummy pixel electrode 12Ds connected to the green source line Sg. A blue test source line 33b is connected to the dummy pixel electrode 12Ds connected to the blue source line Sb. The test switch line 31, the test gate line 32, and the test source line 33 are connected to the test common electrode line.
The inspection apparatus 100 also includes a test switch control unit 121 that drives the dummy TFTs 13Dg and 13Ds, and a test drive control unit that outputs a predetermined drive signal to the test gate line 32 and the test source line 33 to perform a leak defect detection process. 122, current measuring means 123 for measuring a leakage current, and a ground circuit 130 for grounding the test common electrode line 35.
For this reason, in the leak defect detection processing of the liquid crystal panel 1 by the inspection apparatus 100, the test common electrode line 35 is grounded, so that another inspection is performed from the test switch line 31, each test gate line 32, and each test source line 33. Leakage current flowing in the wiring can be prevented, and leak defect detection accuracy can be improved.
In the leak defect detection processing of the liquid crystal panel 1 by the inspection apparatus 100, the gate dummy TFT 13Dg and the source dummy TFT 13Ds can be turned on by applying an on voltage to the test switch terminal Tenb. A test voltage can be applied to each gate line G and each source line S from the test gate terminal Tg and the test source terminal Tsr via the TFTs 13Dg and 13Ds. Therefore, the liquid crystal panel 1 and the inspection apparatus 100 can use the dummy pixels 14Dg and 14Ds provided for electrostatic protection as an inspection circuit without providing a complicated dedicated inspection circuit. The structure which concerns on can be simplified. Further, since the defect inspection of the liquid crystal panel 1 can be performed only by applying a predetermined voltage to the test switch terminal Tenb, the two test gate terminals Tg, and the three test source terminals Ts, For example, it is not necessary to connect each gate line G and each source line S with a probe or the like, and the liquid crystal panel 1 can be easily inspected.

Further, test wiring such as the test switch line 31, each test gate line 32, and each test source line 33 is connected to the test common electrode line 35 via the ring transistor 25.
For this reason, it is possible to prevent inconvenience that the signal input to each inspection wiring is input to another inspection wiring through the test common electrode line 35. Therefore, only the leak current generated in the display area 2 of the liquid crystal panel 1 can be accurately detected during the leak defect detection process.

In the terminal portion 40, test switch terminals Tenb, test gate terminals Tg, and test source terminals Ts connected to the test wirings are arranged on a straight line. In addition, a test common terminal Tcom connected to the test common electrode line 35 is arranged.
In addition, the inspection terminal unit 110 of the inspection apparatus 100 has a test switch terminal CTenb, test gate terminals CTg, and test source terminals CTs arranged on a straight line corresponding to the terminal unit 40, and between these test terminals. In addition, a ground terminal CTcom is arranged corresponding to the test common terminal Tcom.
For this reason, in the leak defect detection processing of the liquid crystal panel 1 by the inspection apparatus 100, even when conductive foreign matter adheres to the terminal portion 40 or the inspection terminal portion 110, the leakage current flowing through the foreign matter is released from the ground circuit 130. Can do. Therefore, at the time of leak defect detection processing, the current measuring unit 123 can exclude leaks caused by foreign matter, and can accurately detect only the leak current in the display area 2.

The test switch line 31 is connected to the common gate line 22 that connects the other end of the gate line G.
For this reason, when the liquid crystal panel 1 is assembled in a module such as a liquid crystal television or a projector, it is only necessary to connect each gate line G, each source line S, and the counter electrode Vcom to the driver, the test switch terminal Tenb, The gate terminal Tg, the test source terminal Ts, and the test common terminal Tcom can be opened, that is, not connected to any terminal. That is, when the liquid crystal panel 1 is normally driven, the potential of the common gate line 22 is close to the off-voltage, and the off-voltage of the common gate line 22 is applied to the dummy TFTs 13Dg and 13Ds to be turned off. It is not necessary to apply an ON voltage for maintaining the dummy TFTs 13Dg and 13Ds to the OFF state to the test switch terminal Tenb. Therefore, as compared with the configuration in which the off voltage is continuously applied to the test switch terminal Tenb, stable driving of the liquid crystal panel 1 can be realized, and the device reliability can be improved. Further, as described above, when the liquid crystal panel 1 is normally driven, the dummy TFTs 13Dg and 13Ds are surely turned off, so that it is unnecessary to apply a voltage to the test gate terminal Tg and the test source terminal Ts.

  A ring transistor 25 is provided between each gate line G and the common gate line 22. Therefore, the potential difference between the gate line G to which the drive voltage is applied and the common gate line 22 increases, so that a current flows from the gate line G to which the drive voltage is applied to the common gate line 22. The potential difference between the gate line G to which the off voltage is applied and the common gate line 22 is almost zero, and no current flows. Therefore, no current flows from the common gate line 22 to the gate line G to which the off voltage is applied, and stable driving of the liquid crystal panel 1 can be realized.

[Other Embodiments]
It should be noted that the present invention is not limited to the above-described embodiments, and modifications, improvements, and the like within the scope that can achieve the object of the present invention are included in the present invention.

  For example, in the above embodiment, the gate line G is divided into two phases, and the test gate lines 32 are connected to the two-phase gate lines G. However, the present invention is not limited to this. It is also possible to divide the gate lines G into phases or higher and connect the test gate lines 32 to the respective phases. Similarly, the source line S is divided into three phases of RGB, and the test source line 33 is connected to each phase. However, the source line S may be divided into four or more phases, and may be divided into two phases. The test source line 33 may be connected to each.

  3 shows an example in which the inspection terminals are arranged at predetermined intervals. For example, the inspection terminals are connected to each other through a ring transistor, a contact hole, a non-linear resistance element, or the like. In this case, it is possible to more reliably prevent a leak that occurs between the inspection terminals.

  In addition, the specific structure and procedure for carrying out the present invention can be appropriately changed to other structures and the like within a range in which the object of the present invention can be achieved.

  DESCRIPTION OF SYMBOLS 1 ... Liquid crystal panel as a display apparatus, 12 ... Pixel electrode, 12Dg ... Dummy pixel electrode, 12Ds ... Dummy pixel electrode, 13 ... TFT, 13Dg ... Gate dummy TFT, 13Ds ... Source dummy TFT, 14 ... Dummy pixel, 14Dg ... Gate Dummy pixel, 14Ds ... Source dummy pixel, 22 ... Common gate line, 25 ... Ring transistor as electrostatic protection element, 31 ... Test switch line, 32 ... Test gate line, 33 ... Test source line, 35 ... Test common electrode line DESCRIPTION OF SYMBOLS 40 ... Terminal part, 100 ... Inspection apparatus, 110 ... Inspection terminal part, 121 ... Test switch control means, 122 ... Test drive control means, 123 ... Current measurement means, 130 ... Ground circuit as ground means, Cmain ... Electro-optical Liquid crystal cell in which liquid crystal as a material is enclosed, CTcom, ground terminal, CTenb Inspection switch terminal, CTg1, CTg2 ... Inspection gate terminal, CTsr, CTsg, CTsb ... Inspection source terminal, G ... Gate line, S ... Source line, Tcom ... Test common terminal, Tenb ... Test switch terminal, Tg ... Test gate terminal, Ts: Test source terminal, Vcom: Counter electrode.

Claims (5)

A driving substrate and a counter substrate facing each other, an electro-optical material sealed between the driving substrate and the counter substrate, a plurality of source lines and a plurality of gate lines provided on the driving substrate and orthogonal to each other; A plurality of pixel electrodes provided in the vicinity of intersections of the plurality of source lines and the plurality of gate lines, and applied to the electro-optic material with the charges output to the source lines; and connected to the gate lines, A switching device that switches a conduction state between a source line and the pixel electrode, and a display device comprising:
A dummy pixel electrode that is provided on one end side of the gate line and applies an electric charge from the gate line to the electro-optic material; and the gate line and the dummy pixel electrode are connected, and the gate line A gate dummy pixel having a gate dummy switching element for switching a conduction state between the dummy pixel electrode;
A dummy pixel electrode that is provided on one end side of the source line, applies a charge from the source line to the electro-optic material, and connects the source line and the dummy pixel electrode; A source dummy pixel having a source dummy switching element for switching a conduction state between the dummy pixel electrode;
A test switch line connected to the gate dummy switching element and the source dummy switching element to transmit a control signal for controlling switching of a conduction state to the gate dummy switching element and the source dummy switching element;
A plurality of test gate lines that are connected to the dummy pixel electrodes of the gate dummy pixels provided on the gate lines that are not adjacent to each other among the plurality of gate lines, and divide the gate line into two or more phases;
A plurality of test source lines that are connected to the dummy pixel electrodes of the source dummy pixels provided on the source lines that are not adjacent to each other among the plurality of source lines, and divide the source lines into two or more phases;
A plurality of the test gate lines, a plurality of the test source lines, and a test common electrode line connecting the test switch lines;
A display device comprising: The display device according to claim 1,
The display device, wherein the test gate line, the test source line, and the test switch line are connected to the test common electrode line through an electrostatic protection element. The display device according to any one of claims 1 to 3,
A test gate terminal connected to each of the plurality of test gate lines;
A test source terminal connected to each of the plurality of test source lines;
A test switch terminal connected to the test switch line;
A plurality of test common terminals connected to the test common line, and a terminal portion comprising:
In the terminal portion, a plurality of the test gate terminals, a plurality of the test source terminals, and the test switch terminals are arranged along a straight line, and at least one or more test common terminals are provided between these terminals. A display device characterized by being arranged. A driving substrate and a counter substrate facing each other, an electro-optical material sealed between the driving substrate and the counter substrate, a plurality of source lines and a plurality of gate lines provided on the driving substrate and orthogonal to each other; A plurality of pixel electrodes provided in the vicinity of intersections of the plurality of source lines and the plurality of gate lines, and applied to the electro-optic material with the charges output to the source lines; and connected to the gate lines, A switching element that switches a conduction state between the source line and the pixel electrode, a dummy pixel electrode that is provided on one end side of the gate line and applies a charge from the gate line to the electro-optic material, and the gate line And the dummy pixel electrode are connected to each other, and a gate diode for switching a conduction state between the gate line and the dummy pixel electrode is connected. A gate dummy pixel having a switching element, a dummy pixel electrode that is provided on one end side of the source line, applies a charge from the source line to the electro-optic material, and the source line and the dummy pixel electrode. A source dummy pixel having a source dummy switching element that connects and switches a conduction state between the source line and the dummy pixel electrode, and is connected to the gate dummy switching element and the source dummy switching element to conduct. A test switch line for transmitting a control signal for controlling switching of the state to the gate dummy switching element and the source dummy switching element, and the gate dummy pixels provided in the gate lines not adjacent to each other among a plurality of gate lines. Connected to the dummy pixel electrode A plurality of test gate lines that divide the gate line into two or more phases, and the source lines connected to the dummy pixel electrodes of the source dummy pixels provided on the source lines that are not adjacent to each other among the plurality of source lines; Occurs in a display device including a plurality of test source lines that divide a line into two or more phases, and a plurality of the test gate lines, a plurality of the test source lines, and a test common electrode line that connects the test switch lines An inspection device for inspecting leakage current,
Test switch control means for outputting the control signal to the test switch line;
Test drive control means for outputting a predetermined drive signal to the test gate line and the source gate line;
A current measuring means for measuring a current output from a line to be inspected among the test gate line and the source gate line;
A grounding means for grounding the test common electrode line;
An inspection apparatus comprising: The inspection apparatus according to claim 4,
The display device includes a test gate terminal connected to each of the plurality of test gate lines, a test source terminal connected to each of the plurality of test source lines, a test switch terminal connected to the test switch line, and A terminal portion including a plurality of test common terminals connected to the test common line, wherein the plurality of test gate terminals, the plurality of test source terminals, and the test switch terminals are aligned along a straight line. And at least one test common terminal is disposed between these terminals,
The inspection device includes:
An inspection switch terminal connected to the test switch control means and connectable to the test switch terminal;
An inspection gate terminal connected to the test switch control means and the current measurement means, and connectable to the test gate terminal;
An inspection source terminal connected to the test switch control means and the current measurement means, and connectable to the test source terminal;
A ground terminal that is grounded and connectable to the test common terminal;
The inspection terminal portion includes a plurality of inspection gate terminals, a plurality of inspection source terminals, and the inspection switch terminals arranged along a straight line corresponding to the terminal portions. In addition, the grounding terminal is disposed between these terminals corresponding to the test common terminal.

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