JP2010225695A - Method of manufacturing diffusion wafer - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a diffusion wafer group having a narrow range of variance in resistivity in addition to a high-precision thickness of a non-diffusion layer. <P>SOLUTION: In conventional arts, a range of variance in resistivity in one ingot cannot be grasped, variance in resistivity can be predefined for each ingot and only a thickness of a non-diffusion layer can be predefined. The method of manufacturing the diffusion wafer is provided wherein the thickness of the non-diffusion layer corresponding to resistivity is obtained even in the same ingot. Further, a diffusion wafer group which has more preferable resistivity and thickness of the non-diffusion layer can be provided by combining diffusion wafers obtained from different ingots. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a method for manufacturing a diffusion wafer.

  Conventionally, for power devices for discrete applications such as high-power transistors, diodes, and rectifiers, diffusion consisting of two layers: a low-resistivity diffusion layer with a high-concentration dopant diffused and a high-resistivity non-diffusion layer Wafers have been used (eg, Patent Documents 1 and 2). This will be described with reference to FIGS. As shown in FIG. 10, here, the surface 21 a of the non-diffusion layer 21 of the diffusion wafer 20 is referred to as “surface” of the diffusion wafer 20, and the surface 22 a of the diffusion layer 22 of the diffusion wafer 20 is referred to as “ Called “back side”.

  As shown in FIG. 11, the silicon wafer is sliced from the ingot (S10). Then, in order to prevent cracking of the wafer and dust generation, a chamfering (beveling) process is performed in which a rotating grindstone is applied to the edge of the side end surface to round the edge to form a chamfered portion (S12). In order to remove damage such as surface scratches and unevenness caused by slicing and to flatten the wafer, the silicon wafer is set in a wrapping apparatus, and the surface of the silicon wafer is lapped (S14). In order to remove the processing strain layer on the planarized wafer surface, the silicon wafer is immersed in an alkaline etching solution and etched (S16). The silicon wafer loaded in the boat in the furnace is exposed to an atmosphere containing high temperature and dopant for a predetermined time to form diffusion layers on both surfaces of the wafer (S18). As shown in FIG. 10A, the silicon wafer is cut into two along the thickness center of the silicon wafer, for example, with a wire saw, and two diffusion wafers 20 are obtained from one silicon wafer. (S20). In order to flatten the surface of the non-diffusion layer 21 of the diffusion wafer 20, it is set in a single-side grinding machine on the diffusion wafer 20, and a grinding wheel is pressed against the surface 21a of the non-diffusion layer 21 of the diffusion wafer 20. (S22). As shown in FIG. 10B, in order to prevent cracking of the diffusion wafer 20 and dust generation, a chamfering process is performed by applying a rotating grindstone to the edge of the side end surface of the sliced diffusion wafer 20 and rounding the edge. (Beveling) is performed (S24). The surface 22a of the diffusion layer 22 of the plurality of diffusion wafers 20 is pasted on the plate with wax or the like (S28). In order to make the thickness of the non-diffusion layer 21 of the diffusion wafer 20 a desired thickness and to remove mechanical damage (both brittleness and ductility damage) given in the grinding process, the plate is inverted and the non-diffusion layer 21 is reversed. Are set so as to be pressed against the polishing cloth on the surface plate of the polishing apparatus, and by rotating the plate and the surface plate, a plurality of diffusion wafers 20 are simultaneously subjected to batch polishing (S30).

  In general, diffusion wafers have been manufactured as described above. However, since the thickness of the non-diffusion layer of the diffusion wafer affects the characteristics of the device, high-precision control of the thickness of the non-diffusion layer is desired. Yes. Conventionally, in order to obtain a desired thickness of the non-diffusion layer, attempts have been made to improve polishing accuracy. On the other hand, it has been proposed to remove a predetermined machining allowance by spin etching (see FIG. 4) (for example, Patent Document 3).

  According to the above techniques, the thickness of the non-diffusion layer can be set to a predetermined desired value. However, it is not sufficient as a required level for improving the performance of the device. It ’s gone.

JP-A-1-293613 Japanese Patent No. 2915893 JP 2007-103857 A

  That is, it has been found that it is desirable to have a narrow range of resistivity variation in addition to the highly accurate thickness of the non-diffusion layer. However, in the conventional method, the range of resistivity variation within one ingot cannot be grasped, and the resistivity variation can be defined for each ingot, and only the thickness of the non-diffusion layer can be defined.

  In view of the problems as described above, the present invention provides a method capable of freely manufacturing the thickness of the non-diffusion layer corresponding to the resistivity even in the same ingot. Moreover, the diffusion wafer group provided with the more preferable resistivity and the thickness of a non-diffusion layer can be provided combining the diffusion wafer obtained from a different ingot.

More specifically, the following can be provided.
(1) In the method of manufacturing a diffusion wafer, a step of slicing a silicon wafer from an ingot, a step of diffusing by diffusing impurities on both sides of the sliced silicon wafer, and dividing the diffused silicon wafer into two The step of grinding the divided surface, the step of measuring the resistivity of the ground divided surface, the step of calculating the corresponding machining allowance from the obtained resistivity, and removing the calculated machining allowance and diffusing And a step of obtaining a wafer.

  Here, the resistivity can affect the performance of a device obtained by processing a diffusion wafer. On the other hand, the allowance for the diffusion layer is also preferably managed within an appropriate range in order to maintain the quality in device processing. The performance of the device as the final product depends on these mutual relationships as will be described later.

(2) The step of obtaining the diffusion wafer by removing the machining allowance includes a step by spin etching, and can provide the method for manufacturing a diffusion wafer as described in (1) above. Here, the machining allowance may be different for each diffusion wafer, and it is preferable to remove it by a single wafer. On the other hand, in normal polishing, setting to a polishing apparatus takes time and productivity is deteriorated. Spin etching is easy to install in the apparatus and has high productivity.

(3) The above-mentioned process comprising the step of nondestructively measuring the thickness of the non-diffusion layer between the step of grinding the dividing surface and the step of obtaining the diffusion wafer by removing the machining allowance. The manufacturing method of the diffusion wafer as described in 1) or (2) can be provided. If the thickness of the non-diffusion layer can be measured nondestructively, a post-process corresponding to the thickness can be performed, and the quality of the final product can be improved.

(4) Further, after the step of obtaining the diffusion wafer by removing the calculated allowance, the step of storing specific information for specifying the obtained diffusion wafer in the database in association with the resistivity and the thickness of the non-diffusion layer And a method of manufacturing a diffusion wafer according to any one of (1) to (3), further including a step of selecting stored specific information from a relationship between a preferable resistivity and a thickness of the non-diffusion layer. Can do. As described above, when the characteristics are grasped for each diffusion wafer and converted into a database, diffusion wafers required in the subsequent process can be provided in a preferable order.

(5) After the step of storing in the database, the step of slicing to the step of storing is repeated a predetermined number of times, and the ingot includes a plurality of types of ingots. The silicon wafer is sliced from at least two types of ingots, and the method for producing a diffusion wafer according to (4) above can be provided. Diffusion wafers cut out from each ingot may have characteristic variations that may overlap in distribution from one ingot to another. If this variation can be used successfully, a diffusion wafer having uniform characteristics can be selected from each ingot to form a diffusion wafer group. In this group, the variation in characteristics can be made smaller than the variation in the same ingot.

  As described above, according to the present invention, the thickness of the non-diffusion layer corresponding to the resistivity can be freely manufactured even in the same ingot. Further, when diffusion wafers obtained from different ingots are combined, it is possible to provide a diffusion wafer group having a more preferable relationship between resistivity and non-diffusion layer thickness in the same ingot.

It is a figure which shows the flowchart of the Example of this invention. It is a figure which shows the relationship between the thickness of a non-diffusion layer, and a resistivity. It is a figure which shows the flowchart of the 2nd Example of this invention. It is a figure which shows the schematic diagram of a spin etching apparatus. It is a figure which shows the flowchart of the 3rd Example of this invention. It is a figure which shows the flowchart regarding the method of measuring the thickness of a non-diffusion layer. It is a figure which shows the flowchart regarding the resistivity measuring method. It is a figure which shows the flowchart regarding a spin etching method. It is a figure which shows the flowchart regarding a calculation / instruction | indication method. It is a schematic diagram which shows the outline | summary of a diffusion wafer. It is a figure which shows the flowchart regarding the manufacturing method of the conventional diffusion wafer.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the drawings, components having the same configuration or function and corresponding parts are denoted by the same reference numerals, and description thereof is omitted. Moreover, in the following description, the example of the embodiment which concerns on this invention is shown, and it can change suitably based on the technical common sense of those skilled in the art, without exceeding the range of this invention. Therefore, the scope of the present invention is not limited to these specific examples. Also, these drawings are emphasized for the purpose of explanation, and may differ from actual dimensions.

  FIG. 1 shows a flow representing a method for manufacturing a diffusion wafer according to a first embodiment of the present invention. Since the slicing step (S10) to the chamfering step (S24) and the pasting step (S28) to the polishing step (S30) are the same as described above, description thereof is omitted here. After chamfering (S24), the resistivity of the non-diffusion layer is measured. This can be performed, for example, using a surface charge profiler (specifically, Model QCS-7200 / 7300) manufactured by QCSolutions. The surface photovoltage (SPV) method is used as the basic principle, and the depletion layer width is measured by detecting the wafer surface potential change (AC-SPV signal) caused by pulsed light irradiation (40 KHz) with a wavelength of 450 nm. be able to. Further, the impurity concentration is measured when the depletion layer width in the strong inversion state is proportional to the impurity concentration, and converted into resistivity (ASTM). Since wafers can be measured in a non-destructive and non-contact manner, the total number can be measured by incorporating them into a production line according to the flowchart shown in FIG.

  As a result, a wafer having a predetermined machining allowance and a resistivity determined is obtained, polished according to the machining allowance (S30), and finally the resistivity obtained by removing the predetermined machining allowance. Is manufactured, and the data is stored in a memory or the like which is a storage means in association with specific information (for example, a sample number) that can specify the diffusion wafer. By repeating the steps from S10 to S30 a predetermined number of times (or S10 to S24 may be performed together and S26 to S30 may be repeated), the removal allowance and resistivity of the diffusion wafer in a certain ingot can be summarized. It is done. Similarly, by repeating the processes from S10 to S30 for a plurality of types of ingots a predetermined number of times (same as in parentheses), a database relating to the characteristics of the diffusion wafers obtained from various ingots is obtained. Can be built in association with Based on this database, a diffusion wafer having a desired resistivity and a non-diffusion layer thickness can be selected.

  FIG. 2 is a graph showing the characteristics of a diffusion wafer cut out from three types of ingots A, B, and C. From the ingot A, a diffusion wafer having a relatively large non-diffusion layer thickness can be obtained, and the machining allowance can be set accordingly. On the other hand, a diffusion wafer having a relatively small thickness of the non-diffusion layer can be obtained from the ingot C, and the machining allowance is set accordingly. Further, the ingot B has a thickness of the intermediate non-diffusion layer. On the other hand, the resistivity is relatively small in the ingot A and relatively large in the ingot C. In the ingot B, it is located between these.

  FIG. 7 shows a flowchart illustrating a method for measuring resistivity. The diffusion wafer obtained by chamfering (S24) is set in a resistivity measuring device (S213), and the resistivity of the non-diffusion layer on the surface is measured at a predetermined position by a predetermined number (S214). From this measurement result, an average resistivity is obtained, and other statistical values (for example, the number of measurement points, standard deviation, variance, maximum value, minimum value, etc.) are calculated (S215). These data are recorded in the database in association with ID information for specifying the diffusion wafer (S216), and the process returns to the main flow.

  Returning to FIG. 2, when the removal allowance of the diffusion wafer obtained from the ingot A is constant, the diffusion wafer from which the allowance is removed is a distribution (thickness and resistivity) in which this distribution is translated downward by the allowance. Will be provided. On the other hand, based on the resistivity measurement in S26, the diffusion wafer has a resistivity on the left side of the vertical line (equal resistivity line) passing through the point P or on the right side of the vertical line (equal resistivity line) passing through the point Q. Can be obtained, a diffusion wafer group having a narrower resistivity range can be obtained. Similarly, for the diffusion wafers of ingot B and ingot C, a diffusion wafer group having a narrower resistivity range can be obtained. Thus, a diffusion wafer group having a more desirable relationship between the resistivity and the thickness of the non-diffusion layer can be obtained from one ingot or from a plurality of ingots. For example, in the case of a diffusion wafer group in the range D, when the resistivity is determined, the thickness of the non-diffusion layer in a relatively narrow range can be obtained.

  In FIG. 1, the machining allowance is removed by polishing (S28-S30). FIG. 3 shows the flow of the second embodiment in which this is performed by single-wafer one-side etching (S42). Here, the steps up to S26 are the same as those in FIG. Thus, after measuring the resistivity, the machining allowance to be removed by polishing or the like is obtained by calculation (S40). An example of the calculation content is that the thickness of the non-diffusion layer decreases with a substantially linear correlation as the resistivity increases as shown in FIG. Thus, by providing a correlation between the resistivity and the thickness of the non-diffusion layer, it is possible to improve the quality of the device obtained in the subsequent process. Information on the machining allowance thus obtained is applied to the following polishing or etching step (S42). It is preferable that the single-sided etching (for example, spin etching) of S42 has a high removal rate and small damage to the surface. A schematic diagram of a spin etching apparatus as an example is shown in FIG. In the spin etching apparatus 30, a gas (specifically, air) 31 is discharged toward the back surface 22 a side of the diffusion wafer 20, and the etching solution 32 is chamfered 23 on the back surface 22 a toward the surface 21 a of the diffusion wafer 20. The air is controlled so as to penetrate into the air. The etchant 32 is dropped through the dispenser 33 toward substantially the center of the surface 21 a of the diffusion wafer 20. The diffusion wafer 20 is rotated around the rotation shaft 36. For this reason, as indicated by a broken line, the etching liquid 32 is diffused from the center of the diffusion wafer 20 toward the peripheral edge by centrifugal force, and is uniformly supplied to each part of the surface 21 a of the diffusion wafer 20. The etching solution 32 passes through the edge end surface 20 a and wraps around the back surface 22 a side of the diffusion wafer 20. Thus, the surface 21a of the diffusion wafer 20 is spin-etched. The Bernoulli chuck 34 is disposed so that the air 31 is discharged toward the chamfered portion 23 on the back surface 22a side of the diffusion wafer 20 via the air supply path 35. The back surface 22a of the diffusion wafer 20 is adjusted by adjusting the flow rate of the air 31 discharged from the Bernoulli chuck 34, the discharge pressure of the air 31, the rotational speed of the diffusion wafer 20, the discharge amount of the etching liquid 32, the viscosity of the etching liquid 32, and the like. The wraparound of the etching solution 32 to the side is adjusted, and the etching width δ of the chamfered portion 23 of the back surface 22a of the diffusion wafer 20 can be controlled. The etching width δ is controlled so as to coincide with the chamfered portion 23 of the back surface 22 a of the diffusion wafer 20. Thus, not only the surface 21a of the diffusion wafer 20, but also the chamfered portion 23 is etched on both the front side and the back side.

  Specifically, a single wafer single side etching method as a spin etching method is shown in the flow of FIG. As described above, the diffusion wafer is set on a base such as Bernoulli chuck, and information on the etching amount relating to the diffusion wafer (for example, resistivity data, thickness data, required specification data, etc.) is acquired from the database ( S313). Then, etching conditions based on the information are set (S314). Etching conditions may include etching time, type and amount of etchant, rotational speed, and the like. Then, single-wafer single-side etching is performed according to the conditions (S315). Further, single wafer single-side polishing is performed (S316), and the product is shipped.

  A diffusion wafer manufacturing method (3) using the single wafer single-sided etching step (S42) in the flowchart of FIG. 3 and further comprising a non-diffusion layer thickness measurement step (S25) before the resistivity measurement step (S26). Is shown in FIG. Except for the addition of the non-diffusion layer thickness measurement step (S25), the method is the same as the diffusion wafer manufacturing method (2) in FIG. Here, since the thickness of the non-diffusion layer can be measured, the thickness of the non-diffusion layer after removing the removal allowance can be freely changed in FIG. For example, in the ingot A, the diffusion wafer on the right side of the vertical line (equal resistivity line) passing through the point P and on the left side of the vertical line (equal resistivity line) passing through the point Q is the measured thickness of the non-diffusion layer. If the machining allowance is set appropriately according to the above, it is possible to put all within the range D. Similarly, as for the diffusion wafers of ingot B and ingot C, as long as the resistivity is within a predetermined range, it is diffused within the range D similarly to the rate by adjusting the machining allowance according to the measured thickness of the non-diffusion layer. It becomes possible to insert a wafer. In this manner, a diffusion wafer group having a desirable relationship between the resistivity and the thickness of the non-diffusion layer can be obtained from one ingot or a plurality of ingots.

  A specific method for measuring the thickness of the non-diffusion layer uses FTIR, and is performed according to the procedure shown in FIG. 6 and the following description. First, the diffusion wafer is set on a predetermined mounting jig called a carrier (S113). Next, using predetermined conditions such as the measurement position and the number of measurement points, measurement is performed under conditions suitable for the measurement conditions (S114). Specifically, a measurement program stored in advance is selected, and according to this, specific information (ID information) of the diffusion wafer is input according to this measurement program, actual measurement is performed, and the obtained data is stored in the memory. . The stored measurement data is subjected to a predetermined process. For example, the average layer thickness, standard deviation, maximum value, minimum value, and the like are calculated (S115). Then, such data is recorded in the database in association with the specific information of the diffusion wafer (S116).

  FIG. 9 illustrates a method for calculating and indicating a diffusion wafer group having a preferable relationship between the resistivity and the thickness of the non-diffusion layer from the obtained database. For example, first, data for each wafer related to the non-diffusion layer thickness of this diffusion wafer group is referred to (S410). Next, the data for each wafer regarding the resistivity is referred to (S412). And an ideal correlation is calculated | required regarding a non-diffusion layer thickness and a resistivity (S414). In this ideal mutual relationship, a preferred machining allowance is instructed to each diffusion wafer so that the deviation from the most ideal relationship is reduced within a predetermined resistivity range (S416). For example, if the ideal relationship between the resistivity R and the thickness T of the non-diffusion layer is T = −C1 * R + C2 (formula X) as constants C1 and C2, if R is determined, the corresponding T And the machining allowance can be obtained by calculation from the desired thickness of the non-diffusion layer. If a diffusion wafer group having such a relationship can be obtained, the distance L from the ideal relational expression X (L = absolute value (T + C1 * R−C2) / (C1 ^ 2 + C2 ^ 2) ^ 0. With reference to 5), a more accurate diffusion wafer group can be configured.

  From the above, it is possible to easily select a diffusion wafer group having a preferable resistivity and a non-diffusion layer thickness.

20 diffusion wafers, 21 non-diffusion layers, 22 diffusion layers,
21a front surface, 22a back surface, 30 spin etching device

Claims (5)

In the method for manufacturing a diffusion wafer,
Slicing a silicon wafer from an ingot;
A process of attaching and diffusing impurities for diffusion on both sides of the sliced silicon wafer;
Dividing the diffused silicon wafer into two parts and grinding the divided surface;
Measuring the resistivity of the ground split surface;
A step of calculating a corresponding machining allowance from the obtained resistivity;
Removing the calculated machining allowance to obtain a diffusion wafer;
A method for manufacturing a diffusion wafer including:   The method for producing a diffusion wafer according to claim 1, wherein the step of removing the machining allowance to obtain a diffusion wafer includes a step of spin etching.   The method of measuring the thickness of a non-diffusion layer nondestructively between the process of grinding the said division | segmentation surface, and the process of removing the said machining allowance and obtaining a diffusion wafer is characterized by the above-mentioned. A method for producing a diffusion wafer as described in 1. Further, after the step of removing the calculated machining allowance and obtaining a diffusion wafer, specific information for identifying the obtained diffusion wafer is stored in the database in association with the resistivity and the thickness of the non-diffusion layer;
The method for producing a diffusion wafer according to claim 1, further comprising a step of selecting the stored specific information from a relationship between a preferable resistivity and a thickness of the non-diffusion layer. After the step of storing in the database, repeating from the slicing step to the storing step a predetermined number of times,
The ingot includes a plurality of types of ingots,
5. The method for manufacturing a diffusion wafer according to claim 4, wherein, in the slicing step, the silicon wafer is sliced from at least two types of ingots.

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