JP2010217043A - Apparatus for testing power conversion apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an apparatus for testing power conversion apparatus, capable of conducting a noise test equivalent to a combined noise test without using a finished-product power converter in the power conversion equipment, and applicable to various types of power converters, in a versatile manner. <P>SOLUTION: The apparatus for testing the power conversion apparatus used in place of the finished-product power converter includes a testing power converter having a lower output capacity than this power converter, and a high-frequency voltage application device applying a noise voltage to between a reference potential section of a control circuit and a ground potential section of the testing power converter. The testing power converter includes a power rectifying circuit section converting a commercial AC power into a DC; a system impedance simulation section simulating a system impedance arranged on a latter stage of the power rectification circuit section; and a plurality of upper and lower switching arms arranged on a latter stage of the system impedance-simulating section. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a power converter testing technique, and more particularly to a power converter testing apparatus suitable for a power converter using a semiconductor switching element including a power converter and a control circuit.

In a semiconductor power conversion device including a power converter and a control circuit, the control circuit may malfunction due to a current flowing from the control circuit to a metal casing due to stray capacitance.
In order to avoid malfunction of the control circuit, an electromagnetic noise tolerance test is performed in the manufacturing process for the control circuit of the semiconductor power converter, and measures are taken to improve the noise tolerance to a predetermined level.

FIG. 18 is a diagram illustrating a test method for a conventional power conversion device.
A conventional power conversion device 200 shown in FIG. 18 includes a power converter 201 and a control circuit 202 that controls the power converter 201.

  The power converter 201 includes a diode bridge (rectifier circuit) 203 that rectifies a given AC voltage into a DC voltage, a smoothing capacitor 204 that smoothes the DC voltage, and a plurality of semiconductor switching elements (for example, IGBT, insulated gate bipolar). Transistors) 205-1, 205-2, 206-1, 206-2, 207-1, 207-2, and a three-phase inverter circuit 208 that converts a smoothed DC voltage into an AC voltage, An AC voltage is output to a load (such as a motor, not shown in FIG. 18). The current sensors 209-1 and 209-2 convert the alternating current flowing through the u-phase output terminal and the w-phase output terminal of the three-phase inverter circuit 208 into a detection voltage (alternating voltage) corresponding to the magnitude of the current. The detection signal is output to the control circuit 202.

  The control circuit 202 receives the DC voltage rectified by the rectifier circuit 203 and the detection voltage corresponding to the AC current output from the power converter 201, and outputs a gate drive signal for controlling the gate voltage of each of the semiconductor switching elements. And outputs to each gate drive circuit (in FIG. 18, only the gate drive circuits 211-1 and 211-2 corresponding to the semiconductor switching elements 205-1 and 205-2 are shown, and the rest are omitted). .

  Then, as shown in FIG. 19, the high-frequency voltage applying device 212 uses the potential part serving as a reference of the signal of the control circuit 202 and the ground potential part of the power converter 201 (in FIG. 19, the metal 214 such as a casing is grounded. ) And a noise voltage of several kV is applied to the electromagnetic noise resistance test to confirm that the control circuit 202 does not malfunction.

  The electromagnetic noise tolerance test may be performed only by the control circuit 202 at the time of development, or may be performed in a state in which the control circuit 202 is incorporated in the power conversion device 200 as shown in FIG.

  When the electromagnetic noise immunity test is performed only by the control circuit 202, the fluctuation of the potential of the control circuit 202 caused by the operation state of the printed circuit board of the control circuit, the state of the cables coupled thereto, and the power converter 201 of the semiconductor conversion device The generation state of the magnetic field / electric field is different from that in the case where it is incorporated in the power conversion device 200. Therefore, there is a problem that the influence of these factors cannot be evaluated.

  On the other hand, when an electromagnetic noise tolerance test (combined noise test) is performed in a state of being incorporated in the power conversion device 200, the test can be performed only after all the devices are completed. For example, when the control circuit 202 is completed prior to the power converter 201, the execution time of the combined noise test is delayed. In such a case, when a problem of malfunction occurs, there is a problem that a sufficient countermeasure period cannot be obtained due to the delivery date.

  Patent Document 1 discloses a method for performing an immunity test in a communication field different from that of a power converter. In addition, the conduction immunity test method for electrical equipment including these fields is defined in the international standard IEC61000-4-6 (conduction immunity test).

JP 2000-304794 A

  In view of the above problems, the present invention can perform a noise test equivalent to a combined noise test without using a final product power converter in a power converter, and is applicable to various types of power converters. It is an object of the present invention to provide a test apparatus for a power conversion device that can be applied to a system.

  The proposed test apparatus for the first power conversion device includes one or more semiconductor switching elements, and flows through the power converter as a final product that performs power conversion by a switching operation, and the one or more semiconductor switching elements. A power conversion device including a control circuit that generates a control signal for controlling a main current and supplies the control signal to the one or more semiconductor switching elements is tested.

  This power converter test device is used in place of the power converter of the final product, and has a test power converter having a smaller output capacity than the power converter and a potential serving as a reference for the signal of the control circuit. And a high-frequency voltage application device that applies a noise voltage between the test power converter and the ground potential part of the test power converter.

  The test power converter includes a forward conversion circuit unit that converts a commercial AC power source into direct current, a system impedance simulation unit that simulates a system impedance provided at a subsequent stage of the forward conversion circuit unit, and a system impedance simulation unit. A plurality of upper and lower switching arms each having a semiconductor switching element corresponding to the upper arm and a semiconductor switching element corresponding to the lower arm, which are provided in the subsequent stage, are configured.

  The proposed test apparatus for the second power conversion device is one that switches and does not switch the plurality of semiconductor switching elements included in the plurality of upper and lower switching arms according to the circuit configuration of the power converter of the final product. The same switching pulse as that for operating the power converter of the final product is input to the arm that performs switching, and the arm that does not perform switching is operated so that it is always turned off.

  The proposed third power conversion device test apparatus is the first power conversion device test apparatus, wherein the test power converter includes an inverse conversion circuit unit that converts direct current into alternating current, and the inverse conversion circuit A load having a load capacity smaller than the output capacity of the test power converter is connected to the output side of the test unit, or an open end is connected without connecting a load.

  The proposed test apparatus for the fourth power converter is the test apparatus for the second power converter, wherein the test power converter is an electric power between the power converter of the final product and the test power converter. A difference adjustment unit that adjusts the difference between the target characteristics.

  The proposed fifth power conversion device test apparatus is the fourth power conversion device test apparatus, wherein the power converter of the final product is one or more semiconductor switching devices constituting the power converter of the final product. A first cooling fin for cooling the element, wherein the test power converter cools one or more semiconductor switching elements of a plurality of upper and lower switching arms corresponding to the configuration of the power converter of the final product A second cooling fin, and the difference adjustment unit includes a capacitance C0 between an output terminal of one or more semiconductor switching elements of the power converter of the final product and the first cooling fin; A capacitance C1 between a connection point of two semiconductor switching elements included in one or more corresponding upper and lower switching arms of the test power converter and the second cooling fin is set to one. Or in which a capacitor to substantially coincide.

  The proposed sixth power conversion device test apparatus is the fourth power conversion device test apparatus, in which the difference adjustment unit is configured so that each of the one or more semiconductor switching elements constituting the power converter of the final product is provided. An impedance element equivalent to the ground impedance between the output terminal and the ground potential portion is selected from one of a plurality of upper and lower switching arms corresponding to the configuration of the power converter of the final product of the test power converter. Each of the semiconductor switching elements included in one or more upper and lower switching arms is connected between each connection point and the ground potential portion.

  The proposed seventh power conversion device test apparatus is the fourth power conversion device test apparatus, wherein the difference adjustment unit outputs each gate drive signal corresponding to each semiconductor switching element of the test power converter. A gate resistor between each of the semiconductor switching elements, or a gate capacitor between the gate and emitter of each of the semiconductor switching elements, adjusting each resistance value of each gate resistor or each capacitance of each gate capacitor, The voltage change rate when each semiconductor switching element in the test power converter is turned on and off is equal to the voltage change rate when the corresponding semiconductor switching element is turned on and turned off in the power converter of the final product. It is a thing that is almost matched.

  The proposed test apparatus of the eighth power converter is the test apparatus of the fourth power converter, wherein the difference adjustment unit outputs each gate drive signal corresponding to each semiconductor switching element of the test power converter. A gate resistor between each of the semiconductor switching elements, or a gate capacitor between the gate and emitter of each of the semiconductor switching elements, adjusting each resistance value of each gate resistor or each capacitance of each gate capacitor, The voltage change rate when each semiconductor switching element in the test power converter is turned on and off is set larger than the voltage change rate when each semiconductor switching element corresponding to the final product power converter is turned on and off. It is a thing.

  The proposed ninth power conversion device test apparatus is the fourth power conversion device test apparatus, wherein the power converter of the final product is one or more semiconductor switching devices constituting the power converter of the final product. A first cooling fin for cooling the element, wherein the test power converter cools one or more semiconductor switching elements of a plurality of upper and lower switching arms corresponding to the configuration of the power converter of the final product A second cooling fin, and the difference adjustment unit has a capacitance C1 between an output terminal of one or more semiconductor switching elements of the test power converter and the second cooling fin, It is larger than the capacitance C0 between the connection point of two semiconductor switching elements included in one or more corresponding upper and lower switching arms of the power converter of the final product and the first cooling fin. In which a capacitor for.

  The proposed test apparatus for the tenth power conversion apparatus further includes a voltage adjustment unit that adjusts a power supply voltage supplied to the test power converter in the test apparatus for the first power conversion apparatus.

  According to the proposed test apparatus for the first power converter, by using a test power converter having an output capacity smaller than that of the final product power converter, it is not necessary to secure a wide test area and save space. However, the potential fluctuation generated in the wiring of the connected control circuit is the same as (approximate) when connected to the power converter of the final product, and the noise tolerance test equivalent to the combined noise test is performed on the control circuit. Can be done. Moreover, the noise immunity test which considered the influence of system impedance can be performed by setting it as the structure which further has the system impedance simulation part which simulated system impedance in the front | former stage of the power converter for a test.

  According to the proposed test apparatus for the second power conversion device, the plurality of upper and lower switching arms are switched according to the circuit configuration of the power converter of the final product, and those that are not switched are selected and switched. The same switching pulse as that for operating the power converter of the final product is input to the arm that performs the operation, and the arm that does not perform switching is operated so that it is always turned off, so that the test apparatus can be operated in various types. The power converter can be applied universally.

  According to the proposed test apparatus for the third power converter, a load having a load capacity smaller than the output capacity of the test power converter or a load is connected to the output side of the inverse converter circuit unit. Even if it is an open end, it is possible to perform a noise tolerance test similar to when a load is connected for voltage fluctuations due to turning on and off of the semiconductor switching element of the power converter. It becomes possible.

  According to the proposed test apparatus for the fifth power converter, a capacitor for adjusting a difference in electrical characteristics is provided between the output terminal of one or more semiconductor switching elements of the test power converter and the cooling fin. Thus, a noise test can be performed in consideration of the stray capacitance between the output terminal of one or more semiconductor switching elements corresponding to the power converter of the final product and the cooling fin.

  According to the proposed test apparatus for the sixth power converter, the impedance element is connected between the output terminal of one or more semiconductor switching elements in the test power converter and the ground potential portion, so that the final product A noise test can be performed in consideration of the floating impedance of the load (motor, etc.).

  The proposed test apparatus of the seventh power conversion device is configured to determine the voltage change rate of each semiconductor switching element of the test power converter when the semiconductor switching element is turned on and off, for each of the corresponding semiconductor switching elements in the power converter of the final product. When the voltage change rates at the ON time and OFF time are matched or substantially matched, noise proportional to the voltage change rate can be reproduced more accurately, and the validity of the noise tolerance evaluation can be improved. The proposed test apparatus of the eighth power conversion device is configured to determine the voltage change rate when each semiconductor switching element of the test power converter is turned on and off, in each of the corresponding semiconductor switching elements in the power converter of the final product. When the voltage change rate is set to be larger than the voltage change rate at the time of turning on and off, the test can be performed under conditions more severe than the required tolerance, and higher reliability can be realized.

  When the power supply voltage V1 in the test power converter is set lower than the power supply voltage V0 in the power converter of the final product, the difference adjusting unit is configured to use the above test power. Capacitance C1 between the output terminal of one or more semiconductor switching elements of the converter and the second cooling fin is used as the output terminal of one or more semiconductor switching elements corresponding to the power converter of the final product. And the first cooling fin, the power supply voltage V1 in the test power converter is lower than the power supply voltage V0 in the final product power converter. By setting, it can be avoided that the common mode current Ic becomes smaller than the final product, and the condition for noise immunity is eased. You can kick it.

  The proposed test apparatus of the tenth power converter further includes a voltage adjustment unit that adjusts the power supply voltage supplied to the test power converter, so that the test apparatus for the power converter can be Further, it can be applied to a power converter of a final product having a wide variety of different installation conditions and output forms.

It is a block diagram of the testing apparatus of the power converter device which concerns on one Embodiment of this invention. FIG. 2 is a diagram in which a capacitor is provided between an output terminal of an inverter circuit and a heat radiating fin in the power conversion device testing device of FIG. 1. FIG. 2 is a diagram in which a ground impedance element is provided between the output terminal of the inverter circuit and the ground in the test apparatus for the power conversion apparatus of FIG. 1. FIG. 2 is a diagram in which an impedance element is provided between the output terminal of the rectifier circuit and the ground in the test apparatus for the power conversion apparatus of FIG. It is a figure which shows the structure (the 1) which adjusts the voltage in the test apparatus of this embodiment. It is a figure which shows the structure (the 2) which adjusts the voltage in the test apparatus of this embodiment. It is a figure which shows the structure (the 3) which adjusts the voltage in the test apparatus of this embodiment. It is a figure which shows the structure (the 1) of the system | strain impedance simulation part which supplies the impedance used as a reference | standard. It is a figure which shows the structure (the 2) of the system | strain impedance simulation part which supplies the impedance used as a reference | standard. It is a figure which shows the structure of the system | strain impedance simulation part which gave the function which can set an impedance variably. It is a block diagram of the modification of the testing apparatus of the power converter device which concerns on this embodiment. It is a block diagram of the flyback converter as an example of a final product. It is a structural example of the test apparatus corresponding to the final product (power converter) of the structure of FIG. In a test power converter, it is a conceptual diagram showing a stray capacitance between an output end of an inverter circuit and a radiation fin together with a capacitor provided between the output end of the inverter circuit and the radiation fin. In the test power converter, it is the figure which showed the time waveform of the electric current and voltage of the output terminal of an inverter circuit, and the time waveform of the common mode current which flows at the time of turn-on of the switching element of the inverter circuit, and turn-off. In a test power converter, it is the figure which showed the gate resistance connected between the switching element with an inverter circuit, and a gate drive circuit, and the gate capacitor connected between the gate-emitter of the switching element. Fig. 1 shows the time waveform of the current and voltage at the output terminal of the inverter circuit and the time waveform of the common mode current that flows when the switching element of the inverter circuit is turned on and off in the final product and the test apparatus (part 1). It is. Figure 2 shows the time waveform of the current and voltage at the output terminal of the inverter circuit and the time waveform of the common mode current that flows when the switching element of the inverter circuit is turned on and off in the final product and the test apparatus (part 2) It is. It is FIG. (1) which shows the test method of the conventional power converter device. It is FIG. (2) which shows the test method of the conventional power converter device.

The details of the embodiments of the present invention will be described below with reference to the drawings. This application uses Japanese Patent Application No. 2008-328845.
FIG. 1 is a configuration diagram of a test apparatus for a power converter according to an embodiment of the present invention.

  A power conversion apparatus 10 according to the present embodiment shown in FIG. 1 includes a test power converter 11 having an output capacity smaller than that of a final product power converter, and a control circuit 12 that controls the test power converter 11. Is done. The control circuit 12 shown in FIG. 1 is not connected to the final product power converter as shown in FIG. 18, but is connected to the test power converter 11 having an output capacity smaller than that of the final product power converter. The

  The test power converter 11 rectifies a given AC voltage by a rectifier circuit 13 configured by a diode bridge, and converts the DC voltage smoothed by the smoothing capacitor 14 into a plurality of semiconductor switching elements 15-1, 15-2, It is converted into an alternating voltage by a three-phase inverter circuit 18 constituted by 16-1, 16-2, 17-1 and 17-2, and output to a load (motor etc.) 23. In FIG. 1, the load 23 is indicated by a broken line because the load may not be connected as will be described later. The current sensors 19-1 and 19-2 convert an alternating current flowing through the u-phase output terminal and the w-phase output terminal of the three-phase inverter circuit 18 into a detection voltage (alternating voltage) corresponding to the magnitude of the current. The detection signal is output to the control circuit 12.

  The control circuit 12 controls the gate voltage of each semiconductor switching element by the DC voltage rectified by the rectifier circuit 13 and the detection voltage corresponding to the magnitude of the AC current output by the test power converter 11. A signal is generated, and each gate drive circuit (in FIG. 1, only the gate drive circuits 21-1 and 21-2 corresponding to the semiconductor switching elements 15-1 and 15-2 are shown, and the rest is omitted). Output.

  Then, as shown in FIG. 1, the high-frequency voltage application device 22 causes the potential part to be a reference of the signal of the control circuit 12 and the ground potential part of the test power converter 11 (in FIG. A noise voltage of several kV is applied between them and an electromagnetic noise tolerance test is performed to confirm that the control circuit 12 does not malfunction. In the above description, the test power converter 11 is configured to input and rectify an AC voltage, but the rectifier circuit 13 may be eliminated and a DC voltage may be input instead of the AC voltage. Is possible.

  For example, the power converter of the final product includes a converter circuit having a rectifier circuit that converts an input AC voltage into a DC voltage, and a smoothing capacitor that smoothes the DC voltage output from the rectifier circuit. When the DC voltage output from the inverter is applied as a DC voltage to the inverter circuit of the power converter of the final product, the test power converter 11 also converts the input AC voltage into a DC circuit as shown in FIG. A test converter circuit having a rectifier circuit 13 and a smoothing capacitor 14 for smoothing the DC voltage output from the rectifier circuit 13 is provided, and the DC voltage output from the test converter circuit is used as a test three-phase inverter circuit. 18 is preferably applied as a DC voltage.

  It should be noted that the above-described potential part serving as a reference for the signal of the control circuit 12 is a signal ground of a CPU (Central Processing Unit) in the control circuit 12 and an insulating part in the control circuit 12 (that is, insulated from other circuit parts). The signal ground of the conductive part at the location where While the power converter of the final product operates with a voltage of several hundred volts, these parts in the control circuit 12 operate with a voltage of several volts, and thus malfunctions are likely to occur. In addition to the signal ground, an arbitrary point on the circuit in the power conversion device to be tested may be determined as a reference potential portion for testing.

  The output capacity of the power converter is determined according to the load capacity. That is, the voltage to be applied to the load and the current to be passed are also imposed on the power converter. As a result, the main components of the power converter (the rated capacity of active components such as semiconductor switching elements and passive components such as reactors, the size of cooling fins for cooling these components, and the size of fans for ventilation) Etc.) is determined. In general, the larger the rated capacity of these power converter components, the larger the generated loss (ie, the amount of heat), and the larger the size, mainly because it can withstand the loss.

  For example, when describing a semiconductor switching element, the area of the semiconductor portion of the semiconductor switching element increases in proportion to the current to be energized. In addition, the amount of heat generated when a current is supplied to the semiconductor switching element needs to escape to the outside of the semiconductor switching element so that the temperature of the semiconductor switching element does not reach a high temperature. It is proportional to the applied voltage and the conduction current. For this reason, the cooling component for dissipating the heat generated in the semiconductor switching element also increases in size as the area of the semiconductor switching element increases.

For example, in the case of a general-purpose inverter for driving a motor, the volume of a 5.5 kW inverter is about 10,000 cm ³ , while the volume of a 55 kW inverter is about 70,000 cm ³ .
Looking at this from the opposite direction, it is necessary to connect a power converter having a large output capacity equivalent to that of the final product and the control circuit 12 in order to perform a highly accurate noise tolerance test. It must be ensured. This is difficult in terms of cost and labor for preparing the test apparatus.

  Further, in the configuration of FIG. 1, it is not necessary to secure a wide test area by using the test power converter 11 having the same configuration as the power converter of the final product and having a smaller output capacity. Thus, in a space-saving manner, the potential fluctuation (noise) generated in the wirings of the connected control circuit 12 can be made (similar to) the same as when connected to the power converter of the final product.

  The circuit configuration of the test power converter 11 in FIG. 1 may be the same as that of the final product power converter, but is generated in the wiring of the connected control circuit 12 by turning on and off the semiconductor switching element. Different circuit systems may be used as long as the noise to be generated is equivalent to the case of connecting to the final product power converter. With such a configuration, at least a noise tolerance test simulating noise can be performed.

  On the other hand, the control circuit is configured based on the logic for realizing the predetermined performance and function of the power converter, and has little relation to the output capacity of the power converter. Therefore, the dimensions of the control circuit are almost independent of the output capacity of the power converter. For example, it is possible to operate the 5.5 kW general-purpose inverter in the above example and the 55 kW general-purpose inverter by the same control circuit.

  That is, the control circuit 12 shown in FIG. 1 is intended for use in the final product. The control circuit 12 malfunctions when a high-voltage voltage application device 22 applies a noise voltage of several kV between the reference potential portion of the control circuit 12 and the ground potential portion of the test power converter 11. In some cases (for example, when the CPU in the control circuit 12 runs away and the device is stopped by a safety device), the control circuit 12 is improved.

  Note that one of the main effects of electromagnetic noise on the control circuit by the power converter is a voltage change of the power converter, that is, a voltage fluctuation generated by turning on and off the semiconductor switching element of the power converter. .

  Even if the power converter does not energize the load current, this voltage fluctuation occurs in the same manner as when the energization is performed. By utilizing this, in the noise tolerance test by the test power converter 11 of FIG. 1, the output signal of the three-phase inverter circuit 18 of the test power converter 11 is not connected to the test power converter 11. The current flowing through the three-phase inverter circuit 18 of the test power converter 11 is reduced by opening the tip of the conductor through which the current passes, or by connecting a load having an output capacity smaller than the output capacity of the test power converter 11. To do.

Even in this way, with respect to voltage fluctuation, a noise tolerance test can be performed almost the same as when a specified load is connected.
In addition, when connecting a load, it is necessary not only to secure the installation location of the load, but also to convert the power consumption of the load into heat or to regenerate the power supply. As a result, the size of the cooling device is increased, and a dedicated device for regenerating the power source is required, which is complicated. By using the proposed method, these problems can be solved.

  In a semiconductor power converter, a semiconductor switching element is generally used with a radiation fin attached thereto. The radiating fin is generally grounded. Here, a stray capacitance exists between the radiation fin and the semiconductor switching element, and a current flows when the semiconductor switching element is turned on and off via the stray capacitance. This is a so-called common mode current and is a cause of electromagnetic noise. Therefore, when a semiconductor switching element having an output capacity smaller than that of the final product power converter is used as the test power converter 11 of FIG. 1, it is necessary to consider the difference in stray capacitance due to the difference in output capacity.

  In general, a switching element chip having a large output capacitance has a large area, and therefore has a large stray capacitance. The value of the stray capacitance is several hundred pF for an IGBT (insulated gate bipolar transistor), which is a typical switching element, at 600 V and 120 A. The magnitude of the common mode current is determined by the amplitude of the applied voltage, the time change rate, and the magnitude of the stray capacitance. Therefore, even if the former two (amplitude of applied voltage, rate of change in time) are combined with the final product power converter by circuit design and adjustment, the output capacitance of the switching element differs in the size of the stray capacitance, and the chip area Therefore, it cannot be combined with the final power converter as it is. The final product power converter, whose output capacity is larger than that for testing, has a larger common mode current and becomes stricter in terms of electromagnetic noise. That is, the test power converter 11 becomes loose as a condition of electromagnetic noise, and it may not be possible to evaluate whether or not the final product power converter satisfies the noise tolerance.

  As shown in FIG. 2, in the test power converter 11 of FIG. 1, the problem is that the output terminal of the bridge of the three-phase inverter circuit 18 (between the upper arm and the lower arm of each phase), the radiation fin 25, By adding capacitors 26, 27, and 28 that constitute a difference adjustment unit that adjusts the difference (here, stray capacitance) of the electrical characteristics between the final product power converter and the test power converter 11 can be solved.

  In other words, the stray capacitance C1 between the semiconductor switching element of each phase of the three-phase inverter circuit and the radiation fin in the power converter of the final product, and the semiconductor switching of each phase of the three-phase inverter circuit 18 in the test power converter 11 Capacitors 26, 27, and 28 having a capacitance C3 (= C1-C2) of a difference between the stray capacitance C2 between the element and the radiation fin 25 are connected in parallel with the stray capacitance.

  Thereby, between the output end of the three-phase inverter circuit 18 in the test power converter 11 and the heat radiation (cooling) fin (second heat radiation fin) 25 to which the semiconductor switching elements constituting the three-phase inverter circuit 18 are attached. The capacitance of the final product can be made to match or substantially match the capacitance between the output end of the three-phase inverter circuit and the radiation fin (first radiation fin) in the power converter of the final product. A noise test can be performed in consideration of stray capacitance between the three-phase inverter circuit of the power converter and the heat radiation fin.

  Note that the impedance of the capacitor has frequency characteristics, and since it does not function as a capacitor due to the influence of parasitic inductance in the high frequency band, the impedance characteristics in the problematic frequency band are floating when the power converter of the final product is connected. It is necessary to select a capacitor that is close to the capacitance.

  A load (such as a motor) connected to the semiconductor power converter often has a ground impedance (floating impedance). For this reason, when the load housing or frame is grounded, a current corresponding to the change in the ground voltage of the load flows through the stray capacitance between the current conducting portion of the load and the housing or frame. This current corresponds to a common mode current and contributes to electromagnetic noise. Therefore, matching this part with the condition where the power converter of the final product is connected is desirable for more accurate evaluation of noise immunity.

  As shown in FIG. 3, the problem is that impedance elements 31, 32, 33 equivalent to the ground impedance of the load are connected to the output terminals of the respective phases of the three-phase inverter circuit (bridge circuit) 18 in the test power converter 11. This can be solved by connecting between the ground potential unit and the difference adjustment unit. Since the load's ground impedance is generally sufficiently larger than the load impedance, it is sufficient to use a small-capacity impedance element that does not cause power consumption.

  In addition, as the ground impedance of the load, a capacitance component of stray capacitance generally appears up to a certain frequency, and an inductive component of parasitic impedance appears after that frequency. When the frequency is further increased, capacitive components and inductive components at various parts appear and show complex impedance characteristics. In the proposed test, at least the part corresponding to the capacitance and parasitic impedance must be simulated. Impedance at higher frequencies is simulated in consideration of the effect on electromagnetic noise.

In any case, the frequency characteristics of the stray impedance of the load (motor, etc.) connected to the output terminal via a conductor is preliminarily viewed from the output terminal of the inverter circuit and the ground potential part in the power converter of the final product. Each impedance element shown in FIG. 3 is measured by a network circuit using a capacitor, a coil, a resistor, etc., which is measured as a frequency characteristic and is set to a value that constitutes a test apparatus suitable for the measurement data. What is necessary is just to make it a difference adjustment part. Such techniques are described in the following documents.
Sasaki, Tamate, Toba: "Broadband modeling method for passive elements with multiple resonance points", Proceedings of National Conference of the Institute of Electrical Engineers of Japan, 4-041 (2007)

  Similar to the above-described ground impedance of the load, the impedance on the power source side has a great influence on the noise characteristics. Therefore, it is desirable to match the impedance on the power supply side in the test power converter 11 with the case where the power converter of the final product is connected.

  This can be achieved by connecting an impedance element corresponding to the power supply side. That is, as shown in FIG. 4, on the power supply side, it is desirable to provide a differential adjustment unit that adds the ground impedance 35 and the impedances 36, 37, and 38 of the power supply 39 to simulate.

  Of the above-described methods for simulating the stray capacitance between the semiconductor switching element and the radiating fin, the impedance of the load, and the power source, it is possible to perform a noise tolerance test by combining a plurality of methods. These methods may be used in consideration of the influence of each factor. Thereby, the noise immunity of the control circuit 12 can be evaluated under conditions close to the case where the final power converter is connected.

  Further, there are various conditions for the input voltage and the number of phases in the power converter of the final product, and the control circuit as a test target is designed on the assumption that it is used in combination with the power converter of the final product. Therefore, although it is different from the assertion of some examples described later, as one modification of the present embodiment, in order to evaluate the operation of the control circuit in a state close to the state connected to the power converter of the final product. It is desirable that the test power converter has a configuration in which the voltage supplied to the test power converter can be adjusted to be equal to the voltage supplied to the final product power converter. As a result, the power converter test apparatus can be used universally for a final product power converter having a wide variety of installation conditions and output forms for different purposes.

A configuration for adjusting the voltage will be described with reference to FIGS. 5 and 6.
FIG. 5 shows a configuration in which an output voltage variable autotransformer (for example, Slackac (registered trademark)) 51 having a voltage adjustment function is provided between a system power supply (AC power supply) 52 and the rectifier circuit 13. FIG.

  In FIG. 5, the AC voltage output from the system power supply 52 is input to the output voltage variable autotransformer 51 and boosted to a desired voltage, and the output voltage variable autotransformer 51 is connected to the rectifier circuit. 13 is output. In the configuration of FIG. 5, as a matter of course, it is also possible to step down to a desired voltage by using the output voltage variable autotransformer 51.

  When there is no variable output voltage auto-transformer that boosts the voltage to a desired voltage, as shown in FIG. 6, a step-up transformer 55 with a fixed turns ratio is replaced with a variable output voltage auto-transformer as shown in FIG. 51 and between the rectifier circuit 13. Then, the voltage is boosted by the output voltage variable autotransformer 51 to a voltage smaller than the desired voltage, and the output of the output voltage variable autotransformer 51 is input to the step-up transformer 55 to obtain the desired voltage. The voltage is boosted to a voltage to be output from the step-up transformer 55 to the rectifier circuit 13.

  Since the maximum DC output voltage of the rectifier circuit is a line voltage of the input AC voltage of the rectifier circuit 13, the reverse calculation is performed so that the necessary maximum DC voltage can be output to the rectifier circuit 13, and the turn ratio of the step-up transformer 55 To decide.

  In the case of the configuration shown in FIGS. 5 and 6, since no semiconductor is used in the voltage adjustment portion, noise due to switching does not occur, and accurate noise immunity evaluation by a test apparatus is possible.

On the other hand, since the voltage adjustment portion is provided at the subsequent stage of the rectifier circuit 13, the voltage to be adjusted is a DC voltage, but the voltage can also be adjusted using the step-up / step-down chopper circuit 57.
As shown in FIG. 7, the step-up / step-down chopper circuit 57 smoothes the DC voltage after rectification by the rectifier circuit 13 using a smoothing capacitor 59, and steps up and down the output of the smoothing capacitor 59. The step-up / step-down chopper circuit 57 includes a switching element 61, a reactor 62, a diode 63, and a capacitor 65 in addition to the smoothing capacitor 59. Then, by adjusting the duty ratio of the gate signal for driving the switching element 61, the voltage output to the subsequent circuit portion can be made lower or higher than the input voltage of the step-up / step-down chopper circuit 57. Further, since the step-up / step-down chopper circuit 57 has a simple configuration, the use of the step-up / step-down chopper circuit 57 has an advantage that it can contribute to reduction in size and weight of the test apparatus.

  However, the step-up / step-down chopper circuit 57 includes a switching element 61 and adjusts an output voltage (DC voltage) by switching of the switching element 61. Therefore, the step-up / step-down chopper circuit 57 itself is a source of noise caused by switching. Then, the noise generated by the step-up / step-down chopper circuit 57 may cause a malfunction in the control circuit used during the test (which is also used in the final product). The malfunction of the control circuit in this case is not due to the test power converter that simulates the power converter of the final product.

  As described above, when the voltage supplied to the test power converter is adjusted by switching the switching elements constituting the buck-boost chopper, it is necessary to take measures to reduce the noise of the buck-boost chopper itself. Become.

  The system impedance at the test equipment installation location (the main part of which is the C component and L component determined by the length of the wiring, the cross-sectional area of the wiring, etc.) is not constant. Depending on the installation location, the noise tolerance test may or may not be cleared. Therefore, it is necessary for the test apparatus to have a system impedance simulation unit that supplies a reference impedance that does not depend on the installation location. On the other hand, for example, when a problem specific to the installation location occurs at the installation location of the final product delivery destination, the installation conditions of the final product are faithfully simulated in another location (for example, the place where the noise tolerance test is performed). A configuration is required. In the present embodiment, a system impedance simulation unit corresponding to such two problems is proposed.

The following description is based on the assumption that the configuration shown in FIG. 5 or 6 is used as the DC intermediate voltage adjustment function.
First, a system impedance simulator that supplies a reference impedance will be described.

  As a function of adjusting the DC intermediate voltage, as shown in FIG. 5 or FIG. 6, when using the output voltage variable auto-transformer 51 and the step-up transformer 55 with a fixed turn ratio, the auto-transformer 51 and the boost transformer 55 are used. Therefore, the impedance installed on the system side (power supply side) hardly affects the circuit. In the case of such a configuration, by providing the system impedance simulating unit at a subsequent stage from the DC intermediate voltage adjustment unit shown in FIG. 5 or FIG. 6, it is possible to perform a noise tolerance test in consideration of the effect of the system impedance. .

  Here, although the normal system power supply is AC, in this embodiment, since the system impedance simulation unit is installed in the DC unit, the circuit constant of the impedance element in the system impedance simulation unit is equivalent to that of DC. It is necessary to convert and decide.

  In the present embodiment, a pseudo power supply network (LISN, Line Impedance Stabilization Network) is used as the configuration of the system impedance simulation unit. Normally, LISN is premised on use in alternating current, but as described above, in the test apparatus of this embodiment, it is used connected to the subsequent stage of the rectifier circuit and the smoothing circuit.

8 and 9 show configuration examples using LISN as the system impedance simulation unit.
In the configuration shown in FIG. 9, reactors 85 and 86 are connected to voltage supply lines (indicated as “P” and “N” in the figure) to increase the high-frequency impedance for the normal mode. Moreover, the high frequency component which leaks to the system | strain side is suppressed by ensuring the bypass path of the high frequency common mode noise by the grounding capacitors 87 and 88. In the figure, FG indicates a frame ground.

  Further, in FIG. 9, in order to reduce the impedance variation of the common mode path, the ground impedance portion of the LISN is constituted by a line capacitor series circuit (line capacitors 91-1, 91-2, 92-1, 92-2). Connected to the middle point of the circuit), and a shunt using a line capacitor. That is, the circuit constant of the ground impedance of LISN can be modified by configuring a common mode equivalent circuit. For example, in the configuration of FIG. 9, when the final product is a three-phase input device, each capacitive component C is 3 times as compared with the case of AC, and each resistance component R is 1/3 times as compared with the case of AC. In the case of a single-phase input device, each capacitance component C may be doubled and each resistance component R may be halved. Further, the line capacitor forming the direct current midpoint may be a capacitor having a value of about 10 times or more the capacitance of the grounding capacitor in order to sufficiently reduce the influence on the ground impedance. That is, the capacitance of the line capacitors 91-1 and 91-2 is set to a value about 10 times or more the capacitance of the ground capacitor 87, and the capacitance of the line capacitors 92-1 and 92-2 is set to the value of the ground capacitor 88. Set to a value about 10 times the capacity.

  Similarly for the reactor in the configuration of FIG. 9, if a common mode equivalent circuit is configured and constant conversion is performed, the final product is 2/3 times the normal LISN component constant when the final product is a three-phase input device. In the case of equipment, it may be set to 1 time (no conversion required).

  In the configuration shown in FIG. 8, reactors 71 and 72 are connected to the voltage supply line to increase the high-frequency impedance with respect to the normal mode. In addition, the ground capacitors 74, 75, 77, and 81 secure high frequency common mode noise bypass paths, thereby suppressing high frequency components leaking to the system side. The circuit constants are selected in the same manner as described with reference to FIG.

  The configurations of FIGS. 8 and 9 ensure that the high-frequency signal is divided between the system side and the circuit side by LISN, and the test is performed with a constant impedance without being affected by the system impedance at the installation location.

  Although LISN is a device normally used for noise terminal voltage measurement, as described above, it can supply a constant impedance to the circuit, so it can be used as a system impedance simulator that supplies a reference impedance. is there.

  On the other hand, in order to simulate the system impedance of the place where the final product is installed in another place, it is necessary to provide the system impedance simulation unit with a function capable of arbitrarily (variably) setting the impedance.

FIG. 10 is a diagram showing a configuration of a system impedance simulation unit having a function capable of variably setting the impedance.
In FIG. 10, in addition to the normal mode impedances 94-1 and 94-2 of the power supply and the ground impedances 95 and 96, the normal mode impedance simulation unit (impedance of the power supply for the purpose of reducing the influence upstream from the smoothing capacitor 14 is shown. The impedances 93-1 and 93-2 that are sufficiently larger (5 to 10 times) than the circuits 94-1 and 94-2) are connected, and the values of these impedances are made variable.

  In this way, by providing a function that can arbitrarily set the impedance, if noise trouble occurs in the product after shipment, it can be installed by adjusting the impedance of the system impedance simulation part in another place as well Since the conditions can be reproduced, it helps to investigate the cause.

  Although not shown here, even when the step-up / step-down chopper circuit 57 as shown in FIG. 7 is used as a DC intermediate voltage adjustment function, the steps shown in FIGS. A system impedance simulator as shown can be provided.

  Until now, the circuit configuration (main circuit configuration) of the power converter of the final product is a converter (forward conversion circuit), a smoothing capacitor, and an inverter (inverse conversion circuit), and no switching element is used for the forward conversion circuit. We have dealt with cases (eg with diode bridges). However, when a switching element is used in the forward conversion circuit, noise generated by the switching of the switching element in the forward conversion circuit needs to be considered in the same manner as in the reverse conversion circuit.

FIG. 11 is a configuration diagram of a modified example of the test apparatus for the power conversion device according to the present embodiment.
The configuration of FIG. 11 is omitted from the configuration of FIG. 1 in that the rectifier circuit 13 and the preceding stage, the high-frequency voltage application device 22, and the metal 24 such as a casing are omitted. Further, a bridge circuit (forward conversion circuit) 100 and a bridge circuit (inverse conversion circuit) 110 are provided instead of the three-phase inverter circuit 18 of FIG. In addition, a system impedance simulation unit is provided between the smoothing capacitor 14 and the forward conversion circuit 100. The forward conversion circuit 100 means a forward conversion circuit portion of the final product. The forward conversion circuit unit of the final product normally adjusts the switching time so that the DC intermediate voltage is constant. The forward conversion circuit 100 also performs switching with the same pulse pattern. A current flows through a capacitor between the middle point of the upper and lower arms and the FG as the switching voltage fluctuates.

  The forward conversion circuit 100 has one or more vertical switching arms (in FIG. 11, three vertical switching arms), and the reverse conversion circuit 110 has one or more vertical switching arms (in FIG. 11, three vertical switching arms). Have

  The forward conversion circuit 100 has a switching element (for example, IGBT) 101-1 in the upper arm, an upper and lower switching arm having the switching element 101-2 in the lower arm, a switching element 102-1 in the upper arm, and the switching element 102. -2 having a lower arm as a lower arm, and an upper and lower switching arm having a switching element 103-1 as an upper arm and the switching element 103-2 as a lower arm.

  The inverse conversion circuit 110 has a switching element 111-1 on the upper arm, an upper and lower switching arm having the switching element 111-2 on the lower arm, and a switching element 112-1 on the upper arm, and the switching element 112-2. And an upper and lower switching arm having a switching element 113-1 as an upper arm and a switching element 113-2 as a lower arm.

  The impedance element 104 has a ground impedance between the connection point of the switching elements 101-1 and 102-1 of the test apparatus and the ground potential portion (indicated by FG in the figure), and the switching element corresponding to the final product. The impedance element is inserted between the switching element 101-1 and the ground potential part (indicated by FG in the figure) so as to match the ground impedance between the output terminal of the terminal and the ground potential part. The same applies to the impedance elements 105, 106, 114, 115, and 116.

  The control circuit 109 receives the DC voltage output from the system impedance simulation unit and the detection voltage corresponding to the AC current output from each of the upper and lower switching arms (not shown in FIG. 11). A gate drive signal for controlling the gate voltage of each semiconductor switching element of each upper and lower switching arm is generated, and each gate drive circuit (in FIG. 11, the gate drive circuit 108-1, corresponding to the switching elements 101-1, 101-2, Only 108-2 is shown and the rest is omitted).

  In the configuration of the modification shown in FIG. 11 of the present embodiment, among the plurality of upper and lower switching arms, the one to be used or not to be used is determined according to the circuit configuration of the final power converter (switching and switching). The switching pulse that is the same as that for operating the power converter of the final product is input to the arm to be switched, and the arm that is not to be switched is always turned off. Accordingly, the test apparatus having the configuration shown in FIG. 11 can be applied universally to a device other than the one that includes the inverter as described above (for example, a flyback converter described later). be able to.

  As a normal operation of a forward conversion circuit (not shown) provided in the power converter of the final product, switching is performed to convert the input AC voltage to DC and adjust the level of the DC intermediate voltage.

  However, both the noise generated by the forward conversion circuit of the final product and the noise generated by the reverse conversion circuit (not shown) of the final product are generated when the voltage applied to both ends of the switching element fluctuates during switching. In the case of a two-level inverter, the fluctuation range of the voltage applied to each switching element is equal to the DC intermediate voltage.

  That is, although the forward conversion circuit normally performs switching to adjust the DC intermediate voltage, it can be regarded as equivalent to the operation of the inverse conversion circuit from the viewpoint of noise generation. Both the noise generated by the forward conversion circuit and the noise generated by the reverse conversion circuit can be reproduced by supplying a DC intermediate voltage to the switching element for switching.

  That is, a general power converter of the final product is configured by connecting a converter (forward conversion circuit), a smoothing capacitor, and an inverter (inverse conversion circuit) in this order. In the modification of FIG. After this, a plurality of upper and lower switching arms of a converter (forward conversion circuit) and an inverter (inverse conversion circuit) are connected in parallel. Thereby, the apparatus scale of a test apparatus can be reduced in size.

First, with reference to FIG. 11, a test method using a test apparatus when the power converter of the final product has a three-phase PWM converter and a three-phase PWM inverter will be described.
Here, in the test apparatus, the number of upper and lower arms to be switched is also adjusted to the circuit configuration adopted by the final product. That is, when the power converter of the final product has the above-described three-phase PWM converter and three-phase PWM inverter, a total of six up / down switching of three upper and lower arms corresponding to the converter and three upper and lower arms corresponding to the inverter The arms are switched, that is, all the upper and lower switching arms in FIG. 11 are switched.

  At this time, a pulse pattern used when the final product is operated is applied to each switching element of the test apparatus as a gate drive signal for switching. As a result, noise similar to that of the final product can be generated, and a test for accurately evaluating the immunity (noise immunity) of the control circuit of the final product can be performed.

  Here, it is assumed that the test apparatus is operated with a light load or no load compared to the final product. For this reason, it should be noted that it is common mode noise that is mainly conducted through the ground that can be evaluated. However, in the high frequency region, common mode noise is more dominant than normal mode noise, which is noise conducted to the load. Therefore, the configuration of the test apparatus proposed in FIG. Noise tolerance) can be evaluated.

  The case where the forward conversion circuit of the final product is configured by a PWM converter has been described above. When the forward conversion circuit of the final product is configured with a diode bridge instead of the PWM converter, since the active switching operation is not performed, the noise generated by the forward conversion circuit is sufficiently small and generally need not be considered. . In this case, only the three upper and lower arms corresponding to the inverter are connected to the control circuit 109 and switched, and the three upper and lower arms corresponding to the converter are not switched and the gate and the emitter are short-circuited and are always turned off.

  If there is a concern about the effect of noise on the diode bridge, configure a bridge using a diode instead of a switching element, and connect an impedance equivalent to a stray capacitance between the midpoint of the diode bridge and the ground. do it. As a result, the same path as that of the final product is formed, so that accurate immunity (noise tolerance) can be evaluated.

  As described above, the main circuit configuration of the final product to which the configuration of the modified example of the test apparatus of FIG. 11 can be applied is not limited to the inverter, but may be any power converter configured with a switching arm. That is, any device that converts power by the switching operation of the switching element may be used.

  Subsequently, referring to FIG. 12 and FIG. 13, the test by the test apparatus in the case where the power converter of the final product is a flyback converter including one switching element (this is one of DC / DC converters). A method will be described. Since the flyback converter is a circuit that converts direct current to direct current, it becomes a direct current conversion circuit. Or it is classified into the indirect DC conversion circuit of the structure which converts direct current into alternating current, and rectifies and converts it into direct current. That is, it is different from the forward conversion circuit and the inverse conversion circuit in classification.

  In the circuit configuration of the flyback converter 120 shown in FIG. 12, the potential on the high potential side of the switching element 122 varies greatly due to the switching operation. At this time, a charge / discharge current flows through the stray capacitance C1 between the high potential side of the switching element 122 and the ground, and common mode noise is generated. The charge / discharge current also flows through the stray capacitance C <b> 2 between the primary winding and the secondary winding of the transformer 121 by the switching operation of the switching element 122. FIG. 12 shows a case where the secondary side of the transformer 121, which is the condition for the largest current flow, is connected to the ground.

  FIG. 13 is a diagram showing a case in which the final product control circuit 126 using a flyback converter in the main circuit portion (that is, a circuit portion that performs power conversion processing) is tested by the test apparatus shown in FIG. .

  Of the plurality of upper and lower switching arms in FIG. 13, a switching pulse to be supplied to the final product flyback converter is input between the gate and emitter of the lower arm 101-2. On the other hand, the upper arm 101-1 and the plurality of remaining upper and lower switching arms 102-1, 102-2,. In FIG. 12, since the stray capacitances C1 and C2 correspond to common mode loads, in order to simulate an actual machine, the impedance equivalent to these stray capacitances C1 and C2 is provided so that the test apparatus of FIG. An element (mainly having a capacitive component) 125 is inserted.

  Thereby, in the test apparatus, it becomes possible to simulate a leakage current equivalent to that generated by the final product flyback converter (leakage current resulting from the switching operation of one semiconductor switching element). It becomes possible to conduct a noise immunity test in consideration of the influence of noise generated by the switching operation of the main circuit.

  For example, FIG. 1 shows a configuration in which the control circuit 12 is controlled by inputting the detection result of the output current of the test power converter 11 as described above. For example, when feedback control of the output current is performed, it is necessary to detect the output current and input it to the control circuit 12 as shown in FIG.

  As another method, when the output voltage, the voltage and current inside the power converter are used for control and monitoring purposes, the output voltage, the voltage and current inside the power converter are detected and used as a control circuit. It becomes the composition which inputs. In other words, in the power converter of the final product, the current and voltage are detected by the detection circuit and the noise current flowing through the detection circuit is reproduced at the time of the test for the input to the control circuit. Similarly, in the test power converter, the current and voltage must be detected and input to the control circuit.

  In the above, the test apparatus for the power conversion device and the modified example thereof in the present embodiment have been described in detail. The difference adjustment unit in the description, that is, the electric power between the power converter of the final product and the test power converter is described. A specific example of determining the circuit constant in the difference adjustment unit for adjusting the difference in the characteristic is described below.

  As described above, in a semiconductor power converter, a semiconductor switching element is generally used with a radiation fin attached thereto. The radiating fin is generally grounded. 14A shows, for example, the stray capacitance (static capacitance) generated between the output terminal of the stage composed of the semiconductor switching elements 15-1 and 15-2 of the inverter circuit and the radiation fin 25 in the test power converter 11 of FIG. It is the conceptual diagram which showed the electric capacity) C. A part of the capacitance C includes the capacitance of the difference adjusting capacitor 26 shown in FIG. Accordingly, the capacitor 26 shown in FIG. 2 is not shown in FIG. 14A. In addition, the electrostatic capacity C matches or substantially matches the electrostatic capacity generated between the output terminal of the corresponding stage of the inverter circuit and the radiation fin in the final product.

  As shown in FIG. 14A, a stray capacitance C exists between the radiation fin 25 and the output terminal between the semiconductor switching elements 15-1 and 15-2, and the semiconductor switching element 15 is connected via the stray capacitance C, for example. -2 is turned on and off, a common mode current Ic that causes electromagnetic noise is generated by charging and discharging of the stray capacitance C.

  On the other hand, the voltage change rate of the semiconductor switching element 15-2 can be derived by detecting the time change (time waveform) of the voltage (source-drain voltage) V across the semiconductor switching element 15-2. The voltage change rate dV / dt obtained by differentiating the voltage V between the source and drain of the semiconductor switching element with respect to time (differentiating the voltage V at the corresponding output terminal with respect to time) is the charge of the stray capacitance C between the radiation fin and the semiconductor switching element. This is one of the determinants of the amplitude and frequency of the common mode current Ic generated by the discharge.

As shown in FIG. 14A, the DC voltage applied to the three-phase inverter circuit 18 is E (when the power supply voltage applied to the test apparatus is substantially constant and does not change, the DC voltage E is also approximately constant). When the current flowing through the switching arm shown in FIG. 14A of the phase inverter circuit 18 is I and the voltage at the connection point of the two switching elements in FIG. 14A is V, the time change as shown in the upper graph of FIG. The current I and voltage V are shown. Generally, the following relational expression (1) is established between the amplitude of the common mode current Ic, the stray capacitance C, and the voltage change rate dV / dt obtained by differentiating the voltage V with respect to time.
The amplitude of Ic = C × (dV / dt) (1)
In the upper graph of FIG. 14B, the voltage V decreases linearly at turn-on and increases linearly at turn-off, so that the voltage change rate dV / dt is constant both at turn-on and at turn-off. However, the actual circuit operation often involves more complicated time changes. In any case, as shown in the lower graph of FIG. 14B, the amplitude of the common mode current Ic is negative at turn-on, corresponding to the negative voltage change rate dV / dt. At turn-off, the amplitude of Ic has a positive value corresponding to the voltage change rate dV / dt being a positive value.

Regarding the energization time T of the common mode current Ic, the following relational expression (2) is established between the applied DC voltage E and the voltage change rate dV / dt.
T = E / (dV / dt) (2)
The common mode current Ic flows when the switching element is turned on and turned off. The expression (2) can be said to be an expression applied when obtaining the energization time Ton at turn- _on and the energization time Toff at turn- _off .

  Further, in the equation (2), the value of the voltage change rate dV / dt generally does not change during the energization time when the switching element is turned on and when the switching element is turned off. For this reason, the representative value of the voltage change rate dV / dt is used as the value of dV / dt in the equation (2). There are various methods for determining the representative value. For example, during the energization time, a voltage change interval determined by the upper limit value and the lower limit value of the voltage is obtained, and corresponds to between 10% and 90% of the voltage change interval (this is assumed to be ΔV here). ΔV / Δt is defined as a representative value of the voltage change rate with respect to a section on the time axis (this is referred to as Δt here).

  From the relational expression (1), it can be seen that the amplitude of the common mode current Ic increases as the voltage change rate dV / dt increases. Also, from the relational expression (2), it can be seen that the energization time T is shortened when the voltage change rate dV / dt is increased. That is, it can be seen that, as the voltage change rate dV / dt increases, the amplitude of the common mode current Ic increases and the pulse width decreases, and as a result, the high frequency component increases and noise increases.

  As described above, since the voltage change rate dV / dt and the noise are in a proportional relationship, the voltage change rate dV / dt is matched or substantially matched between the test apparatus and the final product, so that the noise tolerance evaluation in the test apparatus is appropriate. Can increase the sex.

Next, a method for adjusting the voltage change rate dV / dt will be described with reference to FIG.
In FIG. 15, a gate resistor 131 is a resistor connected between a semiconductor switching element (for example, IGBT) 133 of a test power converter and a gate drive circuit (gate drive signal output unit) 128, and a gate capacitor 132 is , A capacitor connected between the gate and emitter of the switching element 133.

  The switching element 133 in FIG. 15 is, for example, one of the semiconductor switching elements 15-1, 15-2, 16-1, 16-2, 17-1, and 17-2 in FIG. 2, or the switching element 101 in FIG. -1, 101-2, 102-1, 102-2, 103-1, 103-2, 111-1, 111-2, 112-1, 112-2, 113-1, 113-2 Correspond.

  When the IGBT is used as the switching element 133, the voltage change rate dV / dt increases as the resistance value of the gate resistor 131 decreases, and the voltage change rate dV / dt increases as the capacitance of the gate capacitor 132 decreases.

  For example, when the energization time of the common mode current Ic is increased, the voltage change rate dV / dt is decreased. When both a resistor and a capacitor are used, the resistance value of the gate resistor 131 is not increased so much, and the capacitance of the gate capacitor 132 is increased to reduce the voltage change rate dV / dt in order to ensure operation stability. . Note that only one of the gate resistor 131 and the gate capacitor 132 may be added to adjust the voltage change rate dV / dt.

  Further, as described above, the greater the voltage change rate dV / dt, the greater the noise, and the more severe the condition from the viewpoint of noise immunity. Therefore, it is possible to increase the voltage change rate dV / dt in the test apparatus to be larger than that of the final product, thereby making the test conditions strict. By doing so, the noise tolerance can be ensured even under conditions more severe than the required noise tolerance, and higher reliability can be realized.

  In order to easily adjust the voltage change rate dV / dt as described above, a variable resistance having a variable resistance value may be used as the gate resistance. Alternatively, a variable capacitor may be used as the gate capacitor. Or it is good also as a structure which can replace a gate resistance and a gate capacitor simply.

  In the final product, various values are used as the power supply voltage. For example, it may be 100V, or it may be several kV. In particular, when the power supply voltage is high, special considerations for safety and functions (typically, restrictions on dimensions and materials for securing insulation performance) are necessary. In addition, a considerable degree of caution is required for testing the device. This immediately leads to an increase in test cost and test period.

  This problem can be alleviated by performing a test with a power supply voltage lower than that of the final product in the test apparatus presented here. If the power supply voltage is set low, the configuration of the test apparatus is simplified and the test method is simplified, which is advantageous in terms of cost and period. However, since it is necessary to evaluate the noise immunity under the operating conditions of the final product or conditions close to the operating conditions, the noise immunity test performed by lowering the power supply voltage is often insignificant.

  In the present embodiment, by carefully designing the test apparatus, it is possible to evaluate the noise immunity of the control circuit while lowering the power supply voltage than the power converter of the final product. The method will be described below.

  When the power supply voltage of the test power converter 11 of FIG. 1 is set lower than the power converter of the final product, the main problem from the viewpoint of reproducibility of noise tolerance is due to the switching operation of the switching element. Thus, the common mode current Ic flowing between the switching element and the radiation fin is reduced as compared with the final product.

Between the common mode current Ic (amplitude), the capacitance C, the voltage change rate dV / dt, the DC voltage E, and the energization period T (of the common mode current Ic), the above relational expressions (1) and (2 ) Relationship is established, and when the DC voltage E applied to the three-phase inverter circuit 18 decreases as the power supply voltage decreases, the voltage change rate dV / dt is constant according to the relational expression (2). The energization period T is shortened.

  Further, when the voltage change rate dV / dt decreases in response to the decrease in the DC voltage E, the amplitude of the common mode current Ic decreases according to the relational expression (1). All of these are conditions in which the conditions regarding noise immunity are relaxed, which hinders a test for ensuring the noise immunity of the final product.

  In order to solve this problem, in the relational expression (1), the capacitance C may be increased to cancel the decrease in the voltage change rate dV / dt. Specifically, this is because the capacitances of the capacitors 26, 27, and 28 added to the respective stages of the three-phase inverter circuit 18 shown in FIG. 2 are increased, and the capacitances of the impedance elements 31, 32, and 33 shown in FIG. This corresponds to increasing the components, or increasing the capacitance components of the impedance elements 104, 105, 106, 114, 115, 118 added to the respective stages of the bridge circuits 100 and 110 shown in FIG. In this way, a common mode current Ic equivalent to the final product can be realized in the test apparatus. Even when the voltage change rate dV / dt does not decrease, the common mode current Ic resulting from the switching of the semiconductor switching element can be made larger than that of the final product in the test apparatus, and the noise tolerance can be evaluated under more severe conditions.

Another method for matching the common mode current Ic with that of the final product when the power supply voltage is set low in the test apparatus will be described below.
For the test power converter 11 and the final product power converter, the power supply voltages are V1 and V0, and the typical value of the voltage change rate of the semiconductor switching element constituting the inverter circuit (determined by the above method) is dV1 / dt, dV0 / dt, and in the test power converter 11, each capacitor (capacitors 26, 27 in FIG. 2) attached between the output terminal of each stage of the three-phase inverter circuit 18 and the radiation fin 25. 28, or the capacitance component of each impedance element in FIG. 3 and FIG. 11) and the capacitance generated between the output terminal of each stage and the heat radiating fin 25 is C1, and the power conversion of the final product When the electrostatic capacity generated between the output terminal of each stage of the three-phase inverter circuit and the heat radiating fin is C0, the relationship of the following equations (3-1) and (3-2) is To stand or generally established respectively at the time of on-time and off of quenching elements, adjusting the voltage change rate (representative value) dV1 / dt and C1 of the test apparatus.
V0 / (dV0 / dt) = V1 / (dV1 / dt) (3-1)
C0 × V0 = C1 × V1 (3-2)
Actually, the relationship of C0 × (dV0 / dt) = C1 × (dV1 / dt) can be derived from the above equations (3-1) and (3-2), and the above (3-1) and (3 -2) When the equation is established, it can be seen that the common mode current is the same between the final product and the test apparatus.

  The capacitance C1 is adjusted by adjusting the capacitance of the capacitor to be added (the capacitors 26, 27, and 28 in FIG. 2 or the capacitance components of the impedance elements in FIGS. 3 and 11). The voltage change rate dV1 / dt is adjusted by adjusting the resistance value of the gate resistor and the capacitance of the gate capacitor in FIG.

  FIG. 16 shows the time waveform of the current and voltage at the output terminal of the inverter circuit and the time waveform of the common mode current that flows when the switching element of the inverter circuit is turned on and off in the final product (left side) and the test apparatus (right side). FIG.

  By adjusting the capacitance C1 and the voltage change rate dV1 / dt, as shown in FIG. 16, the common mode current Ic resulting from switching of the semiconductor switching element is identical or substantially equal between the test apparatus and the final product. Can be matched.

The relational expressions (3-1) and (3-2) can be changed to the following combinations (4-1) and (4-2), respectively.
V0 / (dV0 / dt) = V1 / (dV1 / dt) (4-1)
C0 × V0 <C1 × V1 (4-2)
Actually, the relationship of C0 × (dV0 / dt) <C1 × (dV1 / dt) can be derived from the above equations (4-1) and (4-2), and the above (4-1) and (4 -2) When the formula is established, it can be seen that the common mode current is larger in the test apparatus than in the final product.

  The voltage change rate (representative value) dV1 / of the test apparatus is established so that the relationship of the above equations (4-1) and (4-2) is established or substantially established when the semiconductor switching element is turned on and off, respectively. Adjust dt and C1.

  FIG. 17 shows the time waveform of the current and voltage at the output terminal of the inverter circuit and the time waveform of the common mode current that flows when the switching element of the inverter circuit is turned on and off in the final product (left side) and the test apparatus (right side). FIG.

  By adjusting the capacitance C1 and the voltage change rate dV1 / dt, as shown in FIG. 17, the common mode current Ic resulting from the switching of the semiconductor switching element is made larger than the final product in the test apparatus. Can do. As a result, conditions more severe than the final product can be imposed on the control device at the time of testing, so by confirming that the control device does not malfunction at the time of testing, it is possible to improve the reliability by giving a margin to the noise immunity. Can do.

  In the above, each embodiment has been described by using an IGBT as a semiconductor switching element. However, a MOS-FET can also be used as a semiconductor switching element.

10, 200 Power converter 11 Test power converter 12, 109, 126, 202 Control circuit 13, 203 Rectifier circuit 14, 204 Smoothing capacitor 15, 16, 17, 101, 102, 103, 111, 112, 113, 122 133, 205, 206, 207 Semiconductor switching element 18, 208 Three-phase inverter circuit 19, 209 Current sensor 21, 108, 128, 211 Gate drive circuit 22, 212 High frequency voltage application device 23 Load 24, 214 Metal such as housing 25 Heat dissipation Fins 26, 27, 28 Capacitors 31, 32, 33, 104, 105, 106, 114, 115, 116, 125 Impedance element 35 Ground impedance 36, 37, 38 Power supply impedance 39, 52 Power supply 51 Output voltage variable single winding Transformer 55 Pressure transformer 100 bridge circuit (forward conversion circuit)
110 Bridge circuit (inverse conversion circuit)
120 Flyback Converter 121 Transformer 131 Gate Resistance 132 Gate Capacitor 201 Power Converter

Claims (17)

A power converter of a final product that is configured by one or more semiconductor switching elements and performs power conversion by a switching operation;
A control circuit that generates a control signal for controlling a main current flowing through the one or more semiconductor switching elements and supplies the control signal to the one or more semiconductor switching elements;
A testing device for testing a power conversion device comprising:
This power converter test device is used in place of the power converter of the final product, and a test power converter having a smaller output capacity than the power converter,
A high-frequency voltage applying device that applies a noise voltage between a potential portion serving as a reference of a signal of the control circuit and a ground potential portion of the test power converter;
With
The test power converter is:
A forward conversion circuit for converting commercial AC power into DC;
A system impedance simulation unit that is provided at a subsequent stage of the forward conversion circuit unit and simulates system impedance;
A plurality of upper and lower switching arms, each having a semiconductor switching element corresponding to an upper arm and a semiconductor switching element corresponding to a lower arm, provided at a subsequent stage of the system impedance simulation unit. Test equipment for power conversion equipment. For a plurality of semiconductor switching elements included in the plurality of upper and lower switching arms, according to the circuit configuration of the power converter of the final product, to select those that switch and those that do not switch,
2. The switching arm is supplied with the same switching pulse as that for operating the power converter of the final product, and the arm that is not switched is operated so as to be always turned off. Power converter test equipment. The plurality of upper and lower switching arms include an inverse conversion circuit unit that converts direct current into alternating current,
2. The power converter according to claim 1, wherein a load having a load capacity smaller than the output capacity of the test power converter is connected to the output side of the inverse conversion circuit unit, or a load is not connected. Testing equipment.   The said test power converter further has a difference adjustment part which adjusts the difference of the electrical property of the power converter of the said final product, and the said test power converter, The power converter of Claim 2 characterized by the above-mentioned. Test equipment for power conversion equipment. The power converter of the final product includes a first cooling fin that cools one or more semiconductor switching elements constituting the power converter of the final product,
The test power converter includes a second cooling fin that cools one or more semiconductor switching elements of a plurality of upper and lower switching arms corresponding to the configuration of the power converter of the final product,
The difference adjustment unit corresponds to a capacitance C0 between an output terminal of one or more semiconductor switching elements of the final product power converter and the first cooling fin, and the test power converter. A capacitor for matching or substantially matching a capacitance C1 between a connection point of two semiconductor switching elements included in one or more upper and lower switching arms and the second cooling fin is provided. Item 5. A power converter testing apparatus according to Item 4.   The difference adjustment unit converts an impedance element equivalent to a ground impedance between each output terminal of one or more semiconductor switching elements constituting the power converter of the final product and a ground potential unit, to the power conversion for testing. Corresponding to the configuration of the power converter of the final product, between each connection point of two semiconductor switching elements included in one or more of the upper and lower switching arms of the plurality of upper and lower switching arms and the ground potential portion The test apparatus for a power converter according to claim 4, wherein the test apparatus is connected to each of the above. The control circuit includes a central processing unit that controls the operation of the control circuit.
2. The test apparatus for a power conversion apparatus according to claim 1, wherein the potential part serving as a reference of the signal is a signal ground of the central processing unit.   2. The power conversion device according to claim 1, wherein the potential part serving as a reference of the signal of the control circuit is a signal ground of a conductive part in a place insulated from other circuit parts in the control circuit. Testing equipment. The differential adjustment unit includes a gate resistance between a gate terminal of each semiconductor switching element of the test power converter and a corresponding gate drive signal output unit, or a gate-emitter of each semiconductor switching element With a gate capacitor in between
By adjusting each resistance value of each gate resistor or each capacitance of each gate capacitor, the voltage change rate when each semiconductor switching element in the test power converter is turned on and off is determined as the power converter of the final product. 5. The test apparatus for a power converter according to claim 4, wherein the corresponding semiconductor switching elements are matched or substantially matched with a voltage change rate when the semiconductor switching element is turned on and turned off. The differential adjustment unit includes a gate resistance between a gate terminal of each semiconductor switching element of the test power converter and a corresponding gate drive signal output unit, or a gate-emitter of each semiconductor switching element With a gate capacitor in between
By adjusting each resistance value of each gate resistor or each capacitance of each gate capacitor, the voltage change rate when each semiconductor switching element in the test power converter is turned on and off is determined as the power converter of the final product. 5. The test apparatus for a power conversion device according to claim 4, wherein each of the corresponding semiconductor switching elements is set to be larger than a voltage change rate at the on time and at the off time.   5. The test apparatus for a power converter according to claim 4, wherein a power supply voltage V1 in the test power converter is set lower than a power supply voltage V0 in the power converter of the final product. The power converter of the final product includes a first cooling fin that cools one or more semiconductor switching elements constituting the power converter of the final product,
The test power converter includes a second cooling fin that cools one or more semiconductor switching elements of a plurality of upper and lower switching arms corresponding to the configuration of the power converter of the final product,
The difference adjustment unit corresponds to the capacitance C1 between the output terminals of one or more semiconductor switching elements of the test power converter and the second cooling fin, corresponding to the power converter of the final product. 12. The electric power according to claim 11, further comprising a capacitor that is larger than a capacitance C0 between a connection point of two semiconductor switching elements included in one or more upper and lower switching arms and the first cooling fin. Test equipment for conversion equipment.   The test apparatus for a power converter according to claim 1, further comprising a voltage adjusting unit that adjusts a power supply voltage supplied to the test power converter. A rectifier circuit that rectifies an AC voltage from an AC power source into a DC voltage;
A voltage adjusting unit provided between the AC power source and the rectifier circuit and configured without using a semiconductor switching element;
2. The test apparatus for a power converter according to claim 1, wherein the voltage adjusting unit boosts or steps down an AC voltage output from an AC power source to a desired voltage and outputs the boosted voltage to the rectifier circuit. A rectifier circuit that rectifies an AC voltage from an AC power source into a DC voltage;
2. The power converter test according to claim 1, further comprising: a step-up / step-down chopper circuit that boosts or steps down a DC voltage output from the rectifier circuit to a desired voltage and outputs the boosted voltage to a smoothing capacitor. apparatus.   2. The test apparatus for a power converter according to claim 1, wherein the system impedance simulator further has a function of variably setting the impedance.   2. The test apparatus for a power converter according to claim 1, wherein the system impedance simulating unit is configured by a LISN configured by a component having a component constant converted based on a common mode equivalent circuit.