JP2010213272A - Receiving device to pick up current signals, circuit device provided with receiving device, and method of transmit current signal through bus-system - Google Patents

Receiving device to pick up current signals, circuit device provided with receiving device, and method of transmit current signal through bus-system Download PDF

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JP2010213272A
JP2010213272A JP2010048869A JP2010048869A JP2010213272A JP 2010213272 A JP2010213272 A JP 2010213272A JP 2010048869 A JP2010048869 A JP 2010048869A JP 2010048869 A JP2010048869 A JP 2010048869A JP 2010213272 A JP2010213272 A JP 2010213272A
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bus
receiving device
transmitters
bus connection
current signals
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JP5704824B2 (en
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Peter Oechterring
エヒターリング ペーター
Steffen Walker
ヴァルカー シュテフェン
Matthias Siemss
ジームス マティアス
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Robert Bosch GmbH
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H04L12/40006—Architecture of a communication node
    • H04L12/40045—Details regarding the feeding of energy to the node from the bus
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/04—Speed or phase control by synchronisation signals
    • H04L7/06—Speed or phase control by synchronisation signals the synchronisation signals differing from the information signals in amplitude, polarity or frequency or length
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H04L2012/40267—Bus for use in transportation systems
    • H04L2012/40273—Bus for use in transportation systems the transportation system being a vehicle

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  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Small-Scale Networks (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To prevent a voltage dip caused by a synchronization pulse of a plurality of sensors, and also prevent an EMV caused by a rapid voltage rise on a bus. <P>SOLUTION: The receiving device is adapted for picking up current signals of a plurality of transmitters, in which the receiving device has at least two bus connection devices each made up to be in connection with at least one bus-junction to pick up a current signal from at least one transmitter through the bus-junction. The receiving device further has a control device adapted to supply synchronization pulses for synchronizing the transmitters to the bus connection devices. In the receiving device having the above type of configuration, the bus-junctions supply the synchronization pulses to the plurality of transmitters with at least one time offset with respect to each other. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

周辺センサのデータを中央制御装置（ＥＣＵ）に伝送するために、いくつかのセンサ系では、とりわけ車両の乗員保護システムでは、電流インタフェースが使用される。電流インタフェースは基本的に単方向としてもよいし、双方向としてもよい。   In order to transmit peripheral sensor data to a central control unit (ECU), current interfaces are used in some sensor systems, especially in vehicle occupant protection systems. The current interface may basically be unidirectional or bidirectional.

特許文献１には、制御装置と、単方向電流インタフェースを介して接続されたセンサとを備えたこの種のセンサ系が示されている。この単方向電流インタフェースを介して接続されたこのセンサはＰＡＳ２又はＰＡＳ４という名称でも知られている。最近のシステムでは、部分的には双方向性と同期化とにより、受信器に対して複数のセンサを用いたバス動作が可能である。   Patent Document 1 discloses a sensor system of this type including a control device and a sensor connected via a unidirectional current interface. This sensor connected via this unidirectional current interface is also known as PAS2 or PAS4. In modern systems, bus operation using multiple sensors is possible for the receiver, in part due to bidirectionality and synchronization.

双方向性の機能は、受信器が電圧パルスを同期パルスとしてセンサに送信し、これらセンサが所定の時間的依存関係を以て同期してデータを受信器に送信することにより達成される。その際、一般には、同期化を可能にするために、異なるセンサ反応時間又は応答時間がプログラムされる。   The bi-directional function is achieved by the receiver sending voltage pulses as synchronization pulses to the sensors, which send data to the receiver synchronously with a predetermined time dependency. In so doing, generally different sensor response times or response times are programmed to allow synchronization.

これにより、バスシステム内のセンサはトリガとして使用される同期パルスを同時に受け取る。それゆえ、多数のセンサによるバスへの多大な負荷にもかかわらず、同期パルスのエッジ急峻性は相応しい大きさでなければならない。   This allows the sensors in the bus system to simultaneously receive a sync pulse that is used as a trigger. Therefore, the edge steepness of the sync pulse must be of a reasonable magnitude despite the heavy load on the bus by a large number of sensors.

その一方で、同期パルスがオンのときには、電圧ディップが起きないように、したがってまた他の機能の妨害が起きないように、供給電圧は制限した上で印加すべきである。さらに、バスでの急速な電圧上昇はある程度のＥＭＶ（電磁両立性負荷（システムによっては遮蔽するのに高いコストがかかる））の原因となる。   On the other hand, when the sync pulse is on, the supply voltage should be limited and applied so that no voltage dip occurs and therefore no interference with other functions occurs. Furthermore, the rapid voltage rise on the bus causes some EMV (electromagnetic compatibility load (high cost to shield depending on the system)).

DE 10 2004 013 597 A1DE 10 2004 013 597 A1

本発明の課題は、複数のセンサの同期パルスによる電圧ディップを防ぐとともに、バスでの急速な電圧上昇によるＥＭＶを防ぐことである。   An object of the present invention is to prevent voltage dips due to synchronization pulses of a plurality of sensors and to prevent EMV due to a rapid voltage rise in a bus.

上記課題は、複数の送信器の電流信号を受け取るための受信装置であって、該受信装置が、少なくとも２つのバス接続装置を有し、該バス接続装置の各々は、それぞれ少なくとも１つのバス接続と接続し、該バス接続を介して少なくとも１つの送信器からの電流信号を受け取るように構成されており、前記受信装置がさらに前記送信器を同期化するための同期パルスを前記バス接続装置に出力する制御装置を有している形式の受信装置において、前記バス接続が前記同期パルスを相互に少なくとも１つの時間オフセットを以て前記複数の送信器に出力するように構成することにより解決される。   The problem is a receiving device for receiving current signals of a plurality of transmitters, the receiving device having at least two bus connection devices, each of the bus connection devices being at least one bus connection. And receiving a current signal from at least one transmitter via the bus connection, and the receiver further provides a synchronization pulse to the bus connector for synchronizing the transmitter. In a receiving device of the type having a control device for output, the bus connection is arranged to output the synchronization pulses to the plurality of transmitters with at least one time offset from each other.

本発明によるバスシステムのブロック図を示す。1 shows a block diagram of a bus system according to the present invention. 出力された同期パルスの信号経過のグラフを示す。The graph of the signal progress of the output synchronous pulse is shown.

本発明によれば、複数のバス接続ないしバスチャネル上で同期パルスが時間オフセットを以て出力される。この時間オフセットないし遅延はとりわけ同期パルスのパルス持続時間よりも短くてよい。例えば、エッジ幅の範囲内又はエッジ幅よりも短くしてよい。その際、中央で出力された同期パルスを時間遅延によりオフセットし、複数のバス接続ないしバスチャネルを介して出力してもよい。   According to the invention, synchronization pulses are output with a time offset on a plurality of bus connections or bus channels. This time offset or delay may in particular be shorter than the pulse duration of the sync pulse. For example, it may be shorter than the edge width range or the edge width. At this time, the synchronization pulse output at the center may be offset by a time delay and output via a plurality of bus connections or bus channels.

これにより、いくつかの利点が達成される。同期パルスが正確に同時に出力された場合、それに相応して電圧供給の負荷の何倍もの負荷と、相応するＥＭＶ負荷の上昇とが発生するのに対し、本発明では同期パルス間の小さな時間オフセットないし遅延、例えばエッジ幅未満の遅延によって、電圧供給の妨害を明らかに減少させ、さらにはＥＭＶ放射も明らかに減少させることができることが分かる。   This achieves several advantages. If the synchronization pulses are output exactly at the same time, a load corresponding to many times the voltage supply load and a corresponding increase in the EMV load will occur, whereas the present invention provides a small time offset between the synchronization pulses. It can be seen that delays, e.g. delays less than the edge width, can clearly reduce disturbances in the voltage supply, and can also significantly reduce EMV emissions.

遅延させた同期パルスを出力するための回路技術上のコストは低いないしは無視できる程度のものである。にもかかわらず、低いコストで電圧供給もＥＭＶ放射放射も明らかに改善される。これは本発明によらなければ明らかに高いコストをかけずには達成できないようなことである。   The cost in circuit technology for outputting the delayed synchronization pulse is low or negligible. Nevertheless, the voltage supply and the EMV radiation emission are clearly improved at low cost. This is clearly not possible without the high cost without the present invention.

個々の同期パルスの間の時間オフセットないし遅延は同一としてもよいし、異ならせてもよい。同期の機能はこれらの時間オフセットによっては損なわれない。とりわけ、時間オフセットは異なる送信器の反応時間ないし応答時間の間の差よりも明らかに短くてよい。その際、オフセットされた同期パルスを生成するために共通の出力信号を出力してもよい。   The time offset or delay between the individual sync pulses may be the same or different. The synchronization function is not impaired by these time offsets. In particular, the time offset may be clearly shorter than the difference between the response times or response times of different transmitters. At that time, a common output signal may be output in order to generate an offset synchronization pulse.

本発明によれば、同期パルスに対するディジタルシーケンス制御とこれに続くデータ受信ないし信号受信のシーケンス制御において、それぞれの適応チャネルに所定の遅延を発生させることができる。   According to the present invention, a predetermined delay can be generated in each adaptive channel in the digital sequence control for the synchronization pulse and the subsequent sequence control of data reception or signal reception.

本発明は特に複数のセンサがバスシステムを介して共通の受信装置に接続されているセンサ系で使用することができる。受信装置はとりわけ中央制御装置（ＥＣＵ）の一部であってよい。また、接続されたセンサを自給式ないし自立的なエネルギー供給のない形に構成することができるように、これらセンサへの電流供給ないしエネルギー供給に同時に使用される大電流との電流インタフェースを形成してもよい。   The present invention can be used particularly in a sensor system in which a plurality of sensors are connected to a common receiving device via a bus system. The receiving device may in particular be part of a central control unit (ECU). In addition, a current interface with a large current that is used simultaneously to supply current or supply energy to these sensors is formed so that the connected sensors can be configured to be self-contained or have no independent energy supply. May be.

図１には、受信装置２と送信器３ａ、３ｂ、３ｃ及び３ｄを有する回路装置１が示されている。送信器３ａ、３ｂ、３ｃ、３ｄは特にセンサであってよい。そして、回路装置１は、例えば乗員保護システムの一部、とりわけ車両のエアバッグ制御部であってよい。   FIG. 1 shows a circuit device 1 having a receiving device 2 and transmitters 3a, 3b, 3c and 3d. The transmitters 3a, 3b, 3c, 3d may in particular be sensors. The circuit device 1 may be, for example, a part of an occupant protection system, particularly a vehicle airbag control unit.

送信器３ａ、３ｂ、３ｃ、３ｄはバスシステム４を介して受信装置２と接続されている。送信器３ａ、３ｂ、３ｃ、３ｄはそれぞれ１つのバス接続装置５ａ、５ｂ、５ｃ、５ｄを有しており、これらのバス接続装置にはそれぞれ１つのバス接続６ａ、６ｂ、６ｃ、６ｄが接続されている。相応して、受信装置２はバス接続装置７ａ、７ｂ、７ｃ、７ｄを有しており、これらのバス接続装置にはそれぞれバス接続６ａ、６ｂ、６ｃ、６ｄが接続されている。したがって、バス接続６ａ、６ｂ、６ｃ、６ｄは共通のバスシステム４の４つのバスチャネルを形成している。バス接続６ａ、６ｂ、６ｃ、６ｄは特にそれぞれ２つのライン１０，１１を有する２線バス接続であってよい。   The transmitters 3a, 3b, 3c, and 3d are connected to the receiving device 2 via the bus system 4. Each of the transmitters 3a, 3b, 3c, and 3d has one bus connection device 5a, 5b, 5c, and 5d, and one bus connection 6a, 6b, 6c, and 6d is connected to each of these bus connection devices. Has been. Correspondingly, the receiving device 2 has bus connection devices 7a, 7b, 7c, 7d, to which bus connections 6a, 6b, 6c, 6d are respectively connected. Accordingly, the bus connections 6a, 6b, 6c, 6d form four bus channels of the common bus system 4. The bus connections 6a, 6b, 6c, 6d may in particular be a two-wire bus connection with two lines 10, 11 respectively.

バスシステム４は電流インタフェースを形成しており、送信器３ａ、３ｂ、３ｃ、３ｄはこの電流インタフェースを介して各インタフェース電流Ｉａ、Ｉｂ、Ｉｃ、Ｉｄの変調により電流信号Ｓ１ａ、Ｓ１ｂ、Ｓ１ｃ、Ｓ１ｄを伝送する。送信器３ａ、３ｂ、３ｃ、３ｄはとりわけエネルギー自給式でなく、インタフェース電流を介してのみエネルギー供給されるように形成してもよい。インタフェース電流の変調は送信器３ａ、ｂ、ｃ、ｄにおいてそれぞれ例えば電流シンクなどの高い抵抗のスイッチによって各ライン１０，１１の間で行ってよい。この種の電流変調された信号を伝送する電流インタフェースそのものは公知である。   The bus system 4 forms a current interface, and the transmitters 3a, 3b, 3c, and 3d transmit current signals S1a, S1b, S1c, and S1d through modulation of the interface currents Ia, Ib, Ic, and Id via the current interface. Is transmitted. The transmitters 3a, 3b, 3c, 3d are not particularly energy self-contained, but may be configured to be energized only via the interface current. The modulation of the interface current may be performed between the lines 10 and 11 by high resistance switches such as current sinks in the transmitters 3a, b, c and d, respectively. Current interfaces that transmit this type of current modulated signal are known per se.

バス接続装置７ａ、ｂ、ｃ、ｄは各インタフェース電流Ｉａ、Ｉｂ、Ｉｃ、Ｉｄを発生させるそれぞれ１つの電流源と、さらに例えば電流信号Ｓ１ａ、Ｓ１ｂ、Ｓ１ｃ、Ｓ１ｄを検出する検出装置とを有している。なお、検出装置は例えば電流変調された電流信号Ｓ１ａ、Ｓ１ｂ、Ｓ１ｃ、Ｓ１ｄを測定抵抗における電圧降下として測定する。このような構成もそれ自体は十分に公知であり、ここではさらに説明はしない。バス接続装置７ａ、７ｂ、７ｃ、７ｄは電流信号Ｓ１ａ、Ｓ１ｂ、Ｓ１ｃ、Ｓ１ｄを電圧信号Ｓ２ａ、Ｓ２ｂ、Ｓ２ｃ、Ｓ２ｄに変換し、受信装置２の制御装置１４へ出力する。   Each of the bus connection devices 7a, b, c, and d includes one current source that generates the interface currents Ia, Ib, Ic, and Id, and a detection device that detects, for example, the current signals S1a, S1b, S1c, and S1d. is doing. Note that the detection device measures, for example, the current signals S1a, S1b, S1c, and S1d that are current-modulated as voltage drops in the measurement resistor. Such a configuration is also well known per se and will not be further described here. The bus connection devices 7a, 7b, 7c and 7d convert the current signals S1a, S1b, S1c and S1d into voltage signals S2a, S2b, S2c and S2d and output them to the control device 14 of the receiving device 2.

本発明によるバスシステム４は基本的に図示された実施形態には限定されない。とりわけ、複数の送信器を共通する１つのバス接続に接続してもよい。   The bus system 4 according to the invention is basically not limited to the illustrated embodiment. In particular, a plurality of transmitters may be connected to a common bus connection.

送信器３ａ、３ｂ、３ｃ、３ｄは所定の時間的依存関係を以て同期してそれぞれの電流信号Ｓ１ａ、Ｓ１ｂ、Ｓ１ｃ、Ｓ１ｄを受信装置２に送信する。   The transmitters 3a, 3b, 3c, and 3d transmit the current signals S1a, S1b, S1c, and S1d to the receiving device 2 in synchronization with a predetermined time dependency.

同期化のために、受信装置２は同期パルス１６ａ、１６ｂ、１６ｃ、１６ｄを送信器３ａ、３ｂ、３ｃ、３ｄに送る。同期パルスは電圧パルスとしてバス接続装置７ａ、ｂ、ｃ、ｄとバス接続６ａ、ｂ、ｃ、ｄとを介して出力される。したがって、送信器３ａ、３ｂ、３ｃ、３ｄはその後（プログラムないし設定に従って）異なる応答時間ないし反応時間で反応することができる。例えば、第１の送信器３ａは１００ｍｓの反応時間で反応し、第２の送信器は２００ｍｓの反応時間で反応する等々。図示された実施形態では、同期パルス１６ａ、１６ｂ、１６ｃ、１６ｄは制御装置１４からバス接続装置７ａ、ｂ、ｃ、ｄへと出力されるので、制御装置１４は電圧信号Ｓ２ａ、ｂ、ｃ、ｄを受け取ることも、同期パルス１６ａ、１６ｂ、１６ｃ、１６ｄを出力することも行う。しかし、これに関して、代替的に、例えば電圧信号Ｓ２ａ、ｂ、ｃ、ｄを他の装置から受け取るようにしてもよい。   For synchronization, the receiving device 2 sends synchronization pulses 16a, 16b, 16c, 16d to the transmitters 3a, 3b, 3c, 3d. The synchronization pulse is output as a voltage pulse via the bus connection devices 7a, b, c, d and the bus connections 6a, b, c, d. Thus, the transmitters 3a, 3b, 3c, 3d can then react with different response times or reaction times (according to the program or settings). For example, the first transmitter 3a reacts with a reaction time of 100 ms, the second transmitter reacts with a reaction time of 200 ms, etc. In the illustrated embodiment, the synchronization pulses 16a, 16b, 16c, 16d are output from the control device 14 to the bus connection devices 7a, b, c, d, so that the control device 14 is connected to the voltage signals S2a, b, c, d is received and the synchronization pulses 16a, 16b, 16c, and 16d are output. However, in this regard, alternatively, for example, the voltage signals S2a, b, c, d may be received from other devices.

本発明によれば、同期パルス１６ａ、１６ｂ、１６ｃ、１６ｄは互いに対して時間的なズレないし時間オフセットを以て出力される。図２には、各チャネルないしバス接続６ａ、ｂ、ｃ、ｄ上の同期パルス１６ａ、ｂ、ｃ、ｄと時間ｔが示されている。同期パルス１６ａ、ｂ、ｃ、ｄは、例えばそれぞれ４０μｓのパルス幅ｔｐ、例えば５〜６μｓのエッジ幅ｔｆ、ならびに、立ち上がり及び立ち下がりエッジを有する。例えばパルス１６ａと１６ｂのような相次ぐ同期パルスの間の時間オフセットｔｄ、同様にして１６ｂと１６ｃ及び１６ｃと１６ｄの間の時間オフセットは、例えばそれぞれ２μｓである。時間オフセットｔｄはエッジ幅ｔｆ未満であってよい。これに関して、本発明によれば、エッジが正確に同時には開始ないし終了せず、オーバーラップしないことが特に重要であることが分かる。同期パルス１６ａ、ｂ、ｃ、ｄの間の時間オフセットは原則的に異なっていてよい。   According to the present invention, the synchronization pulses 16a, 16b, 16c, 16d are output with a time shift or time offset with respect to each other. FIG. 2 shows the synchronization pulses 16a, b, c, d and the time t on each channel or bus connection 6a, b, c, d. The synchronization pulses 16a, b, c and d each have, for example, a pulse width tp of 40 μs, for example, an edge width tf of 5 to 6 μs, and rising and falling edges. For example, the time offset td between successive synchronization pulses such as pulses 16a and 16b, and similarly the time offset between 16b and 16c and 16c and 16d is 2 μs, for example. The time offset td may be less than the edge width tf. In this regard, it can be seen that according to the invention it is particularly important that the edges do not start or end exactly simultaneously and do not overlap. The time offset between the synchronization pulses 16a, b, c, d may in principle be different.

時間オフセットｔｄが送信器の反応時間ないし反応時間の差よりも明らかに小さいことにより、本発明による同期パルス１６ａ、ｂ、ｃ、ｄの時間的にずらした送信は原則的に送信器３ａ、３ｂ、３ｃ、３ｄをプログラムし直すことなしに既存のシステム内で実行することができる。   Due to the fact that the time offset td is clearly smaller than the reaction time of the transmitter or the difference between the reaction times, the time-shifted transmission of the synchronization pulses 16a, b, c, d according to the invention is in principle the transmitter 3a, 3b. 3c, 3d can be executed in an existing system without reprogramming.

１ 回路装置
２ 受信装置
３ａ−ｄ 送信器
４ バスシステム
５ａ−ｄ バス接続装置
６ａ−ｄ バス接続
７ａ−ｄ バス接続装置
１０，１１ ライン
１４ 制御装置
１６ａ−ｄ 同期パルス
Ｓ１ａ−ｄ 電流信号
Ｓ２ａ−ｄ 電圧信号
ｔｄ 時間オフセット
ｔｆ エッジ幅
ｔｐ パルス幅 DESCRIPTION OF SYMBOLS 1 Circuit apparatus 2 Receiver 3a-d Transmitter 4 Bus system 5a-d Bus connection apparatus 6a-d Bus connection 7a-d Bus connection apparatus 10, 11 Line 14 Control apparatus 16a-d Synchronous pulse S1a-d Current signal S2a- d Voltage signal td Time offset tf Edge width tp Pulse width

Claims (13)

複数の送信器（３ａ、３ｂ、３ｃ、３ｄ）の電流信号（Ｓ１ａ、Ｓ１ｂ、Ｓ１ｃ、Ｓ１ｄ）を受け取るための受信装置であって、該受信装置（２）が、
少なくとも２つのバス接続装置（７ａ、７ｂ、７ｃ、７ｄ）を有し、該バス接続装置（７ａ、７ｂ、７ｃ、７ｄ）の各々は、それぞれ少なくとも１つのバス接続（６ａ、６ｂ、６ｃ、６ｄ）と接続し、該バス接続（６ａ、６ｂ、６ｃ、６ｄ）を介して少なくとも１つの送信器（３ａ、３ｂ、３ｃ、３ｄ）からの電流信号（Ｓ１ａ、Ｓ１ｂ、Ｓ１ｃ、Ｓ１ｄ）を受け取るように構成されており、前記受信装置（２）がさらに前記送信器（３ａ、３ｂ、３ｃ、３ｄ）を同期化するための同期パルス（１６ａ、１６ｂ、１６ｃ、１６ｄ）を前記バス接続装置（７ａ、７ｂ、７ｃ、７ｄ）に出力する制御装置（１４）を有している形式の受信装置において、
前記バス接続（７ａ、ｂ、ｃ、ｄ）が前記同期パルス（１６ａ、１６ｂ、１６ｃ、１６ｄ）を相互に少なくとも１つの時間オフセット（ｔｄ）を以て前記複数の送信器（６ａ、６ｂ、６ｃ、６ｄ）に出力する、ことを特徴とする受信装置。 A receiving device for receiving current signals (S1a, S1b, S1c, S1d) of a plurality of transmitters (3a, 3b, 3c, 3d), the receiving device (2) comprising:
At least two bus connection devices (7a, 7b, 7c, 7d) each having at least one bus connection (6a, 6b, 6c, 6d). ) And receive current signals (S1a, S1b, S1c, S1d) from at least one transmitter (3a, 3b, 3c, 3d) via the bus connection (6a, 6b, 6c, 6d) And the receiver (2) further sends synchronization pulses (16a, 16b, 16c, 16d) for synchronizing the transmitters (3a, 3b, 3c, 3d) to the bus connection device (7a). , 7b, 7c, 7d) in a receiving device of the type having a control device (14)
The bus connection (7a, b, c, d) causes the synchronization pulse (16a, 16b, 16c, 16d) to be mutually mutually at least one time offset (td) with the plurality of transmitters (6a, 6b, 6c, 6d ). 前記相互に時間的にずらされた異なる同期パルス（１６ａ、１６ｂ、１６ｃ、１６ｄ）の数は前記送信器（３ａ、３ｂ、３ｃ、３ｄ）の数に相当する、請求項１記載の受信装置。   The receiving device according to claim 1, wherein the number of the different synchronization pulses (16a, 16b, 16c, 16d) shifted in time from each other corresponds to the number of the transmitters (3a, 3b, 3c, 3d). 前記時間的にずらされた同期パルス（１６ａ、１６ｂ、１６ｃ、１６ｄ）は異なるバス接続（６ａ、ｂ、ｃ、ｄ）を介して出力される、請求項１又は２記載の受信装置。   The receiving device according to claim 1 or 2, wherein the time-shifted synchronization pulses (16a, 16b, 16c, 16d) are output via different bus connections (6a, b, c, d). 前記制御装置は既に前記少なくとも１つの時間オフセット（ｔｄ）を以て前記バス接続（７ａ、ｂ、ｃ、ｄ）に前記同期パルス（１６ａ、１６ｂ、１６ｃ、１６ｄ）を出力する、請求項１から３のいずれか１項記載の受信装置。   4. The control device according to claim 1, wherein the control device already outputs the synchronization pulse (16 a, 16 b, 16 c, 16 d) to the bus connection (7 a, b, c, d) with the at least one time offset (td). The receiving device according to claim 1. 前記時間オフセット（ｔｄ）は前記同期パルス（１６ａ、１６ｂ、１６ｃ、１６ｄ）のパルス幅（ｔｐ）よりも小さい、請求項１から４のいずれか１項記載の受信装置。   The receiving apparatus according to any one of claims 1 to 4, wherein the time offset (td) is smaller than a pulse width (tp) of the synchronization pulse (16a, 16b, 16c, 16d). 前記時間オフセット（ｔｄ）は前記同期パルス（１６ａ、１６ｂ、１６ｃ、１６ｄ）のエッジ幅（ｔｆ）以下である、請求項１から５のいずれか１項記載の受信装置。   The receiving apparatus according to any one of claims 1 to 5, wherein the time offset (td) is equal to or less than an edge width (tf) of the synchronization pulse (16a, 16b, 16c, 16d). 前記バス接続装置（７ａ、７ｂ、７ｃ、７ｄ）は前記同期パルス（１６ａ、１６ｂ、１６ｃ、１６ｄ）を電圧パルスとして前記接続されたバス接続（６ａ、６ｂ、６ｃ、６ｄ）に出力する、請求項１から６のいずれか１項記載の受信装置。   The bus connection device (7a, 7b, 7c, 7d) outputs the synchronization pulse (16a, 16b, 16c, 16d) as a voltage pulse to the connected bus connection (6a, 6b, 6c, 6d). Item 7. The receiving device according to any one of Items 1 to 6. 前記バス接続装置（７ａ、７ｂ、７ｃ、７ｄ）は前記バス接続（６ａ、６ｂ、６ｃ、６ｄ）を介して受け取った電流信号（Ｓ１ａ、Ｓ１ｂ、Ｓ１ｃ、Ｓ１ｄ）を電圧信号（Ｓ２ａ、Ｓ２ｂ、Ｓ２ｃ、Ｓ２ｄ）に変換し、前記制御装置（１４）へ出力する、請求項１から７のいずれか１項記載の受信装置。   The bus connection devices (7a, 7b, 7c, 7d) receive current signals (S1a, S1b, S1c, S1d) received via the bus connections (6a, 6b, 6c, 6d) as voltage signals (S2a, S2b, The receiving device according to any one of claims 1 to 7, wherein the receiving device is converted into S2c, S2d) and output to the control device (14). 請求項１から８のいずれか１項記載の受信器（２）と少なくとも２つの送信器（３ａ、３ｂ、３ｃ、３ｄ）を有する回路装置（１）であって、前記送信器はそれぞれバス接続（６ａ、６ｂ、６ｃ、６ｄ）を介して前記受信装置（２）のバス接続装置（７ａ、７ｂ、７ｃ、７ｄ）と接続されており、
前記送信器（３ａ、３ｂ、３ｃ、３ｄ）は前記各バス接続（６ａ、６ｂ、６ｃ、６ｄ）を介して電流信号（Ｓ１ａ、Ｓ１ｂ、Ｓ１ｃ、Ｓ１ｄ）を送信するものであり、それぞれ異なる反応時間で前記電流信号（Ｓ１ａ、Ｓ１ｂ、Ｓ１ｃ、Ｓ１ｄ）を送信するために、前記バス接続（６ａ、６ｂ、６ｃ、６ｄ）を介して同期パルス（１６ａ、１６ｂ、１６ｃ、１６ｄ）を受信することにより同期化される、ことを特徴とする回路装置（１）。 9. A circuit arrangement (1) comprising a receiver (2) according to any one of claims 1 to 8 and at least two transmitters (3a, 3b, 3c, 3d), each transmitter being connected by a bus. (6a, 6b, 6c, 6d) are connected to the bus connection device (7a, 7b, 7c, 7d) of the receiving device (2),
The transmitters (3a, 3b, 3c, 3d) transmit current signals (S1a, S1b, S1c, S1d) through the bus connections (6a, 6b, 6c, 6d), and have different reactions. Receiving synchronization pulses (16a, 16b, 16c, 16d) via the bus connections (6a, 6b, 6c, 6d) to transmit the current signals (S1a, S1b, S1c, S1d) in time A circuit device (1) characterized in that it is synchronized by 前記送信器（３ａ、３ｂ、３ｃ、３ｄ）はエネルギー自給式でなく構成されており、前記バス接続（６ａ、６ｂ、６ｃ、６ｄ）を介してエネルギーを供給され、インタフェース電流（Ｉａ、Ｉｂ、Ｉｃ、Ｉｄ）の電流変調により電流信号（Ｓ１ａ、Ｓ１ｂ、Ｓ１ｃ、Ｓ１ｄ）を形成する、請求項９記載の回路装置。   The transmitters (3a, 3b, 3c, 3d) are not energy self-contained and are supplied with energy via the bus connections (6a, 6b, 6c, 6d) and interface currents (Ia, Ib, The circuit device according to claim 9, wherein the current signals (S1a, S1b, S1c, S1d) are formed by current modulation of Ic, Id). 前記送信器は測定信号又は測定信号が導出される信号を電流信号（Ｓ１ａ、Ｓ１ｂ、Ｓ１ｃ、Ｓ１ｄ）として送出するセンサ（３ａ、３ｂ、３ｃ、３ｄ）であり、前記受信装置（２）は中央制御装置の一部である、請求項９又は１０記載の回路装置。   The transmitter is a sensor (3a, 3b, 3c, 3d) that sends out a measurement signal or a signal from which the measurement signal is derived as a current signal (S1a, S1b, S1c, S1d), and the receiving device (2) is in the center The circuit device according to claim 9 or 10, which is a part of the control device. 車両の乗員保護システムの一部である、請求項１１記載の回路装置。   12. A circuit arrangement according to claim 11, which is part of a vehicle occupant protection system. バスシステム（４）を介して電流信号（Ｓ１ａ、Ｓ１ｂ、Ｓ１ｃ、Ｓ１ｄ）を伝送する方法であって、共通の受信装置（２）から少なくとも２つのバス接続（６ａ、６ｂ、６ｃ、６ｄ）を介して少なくとも２つの送信器（３ａ、３ｂ、３ｃ、３ｄ）に同期パルス（１６ａ、１６ｂ、１６ｃ、１６ｄ）を出力し、前記少なくとも２つの送信器（３ａ、３ｂ、３ｃ、３ｄ）が異なる反応時間を以て前記電流信号（Ｓ１ａ、Ｓ１ｂ、Ｓ１ｃ、Ｓ１ｄ）を前記バス接続バス接続（６ａ、６ｂ、６ｃ、６ｄ）を介して受信装置（２）へ伝送するようにした方法において、前記受信装置（２）が前記複数のバス接続（６ａ、６ｂ、６ｃ、６ｄ）を介して前記同期パルス（１６ａ、１６ｂ、１６ｃ、１６ｄ）を相互に少なくとも１つの時間オフセット（ｔｄ）を以て出力するようにした、ことを特徴とする方法。   A method for transmitting current signals (S1a, S1b, S1c, S1d) via a bus system (4), wherein at least two bus connections (6a, 6b, 6c, 6d) are connected from a common receiver (2). Through which the synchronization pulses (16a, 16b, 16c, 16d) are output to at least two transmitters (3a, 3b, 3c, 3d), and the at least two transmitters (3a, 3b, 3c, 3d) respond differently. In the method in which the current signals (S1a, S1b, S1c, S1d) are transmitted to the receiving device (2) via the bus connection bus connections (6a, 6b, 6c, 6d) over time, the receiving device ( 2) at least one time offset (td) mutually with respect to the synchronization pulses (16a, 16b, 16c, 16d) via the plurality of bus connections (6a, 6b, 6c, 6d) Wherein the the, possible to output with a.
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