JP2010212646A - Functional element loading method and functional element loaded substrate - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve the heat dissipation performance of a solder connection part containing Bi, and to prevent the Bi from being spread to outside of the connection part to form Kirkendall voids in the connection part, and thereby to improve the characteristics of a functional element such as an optical element. <P>SOLUTION: A functional element loading method includes: a conductor layer forming process of forming a first conductor layer 5 in at least a part of a region on which the functional element 1 is mounted, in a main surface side of a substrate 2 on which the functional element 1 is mounted, and forming a second conductor layer 6 in at least a part of the first conductor layer 5; and a connection process of forming a third conductor layer 8 in irregular form in at least a part of the second conductor layer 6, forming a solder 9 in at least a part of the third conductor layer 8, sandwiching a second substrate 17, and connecting and mounting the functional element 1 by melting the solder 9, in which the solder 9 is dammed by the third conductor layer 8 in irregular form so as not to contact the first conductor layer 5. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a functional element mounting method in which a functional element such as a semiconductor element is connected to and mounted on a flexible substrate in which solder is formed on a conductive layer, and a functional element mounting substrate on which the functional element is mounted.

  As conventional functional element mounting methods, techniques described in Patent Document 1 and Patent Document 2 are known. Patent Document 1 includes a substrate and a conductive layer formed on the substrate and having a concavo-convex portion formed in a region connected by a pad and bump of the semiconductor element. The semiconductor element has a connection between the bump and the conductive layer. A semiconductor device is described which is mounted and bonded to the flip chip mounting substrate so as to be connected to a region.

  Patent Document 2 includes a wiring layer provided on a semiconductor substrate, and an inspection electrode pad provided on the wiring layer, and the inspection electrode pad includes a barrier metal layer and a contact layer. There is described a semiconductor device having the above-described structure, in which irregularities are provided on the surface of the inspection electrode pad.

JP 2003-109987 A JP 2003-179112 A

  In recent years, there has been a demand for mounting functional elements such as optical elements on a flexible substrate on which a conductive layer and solder are formed. A flexible substrate is a type of printed wiring board that is thin and flexible. The insulator is made of a highly flexible polyimide or a liquid crystal polymer having a good high frequency characteristic, and there are single-sided, double-sided and multi-layered ones. In addition, a waveguide layer is formed on the flexible substrate for the optical waveguide, and the heat resistance temperature of the multimode waveguide layer is about 160 ° C. to 200 ° C. As a problem in this case, since the heat-resistant temperature of the waveguide layer is low, it is necessary to connect with a low melting point connection material. In addition, since the heat generated from the functional element increases, it is necessary to ensure high heat dissipation of the connecting portion.

  An object of the present invention is to solve the above-mentioned problems by ensuring good solder wettability in a solder connection part to improve heat dissipation and preventing diffusion of Bi to a conductor layer other than the connection part. It is an object to provide a functional element mounting method and a functional element mounting substrate mounting structure in which characteristics of functional elements such as optical elements are improved.

  In order to achieve the above object, a functional element mounting method of the present invention is a functional element mounting method in which a functional element is connected and mounted on a substrate having a conductor layer using solder, and the functional element is mounted. A conductor layer forming step of forming a first conductor layer in at least a part of a region on which the functional element is mounted on the main surface side of the substrate, and a second layer on at least a part of the first conductor layer. A conductor layer forming step of forming a conductor layer; a conductor layer forming step of forming a concave and convex third conductor layer on at least a part of the second conductor layer; and the functional element in the third conductor layer. A solder forming step of forming solder on at least a part of the inner side of the region to which the functional element is connected rather than the highest portion of the convex portion formed on the outermost side of the region to which the solder is connected, and melting the solder The functional element on the main surface side of the substrate A connecting step of connecting and mounting on the third conductor layer, and a connecting step of forming a connecting portion in which the melted solder is blocked by the third conductor layer and does not contact the first conductor layer; The connecting portion does not contact the first conductor layer.

  Moreover, the present invention is characterized in that, in the functional element mounting method, a fourth conductor layer connected to the solder in the connecting step is provided on at least a part of the main surface side of the functional element.

  In the conductor layer forming step of forming the concave and convex third conductor layer, the present invention provides a substrate on which the third conductive layer is formed at the lowest height of the concave and convex shape to be formed, The surface roughness of the conductor layer 1 and the conductor layer 2 is clearly 2 μm or higher, and at the highest place, the solder height is 10 μm or less, which is the same as the highest 10 μm, and a sufficient volume of the solder involved in the connection is ensured. Features.

  Further, the present invention is characterized in that, in the connecting step, the connecting portion is formed by a reaction between Au and a solder component by pressing an Au layer or Au bump previously formed on the functional element against the melted solder. To do.

  Further, the present invention is characterized in that the conductor layer 7 and the conductor layer 8 constituting the third conductor layer having the concavo-convex shape to be formed are metal materials in the step of forming the third conductor layer having the concavo-convex shape. .

  Further, in the third conductor layer forming step of the concavo-convex shape according to the present invention, the material constituting the third conductor layer is Cu or Cu alloy, Al or Al alloy, Ni or Ni alloy metal, Au or It is an Au alloy.

  Further, according to the present invention, in the solder formation step, the solder to be formed includes Bi—Sn, Sn—Ag—Bi, Sn—Zn—Bi, Sn—Ag—In—Bi, In—Bi, and the like. It is the solder contained.

  Further, according to the present invention, in the solder formation step, the solder to be formed is Bi-Sn solder or Sn-Ag-Bi solder, and the concentration of Bi is 21% or more and 99.9% or less. Features.

  Further, the present invention provides a Bi-Sn, Sn-Ag-Bi, Sn-Zn-Bi, Sn-Ag-In-Bi, In-Bi, etc. solder surface containing Bi formed in the solder forming step. In addition, a film formed by stacking Ag, Au, or Ag and Au is formed.

  Further, the present invention is characterized in that, in the solder forming step, a film constituted by laminating the Ag, Au or Ag and Au is formed on the surface of the solder by vapor deposition, sputtering or plating.

  Further, the substrate used in the method of the present invention is characterized in that the substrate to which the functional element is connected by solder is a flexible substrate having an organic material having a heat resistant temperature of 200 ° C. or less.

  Further, the present invention is characterized in that the solder connected in the connecting step is not in contact with the third conductor layer.

  The functional element mounting method of the present invention is characterized in that a second substrate is sandwiched between the functional element and the substrate.

  The functional element mounting board of the present invention is a functional element mounting board in which a functional element is connected to and mounted on a board having a conductor layer using solder, and the main surface side of the board on which the functional element is mounted A first conductor layer formed in at least a part of a region where the functional element is mounted, a second conductor layer formed in at least a part of the first conductor layer, and the second conductor layer. An uneven third conductor layer formed on at least a part of the conductor layer, and the third conductor layer, the highest portion of the convex portion formed on the outermost side of the region to which the functional element is connected The solder formed on at least a part of the inside of the region to which the functional element is connected, the solder is melted, and the functional element is connected to the third conductor layer on the main surface side of the substrate. The solder that is mounted and melted is caused by the third conductor layer. Comprising a damming is not in contact with the first conductive layer connecting portion, the connecting portion is characterized in that it does not contact with the first conductive layer.

  The functional element mounting board of the present invention is characterized in that the connected solder is not in contact with the third conductor layer.

  In addition, the functional element mounting substrate of the present invention includes a second substrate sandwiched between the functional element and the substrate.

  In the functional element mounting substrate of the present invention, a fourth conductor layer is formed on at least a part of the surface on which the functional element of the second substrate is mounted and the surface in contact with the substrate, and the fourth conductor Solder is formed on at least a part of the layer.

  In the functional element mounting substrate of the present invention, the thermal conductivity of the solder formed on the side where the functional element of the second substrate is connected is higher than that of the solder formed on the side where the functional element is not connected. Is characterized by high.

  The functional element mounting substrate of the present invention is characterized in that a through hole is formed in a part of the second substrate.

  ADVANTAGE OF THE INVENTION According to this invention, it becomes possible to improve the heat dissipation of the connection part which connected the functional element and the board | substrate using Sn-Bi solder etc. with comparatively low connection temperature and comparatively small thermal conductivity.

  In addition, according to the present invention, after the functional element and the substrate are connected using Sn-Bi solder or the like, the connection portion and the conductive layer formed on the substrate and continuing to the region other than the connection portion are in contact with each other. By avoiding this, it is possible to suppress the formation of Kirkendall voids formed in the connection portion due to diffusion of Bi into the conductive layer.

  In addition, according to the present invention, the uneven conductive layer on the substrate can break the oxide film formed on the solder surface at the time of connection with the functional element and realize good connection with good wetting.

  In addition, according to the present invention, by sandwiching the second substrate, it is possible to improve the heat dissipation of the connection portion connecting the functional element and the substrate and to reduce the difference in the coefficient of thermal expansion.

  In addition, according to the present invention, by providing a through hole in the second substrate, light from a functional element such as an optical element can be guided to the waveguide layer of the first substrate through the second substrate. it can.

FIG. 1 is a cross-sectional view showing a state before a functional element 1 having a basic structure according to the present invention is mounted on a substrate 2. FIG. 2 is a cross-sectional view showing a state in which a functional element 1 having a basic structure according to the present invention is mounted on a substrate 2. FIG. 3 is a cross-sectional view showing a state in which an underfill is injected into the connection portion and the surrounding area after the functional element 1 having the basic structure according to the present invention is mounted on the substrate 2. FIG. 4 is an enlarged cross-sectional view of a half of the state before the functional element 1 having the basic structure according to the present invention is mounted on the substrate 2. FIG. 5 is an enlarged cross-sectional view of a half of the state before the functional element 1 having the basic structure according to the present invention is mounted on the substrate 2. FIG. 6 is an enlarged cross-sectional view of a half of the state after the functional element 1 having the basic structure according to the present invention is mounted on the substrate 2. FIG. 7 is an enlarged cross-sectional view of a half of the state after the functional element 1 having the basic structure according to the present invention is mounted on the substrate 2. FIG. 8 is a plan view of the substrate 2 side before connection according to the present invention as seen from above. FIG. 9 is a plan view of the substrate 2 side before connection according to the present invention as seen from above. FIG. 10 is a binary equilibrium diagram for explaining the composition range of Bi—Sn solder according to the present invention. FIG. 11 is a diagram showing Example 2 of the present invention. FIG. 12 is a diagram showing Example 2 of the present invention. FIG. 13 is a diagram showing Example 3 of the present invention. FIG. 14 is a diagram showing Example 4 of the present invention. FIG. 15 is a diagram showing Example 4 of the present invention. FIG. 16 is a cross-sectional view before the substrate 17 is connected to the substrate 2 according to the sixth embodiment of the present invention and the functional element 1 is mounted on the substrate 17. FIG. 17 is a three-dimensional view of the substrate 17 sandwiched between the functional element 1 and the substrate 2 according to the sixth embodiment of the present invention and the conductor layer 21 and the conductor layer 22 formed on the main surface of the substrate 17 as seen from the oblique direction. is there. FIG. 18 is a cross-sectional view after the substrate 17 is connected to the substrate 2 according to the sixth embodiment of the present invention and the metal wire is formed after the functional element 1 is mounted on the substrate 17. FIG. 19 is a diagram showing Example 7 of the present invention. FIG. 20 is a diagram showing Example 7 of the present invention. FIG. 21 is a diagram showing Example 7 of the present invention.

  Embodiments of a functional element mounting method and a functional element substrate mounting structure in which a functional element is mounted on a substrate according to the present invention will be described below with reference to FIGS.

  A flexible substrate for mounting a semiconductor chip such as a high-power and large-sized optical element according to a first embodiment of the present invention will be described with reference to FIGS. FIG. 1 is a cross-sectional view before a functional element 1 such as an optical element is mounted on a substrate 2. FIG. 2 is a cross-sectional view after the functional element 1 such as an optical element is mounted on the substrate 2. FIG. 3 is a view in which an underfill is poured around the connection portion after the functional element 1 such as an optical element is mounted on the substrate 2. 4 and 5 are enlarged views before the functional element 1 such as the optical element of FIG. 1 is connected to the substrate 2. 6 and 7 are enlarged views after the functional element 1 such as the optical element of FIG. 1 is connected to the substrate 2, and FIGS. 4 and 6 correspond to FIGS. 5 and 7, respectively. 8 and 9 are views of the substrate 2 side before connection as seen from above in a plan view.

  For example, when a surface emitting optical element (semiconductor laser) containing GaAs as a main component is used as the functional element 1, a resin such as polyimide or liquid crystal polymer is used for the base material 3 constituting the substrate 2, and the waveguide layer 4 is used for the functional element 1. When the optical waveguide mode is multimode compatible, a resin such as a UV epoxy resin is used, which is preferable because it has low optical loss, can transmit a high-speed optical signal, and has good bending characteristics.

  The optical element is not limited to GaAs, but can be applied to GaN, InGaN, and the like. Then, Cu or Au is used as the conductor layer 5 in order to transmit power from the outside to the optical element on the main surface side of the substrate 2 on which the optical element as a functional element is mounted (mounted) and to dissipate heat generated from the optical element. And a metal made of Cu or Au.

  A conductor layer 6 for preventing oxidation of the principal surface of the conductor layer 5 is formed on at least a part of the principal surface of the conductor layer 5 where an optical element as a functional element is mounted. For the conductor layer 6, oxidation can be prevented by using Au, Ni, and metals of Ni and Au (hereinafter referred to as Ni / Au) in order from the main surface side of the conductor layer 5.

  On the conductor layer 6, it is possible to improve the heat dissipation of the connection part after connection to at least a part where the optical element as a functional element is mounted and to prevent Bi from Sn-Bi solder from contacting the conductor layer 5. For the purpose, Cu and Cu alloy are formed as the concavo-convex conductor layer 7.

  When the concavo-convex conductor layer 7 is formed of Cu, the height of the concavo-convex shape to be formed is at least 2 μm, which is clearly higher than the surface roughness of the substrate 3, the conductor layer 5, and the conductor layer 6, In the highest place, the volume of the solder involved in the connection can be sufficiently secured by setting it to 10 μm or less which is the same as the highest 10 μm in the height of the solder.

  However, the type of the conductor layer may be Al, Au, or Ag metal. In addition, the uneven shape may be a quadrangle, a triangle, or the same effect as long as the unevenness having a thickness of about 2 to 10 μm is formed. A conductive layer 8 such as Ni / Au is formed on at least a part of the conductive layer 7 in order from the main surface side of the conductive layer 7 in order to prevent oxidation of the main surface of the conductive layer 7.

  When the conductor layer 8 is formed of Ni / Au, Ni can have a thickness of about 0.05 to 5 μm, and Au can have a thickness of about 0.05 to 5 μm. However, the kind of conductor layer and the number of layers are not limited to this. Further, solder 9 is formed on at least a part of the conductor layer 8. The solder 9 must be a thin film solder.

  The reason for this is that when the functional element 1 is an optical element, (1) if the solder is thick, the volume of the solder will increase due to volume expansion of the solder after connection and diffusion of atoms after connection. The amount of misalignment increases and the optical axis shifts. (2) Solder adheres to the side of the optical element due to an increase in the amount of solder flowing out of the connection during melting, and the characteristics of the optical element deteriorate. And (3) obtaining high heat dissipation by thinning a solder having a relatively low thermal conductivity. The thickness of the thin film solder 9 is preferably about 1 μm to 10 μm.

  The composition of the thin film solder 9 is, for example, Bi—Sn solder (melting point 139 ° C.), Sn—Ag—Bi solder (melting point 138 ° C.), or Sn—Zn—Bi solder (melting point 197 ° C.) as described later. Or eutectic composition such as Sn—Ag—In—Bi solder (melting point 205 to 214) or In—Bi—Sn solder (melting point 60 ° C.) is preferable, but not necessarily limited to the eutectic composition. However, it is only necessary to obtain a desirable connection state even if there is some deviation from the eutectic composition.

  Ti, Pt, Au (hereinafter referred to as Ti / Pt / Au) or Ti / Ni as adhesion layer / diffusion prevention layer / electrode layer in order from the main surface side on the main surface of the substrate 10 constituting the functional element 1. Semiconductor chip side conductor layer 11 such as / Au and Cr / Ni / Au is formed.

  When the functional element side conductor layer 11 is formed of Ti / Pt / Au, Ti can be about 0.1 μm thick, Pt can be about 0.2 μm thick, and Au can be about 0.05 μm to 5 μm thick. However, the kind of the conductor layer, the number of layers, and the thickness are not limited to this, and need not be the same as those of the functional element side conductor layer 11. An Au layer 12 is formed on a part of the conductor layer 11 on the main surface of the substrate 10 forming the optical element. The thickness of the Au layer 8 is preferably about 0.05 μm to 5 μm in order to improve the wettability with the solder 9.

  By the way, as shown in FIGS. 4 and 5, the solder 9 formed on at least a part of the main surface of the conductor layer 8 before connection is connected to the functional element 1 in the concavo-convex conductor layer 7. It is not formed outside the convex part formed on the outermost part of the region. By forming the solder 9 in this manner, as shown in FIGS. 6 and 7, Bi, which is a component of the solder 9 existing in the connection portion after connection, does not contact the conductor layer 5.

  When Bi, which is a component of the solder 9 in the connection portion, contacts the conductor layer 5, Bi, which is a component of the solder 9, diffuses into the conductor layer 5, so that a Kirkendall void is formed in the region where the Bi of the connection portion exists. The connection strength and heat dissipation of the connection part are reduced.

  The uneven conductor layer 7 and the conductor layer 8 formed on the main surface side of the substrate 2 as shown in FIGS. 8 and 9 in order to prevent Bi, which is a component of the solder 9 in the connecting portion, from contacting the conductor layer 5. The direction of the concavo-convex shape is determined so that only the convex portion 14 formed in the functional element connection region 13 in the formation region faces the conductor layer 5 side. A region other than the conductor layer 5 in contact with the functional element connection region 13 is a base material 3 constituting the substrate 2. The base material 3 here should just be a material with good flexibility other than a metal.

  Next, the outline of the conductive layer forming process formed on the main surface side of the substrate 2 according to the present invention will be described. First, substrate-side conductor layers 5 and 6 serving as electrodes are formed on the main surface of the base material 3 constituting the substrate 2 by a semiconductor process using a photolithography technique.

  Next, the process proceeds to formation of the uneven conductor layer 7. The conductor layer 7 and the conductive layer 8 are formed by first forming a state in which the conductor layer 7 and the conductive layer 8 do not have an uneven shape by a semiconductor process using a photolithography technique in the same manner as the conductor layers 5 and 6. The uneven shape is formed by applying technology, nanoimprint technology or wet etching using a solution.

  Next, the process moves to the formation of the solder 9. The solder 9 is formed by vapor deposition, sputtering, plating, or the like, and two processes can be roughly applied. The first process is a process of forming a solder part after forming a mask pattern and removing an excess solder part. For example, lift-off using a resist pattern or film formation using a metal mask is applicable.

  The second process is a process in which a solder film is first formed by vapor deposition, sputtering, etc., a mask pattern is formed thereon, and an excess solder film is removed by etching. As the removal process, dry etching such as milling or wet etching using a solution can be applied. Further, as another process, it is conceivable to form the solder 9 on the substrate side conductive layer 8 by a plating method.

  This technique is effective for a solder having a relatively low melting point mixed with Bi (a solder whose melting point does not exceed 200 ° C.). The Sn-Bi thin film solder will be described as a representative of a solder having a relatively low melting point. Sn-Bi has a connection temperature of about 160 ° C. to 200 ° C., and is suitable for connection of materials having an organic substance with a low melting point. The Sn—Bi solder to be used is defined as a composition range including a eutectic, that is, a Bi concentration of 21 wt% or more and 99.9 wt% or less.

  FIG. 10 is a Bi-Sn binary equilibrium diagram. First, it turns out that a liquid phase produces | generates at 139 degreeC by making Bi density | concentration 21 wt% or more. Next, it can be seen from FIG. 10 that the Bi—Sn eutectic melted at 139 ° C. has Bi up to 99.9 wt%. The connection temperature is generally selected to be about 20 ° C. to 40 ° C. of the melting point, and about 50 ° C. if it is slightly higher.

  Therefore, for a Bi-Sn solder that melts at 139 ° C., for example, a typical connection temperature of 160 ° C. to 180 ° C. and a slightly higher temperature such as 200 ° C. can be said to be relatively low. As a result, a functional element can be connected on the substrate 2 having an organic material having a low melting point.

  In the present invention, after the connection, as shown in FIG. 3, the entire connection portion may be molded with the resin 15, but it is not essential to mold with the resin 15. The case where the functional element is composed of an optical element has been described above, but the present invention can be applied to general functional elements such as a photodiode other than the optical element.

  Next, a second embodiment according to the present invention will be described with reference to FIGS. The second embodiment is different from the first embodiment in that the solder 9 is not formed on the substrate 2 side, but the conductor layer 11 formed on the main surface of the substrate 10 constituting the functional element 1. This is the case when formed above. The kind of the conductor layer 11 and the number of layers are as described in the first embodiment. By forming the solder 9 in this manner, when an oxide film is formed on the surface of the solder 9 at the time of connection, the solder is formed by breaking through at least a part of the oxide film with the uneven conductor layers 7 and 8. The wettability of No. 9 is improved, and a good connection part with good wettability can be obtained. Also in such a second embodiment, after connection, the connecting portion does not contact the conductor layer 5 as shown in FIG.

  Next, a third embodiment according to the present invention will be described with reference to FIGS. The third embodiment is different from the first embodiment in that the concave-convex conductor layer is not formed on the substrate 2 side but formed on the functional element 1 side. In this case, the uneven conductor layers 7 and 8 are formed on the conductor layer 11, and the solder 9 is formed on the conductor layer 8. The film thickness and the number of layers of these conductor layers are as described in the first embodiment.

  When an oxide film is formed on the surface of the solder 9 at the time of connection, the wettability of the solder 9 is improved by breaking through at least a part of the oxide film with the concavo-convex conductor layers 7 and 8, and the wetness is good. A good connection can be obtained. Also in the second embodiment as described above, as shown in FIG. 14, the connection portion does not come into contact with the conductor layer 5 after connection.

  Next, a fourth embodiment according to the present invention will be described with reference to FIG. The fourth embodiment is different from the first to third embodiments in the case of using bump-shaped solder or metal 16 instead of using solder 9 for connection. Also in the fourth embodiment, the wettability of the solder 9 is improved by breaking through at least a part of the oxide film by the concave and convex conductor layers 7 and 8 at the time of connection, and good wettability is achieved. A connection can be obtained. Further, after the connection, the connecting portion does not contact the conductor layer 5.

  Next, a fifth embodiment according to the present invention will be described. In the fifth embodiment, an Ag film or Au film is further formed on the surface of the solder 9 described in the first to fourth embodiments. When an Ag film is formed, the surface of the Ag film is further increased. An Au film is formed on the surface to prevent oxidation of the solder surface. The Ag film has a thickness of about 0.1 μm and exhibits anti-oxidation ability, and is an effective technique particularly for a non-flux connection process. However, formation of an Ag film or Au film is not essential. For example, it may not be necessary to form an Ag film or an Au film when a flux can be used or when a good connection can be made without preventing the solder surface from being oxidized.

  As described above, according to the fifth embodiment, it is not necessary to apply a flux that works to improve the wettability of the solder to the solder or to clean the flux. It is possible to prevent the functional element from deteriorating characteristics and to prevent the electronic component from being damaged by corroding the wiring portion due to the flux residue.

  Next, a sixth embodiment according to the present invention will be described with reference to FIGS. FIG. 16 is a cross-sectional view before the substrate 17 is connected to the substrate 2 and the functional element 1 is mounted on the substrate 17.

  FIG. 17 is a three-dimensional view of the substrate 17 sandwiched between the functional element 1 and the substrate 2 and the conductor layer 21 and the conductor layer 22 formed on the main surface of the substrate 17 as seen from the oblique direction.

  FIG. 18 is a cross-sectional view after the metal wire is formed after the substrate 17 is connected to the substrate 2 and the functional element 1 is mounted on the substrate 17. The sixth embodiment is different from the first to fourth embodiments in that the substrate 17 is sandwiched between the functional element 1 and the substrate 2, the functional element 1 is connected to one side of the substrate 17, and the substrate This is a case where the substrate 2 is connected to a surface opposite to the surface to which the functional element 1 is connected among the 17 surfaces.

  The conductor layer 21 is formed on a part of the main surface of the substrate 17 on the side connected to the functional element 1, and the solder 19 is formed on at least a part of the conductor layer 21. A conductor layer 22 is formed on a part of the main surface of the substrate 17 on the side to which the substrate 2 is connected.

  The main surface of the substrate 17 on the side to which the functional elements are connected is, in order from the main surface side, adhesion layer / diffusion prevention layer / electrode layer / diffusion prevention layer / Ti / Pt / Au / Pt / Au or Ti / A semiconductor chip side conductor layer 21 such as Ni / Au / Pt / Au, Ti / Ni / Au / Ni / Au, Cr / Ni / Au / Pt / Au, Cr / Ni / Au / Ni / Au is formed.

  When the functional element side conductor layer 21 is formed of Ti / Pt / Au / Pt / Au, Ti is about 0.1 μm, Pt is about 0.2 μm to 0.4 μm, and Au is about 0.05 μm to 5 μm. It can be. However, the kind of conductor layer, the number of layers, and the thickness are not limited to this. The board | substrate 2 side conductor layer 22 is the same kind and layer as the conductor layer 11 of Example 1. FIG. As the solder 19 formed on the main surface of the conductor layer 21, a solder having a thermal conductivity of 9 or more is used. The conductor layers 5, 6, 7, 8, and 11, the kind of solder 9, and the number of layers are as described in the first embodiment.

  As shown in FIG. 17, in the sixth embodiment, a through hole 25 is provided in a part of the substrate 17 that is sandwiched between the functional element 1 and the substrate 2.

  As shown in FIG. 18, the substrate 17 is connected to the substrate 2, and after the functional element 1 is connected to the substrate 17, the conductor layer 5 formed on the main surface of the substrate 2 and the main surface of the substrate 17 are formed by the metal wires 24. The conduction of the conductor layer 21 is ensured. Au is used for the metal wire, but Al or Cu may be used in addition to Au.

  In the sixth embodiment according to the present invention, by sandwiching the second substrate, it is possible to improve the heat dissipation of the connecting portion connecting the functional element and the substrate and to reduce the difference in the coefficient of thermal expansion.

  Further, in the sixth embodiment according to the present invention, by providing the through hole 25 in the second substrate 17, the light from the functional element 1 such as an optical element is allowed to pass through the second substrate 17 and the first substrate 17. To the waveguide layer 4 of the substrate 2.

  Next, a seventh embodiment according to the present invention will be described with reference to FIGS. FIG. 19 is a cross-sectional view before the substrate 17 is connected to the substrate 2 and the functional element 1 is mounted on the substrate 17.

  FIG. 20 is a three-dimensional view of the substrate 17 sandwiched between the functional element 1 and the substrate 2 and provided with a through hole and the conductor layer 18 formed on the main surface of the substrate 17 as seen from the oblique direction.

  FIG. 21 is a cross-sectional view after the substrate 17 is connected to the substrate 2 and the functional element 1 is mounted on the substrate 17. In the seventh embodiment, as in the sixth embodiment, a through hole 25 is provided in a part of the substrate 17 sandwiched between the functional element 1 and the substrate 2, and the sixth embodiment The difference from the configuration is that the conductor layer 18 formed on the main surface of the substrate 17 is continuous from the surface connecting the functional element 1 of the substrate 17 to the side surface, and further continuing from the side surface to the surface connecting the substrate 2. is there.

  The conductor layer 18 is the same type and layer as the conductor layer 11 of the first embodiment. As the solder 19 formed on the main surface of the conductor layer 21, a solder having a thermal conductivity of 9 or more is used. The conductor layers 5, 6, 7, 8, and 11, the kind of solder 9, and the number of layers are as described in the first embodiment. The shape of the through hole 25 provided in a part of the substrate 17 may be a circle, a triangle, or a polygon such as a quadrangle, and the size thereof is not limited and may be within the plane of the substrate 17.

  In the seventh embodiment according to the present invention, by sandwiching the second substrate 17, the heat dissipation of the connecting portion connecting the functional element 1 and the substrate 2 is improved and the difference in thermal expansion coefficient is reduced. Can do.

  Further, in the seventh embodiment according to the present invention, by providing the through hole 25 in the second substrate 17, the light from the functional element 1 such as an optical element is allowed to pass through the second substrate 17 and the first substrate 17. To the waveguide layer 4 of the substrate 2.

  According to the present invention, it is possible to improve the heat dissipation of a connection portion where a functional element and a substrate are connected using Sn-Bi solder or the like having a relatively low connection temperature and a relatively low thermal conductivity.

  In addition, according to the present invention, after the functional element and the substrate are connected using Sn-Bi solder or the like, the connection portion and the conductive layer formed on the substrate and continuing to the region other than the connection portion are in contact with each other. By avoiding this, it is possible to suppress the formation of Kirkendall voids formed in the connection portion due to diffusion of Bi into the conductive layer.

  Further, according to the present invention, the uneven conductive layer on the substrate breaks the oxide film formed on the solder surface at the time of connection with the functional element and realizes good connection with good wettability. The present invention may be particularly applicable to the following fields.

  When connecting a functional element on a substrate containing an organic material having a low melting point, solder having a connection temperature of about 300 ° C. such as Au—Sn solder cannot be used because the organic material deteriorates.

  Therefore, a candidate example is Sn-Bi solder having a relatively low connection temperature. Sn-Bi has poor heat dissipation compared to Au-Sn solder. In addition, when connecting with Sn-Bi solder, if the connecting portion is in contact with the metal of Cu or Au, Bi of the connecting portion diffuses out of the connecting portion, and Kirkendal is in the region where Bi was present. A void is formed.

  Therefore, an uneven conductor layer having better heat dissipation than Sn-Bi solder is formed, and the heat dissipation is improved by reducing the proportion of Sn-Bi solder in the connection portion, and the connection portion and Cu are formed by the uneven conductor layer. Further, by preventing the Au metal from coming into contact with the metal, heat dissipation is good and a good connection portion can be obtained. Thus, this technique is necessary when it is necessary to connect at a relatively low temperature.

DESCRIPTION OF SYMBOLS 1 Functional element 2 Board | substrate 3 Base material which comprises the board | substrate 2 4 Waveguide layer 5 1st conductor layer (board | substrate 2 side)
6 Second conductor layer (board 2 side)
7 Concave and convex third conductor layer (1)
8 Concave and convex third conductor layer (2)
9 Solder 10 Substrate (functional element side)
11 Conductor layer (functional element side)
12 Au layer 13 Functional element connection area 14 Convex part which is in contact with first conductor layer 15 Resin 16 Bump 17 Second substrate 18 Conductor layer 19 Solder 21 Conductor layer (functional element side)
22 Conductor layer (board 2 side)
23 Au layer 24 Metal wire 25 Through-hole 201 Bi-Sn coexistence region 202 Sn / liquid phase coexistence region 203 Bi / liquid phase coexistence region

Claims (18)

A functional element mounting method for mounting and mounting a functional element on a substrate having a conductor layer using solder,
A conductor layer forming step of forming a first conductor layer on at least a part of a region on which the functional element is mounted on the main surface side of the substrate on which the functional element is mounted;
A conductor layer forming step of forming a second conductor layer on at least a part of the first conductor layer;
A conductor layer forming step of forming an uneven third conductor layer on at least a portion of the second conductor layer;
In the third conductor layer, solder is formed on at least part of the inside of the region to which the functional element is connected rather than the highest portion of the convex portion formed on the outermost side of the region to which the functional element is connected. A solder forming process,
A connecting step of melting the solder and connecting the functional element to the third conductor layer on the main surface side of the substrate;
A connecting step in which the melted solder is blocked by the third conductor layer to form a connection portion that does not contact the first conductor layer, and
The function element mounting method, wherein the connection portion does not contact the first conductor layer.   2. The functional element mounting method according to claim 1, further comprising a fourth conductor layer connected to the solder in the connecting step on at least a part of the main surface side of the functional element.   3. The function according to claim 1, wherein, in the conductor layer forming step of forming the concave-convex third conductor layer, the height of the concave-convex shape to be formed is 2 μm to 10 μm at the highest position. Element mounting method.   4. The connection portion is formed by a reaction between Au and a solder component by pressing an Au layer or an Au bump previously formed on the functional element against the melted solder in the connecting step. 5. The functional element mounting method according to any one of the above.   The conductor layer forming step of forming the concave-convex third conductor layer is characterized in that the plurality of conductor layers constituting the concave-convex-shaped third conductor layer are metal materials. 4. The functional element mounting method according to any one of 3 above.   In the conductor layer forming step of forming the third conductor layer having an uneven shape, the material constituting the third conductor layer is Cu or Cu alloy, Al or Al alloy, Ni or Ni alloy metal, or Au or Au. 4. The functional element mounting method according to claim 1, wherein the functional element mounting method is an alloy.   In the solder formation step, the solder to be formed is Bi-Sn, Sn-Ag-Bi, Sn-Zn-Bi, Sn-Ag-In-Bi, In-Bi, or the like containing Bi. The method for mounting a functional element according to claim 1, wherein:   The solder formed in the solder forming step is Bi-Sn solder or Sn-Ag-Bi solder, and the concentration of Bi is 21% or more and 99.9% or less. 4. The functional element mounting method according to any one of 1 to 3.   In the solder formation step, Bi—Sn, Sn—Ag—Bi, Sn—Zn—Bi, Sn—Ag—In—Bi, In—Bi, or the like formed on the solder surface containing Bi, Ag, Au or 4. The functional element mounting method according to claim 1, wherein a film formed by laminating Ag and Au is formed.   10. The function according to claim 9, wherein in the solder formation step, a film configured by stacking the Ag, Au, or Ag and Au is formed on the surface of the solder by vapor deposition, sputtering, or plating. Element mounting method.   11. The functional element mounting method according to claim 1, wherein the substrate to which the functional element is connected by the solder is a flexible substrate having an organic material having a heat resistant temperature of 200 ° C. or less. Functional element mounting method.   The functional element mounting method according to claim 1, wherein a second substrate is sandwiched between the functional element and the substrate. A functional element mounting substrate in which a functional element is connected and mounted on a substrate having a conductor layer using solder,
A first conductor layer formed on at least a part of a region on which the functional element is mounted on the main surface side of the substrate on which the functional element is mounted;
A second conductor layer formed on at least a part of the first conductor layer;
An uneven third conductor layer formed on at least a part of the second conductor layer;
The third conductor layer is formed on at least a part of the inner side of the region to which the functional element is connected than the highest portion of the convex portion formed on the outermost side of the region to which the functional element is connected. With solder,
The solder is melted, the functional element is mounted in connection with the third conductor layer on the main surface side of the substrate, and the melted solder is dammed up by the third conductor layer to be the first A connection portion that does not contact the conductor layer of
The functional element mounting substrate, wherein the connection portion does not contact the first conductor layer.   14. The functional element mounting board according to claim 13, wherein the connected solder is not in contact with the third conductor layer.   15. The functional element mounting substrate according to claim 13, further comprising a second substrate sandwiched between the functional element and the substrate.   16. The functional element mounting substrate according to claim 13, wherein a fourth conductor layer is formed on at least a part of a surface of the second substrate on which the functional element is mounted and a surface in contact with the substrate. A functional element mounting board, wherein solder is formed on at least a part of the fourth conductor layer.   17. The functional element mounting substrate according to claim 13, wherein the solder formed on the side to which the functional element of the second substrate is connected is formed on the side to which the functional element is not connected. A functional element mounting board characterized by having a higher thermal conductivity than solder.   The functional element mounting substrate according to claim 13, wherein a through hole is formed in a part of the second substrate.

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