JP2010161915A - Switching control circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To change over a rectification system during a switching regulator operation without influencing over an output voltage. <P>SOLUTION: A switching control circuit is constituted of a driving-signal generating circuit, and a rectification switching circuit. The driving-signal generating circuit generates the drive signal to turn a power-side transistor intermittently on and off in accordance with a duty cycle to generate the output voltage of a target level, wherein power-side transistor has an input electrode with an input voltage applied thereto and an output electrode connected to a ground-side transistor, a cathode in a rectifier diode, and an inductor. The rectification switching circuit changes a rectifying system at the timing that the power-side transistor is turned on by the drive signal when a switching signal changes to switch a rectifying system in the case that the power-side transistor is changed from on to off, to a synchronous rectifying system to be rectified through the ground-side transistor or a diode-rectifying system to be rectified through the rectifier diode. <P>COPYRIGHT: (C)2010,JPO&amp;INPIT

Description

  The present invention relates to a switching control circuit.

  In various electronic devices, a switching regulator for generating an output voltage of a target level from an input voltage is used. Generally, two methods are used as a rectification method for the switching regulator. One rectification method is a method in which the current of the inductor is controlled by complementaryly turning on and off the power supply side transistor and the ground side transistor connected in series, and is called a synchronous rectification method. Another rectification method is a method in which a rectification diode is provided on the ground side instead of a transistor, and the current of the inductor is controlled via the rectification diode while the power supply side transistor is off. to be called.

  In general, since the power loss due to the ground-side transistor is smaller than the power loss due to the rectifying diode, the synchronous rectification method can perform more efficient switching. However, when the switching is performed by the synchronous rectification method in the case of a light load, the efficiency may be reduced on the contrary, for example, a current flows backward from the inductor to the ground side transistor. Therefore, a switching regulator that can switch the rectification method according to the state of the load may be used (for example, Patent Document 1).

  FIG. 4 is a diagram illustrating a general configuration example of a switching regulator capable of switching the rectification method. In the switching regulator 100, an N-channel MOSFET 112 and a rectifying diode D that are ground-side transistors are connected to a P-channel MOSFET 110 that is a power-side transistor to which an input voltage Vin is applied.

  In the case of the synchronous rectification method, the switching signal SW becomes L level, and the signal DRV_L input to the gate of the N-channel MOSFET 112 changes according to the PWM signal output from the PWM (Pulse Width Modulation) signal generation circuit 114. . That is, when the P-channel MOSFET 110 and the N-channel MOSFET 112 are turned on and off complementarily according to the PWM signal, the current of the inductor L is controlled so that the output voltage Vout becomes the target level. In the case of the diode rectification method, the switching signal SW becomes H level, the signal DRV_L input to the gate of the N-channel MOSFET 112 is fixed at L level regardless of the PWM signal, and the N-channel MOSFET 112 is kept off. Therefore, when the P-channel MOSFET 110 changes from on to off according to the PWM signal, a current flows through the inductor L through the rectifying diode D.

JP 2006-166667 A

  By the way, in the switching regulator 100, when the switching signal SW changes according to the state of the load, the rectification method also changes immediately. Therefore, depending on the switching timing, the rectification period of the N-channel MOSFET 112 or the rectification diode D may not be a predetermined period according to the target level of the output voltage Vout, and may affect the output voltage Vout. .

  For example, in the example shown in FIGS. 5 and 6, the PWM signal generation circuit 114 changes the PWM signal so that the P-channel MOSFET 110 is turned on at the rising timing of the clock signal CLK having a predetermined frequency output from the oscillation circuit 116. I am letting. The PWM signal generation circuit 114 controls the pulse width of the PWM signal, that is, the on / off duty ratio of the P-channel MOSFET 110 and the N-channel MOSFET 112 so that the feedback voltage Vfb corresponding to the output voltage Vout becomes the reference voltage Vref. ing.

  In the example shown in FIG. 5, first, the switching signal SW is at the L level, and synchronous rectification is performed by complementary ON / OFF of the P-channel MOSFET 110 and the N-channel MOSFET 112. Thereafter, when the switching signal SW changes from the L level to the H level during the period in which the PWM signal is at the H level, the signal DRV_L input to the gate of the N-channel MOSFET 112 immediately becomes the L level and shifts to diode rectification. Therefore, as shown in FIG. 5, at the timing when the synchronous rectification method is switched to the diode rectification method, the ON period of the N-channel MOSFET 112 is shorter than the predetermined period corresponding to the reference voltage Vref. As a result, the output voltage Vout may fluctuate.

  In the example shown in FIG. 6, first, the switching signal SW is at the H level, and diode rectification is performed by the P-channel MOSFET 110 and the rectifying diode D. Thereafter, when the switching signal SW changes from the H level to the L level during the period in which the PWM signal is at the H level, the signal DRV_L input to the gate of the N-channel MOSFET 112 immediately changes in conjunction with the PWM signal, Transition to synchronous rectification. Therefore, as shown in FIG. 6, the ON period of the N-channel MOSFET 112 is shorter than the predetermined period corresponding to the reference voltage Vref at the timing when the diode rectification method is switched to the synchronous rectification method.

  Therefore, the switching regulator 100 sometimes cannot switch the rectification method during operation without affecting the output voltage Vout.

  The present invention has been made in view of the above problems, and an object of the present invention is to switch the rectification method during the operation of the switching regulator without affecting the output voltage.

  To achieve the above object, in a switching control circuit according to one aspect of the present invention, an input voltage is applied to an input electrode, and an output electrode is connected to a ground side transistor, a cathode of a rectifying diode, and an inductor. A drive signal generation circuit for generating a drive signal for intermittently turning on and off the power supply side transistor at a duty ratio for generating an output voltage of a target level, and rectification when the power supply side transistor is turned from on to off When the switching signal for switching the method from the synchronous rectification method performed through the ground side transistor to the diode rectification method performed through the rectifying diode changes, the timing at which the power supply side transistor is turned on by the drive signal And a rectification switching circuit for switching the rectification method.

  The rectification method can be switched during the operation of the switching regulator without affecting the output voltage.

It is a figure which shows the structure of the switching regulator containing the switching control circuit which is one Embodiment of this invention. It is a timing chart which shows an example of the operation | movement switched from a synchronous rectification system to a diode rectification system. It is a timing chart which shows an example of the operation | movement switched from a diode rectification system to a synchronous rectification system. It is a figure which shows the general structural example of the switching regulator which can switch a rectification system. It is a timing chart which shows an example of the operation | movement switched from a synchronous rectification system to a diode rectification system. It is a timing chart which shows an example of the operation | movement switched from a diode rectification system to a synchronous rectification system.

  FIG. 1 is a diagram showing a configuration of a switching regulator including a switching control circuit according to an embodiment of the present invention. The switching regulator 10 includes a P-channel MOSFET 12, an N-channel MOSFET 14, an error amplifier 20, an oscillation circuit (OSC) 22, a PWM (Pulse Width Modulation) signal generation circuit 24, a D-type flip-flop (D-FF) 26, a NOT circuit 28, The circuit includes a NOR circuit 30, buffers 32 and 34, a rectifying diode D, an inductor L, a capacitor C, and resistors R1 and R2. In the switching regulator 10, the error amplifier 20, the oscillation circuit 22, the PWM signal generation circuit 24, the D-FF 26, the NOT circuit 28, the NOR circuit 30, and the buffers 32 and 34 constitute a switching control circuit.

  The P-channel MOSFET 12 (power supply side diode) and the N-channel MOSFET 14 (ground side diode) are connected in series, and the input voltage Vin is applied to the source of the P-channel MOSFET 12. A rectifying diode D is provided in parallel with the N-channel MOSFET 14. One end of the inductor L is connected to the drain of the P-channel MOSFET 12, and the other end of the inductor L is connected to one end of the capacitor C. Therefore, with the P-channel MOSFET 12 on and the N-channel MOSFET 14 off, current flows from the P-channel MOSFET 12 to the inductor L, the capacitor C is charged, and the output voltage Vout rises. When the P-channel MOSFET 12 changes from on to off, in the case of the synchronous rectification method, the N-channel MOSFET 14 is turned on, and the current that the inductor L keeps flowing flows through the N-channel MOSFET 14, and in the case of the diode rectification method The N-channel MOSFET 14 is kept off, and a current flows through the rectifying diode D.

  The error amplifier 20 amplifies and outputs an error between the feedback voltage Vfb obtained by dividing the output voltage Vout by the resistors R1 and R2 and the reference voltage Vref corresponding to the target level of the output voltage Vout. The PWM signal generation circuit 24 (drive signal generation circuit) changes the PWM signal (drive signal) based on the output of the error amplifier 20 so that the feedback voltage Vfb becomes equal to the reference voltage Vref. In the present embodiment, the PWM signal generation circuit 24 changes the PWM signal so that the P-channel MOSFET 12 is turned on at the rising timing of the clock CLK having a predetermined frequency output from the oscillation circuit 22. When the output voltage Vout is increased, the PWM signal generation circuit 24 changes the pulse width of the PWM signal so that the P-channel MOSFET 12 is turned on, that is, the on-duty is increased. When the output voltage Vout is lowered, the PWM signal generation circuit 24 changes the pulse width of the PWM signal so that the on-duty of the P-channel MOSFET 12 becomes small.

  The D-FF 26 changes the selection signal SEL for selecting the rectification method so that the rectification method is switched at the timing when the P-channel MOSFET 12 is turned on by the PWM signal based on the switching signal SW instructing switching of the rectification method. Specifically, the switching signal SW is input to the data input terminal D, the clock signal CLK is input to the clock input terminal C, and the signal output from the data output terminal Q is the selection signal SEL. Therefore, after the switching signal SW changes, the selection signal SEL changes at the rising timing of the clock signal CLK. The switching signal SW may be input from an external device such as a microcomputer, or the switching regulator 10 itself may determine the weight of the load, and the switching signal SW may be generated based on the determination result.

  A PWM signal is input to the NOR circuit 30 via the NOT circuit 28 and a selection signal SEL is input. Therefore, the signal DRV_L output from the NOR circuit 30 changes according to the PWM signal when the selection signal SEL is at the L level, and is maintained at the L level regardless of the PWM signal when the selection signal SEL is at the H level. . The PWM signal is input to the gate of the P-channel MOSFET 12 via the buffer 32, and the signal DRV_L is input to the gate of the N-channel MOSFET 14 via the buffer 34. Therefore, when the selection signal SEL is at the L level, the P channel MOSFET 12 is turned on and the N channel MOSFET 14 is turned off during the period when the PWM signal is at the L level, and the P channel MOSFET 12 is turned off during the period when the PWM signal is at the H level. The channel MOSFET 14 is turned on. When the selection signal SEL is at the H level, the P-channel MOSFET 12 is turned on / off in the same manner as when the selection signal SEL is at the L level, but the N-channel MOSFET 14 remains off.

  A circuit constituted by the D-FF 26, the NOT circuit 28, and the NOR circuit 30 is an example of the rectification switching circuit of the present invention. Further, the D-FF 26 is an example of the selection signal generation circuit of the present invention, and the circuit constituted by the NOT circuit 28 and the NOR circuit 30 is an example of the ground side transistor drive circuit of the present invention.

  Next, the switching operation of the rectification method in the switching regulator 10 will be described. 2 and 3 are timing charts showing an example of the switching operation in the switching regulator 10. FIG. In the example of FIG. 2, the selection signal SEL is L level in the initial state, and the signal DRV_L changes according to the PWM signal. That is, the rectification method is a synchronous rectification method, and the P-channel MOSFET 12 and the N-channel MOSFET 14 are turned on and off in a complementary manner. Thereafter, in order to switch the rectification method to the diode rectification method, it is assumed that the switching signal SW is changed to the H level during the period in which the PWM signal is at the H level. At this time, the selection signal SEL does not immediately change to the H level according to the switching signal SW, but the selection signal SEL changes to the H at the next rising edge of the clock signal CLK after the switching signal SW changes to the H level. Change to level. When the selection signal SEL changes to the H level, the N-channel MOSFET 14 is maintained in an off state, and a diode rectification method is adopted.

  Here, if the selection signal SEL immediately changes to the H level according to the switching signal SW, the period during which the N-channel MOSFET 14 is turned on at the timing of switching from the synchronous rectification method to the diode rectification method is the same as that in the synchronous rectification method. A pulse that is shorter than the predetermined period is generated. However, in this embodiment, the selection signal SEL changes to the H level at the rising timing of the clock signal CLK, so that a pulse shorter than a predetermined period does not occur. As a result, the switching regulator 10 can be switched from the synchronous rectification method to the diode rectification method without affecting the output voltage Vout.

  In the example of FIG. 3, the selection signal SEL is at the H level in the initial state, and the signal DRV_L is maintained at the L level regardless of the PWM signal. That is, the rectification method is a diode rectification method, and the P-channel MOSFET 12 is turned on / off according to the PWM signal, and rectification is performed via the rectification diode D during the period when the P-channel MOSFET 12 is off. Thereafter, in order to switch the rectification method to the synchronous rectification method, it is assumed that the switching signal SW changes to the H level during the period in which the PWM signal is at the H level. At this time, the selection signal SEL does not immediately change according to the switching signal SW, but the selection signal SEL changes to the L level at the next rising timing of the clock signal CLK after the switching signal SW changes to the L level. To do. When the selection signal SEL changes to the L level, the N-channel MOSFET 14 is turned on and off complementarily with the P-channel MOSFET 12 in accordance with the PWM signal, and the synchronous rectification method is adopted. Here again, as in the case of FIG. 2, a pulse shorter than a predetermined period is not generated at the switching timing of the rectification method, and it is possible to switch from the diode rectification method to the synchronous rectification method without affecting the output voltage Vout. It becomes.

  Thus, in the switching regulator 10 of this embodiment, when the switching signal SW changes, the rectification method is switched at the timing when the P-channel MOSFET 12 is turned on by the PWM signal. Thereby, the rectification method of the switching regulator 10 can be switched without affecting the output voltage Vout.

  Further, in the switching regulator 10 of the present embodiment, the PWM signal is controlled so that the P-channel MOSFET 12 is turned on at the rising timing of the clock signal CLK. Therefore, the selection signal SEL is changed at the rising timing of the clock signal CLK. Thus, the rectification method can be switched without affecting the output voltage Vout.

  In the switching regulator 10 of this embodiment, the selection signal SEL is changed at the rising timing of the clock signal CLK. However, the selection signal SEL may be changed at the timing when the PWM signal changes to the L level. . Such a configuration can be realized, for example, by inputting a signal obtained by inverting the PWM signal to the clock input terminal C of the D-FF 26 in the switching regulator 10 of FIG. Such a configuration can be applied even when the PWM signal generation circuit 24 generates a PWM signal without using the clock signal CLK by comparing the output of the error amplifier 20 with a triangular wave having a predetermined frequency. it can.

  In addition, the said embodiment is for making an understanding of this invention easy, and is not for limiting and interpreting this invention. The present invention can be changed and improved without departing from the gist thereof, and the present invention includes equivalents thereof.

10 Switching regulator 12 P-channel MOSFET
14 N-channel MOSFET
20 Error amplifier 22 Oscillation circuit 24 PWM signal generation circuit 26 D-type flip-flop 28 NOT circuit 30 NOR circuit 32, 34 Buffer D Rectifier diode L Inductor C Capacitor R1, R2 Resistance

Claims (4)

Input voltage is applied to the input electrode, and the output electrode is connected to the ground side transistor, the cathode of the rectifying diode, and the inductor. A drive signal generation circuit for generating a drive signal for turning on and off;
When the switching signal for switching the rectification method when the power supply side transistor is turned off from the synchronous rectification method performed via the ground side transistor to the diode rectification method performed via the rectification diode changes A rectification switching circuit that switches the rectification method at a timing when the power supply side transistor is turned on by the drive signal;
A switching control circuit comprising: The switching control circuit according to claim 1,
The rectification switching circuit is
When the switching signal changes, a selection signal generation circuit that changes a selection signal for selecting the synchronous rectification method or the diode rectification method at a timing when the power supply side transistor is turned on by the drive signal;
When the selection signal indicates selection of the synchronous rectification method, based on the drive signal, the ground side transistor is turned on / off complementarily with the power supply side transistor, and the selection signal indicates selection of the diode rectification method A ground side transistor drive circuit for turning off the power source side transistor regardless of the drive signal;
A switching control circuit comprising: The switching control circuit according to claim 2,
The drive signal generation circuit includes:
At a timing when the clock signal of a predetermined frequency changes from one logic level to the other logic level, the drive signal is changed so that the power supply side transistor is turned on,
The selection signal generation circuit includes:
Changing the selection signal at a timing when the clock signal changes from the one logic level to the other logic level;
A switching control circuit characterized by the above. The switching control circuit according to claim 2,
The selection signal generation circuit includes:
Changing the selection signal at a timing when the drive signal changes to a logic level that turns on the power-side transistor;
A switching control circuit characterized by the above.

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