JP2010160038A - Substrate to be inspected, method for manufacturing the same, and flaw inspecting device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve the problem that the false signal of the slight error or the like of extension magnification is suppressed using a method for detecting the case of non-coincidence as a fault in the comparison with an adjacent pattern but, since a repeating pattern, wherein the same pattern is repeated, is required in order to use this technique, the technique is not adapted to an object having an individual pattern such as an address number or the like and a pattern for using the technique is limited. <P>SOLUTION: Individual data is concealed by covering the data of an address number part 13 (individual pattern) with a shielding layer 20 having the same shape as the adjacent pattern and used a new repeating pattern 14A wherein the repeating pattern 14 and the address number part 13 are synthesized. The repeating pattern enables the highly precise detection of a flaw at a high speed. As a result, the flaw of a substrate to be inspected is rapidly detected with high precision even with respect to the pattern including the individual pattern. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a substrate to be inspected, a method for manufacturing the substrate to be inspected, and a defect inspection apparatus.

  Patterns such as organic electroluminescence (hereinafter referred to as “organic EL”) substrates, liquid crystal substrates, memory substrates and the like have regions where repeated patterns are used. As described in No. 1, there is known a method of detecting a case where they do not match as a defect as compared with an adjacent pattern. By using this method, it is possible to suppress a fake signal caused by a slight error in enlargement magnification, a positional deviation, a focus deviation, and the like, and to perform defect inspection with high accuracy.

JP-A-5-264464

  In order to use the technique shown in Patent Document 1, a repeated pattern in which the same pattern is repeated is required. For this reason, for example, the above-mentioned technique cannot be applied to a case where an inspection pattern or the like for examining the electrical characteristics or etching state by changing a part of the dimensions or the address number for repair is included. There is a problem that the patterns that can be used are limited. Therefore, it is desired to provide a substrate to be inspected that can extend the inspection range of the repeated pattern, a method for manufacturing the substrate to be inspected, and a defect inspection apparatus for the substrate to be inspected.

  SUMMARY An advantage of some aspects of the invention is to solve at least a part of the problems described above, and the invention can be implemented as the following forms or application examples. Here, “upper” is defined as “the normal direction of the substrate to be inspected, which is directed from the region sandwiched between the two surfaces of the substrate to be inspected to the surface on which the repeated pattern is formed”.

  Application Example 1 A substrate to be inspected according to this application example includes a repeated pattern, an individual pattern located in a region adjacent to the repeated pattern, and an island shape that covers the individual pattern and has a uniform shape, or A shielding layer having a series of shapes that covers the individual patterns and covers at least a part of the repetitive pattern, and the shielding layer recognizes a pattern using reflected light obtained by irradiating light. In this case, it is characterized by having a light shielding property for shielding the information of the individual patterns.

  According to this, it becomes possible to synthesize a shielding layer having a shape aligned with an adjacent individual pattern covering the individual pattern, and the repeated pattern and handle it as a new repeated pattern. The repetitive pattern can detect defects at high speed and with high accuracy. Therefore, it is possible to provide a substrate to be inspected that can detect a defect with high speed and high accuracy even for a pattern including an individual pattern. In this case, although the individual pattern is not inspected, there is no problem because the pattern accuracy required for the individual pattern is low. The individual pattern information can be obtained by confirming from the back side (surface opposite to the surface on which the shielding layer is formed) of the substrate to be inspected.

  Application Example 2 A substrate to be inspected according to this application example includes a repetitive pattern, an individual pattern positioned in a region adjacent to the repetitive pattern, and an island shape that covers the individual pattern and has a uniform shape, or A shielding layer having a series of shapes covering the individual pattern and covering at least a part of the repetitive pattern, wherein the shielding layer has a wavelength indicating a light reflectance capable of suppressing pattern recognition, and a pattern And an interference layer having a wavelength dependency including a wavelength exhibiting a light reflectance capable of being recognized.

  According to this, when the substrate to be inspected is observed at a wavelength that can suppress pattern recognition, it is recognized as a pattern of the shielding layer instead of the information of the individual pattern. Instead of the individual pattern information, it is possible to synthesize the pattern of the shielding layer covering the individual pattern and the repetitive pattern and to treat it as a new repetitive pattern. The repetitive pattern can detect defects at high speed and with high accuracy. Therefore, it is possible to provide a substrate to be inspected that can detect a defect with high speed and high accuracy even for a pattern including an individual pattern. In addition, when the substrate to be inspected is observed at a wavelength that enables pattern recognition, the individual pattern can be recognized, so that individual pattern information can be easily obtained.

  Application Example 3 A substrate to be inspected according to this application example includes a repetitive pattern and an individual pattern including an interference layer located in a region adjacent to the repetitive pattern, and the individual pattern suppresses pattern recognition. And an interference layer having a wavelength dependency including a wavelength indicating a light reflectivity that can be recognized and a wavelength indicating a light reflectivity capable of enabling pattern recognition.

  According to this, the individual pattern is configured by an interference layer having a wavelength dependency including a wavelength indicating a light reflectance capable of suppressing pattern recognition and a wavelength indicating a light reflectance capable of enabling pattern recognition. Yes. By using a wavelength indicating light reflectance that can suppress pattern recognition and appropriately setting a threshold value, instead of individual pattern information, the pattern of the shielding layer covering the individual pattern and the repetitive pattern Can be combined and handled as a new repeated pattern. Since repeated patterns can detect defects at high speed and with high accuracy, it is possible to provide a substrate to be inspected that can detect defects at high speed and with high accuracy even for patterns containing individual patterns. In this case, although the individual pattern is not inspected, there is no problem because the pattern accuracy required for the individual pattern is low. In addition, when the substrate to be inspected is observed at a wavelength that enables pattern recognition, the individual pattern can be recognized, so that individual pattern information can be easily obtained.

  Application Example 4 A method for manufacturing a substrate to be inspected according to this application example covers a step of manufacturing a repetitive pattern, a step of forming an individual pattern located in a region adjacent to the repetitive pattern, and the individual pattern. Forming a shielding layer having a series of shapes covering the individual patterns or covering at least a part of the repetitive pattern, and the shielding layer comprises: When irradiating incident light and recognizing a pattern using reflected light resulting from reflection of the incident light, the information of the individual pattern is shielded and has a light shielding property located in an upper layer than the individual pattern. It is characterized by being formed simultaneously with the region.

  According to this, since the shielding layer is formed at the same time as the region having the light shielding property, it becomes possible to manufacture the substrate to be inspected without increasing the number of steps.

  Application Example 5 A defect inspection apparatus according to this application example includes an imaging device that scans a substrate to be inspected on which a repetitive pattern is regularly arranged to capture the repetitive pattern, the repetitive pattern, and the repetitive pattern. A defect inspection apparatus comprising a comparing means for comparing matching repeating patterns, wherein the substrate to be inspected covers the repeating pattern, an individual pattern in a region adjacent to the repeating pattern, and the individual pattern, and has a shape. A shield layer having a uniform shape or a series of shapes covering the individual pattern and covering at least a part of the repetitive pattern, and the shield layer irradiates incident light, When the pattern is recognized using the reflected light resulting from the reflection of the incident light, it has a light shielding property to shield the information of the individual pattern. The information on the individual pattern is masked, the information on the individual pattern is shielded, the pattern is transferred to the repetitive pattern by being handled as the pattern of the shielding layer, and the defect inspection is performed as a new repetitive pattern. And

  According to this, the information of the individual pattern is shielded by the shielding layer. Therefore, instead of individual pattern information, it is possible to combine a pattern of a shielding layer having a shape aligned with an adjacent individual pattern covering the individual pattern and the repetitive pattern and handle it as a new repetitive pattern. The repetitive pattern can detect defects at high speed and with high accuracy.

  As described above, it is possible to provide a defect inspection apparatus capable of detecting a defect at high speed and with high accuracy by including a configuration capable of recognizing a pattern of an inspected substrate including an individual pattern as a new repetitive pattern. . In this case, although the individual pattern is not inspected, there is no problem because the pattern accuracy required for the individual pattern is low.

  Application Example 6 In the defect inspection apparatus according to the application example described above, when a defect is detected as a result of the defect inspection, individual pattern information is detected from the back surface of the substrate to be inspected. .

  According to the application example described above, it is possible to detect individual pattern information of a region where a defect has occurred. Since defects are usually detected with a very low frequency, the time required for inspection can be shortened even if the time required for individual pattern information detection is somewhat longer.

  Application Example 7 A defect inspection apparatus according to this application example includes an imaging device that scans a substrate to be inspected on which a repetitive pattern is regularly arranged to capture the repetitive pattern, the repetitive pattern, and the repetitive pattern. A defect inspection apparatus comprising a comparing means for comparing matching repeating patterns, wherein the substrate to be inspected is located in a region adjacent to the repeating pattern so as to correspond to the repeating pattern. A pattern and a shielding layer having a series of shapes covering the individual patterns and having the same shape, or covering the individual patterns and covering at least a part of the repetitive pattern, The shielding layer has a wavelength indicating light reflectance that can suppress pattern recognition and light reflection that enables pattern recognition. And an interference layer having a wavelength dependency including, and by capturing an image under a wavelength condition capable of suppressing pattern recognition, the information of the individual pattern is shielded and recognized as a pattern of the shielding layer. Then, it is transferred to the repetitive pattern, and defect inspection is performed as a new repetitive pattern.

  According to this, when the substrate to be inspected is observed at a wavelength that can suppress pattern recognition, it is recognized as a pattern of the shielding layer instead of the information of the individual pattern. Instead of the individual pattern information, it is possible to synthesize the pattern of the shielding layer covering the individual pattern and the repetitive pattern and to treat it as a new repetitive pattern. The repetitive pattern can detect defects at high speed and with high accuracy. Therefore, it is possible to provide a defect inspection apparatus that can detect a defect with high speed and high accuracy even for a pattern including an individual pattern.

  Application Example 8 A defect inspection apparatus according to this application example includes an imaging device that scans a substrate to be inspected on which a repetitive pattern is regularly arranged to capture the repetitive pattern, the repetitive pattern, and the repetitive pattern. A defect inspection apparatus comprising a comparing means for comparing a matching repeated pattern, wherein the substrate to be inspected comprises the repeated pattern and an individual pattern located in a region adjacent to the repeated pattern, and the individual pattern Includes an interference layer having a wavelength dependency including a wavelength indicating light reflectance that can suppress pattern recognition and a wavelength indicating light reflectance that enables pattern recognition, and can suppress pattern recognition. Defect inspection by imaging under wavelength conditions and recognizing as a new repetitive pattern including the area where the information of the individual pattern is shielded And performing.

  According to this, the individual pattern is configured by an interference layer having a wavelength dependency including a wavelength indicating a light reflectance capable of suppressing pattern recognition and a wavelength indicating a light reflectance enabling pattern recognition. Yes. By using a wavelength indicating light reflectance that can suppress pattern recognition and appropriately setting a threshold value, instead of individual pattern information, the pattern of the shielding layer covering the individual pattern and the repetitive pattern Can be combined and treated as a new repeated pattern. Since the repeated pattern can detect a defect with high speed and high accuracy, it is possible to provide a defect inspection apparatus capable of detecting a defect with high speed and high accuracy even for a pattern including an individual pattern. In this case, although the individual pattern is not inspected, there is no problem because the pattern accuracy required for the individual pattern is low.

  Application Example 9 In the defect inspection apparatus according to the application example described above, when a defect is detected as a result of the defect inspection, light having a wavelength indicating a light reflectance that enables pattern recognition is irradiated, It is characterized by detecting individual pattern information.

  According to the application example described above, when the substrate to be inspected is observed at a wavelength that enables pattern recognition, the individual pattern can be recognized, so that individual pattern information can be easily obtained.

Hereinafter, embodiments embodying the present invention will be described with reference to the drawings.
(First Embodiment: Substrate to be inspected with individual pattern filled with metal shielding layer)
Hereinafter, the substrate to be inspected according to this embodiment will be described with reference to the drawings. In FIG. 1A, a pattern having an address number part as an individual pattern is formed on a gate electrode layer (for example, a three-layer structure of Ti / Al / Ti) of a thin film transistor (TFT), and is formed in a layer above the gate electrode layer. FIG. 1B is a plan view of a substrate to be inspected masked with a metal wiring layer, and FIG. 1B is a cross-sectional view taken along line AA ′ of FIG. In this embodiment, application to an organic EL device having a diagonal size of about 5 inches (12.7 cm) is exemplified, but this applies to a liquid crystal device or the like that uses an optically transparent substrate such as glass for the substrate 1 to be inspected. It is applicable to. The screen size is an example. For example, in the case of application to a television or the like, the screen size may exceed 1 m diagonally. Here, the substrate 1 to be inspected is formed on a substrate 30 using non-alkali glass or the like. As a typical example, there is a display area 11 in which pixels 19 are arranged in the center of the substrate 1 to be inspected. A number area 12 is arranged so as to surround the display area 11. In the number area 12, a repetitive pattern 14 indicated by an area surrounded by a dotted line is arranged. When a defect occurs in the pixel 19 in the display area 11, the address number indicated in the address number portion 13 is displayed. And repair processing is performed to relieve the area related to this address number. Since the address number part 13 only needs to be recognized as a character, even if this part is shielded for inspection, no practical problem occurs.

  In the present embodiment, the address number portion 13 is covered with the shielding layer 20, and the address number portion 13 is hidden when viewed from above. When performing defect detection, the address number portion 13 is separated from the adjacent one. It is recognized as the same pattern as the address number part. Note that the present invention can also be applied to a state in which the address number portion 13 is slightly visible by reducing the thickness of the shielding layer 20. In this case, the address number portion 13 appears to be thin, but the contrast ratio decreases due to the presence of the shielding layer 20. Therefore, when using a defect inspection apparatus to be described later, the defect inspection apparatus can recognize the area located under the shielding layer 20 as being hidden by the shielding layer 20 by adjusting the threshold value for determining the presence or absence of the pattern. It becomes possible.

  A circuit area 15 is provided so as to surround the number area 12. The circuit area 15 and the display area 11 are connected via the number area 12, and the repair process is performed by changing the connection portion between the circuit area 15 and the display area 11 corresponding to the address number portion 13 of the number area 12. Is configured to be able to. The balloon part in FIG. 1A shows an enlarged pattern of the number area 12. In the number region 12, for example, a source line 16 and a gate line 17 are located, and a dummy pixel 18 is arranged to keep the end of the pattern of the pixel 19 located in the display region 11 in a stable state. . The occurrence of defects due to pattern discontinuity in the exposure process or etching process performed to form a photoresist pattern, which occurs in the pixel 19 located at the end of the display region 11 by arranging the dummy pixel 18. Can be suppressed. The source line 16 and the gate line 17 have a function of selecting the pixel 19 to be displayed in cooperation.

  In FIG. 1A, the number region 12 positioned below the shielding layer 20 is seen through, but this is described in this way for convenience of explanation, and actually the shielding layer. 20 is shielded. As will be described later, when the address number portion 13 is slightly visible through the shielding layer 20, it is recognized as shown in FIG.

  Next, the cross-sectional structure of the substrate 1 to be inspected will be described with reference to FIG. Address number portion 13 is formed using a metal wiring used for, for example, a gate electrode layer (for example, a three-layer structure of Ti / Al / Ti). The address number portion 13 only needs to be recognized as a character. Therefore, unlike the repetitive pattern 14, it is not necessary to carry out a detailed inspection, and no trouble occurs even if this portion is inspected.

  Address number portion 13 is covered with first interlayer insulating layer 31 containing silicon oxynitride or the like.

  A source line 16 is formed on the first interlayer insulating layer 31 and electrically connects the circuit region 15 and the display region 11 shown in FIG. The source line 16 is covered with a second interlayer insulating layer 32 that also functions as a planarizing layer using acrylic resin or the like.

  On the second interlayer insulating layer 32, the pixel 19 is electrically driven, and a shielding layer 20 using a metal including a material that reflects light such as an alloy obtained by adding neodymium to aluminum (hereinafter referred to as AlNd). Covered by. By configuring the address number portion 13 and the shielding layer 20 in this way, the address number portion 13 is masked by the shielding layer 20 having the same shape as the adjacent region when viewed from above. Therefore, it is recognized as a part of the repeated pattern 14 when viewed from the upper side. When viewed from the lower side (back side), the address number portion 13 can be recognized. The shielding layer 20 is covered with the third interlayer insulating layer 33. Covering with the third interlayer insulating layer 33 prevents moisture from entering from the outside.

  By using the above-described configuration, it is possible to handle the ORed shape of the shielding layer 20 and the repetitive pattern 14 as a new repetitive pattern 14A shown as a hatched region. By adopting the repeating pattern 14A, it becomes possible to detect a defect with high speed and high accuracy. Therefore, it becomes possible to provide the substrate 1 to be inspected having excellent mass productivity.

  In the above-described example, the case where the address number portion 13 is covered with the shielding layer 20 to be recognized as a new repetitive pattern 14A has been described. However, this is not limited to the address number portion 13; A measurement pattern for examining changes in electrical characteristics and pattern shape by changing the length, and an inspection pattern for performing separate analysis may be arranged below the shielding layer 20. Since the information on the structure located below the shielding layer 20 is hidden by the shielding layer 20, any pattern can be used. Even if an abnormality occurs in the measurement pattern or the inspection pattern, it is not related to the defect of the inspected substrate 1 as a product.

  Here, these patterns are preferably provided in a layer between the address number portion 13 and the shielding layer 20, and in this case, the address number can be read from the back surface of the substrate 1 to be inspected. Further, when a measurement pattern or an inspection pattern is provided below the address number portion 13, the pattern is formed with a space for the address number portion 13 so that the address number portion 13 can be recognized from the back surface of the inspected substrate 1. Preferably it is.

Further, when the thickness of the shielding layer 20 is reduced so that the address number portion 13 is slightly visible, it can be recognized from the surface (the “upper” side) of the substrate 1 to be inspected, and on the opaque substrate. Application to this is possible. Therefore, the present invention can be applied to a memory using a silicon substrate (opaque substrate), a device such as a gate array, an ASIC, and an FPGA.
Here, although the case where the shielding layer 20 having a rectangular island pattern is used has been described in the present embodiment, this is a series of covering the address number portion 13 and covering at least a part of the repeated pattern 14. A shielding layer having the following shape may be used.

(Second Embodiment: Inspected Substrate Covered with Individual Pattern by Interference Layer)
Hereinafter, the substrate to be inspected according to the present embodiment will be described with reference to the drawings. Since this embodiment has a part in common with the first embodiment, the description of the part is omitted, and the overlap is avoided. 2A is a plan view of a substrate to be inspected in which the address number portion is formed in the lower layer and masked using the upper interference layer, and FIG. 2B is the AA ′ line in FIG. 2A. It is sectional drawing. The difference from the first embodiment is that instead of the shielding layer 20 using the upper metal wiring layer as the shielding layer 21, an interference layer having a wavelength dependency in light reflectance is used.

  The shielding layer 21 using the interference layer has a first interference layer 21A having a thickness of about 10 nm using AlNd and a second interference layer 21B having a thickness of 50 nm using silicon nitride on the second interlayer insulating layer 32. And a third interference layer 21C having a layer thickness of 120 nm using ITO (indium / tin / oxide). The shielding layer 21 reflects light having a wavelength of about 600 nm and transmits light having a wavelength of about 500 nm. When light having a wavelength of about 600 nm is used, the shape obtained by ORing the shielding layer 21 and the repetitive pattern 14 can be handled as a new repetitive pattern 14A, as in the first embodiment. By adopting the repeating pattern 14A, it is possible to detect the defect 1 with high speed and high accuracy, and to provide the substrate 1 to be inspected having excellent mass productivity. In addition, in this embodiment, it is possible to see the address number portion 13 by transmitting light having a wavelength of about 500 nm. Therefore, the address number portion 13 can be recognized from the front surface side (“upper” side), and application to an opaque substrate is possible. Therefore, the present invention can be applied to a memory using a silicon substrate (opaque substrate), a device such as a gate array, an ASIC, and an FPGA.

  In the example described above, the case where the address number portion 13 is covered with the shielding layer 21 to be recognized as the new repetitive pattern 14A has been described. However, this is not limited to the address number portion 13, and for example, some patterns A measurement pattern for examining changes in electrical characteristics and pattern shape by changing the length, and an inspection pattern for performing separate analysis may be arranged below the shielding layer 21. Since the information on the structure located below the shielding layer 21 is hidden by the shielding layer 21, an arbitrary pattern can be used. Here, although the case where the shielding layer 21 having a rectangular island pattern is used has been described in the present embodiment, this is a series of covering the address number portion 13 and covering at least a part of the repeated pattern 14. A shielding layer having the following shape may be used.

(Third embodiment: a substrate to be inspected on which an individual pattern is formed by an interference layer)
Hereinafter, the substrate to be inspected according to this embodiment will be described with reference to the drawings. Since this embodiment has a part in common with the first embodiment, the description of the part is omitted, and the overlap is avoided. FIG. 3A is a plan view of a substrate to be inspected in which an address number portion is configured using an interference layer, and FIG. 3B is a cross-sectional view taken along the line AA ′ in FIG. The difference from the first embodiment is that the address number portion 13 is formed using an interference layer having a wavelength dependency in light reflectance without using the shielding layer 20 (see FIG. 1A). is there.

  The address number portion 13 using the interference layer is formed on the second interlayer insulating layer 32, the first interference layer 21A having a layer thickness of about 10 nm using AlNd, and the second interference layer having a layer thickness of 50 nm using silicon nitride. 21B and the third interference layer 21C having a layer thickness of 120 nm using ITO. The address number part 13 reflects light having a wavelength of about 600 nm and transmits light having a wavelength of about 500 nm. When light having a wavelength of about 500 nm is used, it is possible to handle a pattern excluding information in the address number portion 13 as a new repetitive pattern 14A. By adopting the repeating pattern 14A, it is possible to detect the defect 1 with high speed and high accuracy, and to provide the substrate 1 to be inspected having excellent mass productivity. In addition, in the present embodiment, it is possible to see the address number portion 13 by reflecting light having a wavelength of about 600 nm. For this reason, the address number portion 13 can be recognized from the front surface side (“upper” side), and can be applied to an opaque substrate. Therefore, the present invention can be applied to a memory using a silicon substrate (opaque substrate), a device such as a gate array, an ASIC, and an FPGA.

(Fourth Embodiment: Method for Manufacturing Substrate to be Inspected)
Hereinafter, a method for manufacturing a substrate to be inspected according to the present embodiment will be described with reference to the drawings. 4A to 4C are process cross-sectional views illustrating the manufacturing process according to the present embodiment, and FIGS. 5A and 5B are plan views illustrating the manufacturing process according to the present embodiment.

  First, as step 1, a semiconductor layer, a gate insulating layer, and the like constituting the TFT 51 (see FIG. 4B) are formed on a substrate 50 made of glass or plastic, and then a gate electrode precursor 52A is formed. To do. Next, as step 2, a patterned photoresist layer 53 is formed on the gate electrode precursor 52A. FIG. 4A shows a process cross-sectional view after the steps so far. A plan view is shown in FIG. As shown in FIG. 5A, the address number portion 54 can be formed simultaneously with the gate electrode 52 by etching using the photoresist layer 53 as a mask. Therefore, it is not necessary to form the address number portion 54 in a separate process, and the manufacturing process can be shortened.

  Next, as step 3, the gate electrode precursor 52A is etched using the photoresist layer 53 as a mask, and then the photoresist layer 53 is removed.

  Next, as step 4, a first interlayer insulating layer 55 is formed, a contact hole is opened, and then a drain / source metal layer 56 is formed. The drain / source metal layer 56 is covered with a second interlayer insulating layer 57 that also functions as a planarizing layer using an acrylic resin or the like.

  Next, as step 5, an aluminum layer to which neodymium is added is formed by sputtering or the like, and the light emitted from the organic EL layer 62 (see FIG. 4C) toward the substrate 50 is directed to the opposite side of the substrate 50. The reflection layer 58 that reflects light and the reflection layer 58 that reflects light by performing a photolithography / etching process leaving the portion of the shielding layer 59 and the shielding layer 59 are formed simultaneously. FIG. 4B shows a process cross-sectional view after the steps so far are completed. A plan view is shown in FIG. In FIG. 5B, for the sake of explanation, the address number portion 54 is described so as to be transparent. However, in this embodiment, the address number portion 54 is shielded by the shielding layer 59 so that it cannot be visually recognized. Is formed. Here, the contrast of the address number portion 54 may be lowered by giving the shielding layer 59 semi-transparency. In this case, it will be in the state which can be visually recognized like FIG.5 (b).

  Next, as Step 6, a contact hole is opened and a silicon nitride layer 60 is deposited. Then, in step 7, the silicon nitride layer 60 in the region where the drain / source metal layer 56 is present is removed by etching, and a magnesium-silver alloy is laminated to about 30 nm to form the anode 61. The silicon nitride layer 60 is formed as a layer that physically separates the anode 61 and the reflective layer 58 (shielding layer 59) and prevents galvanic corrosion that occurs when both metals are in direct contact.

  Next, as Step 8, a second interlayer insulating layer 65 is formed, and a contact hole is formed to expose a part of the anode 61. Next, after forming the organic EL layer 62 and the common cathode 63, the third interlayer insulating layer 64 having a multilayer structure is formed, and the substrate 70 to be inspected is formed. FIG. 4C shows a process cross-sectional view after the steps so far are completed. By forming the inspected substrate 70 using this embodiment, the address number portion 54 and the shielding layer 59 can be formed without increasing the number of steps.

  In this embodiment, the step of forming the organic EL element has been described. However, this can be applied to the step of forming the liquid crystal element.

(Modification: Fourth Embodiment)
Hereinafter, modified examples of the fourth embodiment will be described with reference to the drawings. FIGS. 6A and 6B are cross-sectional views for explaining a modification of the fourth embodiment. Here, the same steps are used up to step 4. Next, as Step 5A, an aluminum layer to which neodymium is added is formed by a sputtering method or the like, and a reflective layer 58 is formed by performing a photolithography / etching step. Next, an aluminum layer to which neodymium is added again is formed to a thickness of about 10 nm using a sputtering method or the like, and the first interference layer 71A is formed by performing a photolithographic etching process. FIG. 6A shows a process cross-sectional view after this process. Next, step 6 is performed. However, the thickness of the silicon nitride layer 60 laminated in step 6 is controlled to 50 nm. By performing step 6, the second interference layer 71B is formed on the first interference layer 71A of the silicon nitride layer 60.

  Next, as step 7A, an ITO layer having a thickness of about 70 nm is formed, and a photolithography / etching step is performed so that the ITO layer remains in a portion overlapping with the first interference layer 71A.

  Next, as step 7B, an ITO layer having a thickness of about 50 nm is formed, and a photolithography / etching step is performed so that the region on the reflective layer 58 and the ITO layer of the first interference layer 71A remain. By performing Step 7A and Step 7B, the third interference layer 71C is formed. Next, by performing step 8, the inspected substrate 70A is formed. FIG. 6B shows a process cross-sectional view after this process.

  In this case, the shielding layer 71 includes a first interference layer 71A having a layer thickness of about 10 nm using AlNd, a second interference layer 71B having a layer thickness of 50 nm using silicon nitride, and a third layer having a layer thickness of 120 nm using ITO. It is comprised with the interference layer 71C.

  Another modification will be described with reference to the drawings. FIGS. 7A and 7B are cross-sectional views for explaining another modified example of the fourth embodiment. First, step 1A is performed. It differs from step 1 by not forming the address number portion 54 (see FIG. 4B).

  Next, steps 2 to 4 are performed. Next, as step 5B, an aluminum layer added with neodymium is formed by sputtering or the like, and a photolithography / etching step is performed. The difference from the step 5A is that the first interference layer 71A functions as a part of the address number portion 54. FIG. 7A shows a process cross-sectional view after this process. Next, step 6 is performed. However, the thickness of the silicon nitride layer 60 laminated in step 6 is controlled to 50 nm.

  Next, as step 7A, an ITO layer having a thickness of about 70 nm is formed, and a photolithography / etching step is performed so that the ITO layer remains in a portion overlapping with the first interference layer 71A.

  Next, as step 7B, an ITO layer having a thickness of about 50 nm is formed, and a photolithography / etching step is performed so that the region on the reflective layer 58 and the ITO layer of the first interference layer 71A remain. Next, by performing step 8, the inspected substrate 70B is formed. FIG. 7B shows a process cross-sectional view after finishing this process.

  In this case, the address number part 54 includes a first interference layer 71A having a layer thickness of about 10 nm using AlNd, a second interference layer 71B having a layer thickness of 50 nm using silicon nitride, and a 120 nm layer having a layer thickness of 120 nm using ITO. 3 interference layers 71C.

(Fifth embodiment: a defect inspection apparatus for examining a substrate to be inspected in which individual patterns are filled with a metal mask)
Hereinafter, the defect inspection apparatus according to the present embodiment will be described with reference to the drawings. FIG. 8 is a schematic diagram illustrating the defect inspection apparatus 100 according to the present embodiment, and FIG. 9 is a flowchart for performing defect inspection using the defect inspection apparatus 100. The defect inspection apparatus 100 includes a stage 101 that sends the substrate 1 to be inspected in accordance with the pitch of the repeated pattern 14 (see FIG. 1A), an imaging device 102 that images the repeated pattern 14 of the substrate 1 to be inspected, and an imaging device 102 A storage device 103 for storing photographed information, a calculation for superimposing the pattern information stored in the storage device 103 and the repeated pattern 14 (see FIG. 1A), and outputting defect information of the repeated pattern 14 A CPU 104, a light source 105 that irradiates light to the substrate 1 to be inspected, and a back surface imaging device 106 that observes the substrate 1 to be inspected from the back surface.

  First, as step 1 (S1), the repetitive pattern 14 is detected and the starting point of the repetitive pattern 14 is focused. This can be dealt with by automatically measuring and aligning using an alignment mark (not shown) or the like arranged on the substrate 1 to be inspected, and adjusting the focus.

  Next, as step 2 (S2), the repeated pattern 14 and the shielding layer 20 (see FIG. 1A) are combined and recognized as the repeated pattern 14A and stored in the storage device 103. At this time, the contrast is adjusted so that the signal of the address number part 13 is masked by the signal of the shielding layer 20. It is preferable to set a contrast threshold in advance so that the CPU 104 can automatically execute this step.

  Next, as step 3 (S3), the stage 101 is fed by the pitch of the repetitive pattern 14A, the position of the inspected substrate 1 is shifted, and the shape of the repetitive pattern 14A is compared with the next repetitive pattern 14A. In this case, it is preferable that the CPU 104 corrects a slight positional deviation, a change in the enlargement magnification, and the like for comparison. Here, the first pattern stored in the storage device 103 may continue to be used as the repeated pattern 14A, but processing such as sequential updating or integration may be performed.

  In step 4 (S4), a pass / fail determination is performed. If a defect is found in the repetitive pattern 14A, the address number is read from the stage 101 side (the back side of the substrate 1 to be inspected) by the back surface imaging device 106 as step 5 (S5), and the address number is stored in the storage device. 103. Then, in step 6 (S6), the process ends when the pattern end of the repeated pattern 14A is detected.

(Sixth embodiment: a defect inspection apparatus for examining a substrate to be inspected on which an individual pattern is formed by an interference layer)
Hereinafter, the defect inspection apparatus according to the present embodiment will be described with reference to the drawings. FIG. 10 is a schematic diagram illustrating the defect inspection apparatus 100 according to the present embodiment, and FIG. 11 is a flowchart for performing defect inspection using the defect inspection apparatus 100. The difference from the fifth embodiment is that the back surface imaging device 106 is not included, and a light source 105 </ b> A capable of changing the irradiation wavelength is used instead of the light source 105.

  First, as Step 1 (S1), the wavelength of the light source 105A is irradiated in accordance with the wavelength of the light reflected by the shielding layer 20 using the interference layer, and the repeated pattern 14 is focused. This can be dealt with by automatically measuring and aligning using an alignment mark (not shown) or the like arranged on the substrate 1 to be inspected, and adjusting the focus.

  Next, as step 2 (S2), the repeated pattern 14 and the shielding layer 20 (see FIG. 1A) are combined and recognized as the repeated pattern 14A and stored in the storage device 103. At this time, the contrast is adjusted so that the signal of the address number part 13 is masked by the signal of the shielding layer 20. It is preferable to set a contrast threshold in advance so that the CPU 104 can automatically execute this step.

  Next, as step 3 (S3), the stage 101 is sent by the pitch of the repeated pattern 14A. Next, in step 4 (S4), the position of the substrate 1 to be inspected is shifted, and the shapes of the repeated pattern 14A and the next repeated pattern 14A are compared. In this case, it is preferable that the CPU 104 corrects and compares a slight positional deviation, a change in enlargement magnification, and the like. Here, the first pattern stored in the storage device 103 may continue to be used as the repeated pattern 14A, but processing such as sequential updating or integration may be performed.

  Then, pass / fail judgment is performed. Here, when a defect is found in the repetitive pattern 14A, as step 5 (S5), the irradiation light wavelength from the light source 105A is switched to the wavelength transmitted through the shielding layer 20, the address number is read, and the address number is stored in the storage device 103. Remember me.

  Then, in step 6 (S6), the process ends when the pattern of the repetitive pattern 14A ends. In this case, it is possible to see the address number portion 13 by irradiating light that passes through the shielding layer 20. Therefore, it is effective for a pattern formed on an opaque substrate, and can be applied to a device using a silicon substrate, such as a memory, a gate array, an ASIC, or an FPGA.

(Seventh embodiment: a defect inspection apparatus for examining a substrate to be inspected on which an individual pattern is formed by an interference layer)
Hereinafter, the defect inspection apparatus according to the present embodiment will be described with reference to the drawings. The defect inspection apparatus 100 has the same configuration as that of FIG. 10, and a flowchart for performing defect inspection using the defect inspection apparatus 100 is different. FIG. 12 is a flowchart for performing defect inspection using the defect inspection apparatus 100. First, as Step 1 (S1), the wavelength of the light source 105A is irradiated in accordance with the wavelength of light transmitted through the address number unit 13 using the interference layer, and the repeated pattern 14 is focused. This can be dealt with by automatically measuring and aligning using an alignment mark (not shown) or the like arranged on the substrate 1 to be inspected, and adjusting the focus.

  Next, as step 2 (S2), the repetitive pattern 14 and the area of the address number portion 13 using the interference layer (transparent and not visible) are combined and recognized as a repetitive pattern 14A and stored in the storage device 103. Let At this time, the contrast is adjusted so that the signal of the address number portion 13 is recognized as transparent. It is preferable to set a contrast threshold in advance so that the CPU 104 can automatically execute this step.

  Next, as step 3 (S3), the stage 101 is fed by the pitch of the repetitive pattern 14A, the position of the inspected substrate 1 is shifted, and the shape of the repetitive pattern 14A is compared with the next repetitive pattern 14A. In this case, it is preferable that the CPU 104 corrects a slight positional deviation, a change in the enlargement magnification, and the like for comparison. Here, the first pattern stored in the storage device 103 may continue to be used as the repeated pattern 14A, but processing such as sequential updating or integration may be performed.

  In step 4 (S4), a pass / fail determination is performed. If a defect is found in the repetitive pattern 14A, the wavelength of the light emitted from the light source 105A is switched to the wavelength reflected by the address number unit 13 using the interference layer as step 5 (S5). And the address number is stored in the storage device 103.

  Then, in step 6 (S6), the process ends when the pattern of the repetitive pattern 14A ends. In this case, it is possible to see the address number part 13 by irradiating the light reflected by the address number part 13. Therefore, it is effective for a pattern formed on an opaque substrate, and can be applied to a device using a silicon substrate, such as a memory, a gate array, an ASIC, or an FPGA.

(A) is a top view of the to-be-inspected board | substrate which masked the address number part using the upper metal wiring layer, (b) is the sectional view on the A-A 'line of Fig.1 (a). FIG. 3A is a plan view of a substrate to be inspected in which an address number portion is masked by using an upper interference layer, and FIG. FIG. 4A is a plan view of a substrate to be inspected in which an address number portion is formed using an interference layer, and FIG. 3B is a cross-sectional view taken along line A-A ′ of FIG. (A)-(c) is process sectional drawing which shows the manufacturing process concerning 4th Embodiment. (A), (b) is a top view which shows the manufacturing process concerning 4th Embodiment. (A), (b) is sectional drawing for demonstrating the modification in 4th Embodiment. (A), (b) is sectional drawing for demonstrating another modification in 4th Embodiment. The schematic diagram which shows the defect inspection apparatus concerning 5th Embodiment. The flowchart for performing a defect inspection using a defect inspection apparatus. The schematic diagram which shows the defect inspection apparatus concerning 6th Embodiment. The flowchart for performing a defect inspection using a defect inspection apparatus. The flowchart for performing a defect inspection using a defect inspection apparatus.

  DESCRIPTION OF SYMBOLS 1 ... Substrate to be inspected, 11 ... Display area, 12 ... Number area, 13 ... Address number part, 14 ... Repeat pattern, 14A ... Repeat pattern, 15 ... Circuit area, 16 ... Source line, 17 ... Gate line, 18 ... Dummy Pixel, 19 ... Pixel, 20 ... Shielding layer, 21 ... Shielding layer, 21A ... First interference layer, 21B ... Second interference layer, 21C ... Third interference layer, 30 ... Substrate, 31 ... First interlayer insulating layer, 32 2nd interlayer insulation layer, 33 ... 3rd interlayer insulation layer, 50 ... Substrate, 51 ... TFT, 52 ... Gate electrode, 52A ... Gate electrode precursor, 53 ... Photoresist layer, 54 ... Address number part, 55 ... 1st 1 interlayer insulating layer, 56 ... drain / source metal layer, 57 ... second interlayer insulating layer, 58 ... reflective layer, 59 ... shielding layer, 60 ... silicon nitride layer, 61 ... anode, 62 ... organic EL layer, 63 ... common Cathode, 64 ... third interlayer insulating layer 65 ... second interlayer insulating layer, 70 ... substrate to be inspected, 70A ... substrate to be inspected, 70B ... substrate to be inspected, 71 ... shielding layer, 71A ... first interference layer, 71B ... second interference layer, 71C ... third interference Layer: 100: Defect inspection device 101: Stage 102: Imaging device 103: Storage device 104: CPU 105: Light source 105A: Light source 106: Back surface imaging device

Claims (9)

Repeating patterns,
An individual pattern located in a region adjacent to the repeating pattern;
A shielding layer having a series of shapes that cover the individual patterns and have an island shape that is uniform in shape, or that covers the individual patterns and covers at least a part of the repetitive pattern,
The substrate to be inspected is provided with a light shielding property that shields information on the individual pattern when a pattern is recognized using reflected light obtained by irradiating light. Repeating patterns,
An individual pattern located in a region adjacent to the repeating pattern;
A shielding layer having a series of shapes that cover the individual patterns and have an island shape that is uniform in shape, or that covers the individual patterns and covers at least a part of the repetitive pattern,
The shielding layer includes an interference layer having a wavelength dependency including a wavelength indicating a light reflectance capable of suppressing pattern recognition and a wavelength indicating a light reflectance capable of enabling pattern recognition. Inspected board. Repeating patterns,
An individual pattern including an interference layer located in an area adjacent to the repetitive pattern, and
The individual pattern includes an interference layer having a wavelength dependency including a wavelength indicating a light reflectance capable of suppressing pattern recognition and a wavelength indicating a light reflectance capable of enabling pattern recognition. Inspection board. A process of producing a repetitive pattern;
Forming an individual pattern located in a region adjacent to the repetitive pattern;
Forming a shielding layer having a series of shapes covering the individual patterns, covering the individual patterns, or covering the individual patterns and covering at least a part of the repetitive patterns.
The shielding layer irradiates incident light and shields the information of the individual pattern when recognizing a pattern using reflected light resulting from reflection of the incident light.
A method for manufacturing a substrate to be inspected, wherein the substrate is formed simultaneously with a light-shielding region located above the individual pattern. An imaging device that scans a substrate to be inspected regularly arranged with repeated patterns and captures the repeated patterns;
A defect inspection apparatus comprising a comparison unit that compares the repetitive pattern with a repetitive pattern adjacent to the repetitive pattern,
The substrate to be inspected is the repetitive pattern,
An individual pattern in a region adjacent to the repetitive pattern,
A shielding layer having a series of shapes that cover the individual patterns and have an island shape that is uniform in shape, or that covers the individual patterns and covers at least a part of the repetitive pattern,
The shielding layer irradiates incident light and has a light shielding property to shield the information of the individual pattern when pattern recognition is performed using reflected light resulting from reflection of the incident light.
The defect is characterized by masking the information of the individual pattern, shielding the information of the individual pattern, handling the pattern as the pattern of the shielding layer, transferring it to the repeated pattern, and performing defect inspection as a new repeated pattern. Inspection device.   6. The defect inspection apparatus according to claim 5, wherein when a defect is detected as a result of the defect inspection, individual pattern information is detected from the back surface of the substrate to be inspected. An imaging device that scans a substrate to be inspected regularly arranged with repeated patterns and captures the repeated patterns;
A defect inspection apparatus comprising a comparison unit that compares the repetitive pattern with a repetitive pattern adjacent to the repetitive pattern,
The substrate to be inspected is the repetitive pattern,
In a region adjacent to the repetitive pattern, an individual pattern positioned so as to correspond to the repetitive pattern,
A shielding layer having a series of shapes that cover the individual patterns and have an island shape that is uniform in shape, or that covers the individual patterns and covers at least a part of the repetitive pattern,
The shielding layer includes an interference layer having a wavelength dependency including a wavelength indicating light reflectance that can suppress pattern recognition and a wavelength indicating light reflectance that enables pattern recognition. It is characterized in that the information of the individual pattern is shielded by imaging under a wavelength condition that can be suppressed, recognized as the pattern of the shielding layer, and then transferred to the repetitive pattern to perform defect inspection as a new repetitive pattern. Defect inspection equipment. An imaging device that scans a substrate to be inspected regularly arranged with repeated patterns and captures the repeated patterns;
A defect inspection apparatus comprising a comparison unit that compares the repetitive pattern with a repetitive pattern adjacent to the repetitive pattern,
The substrate to be inspected is the repetitive pattern,
An individual pattern located in a region adjacent to the repetitive pattern, and
The individual pattern includes an interference layer having a wavelength dependency including a wavelength indicating a light reflectance that can suppress pattern recognition and a wavelength indicating a light reflectance that enables pattern recognition.
A defect inspection apparatus characterized in that an image is picked up under a wavelength condition capable of suppressing pattern recognition, and defect inspection is performed by recognizing a new repeated pattern including a region where the information of the individual pattern is shielded.   The defect inspection apparatus according to claim 7 or 8, wherein when a defect is detected as a result of the defect inspection, light having a wavelength indicating a light reflectance that enables pattern recognition is irradiated, and an individual pattern A defect inspection apparatus characterized by detecting information.

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