JP2010158300A - Game machine - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a game machine capable of securely eliminating fraudulence without difficulty. <P>SOLUTION: The game machine has a main control board 50 which feeds direct currents to a token put-out control board 55 for putting out game tokens to a player and which outputs token put-out signals PAY to put out game tokens to the token put-out control board 55. The main control board 50 includes: a current sensing section 90 for detecting the value of the direct currents fed to the token put-out control board 55; an abnormality determining section 91 for determining whether the current value detected by the current sensing section 90 is at an abnormal level or not; an abnormality storage section 92 for storing the determination of abnormality by the abnormality determining section 91; and an announcing section for announcing the abnormality based on the output of the determination of abnormality. The output of the determination of abnormality is cleared when the power supply is loaded to the game machine or when a switch is operated by a staff in charge. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to an electronic gaming machine having a built-in computer device, and is particularly preferably applied to a spinning game machine or a ball game machine that uses medals or game balls as game media.

  In a spinning machine such as a slot machine, when a player inserts a medal into a medal slot and operates a start lever, the rotation of the rotating reel is started accordingly. When the player presses the stop button to stop the rotating reel, when the symbols on the stop line are aligned, a payout medal corresponding to the symbol is paid out. However, the success / failure state of each game is actually determined in advance by the lottery process inside the device at the start of each game, and the player wins the dividend medal by aligning the symbols won by this lottery process on the stop line. Is paid out.

  This payout medal is stored in advance in a medal hopper arranged in each slot machine. Then, when the payout motor MO rotates and pays out medals, and the payout detection sensor confirms the required number of payouts, the payout operation ends.

  The payout motor MO is composed of, for example, a DC motor that rotates at a voltage of DC 24V. A photocoupler that receives the medal payout signal PAY is provided, and when the medal payout signal PAY becomes L level, the transistor on the output side of the photocoupler is turned on to form a DC motor current drive circuit. Yes.

JP 2005-143656 A

  However, since the payout motor starts rotating when the medal payout signal PAY becomes L level, there is a concern about an illegal act of misusing this relationship and dropping the signal line of the medal payout signal to the ground at the wiring connector portion. . Therefore, various crime prevention circuits have been proposed to eliminate such illegal acts (Patent Document 1). However, when an excellent crime prevention circuit is mounted, illegal acts using a so-called “hanging board”. Become powerless.

  Here, the “hanging board” is an illegal circuit board arranged between a regular circuit board and a regular circuit board, and when a desired illegal signal is generated and output on the illegal circuit board. The precious crime prevention function will be disabled. However, there is a risk that the player may be whitened if the response is too sensitive because the security function is strengthened.

  The present invention has been made in view of the above-described problems, and an object of the present invention is to provide a gaming machine that can reliably eliminate illegal acts without difficulty.

  In order to achieve the above object, the invention according to claim 1 is advantageous to a player by executing a lottery process based on a random number value when a predetermined switch signal is turned on in response to the operation of the game medium. A gaming machine that determines whether or not to generate a gaming state, supplying a direct current to a peripheral circuit that pays out game media to a player, and outputting an instruction signal to pay out the game media to the peripheral circuit An upstream circuit that detects the value of the direct current supplied to the peripheral circuit, and whether or not the current value detected by the current sense unit is at an abnormal level. An abnormality determination unit that determines whether the abnormality determination unit has determined abnormality, and a notification unit that notifies abnormality based on the abnormality determination output, and the abnormality determination output is At power-on of the gaming machine, There is adapted to be erased when the switch operation by the clerk.

  The invention according to claim 2 may execute a lottery process based on a random number value to generate a game state advantageous to a player when a predetermined switch signal is turned on in response to the operation of the game medium. A game machine for determining whether to supply a DC current to a peripheral circuit, while providing an upstream circuit board for acquiring the switch signal from the peripheral circuit, and supplying the upstream circuit to the peripheral circuit A current sense unit that detects the value of the direct current, an abnormality determination unit that determines whether or not the current value detected by the current sense unit is at an abnormal level, and that the abnormality determination unit has determined abnormality An abnormality storage unit that performs an abnormality notification based on the abnormality determination output, and the abnormality determination output is erased when the gaming machine is turned on or when a switch is operated by an attendant. become That.

  In each of the above-described inventions, since the abnormality notification can be executed in a state where the supply of the direct current is maintained, it is possible to exhibit a crime prevention function that does not whiten the player. However, in order to strengthen the crime prevention function, it is preferable to provide a power supply stopping unit that stops the supply of the direct current based on the abnormality determination output of the abnormality storage unit. In any case, in each of the above-described inventions, the abnormality notification is continued unless a switch operation is performed by a staff member, so that a reliable crime prevention function can be exhibited.

  The gaming machine according to claim 1 is preferably a slot machine, and the abnormality determination output is checked after each game end or before the game start. On the other hand, the gaming machine according to claim 2 is preferably a ball game machine, and the abnormality determination output is repeatedly checked regularly.

  However, regardless of the type of gaming machine, it is preferable that the abnormal level is determined only when the current value detected by the current sensing unit is zero. Here, the current sensing unit is configured by arranging a detection resistor through which the direct current flows, or by arranging a detection resistor through which a test current fed back from the peripheral circuit flows. preferable.

  Typically, the abnormality determination unit is configured to change the output level of the binary signal when the DC current is interrupted, and the abnormality storage unit stores that the output level of the abnormality determination unit has changed. It consists of flip-flops.

  In the case of the invention according to claim 2, the upstream circuit board receives the switch signal, converts the voltage level, detects that the peripheral circuit is in a disconnected state, and outputs an abnormality detection signal. It is preferable that an interface circuit to output is provided, and that the notification unit performs the abnormality notification operation after grasping the abnormality detection signal and the stored contents of the abnormality storage unit.

  According to the above-described present invention, it is possible to realize a gaming machine that can reliably eliminate illegal acts without difficulty.

It is a front view of the slot machine which concerns on an Example. FIG. 2 is a right side view (a) and a plan view (b) of the slot machine of FIG. 1. It is the figure which illustrated the front panel of the slot machine from the back. It is an internal front view of the main body case of the slot machine. FIG. 2 is a block diagram showing a circuit configuration of the slot machine of FIG. 1. It is a block diagram which shows the connection part of the principal part of a main control board, and a main control board and a medal payout control board. It is a circuit diagram which shows the circuit structure of a medal payout control board. It is a flowchart explaining medal payout operation in the main control unit. It is drawing explaining operation | movement of the medal | token payout control board at the time of payout operation | movement. It is drawing explaining operation | movement of the medal | token payout control board at the time of payout prohibition. It is a circuit diagram which shows the circuit structure of 2nd Example. It is a circuit diagram which shows the circuit structure of 3rd Example. It is a circuit diagram which shows the circuit structure of the 4th Example applied to the ball game machine. FIG. 14 is a circuit diagram showing a part of FIG. 13 in detail.

  Hereinafter, the present invention will be described in more detail based on examples. 1 to 4 illustrate a slot machine SL according to an embodiment. In this slot machine SL, a rectangular box-shaped main body case 1 and a front panel 2 fitted with various game members are connected via a hinge 3 so that the front panel 2 can be opened and closed with respect to the main body case 1. (FIG. 2). 1 is a front view of the front panel 2, FIG. 2 is a right side view (a) and a plan view (b) of the slot machine SL, FIG. 3 is a rear view of the front panel 2, and FIG. A front view is shown.

  As shown in FIG. 4, a symbol rotating unit 4 including three rotating reels 4 a to 4 c is disposed in the approximate center of the main body case 1, and a medal payout device 5 is disposed below the symbol rotating unit 4. On each of the rotating reels 4a to 4c, a BB symbol, an RB symbol, various fruit symbols, a replay symbol, and the like are drawn. The medal payout device 5 is provided with a medal hopper 5a for storing medals, a payout motor MO, a medal payout control board 55, a payout relay board 63, a payout sensor SE (FIG. 5), and the like. Here, the medal is derived from the payout opening 5b toward the front of the drawing based on the rotation of the payout motor MO. Note that medals stored exceeding the limit amount are configured to fall into the auxiliary tank 6 through the overflow portion 5c.

  A power supply board 62 is arranged adjacent to the medal payout device 5, a main control board 50 is arranged above the symbol rotation unit 4, and a rotating drum setting board 54 is arranged adjacent to the main control board 50. ing. In addition, inside the symbol rotating unit 4, a rotating LED relay substrate 58 and a rotating relay substrate 57 are provided, and an external concentrated terminal plate 56 is disposed adjacent to the symbol rotating unit 4.

  As shown in FIG. 1, a liquid crystal display unit 7 is disposed on the upper portion of the front panel 2, and three display windows 8a to 8c corresponding to the rotating reels 4a to 4c are disposed on the lower portion thereof. Through the display windows 8a to 8c, about 3 symbols can be seen in the rotational direction of each of the rotating reels 4a to 4c, and a total of 9 symbols in the horizontal direction and 2 in the diagonal direction. Becomes a virtual stop line. On the left side of the display window 8a, an LED group 9 indicating a gaming state is provided. Below that, a payout display unit 10 for displaying the number of medals to be paid out as a gaming result, and the number of medals in a credit state are displayed. The storage number display part 11 to display is provided.

  In the center of the front panel 2 in the vertical direction, a medal insertion slot 12 for inserting medals is provided, and adjacent thereto, a return button 13 for returning medals filled in the medal insertion slot 12 is provided. Also, a credit check button 14 for paying out a credit medal, an insertion button 15 for artificially inserting one credit medal in place of inserting a medal into the medal slot 12, and a credit medal in a pseudo manner A maximum loading button 16 for loading three sheets is provided.

  Below these game members, a start lever 17 for starting the rotation of the rotating reels 4a to 4c and stop buttons 18a to 18c for stopping the rotating reels 4a to 4c are provided. In addition, below the front panel 2, a horizontally long tray 19 for storing medals and a medal outlet 20 communicating with the payout port 5b of the payout device 5 are provided. Speakers SP are arranged on the left and right sides of the medal outlet 20.

  As shown in FIG. 3, on the back side of the front panel 3, a medal sorting device 21 that sorts medals inserted into the medal slot 12, and medals that are determined to be inappropriate by the medal sorting device 21 A return passage 22 that guides the vehicle 20 is provided. A substrate case 23 that houses the effect control board 51, the effect interface board 52, the liquid crystal control board 61, and the like is disposed on the upper back side of the front panel 3. A game relay board 53 that relays signals between the various game members shown in FIG. 1 and the main control board 50 is provided on the medal sorting device 21.

  FIG. 5 is a block diagram illustrating a circuit configuration of the slot machine SL according to the embodiment. As shown in the figure, this slot machine SL realizes an effect operation based on a main control board 50 that controls the operation of various game members including the rotating reels 4a to 4c and a control command received from the main control board 50. The control board 51 and a power supply board 62 that converts an alternating voltage (24V) into a direct voltage (5V, 12V, 24V) and supplies them to each part of the apparatus are mainly configured.

  The main control board 50 outputs, to the effect control board 51, control commands for realizing the sound effect by the speaker SP, the lamp effect by the LED lamp or the cold cathode ray tube discharge tube, and the symbol effect by the liquid crystal display unit 7. is doing. The effect control board 51 is connected to the liquid crystal control board 61 through the effect interface board 52, and the liquid crystal control board 61 realizes a design effect in the liquid crystal display (LCD) unit 7.

  The effect control board 51 realizes lamp effects in various LEDs and cold cathode ray tube discharge tubes via the LED board 59, the inverter board 60, and the rotary LED drive board 58 together with the effect interface board 52. In addition, the effect control board 51 drives the speaker SP through the effect interface board 52 to realize an audio effect.

  The main control board 50 is connected to various game members of the slot machine through the game relay board 53. Specifically, the start switch of the start lever 17, the stop switch of the stop buttons 18a to 18c, the input switch of the input buttons 15 and 16, the liquidation switch of the checkout button 14, and the photointerrupters PH1 and PH2 constituting the input number determination unit 21d The blocker solenoid 31 constituting the inserted medal return unit 21c and the various LED elements 9 to 11 are connected.

  Further, the main control board 50 is connected to the three stepping motors for rotating the rotating reels 4a to 4c and the index sensor for detecting the reference position of the rotating reels 4a to 4c via the rotating relay board 57. Has been. Then, by rotating or stopping the stepping motor, the rotating operation of the rotating reels 4a to 4c and the stopping operation at the target position are realized.

  The main control board 50 is also connected to the medal payout device 5 through the payout relay board 63. The medal payout device 5 is provided with a medal payout control board 55, a medal payout sensor SE, and a payout motor MO. The medal payout control board 55 is based on a medal payout signal PAY from the main control board 50. The payout motor MO is rotated to pay out a predetermined amount of medals. The payout motor MO is a DC motor such as a brush motor, and continues to rotate as long as it receives DC 24V.

  In addition, the main control board 50 is also connected to the external concentration terminal board 56 and the rotary setting board 54. The external concentrated terminal board 56 is connected to, for example, the hall computer HC, and the main control board 50 outputs the number of inserted medals and the number of paid out medals through the external concentrated terminal board 56. Further, the rotating setting board 54 outputs a setting key signal indicating the rank setting value of the probabilistic medal payout number set by the staff.

  FIG. 6A is a schematic diagram illustrating the connection relationship among the main control board 50, the payout relay board 63, and the medal payout control board 55. As illustrated, the medal payout control board 55 receives the medal payout signal PAY, DC5V, and DC24V from the main control board 50 via the payout relay board 63. Here, each circuit board 50, 63, 55 is connected to an adjacent circuit board via the wiring connectors CN1 to CN4.

  As shown in FIG. 6A, the output unit of the main control board 50 includes a signal output unit 70 that outputs a medal payout signal PAY and a power supply control unit 71 that outputs an abnormality detection signal ERR when an abnormality is detected. It is configured. The medal payout signal PAY and DC5V are output from the wiring connector CN1 together with other signals including DC24V and the ground signal.

  The signal output unit 70 includes a bipolar transistor Qa that performs a switching operation in response to a driving pulse SG having a pulse width τ corresponding to the number of medals to be paid out, and a base resistance Ra of the transistor Qa. As shown in the drawing, the base terminal of the transistor Qa receives the drive pulse SG through the base resistor Ra, and the emitter terminal is connected to the ground. The collector terminal of the transistor Qa is connected to the connector CN1 as an output terminal of the medal payout signal PAY.

  As shown in FIG. 7, the medal payout signal PAY is supplied to the current outflow terminal of the photocoupler PC (light emitting diode D) of the medal payout control board 55, and the current inflow terminal of the photocoupler PC is passed through the current limiting resistor R1. The output of the power supply control unit 71 is supplied. In a normal state, the output of the power supply controller 71 is approximately DC 5 V, so the ON current Ion flowing through the photocoupler PC is Ion≈ (5-Vf) / R1. Vf is a voltage drop at the photocoupler PC.

  In addition, a detection resistor R <b> 2 is connected between the power supply control unit 71 and the ground in the medal payout control board 55. Therefore, in a normal state where all the connectors CN1 to CN4 are connected, the idle current I (≈5 / R2) flows constantly. On the other hand, when any of the connectors CN1 to CN4 is removed, the idle current I that has flowed until then becomes zero.

  As shown in FIG. 6B, the drive pulse SG becomes the H level only during the payout operation, and maintains the L level in the other steady state. For this reason, the transistor Qa is turned on only during the payout operation, and is kept in the OFF state at other times. As a result, when the power supply control unit 71 outputs DC 5V, the medal payout signal PAY becomes L level only during the payout operation when the drive pulse SG becomes H level, and maintains the H level in other steady states. .

  FIG. 6C is a circuit diagram illustrating an example of a circuit configuration of the power supply control unit 71. The power supply control unit 71 has an abnormality detection function that outputs an abnormality detection signal ERR when any of the connectors CN1 to CN4 is removed, and a power supply cutoff function that stops power supply to the medal payout control board 55 when an abnormality is detected. Have. Specifically, the power supply control unit 71 includes a current sensing unit 90 that detects a power supply current value Is, an abnormality determination unit 91, an abnormality storage unit 92, and a power supply stopping unit 93. The power supply current Is is the sum of the idle current I and the photocoupler PC current (= Ion or 0).

  The current sense unit 90 includes a shunt resistor Rs, a current shunt monitor AP, and a load resistor RL. In this embodiment, INA139 (CURRENT SHUNT MONITOR) of Texas Instrument is used as the current shunt monitor AP. This IC has an amplifier and an output transistor, and is configured to output a current proportional to the voltage across the shunt resistor Rs from the output transistor. A detection voltage Eo (Eo∝Rs * RL * Is) proportional to the power supply current value Is of the DC5V line is obtained at both ends of the load resistor RL.

  Specifically, the abnormality determination unit 91 is configured by a comparator CP, and the voltage across the load resistor RL is supplied to the negative input terminal (−), and the voltage dividing resistors R20, R are connected to the positive input terminal (+). A reference voltage Er divided by R21 is supplied. The reference voltage Er is approximately 5 * R21 / (R20 + R21), and is set to a value lower than the detection voltage Eo when the normal power supply current Is (Is = I or Is = Ion + I) is flowing. That is, the power supply current value Is is Is = Ion + I when the photocoupler PC is ON, and Is = I when the photocoupler PC is OFF, but the reference voltage Er is set so that Er <Eo even in the minimum state of Is = I. Has been. It should be noted that Er> Eo is naturally satisfied since Eo≈0 when the connectors CN1 to CN4 are disconnected.

  The abnormality storage unit 92 is configured by an RS flip-flop in which two NOR gates G2 and G3 are connected like a sash. As shown in the truth table in FIG. 6D, when the S input terminal rises to H level while the R input terminal is at L level, the Q output terminal becomes H level, and then the S input terminal returns to L level. Even so, the Q output terminal maintains the H level. On the other hand, when the S input terminal is at the L level and the R input terminal rises to the H level, the Q output terminal becomes the L level. Thereafter, even if the R input terminal returns to the L level, the Q output terminal maintains the L level. To do.

  The S input terminal of the abnormality storage unit 92 is connected to the output terminal of the comparator CP, and a reset signal RST output from the main control unit 50 is supplied to the R input terminal. The main control unit 50 outputs the reset signal RST only once when the gaming machine is turned on.

  The reset signal RST is supplied to the R input terminal of the abnormality storage unit 92 even when the clear switch CLR is manually operated. The clear switch CLR is a rebound switch that can be operated only with a key owned by a staff member and automatically returns to the OFF state. As shown in the figure, a pull-down resistor R30 is connected in series between DC5V and the ground. Therefore, the reset signal RST is normally at the L level and becomes the H level when the clear switch CLR is turned on.

  On the other hand, the Q output terminal of the abnormality storage unit 92 is connected to the input port of the main control unit 50 as the abnormality detection signal ERR. Here, the state where the Q output terminal is at the H level, that is, the set state of the RS flip-flop becomes the abnormality detection state.

  The main control unit 50 determines the level of the input port at each game end, and executes an abnormality handling process if the abnormality detection signal ERR is an abnormal level. Specifically, the progress of the game is stopped by displaying a screen such as “Power supply has been stopped because a connector abnormality has been detected. Please call a staff member”. Then, after the clerk who rushed checks the presence or absence of an abnormality and restores it to the normal state, when the clear switch CLR is turned on using the key, the RS flip-flop returns to the reset state.

  Thus, in this embodiment, the main control unit 50 outputs the reset signal RST only once when the gaming machine is turned on, and does not output the reset signal RST thereafter, so that illegal games can be effectively prevented. Can do. That is, instead of this configuration, for example, when the main control unit 50 outputs the reset signal RST every time prior to the medal payout operation, after the illegal board is mounted, for example, the settlement button 14 is pressed to perform credit. There is a possibility that illegal games can not be prevented because the power-off state can be solved simply by paying out the medal in the state.

  By the way, considering the possibility of malfunction of the flip-flop due to noise or the like, the power supply stopping unit 93 can omit this. If the power supply stopping unit 93 is not provided, power supply is continued even when an abnormality is detected, and thus the crime prevention function may be reduced. In practice, however, illegal actions are reliably prevented by the above-described abnormality handling process. be able to.

  However, in this embodiment, a power supply stopping unit 93 using a P-channel MOS transistor Qb is provided for the purpose of strengthening the crime prevention function. That is, in this embodiment, as shown in the figure, the Q output terminal of the abnormality storage unit 92 is connected to the gate terminal of the transistor Qb. Also, DC5V is supplied to the source terminal of the transistor Qb via the shunt resistor Rs.

  Therefore, when the Q output terminal of the abnormality storage unit 92 becomes L level, the transistor Qb is turned on, and a DC voltage of DC 5 V is output from the drain terminal of the transistor Qb. At this time, if the transistor Qa of the main control board 50 is in the ON state, a current flows through the path of DC5V → shunt resistor Rs → transistor Qb → current limiting resistor R1 → photocoupler PC → transistor Qa, and the photocoupler PC Turns on.

  The circuit configuration of the power supply control unit 71 illustrated in FIG. 6B has been described above. Next, the operation content of the power supply control unit 71 will be described for confirmation. The detected voltage Eo of the current sensing unit 90 is higher than the reference voltage Er (Eo> Er) as long as the connectors CN1 to CN4 are connected regardless of whether the photocoupler PC is in an ON state or an OFF state. Therefore, the S input terminal of the abnormality storage unit 92 is constantly at the L level.

  In this steady state, when the reset signal RST is supplied to the R input terminal of the abnormality storage unit 92, the Q output terminal of the abnormality storage unit 92 becomes L level. Then, the transistor Qb is turned on and DC5V is supplied from the drain terminal of the transistor Qb to the medal payout control board 55. Therefore, the medal payout operation or the payout stop operation is performed in accordance with the ON / OFF state of the photocoupler PC. Is executed normally.

  However, in the payout prohibited state (steady state) in which the transistor Qa is in the OFF state, any of the wiring connectors CN1 to CN4 may be disconnected to connect the illegal circuit board. However, in such a case, since the current of the shunt resistor Rs becomes zero at the moment when any of the wiring connectors is removed, the detection voltage Eo of the current sense unit 90 is lower than the reference voltage Er (Eo < Er). Therefore, when the S input terminal of the abnormality storage unit 92 rises to the H level, the Q output terminal of the abnormality storage unit 92 becomes the H level. Then, the transistor Qb is turned off and the power supply to the medal payout control board 55 is interrupted, so that the medal payout operation is not started.

  Further, since the main control unit 50 acquires the abnormality detection signal ERR through the input port at the end of each game, if it is an abnormal level (H level), the main control unit 50 executes an abnormality handling process. The specific operation content is as exemplified above, and the progress of the game is stopped by displaying a screen for notifying the occurrence of abnormality.

  When the mounting of the illegal circuit board is completed and the power supply current Is is restored, the S input terminal of the abnormality storage unit 92 returns to the L level by returning to the state of Eo> Er. However, since the Q output terminal is maintained at the H level, power supply of the power supply voltage (DC 5 V) remains stopped, and the illegal circuit board cannot function.

  FIG. 7 specifically shows the circuit configuration of the medal payout control board 55. The payout relay board 63 is not shown because it only distributes and transmits various signals.

  As described with reference to FIG. 6, the medal payout control board 55 is connected to the payout relay board 63 through the connector CN4, and receives DC24V, DC5V, and the medal payout signal PAY from the main control board 50. If the payout motor MO is connected to the connector CN5 of the medal payout control board 55 and the medal payout signal PAY is at the active level (L level), the payout motor MO receives DC24V and continuously rotates. It has become.

  The medal payout control board 55 is provided with a signal transmission circuit 81 using a photocoupler PC, a current limiting circuit 82 using bipolar transistors Q3 and Q4, a drive control circuit 83 using a MOS transistor Q5, and a braking circuit 84 using a MOS transistor Q6. It has been. Since the detection resistor R2 is connected between the output line of the power supply controller 71 and the ground, the idle current I≈5 / R2 constantly flows through the detection resistor R2.

  The signal transmission circuit 81 is composed of a series circuit of a current limiting resistor R1 and a light emitting diode D of the photocoupler PC, DC5V output from the power supply control unit 71 of the main control board 50, and medal payout signal output from the transistor Qa. Functioning in response to PAY. That is, when the photocoupler PC receives the L level medal payout signal PAY in the DC 5V power supply state, the light emitting diode D emits light and the phototransistor Tr is turned on. In response to the ON operation of the transistor Tr, DC24V can be supplied, and the current limiting circuit 82 and the drive control circuit 83 can be operated.

  The current limiting circuit 82 includes a PNP transistor Q3, a collector resistor R4, a bias resistor R10, a current detection resistor R13 of the payout motor MO, a bias resistor R5, a capacitor C1, an NPN transistor Q4, and a current limiting resistor R8. And a reverse current blocking diode D2.

  The emitter terminal of the transistor Q3 is connected to the emitter terminal of the transistor Tr of the photocoupler and the current limiting resistor R8. A current limiting resistor R8 and a diode D2 are connected in series between the emitter terminal and the base terminal of the transistor Q3, and the cathode terminal of the diode D2 is connected to the base terminal of the transistor Q3. The cathode terminal of the diode D2 is connected to the collector terminal of the transistor Q4, and the emitter terminal thereof is connected to the ground. The base terminal of the transistor Q4 is connected to the ground through a capacitor C1 and a resistor R5 connected in parallel.

  The base terminal of the transistor Q4 is connected to the source terminal of the N-channel MOS transistor Q5 through the resistor R10. A resistor R13 is connected between the source terminal of the N-channel MOS transistor Q5 and the ground to monitor the drive current of the payout motor MO. The current detection resistor R13 is about 0.51Ω.

  The drive control circuit 83 includes an N channel MOS transistor Q5, a bias resistor R9, and a capacitor C3. Here, the drain terminal of the MOS transistor Q5 is connected to the (−) terminal of the payout motor MO. A resistor R9 and a capacitor C3 connected in parallel are connected between the base terminal and the source terminal.

  The braking circuit 84 includes a P-channel MOS transistor Q6, voltage dividing bias resistors R11, R12, R6, and R7, a capacitor C2, a reverse current blocking diode D1, and a polyswitch RT. The source terminal and drain terminal of the P-channel MOS transistor Q6 are connected to the (+) terminal and the (-) terminal of the payout motor MO, respectively. Therefore, when the P-channel MOS transistor Q6 is turned on, the driving of the payout motor MO is prohibited.

  On the other hand, a resistor R11 is connected between the source terminal and the gate terminal of the MOS transistor Q6, and bias resistors R12, R6, and R7 are connected in series between the gate terminal and the grant. The cathode terminal of the diode D1 is connected to the connection point between the resistor R12 and the resistor R6. On the other hand, the anode terminal of the diode D1 is connected to the emitter terminal of the transistor Tr of the photocoupler PC and the resistor R8.

The polyswitch RT is connected between the drain terminal of the P-channel MOS transistor Q2 and the (+) terminal of the payout motor MO. Here, the polyswitch is a polymer-based PTC (Positive Temperature Coefficient) thermistor, and when the element temperature rises above a predetermined value, the resistance value of 1Ω or less rapidly increases in a normal state to 10 ⁴ Ω to 10 ^6. It has a characteristic of about Ω. Therefore, for example, when an excessive current flows due to a short circuit of the wiring of the payout motor MO, the DC 24V power line is opened. The polyswitch RT has a great significance at the time of trouble that the current limiting circuit 82 does not function.

  Next, the medal payout process executed in the main control unit 50 will be described based on the flowchart of FIG. First, it is determined whether or not the number of medals to be paid out to the player is 0 (ST10). If the number of medals paid out is not 0, the number of credits is increased until the number of credits reaches an upper limit (for example, 50). By doing so, the payout process is executed (ST11 to ST13).

  On the other hand, when the number of credits reaches the upper limit value or reaches the upper limit value in this way, the medal payout signal PAY is set to the ON level (L level) (ST15). Specifically, the photocoupler PC of the medal payout control board 55 is turned on by turning on the transistor Qa of the main control unit 50. As a result, the payout motor MO starts rotating and the payout of medals is started.

  When the medal payout operation is started, it is next determined whether or not the payout sensor SE (FIG. 5) detects the medal payout (ST16), and waits for a predetermined waiting time until the medal payout is detected ( ST18). If a medal payout is detected, the payout number is subtracted (ST17), and the same operation is repeated until the remaining payout number becomes zero.

  On the other hand, if the payout sensor SE does not detect the payout of medals even after the predetermined standby time is exceeded, it is considered that the medal hopper 5a is empty, and an abnormality notification process to that effect is executed (ST19). When the opening / closing of the door sensor is detected, it is assumed that the replenishment process by the staff has been completed, the error notification process is canceled, and the process returns to step ST15.

  If such processing is repeated, the remaining payout number will eventually become zero (ST13), and the medal payout signal PAY is set to OFF level and the processing is ended (ST14). Specifically, the photocoupler PC of the medal payout control board 55 is turned off by turning off the transistor Qa of the main control unit 50. As a result, the rotation of the payout motor MO is stopped.

  9 to 10 are drawings for explaining the medal payout operation. First, the case where the transistor Qa of the main controller 50 is turned on (ST15) will be described with reference to FIG.

  When the transistor Qa is in the ON state, an ON current flows through the path of the power supply control unit 71 (DC5V) → the resistor R1 → the light emitting diode D of the photocoupler → the transistor Qa, and the photocoupler PC is turned on. Then, the direct current passing through the transistor Tr of the photocoupler PC in the ON state flows through a path of diode D1 → resistor R6 → R7. In addition, the direct current passing through the transistor Tr also flows through a path of resistance R8 → resistance R9 → resistance R13 and a path of resistance R8 → resistance R9 → resistance R10 → R5. As a result, the transistor Q5 is turned on, the motor drive current flows through the path of the polyswitch RT → the payout motor MO → the transistor Q5, and the payout motor MO rotates.

  At this time, the current limiting circuit 82 functions as a negative feedback circuit that prevents an excessive motor driving current from flowing. That is, since the motor drive current flows through the current detection resistor R13, if the motor drive current increases greatly, the base potential of the transistor Q4 increases, and the collector current flows through the resistor R8 → diode D2 path.

  Then, since the transistor Q4 and the transistor Q3 are connected to each other with a thyristor structure, an increase in the collector current of the transistor Q4 causes an increase in the collector current of the transistor Q3, and the transistor Q4 is connected via the resistor R5. By increasing the collector current more and more, the two transistors Q3 and Q4 form a positive feedback loop for ON operation.

  On the other hand, when the collector current of the transistor Q4 increases toward the saturation current, the potential of the anode terminal of the diode D2 drops, so that a negative feedback loop is formed to turn the transistor Q5 OFF. Therefore, an excessive motor drive current is prevented from flowing based on the operation of transistor Q5, and the motor drive current is maintained in a predetermined range.

By the way, at the timing when the payout motor MO is driven, the transistor Q6 is in the OFF state. The current flows through the path of the resistor R11 → the resistor R12 → the resistor R6 → the resistor R18, and the current also flows through the path of the diode D1 → the resistor R6 → the resistor R18. This is because the saturation voltage V _CE and the forward voltage drop V _{F of the} diode are suppressed to V _CE + V _F ≈1V.

  Next, based on FIG. 10, the operation when the transistor Qa of the main control unit 50 is turned off (ST13) will be described.

  In this case, since the transistor Qa is turned off, the photocoupler PC is turned off, and the transistors Q3, Q4, and Q5 are not turned on. However, a current flows through the path of the resistor R11 → the resistor R12 → the resistor R6 → the resistor R7 → the ground. Here, since the voltage across the resistor R11 is set to be 24 * R11 / (R11 + R12 + R6 + R7) ≈3 V, the transistor Q6 is turned on by the voltage between the source terminal and the gate terminal.

  Since the ON operation of the transistor Q6 is executed when the photocoupler PC transitions from ON to OFF, the output current of the dispensing motor MO that functions as a generator is absorbed as a short-circuit current of the transistor Q6, and the rotation of the dispensing motor MO The brake is applied. Therefore, according to the configuration of the present embodiment, overpayment of medals due to inertial force is prevented.

  After the payout motor is stopped, the transistor Qa is maintained in the OFF state. For example, when an illegal circuit board is mounted and the medal payout signal PAY is dropped to the ground, the photocoupler PC is turned ON, and the payout motor MO Will start rotating. However, in this embodiment, since the supply of the DC5V power supply voltage is stopped at the moment when any of the wiring connectors C1 to C4 is removed, the medal payout operation cannot be started even if an illegal circuit board is used. .

  Assuming that there may be an illegal circuit board that generates DC 5V by stepping down DC 24V fed from the main control board 50, a power control unit 71 similar to that shown in FIG. It is preferable to provide it.

  FIG. 11 is a circuit diagram illustrating a power supply control unit 71 that stops power supply in synchronization with each of the DC24V and DC5V power supply lines. In the power supply control unit 71, the power supply stopping unit 93 includes a transistor Qb that receives the Q output of the abnormal storage unit 92, an N-channel MOS transistor Qc that receives the Q bar output of the abnormal storage unit 92, a drain terminal of the transistor Qc, and DC24V And a P-channel MOS transistor Qd that is turned on in response to the ON operation of the transistor Qc.

  As shown in the drawing, the gate terminal of the transistor Qc is connected to the Q bar output terminal of the abnormality storage unit 92, the source terminal is connected to the ground, and the drain terminal is connected to the bias resistor R22 and the gate terminal of the transistor Qd. . Then, DC24V is supplied to the source terminal of the transistor Qd, and the drain terminal is connected to the wiring connector CN1.

  In the steady state, since the Q bar output of the abnormality storage unit 92 is at the H level, the transistor Qc is turned on, and the ON current of the transistor Qc flows through the bias resistor R22. For this reason, the transistor Qd is also turned on, and 24 VDC is supplied to the medal payout control board 55. At this timing, the transistor Qb is also turned on, and DC5V is also supplied.

  On the other hand, if any of the wiring connectors CN1 to CN4 is disconnected, the Q bar output of the abnormality storage unit 92 changes to L level, so that the transistor Qc and the transistor Qd are turned off and the DC 24V power supply is stopped. The Further, the transistor Qb is also turned OFF in synchronization and the DC 5V power supply is stopped. Therefore, even if a DC-DC converter or the like is arranged on the illegal circuit board, the payout motor MO cannot be rotated. Further, since the abnormality detection signal ERR at the Q output terminal of the RS flip-flop becomes H level, the main control unit 50 executes abnormality handling processing.

  By the way, in the above-described embodiment, a circuit configuration is adopted in which the steady idle current I flows through the detection resistor R2 disposed on the medal payout control board 55. However, instead of this configuration, the detection disposed on the main control board 50 is employed. It is also preferable to pass the idle current I through the resistor R2. FIG. 12 shows an example of this circuit. The upstream point of the current limiting resistor R1 arranged on the medal payout control board 55 is fed back to the main control board 50 and connected to the detection resistor R2.

  As shown in the figure, the detection resistor R2 is connected between the negative input terminal (−) of the comparator CP and the ground, and the detection voltage Eo is a normal value Eo≈5 in a power supply state in which the transistor Qb is ON. .

  The reference voltage Er is Er≈5 * R21 / (R20 + R21), and is set to a value sufficiently lower than the normal detection voltage Eo≈5 (Er <Eo). On the other hand, when an abnormality occurs when the connectors CN1 to CN4 are disconnected, Eo≈0, so that Er> Eo. Therefore, the abnormality determination unit 91 and the abnormality storage unit 92 operate in the same manner as in FIG. 11 and FIG. 6C, and continuously stop the power feeding after the connector separation.

  Although the embodiments of the present invention have been specifically described above, the specific description is not particularly intended to limit the present invention and can be appropriately changed. For example, while the slot machine has been described in the previous embodiment, the present invention is preferably applied to a ball game machine that implements a game ball payout process with a DC motor.

  It is also preferable to apply the present invention to a symbol start port of a ball game machine. Here, a detection switch for detecting the passing of a game ball is built in the symbol start opening, and when this detection switch is turned on, a lottery process based on a random number value is executed, and if this is won, the player A big hit state advantageous to the game is generated, and a large amount of game balls are paid out to the player.

  For this reason, there is a concern about an illegal act of misusing such an operation and changing the detection switch of the symbol start opening. That is, since DC power is supplied to the detection switch, it is possible to make the illegal circuit function by exploiting the DC power.

  FIG. 13 is a circuit diagram showing a ball game machine that detects such an illegal action and realizes an abnormality handling process. The ball game machine includes a power supply board 200, a main control board 210 that is centrally responsible for game control operations, and an effect control that executes a lamp effect and a sound effect based on a control command CMD received from the main control board 210. Controls the payout motor MO based on the substrate 220, the liquid crystal control substrate 230 that drives the liquid crystal display DISP based on the control command CMD ′ received from the effect control substrate 220, and the control command CMD ″ received from the main control substrate 210. The payout control board 240 for paying out the game ball and the launch control board 250 for firing the game ball in response to the player's operation are mainly configured.

  In this embodiment, the control command CMD output from the main control board 210 is transmitted to the effect control board 220 via the command relay board and the effect interface board 270. Further, the control command CMD ′ output from the effect control board 220 is transmitted to the liquid crystal control board 230 via the effect interface board 270, and the control command CMD ″ output from the main control board 210 is the main board relay board. Are transmitted to the payout control board 240. The main control board 210, the effect control board 220, the liquid crystal control board 230, and the payout control board 240 are each equipped with a computer circuit having a one-chip microcomputer. Has been.

  In the above circuit configuration, the main control unit 210 is connected to each game component of the game board via the game board relay board 260. And while receiving the switch signal of the detection switch SW incorporated in the winning opening such as the symbol start opening, the solenoid etc. for opening and closing the electric tulip is driven.

  FIG. 14 is a circuit diagram illustrating the main part of the internal configuration of the game board relay board 260. The detection switch SW of the symbol start opening is composed of a proximity switch main circuit, a switching transistor Qe that is turned on / off by the output of the proximity switch main circuit, a protective Zener diode ZD1, and an internal resistance r. ) Terminal and (−) terminal are provided. The power supply voltage Vs (DC12V) is supplied to the (+) terminal of the detection switch SW via the current limiting resistor (detection resistor) R20.

The transistor Qe built in the detection switch SW is in an ON state in a steady state, but is configured to transition to an OFF state when a game ball is detected. Even in the state where the transistor Qe is turned off, a leakage current I _{OFF of} about 0.8 mA flows into the (+) terminal, so that the detection voltage V _DET of the detection switch SW is the presence or absence of detection of the game ball (that is, the transistor Corresponding to the Qe OFF / ON state), Vs−R20 * I _OFF or Vs−R20 * I _ON [V].

The detection voltage V _DET of the detection switch SW is level-converted to a TTL (Transistor Transistor Logic) level voltage via the interface circuit IF. That is, the interface circuit IF operates by receiving two power supply voltages Vs (= DC12V) and Vcc (= DC5V), detects a game ball, and the detection voltage V _DET of the detection switch SW becomes V _DET = Vs. When -R20 * I increases to _OFF , the detection output Vo of the interface circuit IF becomes the H level, and the detection output Vo of the interface circuit IF becomes the L level at the other normal times.

  In this embodiment, the interface circuit IF is composed of 2STB155AA (OMRON Amusement Co., Ltd.), (a) a drop in the power supply voltage Vs, (b) a short circuit of the detection switch SW, (c) a detection switch SW Any abnormality of disconnection is detected, and an H level abnormality detection signal ER1 is output. Therefore, the abnormality detection signal ER1 is supplied to the input port of the main control board 210 together with the detection output Vo of the interface circuit IF. The abnormality detection signal ER1 is normally at the L level, and when this changes to the H level, it indicates that any of the above-mentioned abnormalities (a) to (c) has occurred, but more specific contents are required. Cannot be specified.

  Therefore, in this embodiment, the disconnection detection circuit BRK is provided on the input side of the interface circuit IF. The disconnection detection circuit BRK includes a current sense unit 90, an abnormality determination unit 91, and an abnormality storage unit 92. The current sense unit 90 is configured around a detection resistor R20 (current limiting resistor) and a P-channel MOS transistor Qf. Moreover, the abnormality determination part 91 is comprised centering on the comparator CP and its peripheral circuit.

As shown in the drawing, the detection voltage V _DET of the detection switch SW is supplied to the gate terminal of the transistor Qf, and the power supply voltage Vs is supplied to the source terminal. The drain terminal of the transistor Qf is connected to the ground via a series circuit of a Zener diode ZD2 and a detection resistor R21. A detection resistor R20 is connected between the source terminal and the gate terminal. Therefore, the voltage between the source terminal and the gate terminal is R20 * I _ON in the steady state where the transistor Qe of the detection switch SW is in the ON state, and decreases to R20 * I _OFF when a game ball is detected.

As described above, the leakage current I _OFF of the detection switch SW is about I _OFF = 0.8 mA. However, the detection resistor R20 is _{turned on so} that the transistor Qf can be _{turned on} even when the voltage drop R20 * I _OFF is caused by the leakage current I _OFF . The resistance value is set. Therefore, as long as the game ball relay board 260 and the detection switch SW are connected, the transistor Qf is always in the ON state, and the detection voltage Eo of the output resistor R21 is at a predetermined level (= Vs−Vz). Vz is the breakdown voltage of the Zener diode ZD2, and the voltage drop of the transistor Qf in the ON state is zero for convenience. On the other hand, when an abnormality occurs such that the detection switch SW is removed, the voltage drop at the detection resistor becomes zero, so that the transistor Qf is turned off.

  Similarly to the other embodiments, the voltage across the output resistor R21 is supplied to the negative input terminal (−) of the comparator CP, and the positive input terminal (+) is divided by the voltage dividing resistors R22 and R23. The reference voltage Er is supplied. The reference voltage Er is approximately Vcc * R23 / (R22 + R23), and is set to a value that is significantly lower than the detection voltage Eo at a predetermined level (= Vs−Vz) (Eo> Er). Note that, when an abnormality occurs when the detection switch SW is removed, since Eo≈0, Er> Eo.

  The abnormality storage unit 92 is composed of the same RS flip-flop as in the other embodiments. That is, the S input terminal of the abnormality storage unit 92 is connected to the output terminal of the comparator CP, and the reset signal RST output from the main control unit 210 is supplied to the R input terminal. The main control unit 210 outputs the reset signal RST only once when the gaming machine is turned on, but the reset signal RST is supplied to the R input terminal of the abnormality storage unit 92 even when the clear switch CLR is manually operated. . The Q output terminal of the abnormality storage unit 92 is connected to the input port of the main control unit 210 as the abnormality detection signal ER2.

  Since the disconnection detection circuit BRK of the present embodiment is configured as described above, the abnormality detection signal ER2 maintains a normal L level after the abnormality storage unit 92 receives the reset signal RST when the power is turned on. It is. However, when an abnormality occurs such that the detection switch SW is removed, Er> Eo, so the abnormality storage unit 92 (RS flip-flop) is set, and the abnormality detection signal ER2 becomes H level.

  Since the main controller 210 acquires the input port data Vo, ER1, ER2 at regular intervals (for example, every 2 ms), if the abnormality detection signal ER2 is ER2 = H level, the slot machine is It is possible to start the abnormality handling process similar to the above. At the time of abnormality such as when the detection switch SW is removed, the abnormality detection signal ER1 is also at the H level. Therefore, after confirming that the two abnormality detection signals ER1 and ER2 are both at the H level, the abnormality handling process is performed. It is preferable to start. By adopting such a configuration, it is possible to prevent unnecessary malfunction handling processing due to malfunction of the disconnection detection circuit BRK or malfunction of the internal circuit of the interface circuit IF.

  In the present embodiment, in particular, since the disconnection detection circuit BRK is provided, it is possible to specifically detect a disconnection state related to the detection switch SW and a very important abnormality such as removal of the detection switch SW. That is, the abnormality detection signal ER1 output from the interface circuit IF reacts to any abnormality of (a) a drop in the power supply voltage Vs, (b) a short circuit of the detection switch SW, or (c) a disconnection of the detection switch SW. Therefore, the abnormal state in which the detection switch SW is removed cannot be specifically detected.

  As described above, the bullet ball game machine has been described with respect to the disconnection detection circuit BRK without the power cutoff function. However, if the circuit configuration similar to that of FIG. 6B is adopted, the power cutoff function can be realized.

  Regardless of whether it is a ball game machine or a slot machine, the clear switch CLR is not necessarily connected to the R terminal of the flip-flop. In this case, the output of the clear switch CLR is supplied to, for example, the input port, and the reset signal RST may be output from the output port when the clear switch is pressed.

  Note that the disconnection detection circuit BRK shown in FIG. 14 is not necessarily provided on the game board relay board 260, and is preferably provided on the main control board 210. Of course, the disconnection detection circuit BRK may be provided in a large prize opening switch, a payout counting switch, or the like other than the detection switch for the symbol start opening.

55 Peripheral circuit PAY Instruction signal 50 Upstream circuit 90 Current sense unit 91 Abnormality determination unit 92 Abnormal storage unit SL Gaming machine (slot machine)

Claims (9)

A gaming machine that executes a lottery process based on a random number value when a predetermined switch signal is turned on in response to an operation of a game medium, and determines whether or not a game state advantageous to the player is generated. ,
Provide an upstream circuit for supplying a direct current to a peripheral circuit for paying out game media to the player and outputting an instruction signal to the peripheral circuit for paying out the game media;
The upstream circuit includes a current sense unit that detects a value of the DC current supplied to the peripheral circuit, and an abnormality determination unit that determines whether or not the current value detected by the current sense unit is at an abnormal level. An abnormality storage unit that stores an abnormality determination by the abnormality determination unit, and a notification unit that notifies the abnormality based on the abnormality determination output,
The abnormality determination output is erased when the gaming machine is powered on or when a switch is operated by an attendant. A gaming machine that executes a lottery process based on a random number value when a predetermined switch signal is turned on in response to an operation of a game medium, and determines whether or not a game state advantageous to the player is generated. ,
While providing a direct current to the peripheral circuit, provided an upstream circuit board for obtaining the switch signal from the peripheral circuit,
The upstream circuit includes a current sense unit that detects a value of the DC current supplied to the peripheral circuit, and an abnormality determination unit that determines whether or not the current value detected by the current sense unit is at an abnormal level. An abnormality storage unit that stores an abnormality determination by the abnormality determination unit, and a notification unit that notifies the abnormality based on the abnormality determination output,
The abnormality determination output is erased when the gaming machine is powered on or when a switch is operated by an attendant.   The gaming machine according to claim 1, wherein the gaming machine is a slot machine, and the abnormality determination output is checked after each game or before the game starts.   The gaming machine according to claim 2, wherein the abnormality determination output is repeatedly checked regularly.   The gaming machine according to claim 1, wherein only when the current value detected by the current sensing unit is zero is determined to be an abnormal level.   The gaming machine according to claim 1, wherein the current sensing unit is configured by arranging a detection resistor through which the direct current flows.   The gaming machine according to claim 1, wherein the current sense unit is configured by arranging a detection resistor into which an inspection current fed back from the peripheral circuit flows. The abnormality determination unit is configured to change the output level of the binary signal when the DC current is interrupted,
The gaming machine according to any one of claims 1 to 7, wherein the abnormality storage unit includes a flip-flop that stores that the output level of the abnormality determination unit has changed. The upstream circuit board is provided with an interface circuit that receives the switch signal, converts a voltage level, detects that the peripheral circuit is in a disconnected state, and outputs an abnormality detection signal.
The gaming machine according to claim 2, wherein the notification unit performs the abnormality notification operation after grasping the abnormality detection signal and the storage content of the abnormality storage unit.