JP2010153792A5 - - Google Patents

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JP2010153792A5
JP2010153792A5 JP2009239186A JP2009239186A JP2010153792A5 JP 2010153792 A5 JP2010153792 A5 JP 2010153792A5 JP 2009239186 A JP2009239186 A JP 2009239186A JP 2009239186 A JP2009239186 A JP 2009239186A JP 2010153792 A5 JP2010153792 A5 JP 2010153792A5
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JP
Japan
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layer
silicon oxide
reflective electrode
electrode layer
current diffusion
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JP2009239186A
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Japanese (ja)
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JP5297329B2 (en
JP2010153792A (en
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Publication of JP2010153792A5 publication Critical patent/JP2010153792A5/ja
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次に、図3を参照すると、Ga1-xInxP電流拡散層14上にプラズマCVD法、熱CVD法あるいはスパッタリング法で成膜してフォトリソグラフィ/バッファード弗酸(BHF)エッチング法あるいはドライエッチング法により厚さ90nmの酸化シリコン(SiO2)層15を形成する。さらに、Ga1-xInxP電流拡散層14及び酸化シリコン層15上に抵抗加熱蒸着法、電子ビーム(EB)蒸着法あるいはスパッタリング法により厚さ300nmのAuZnよりなる反射電極層16を形成する。この場合、酸化シリコン層15がパターン化されるのはGa1-xInxP電流拡散層14とAuZn反射電極層16とのオーミック接合をとるためである。酸化シリコン層15及び反射電極層16が一体となって反射層として機能する。尚、酸化シリコン層15は他の透明な誘電体材料層たとえばAl2O3、SiNx、TaOx、TiOx、ITO、ZnOの層でもよく、また、反射電極層16は他の高反射性金属で形成してもよい。
Next, referring to FIG. 3, a film is formed on the Ga 1-x In x P current diffusion layer 14 by a plasma CVD method, a thermal CVD method or a sputtering method, and a photolithography / buffered hydrofluoric acid (BHF) etching method or A silicon oxide (SiO 2 ) layer 15 having a thickness of 90 nm is formed by dry etching. Further, a reflective electrode layer 16 made of AuZn having a thickness of 300 nm is formed on the Ga 1-x In x P current diffusion layer 14 and the silicon oxide layer 15 by resistance heating vapor deposition, electron beam (EB) vapor deposition, or sputtering. . In this case, the silicon oxide layer 15 is patterned in order to form an ohmic junction between the Ga 1-x In x P current diffusion layer 14 and the AuZn reflective electrode layer 16. The silicon oxide layer 15 and the reflective electrode layer 16 are integrated to function as a reflective layer. The silicon oxide layer 15 may be another transparent dielectric material layer such as Al 2 O 3 , SiNx, TaOx, TiOx, ITO, ZnO, and the reflective electrode layer 16 is formed of another highly reflective metal. May be.

JP2009239186A 2008-11-20 2009-10-16 Manufacturing method of optical semiconductor device Expired - Fee Related JP5297329B2 (en)

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Application Number Priority Date Filing Date Title
JP2009239186A JP5297329B2 (en) 2008-11-20 2009-10-16 Manufacturing method of optical semiconductor device

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Application Number Priority Date Filing Date Title
JP2008296495 2008-11-20
JP2008296495 2008-11-20
JP2009239186A JP5297329B2 (en) 2008-11-20 2009-10-16 Manufacturing method of optical semiconductor device

Publications (3)

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JP2010153792A JP2010153792A (en) 2010-07-08
JP2010153792A5 true JP2010153792A5 (en) 2012-01-19
JP5297329B2 JP5297329B2 (en) 2013-09-25

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JP2009239186A Expired - Fee Related JP5297329B2 (en) 2008-11-20 2009-10-16 Manufacturing method of optical semiconductor device

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Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101125025B1 (en) * 2010-07-23 2012-03-27 엘지이노텍 주식회사 Light emitting device and method for manufacturing the same
KR101871503B1 (en) * 2011-09-06 2018-06-27 엘지이노텍 주식회사 Light emitting device and method for fabricating the same
EP2600389B1 (en) * 2011-11-29 2020-01-15 IMEC vzw Method for bonding semiconductor substrates
JP2016092235A (en) * 2014-11-05 2016-05-23 ウシオ電機株式会社 Semiconductor light emitting element

Family Cites Families (4)

* Cited by examiner, † Cited by third party
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JP2883918B2 (en) * 1989-06-27 1999-04-19 光技術研究開発株式会社 Compound semiconductor pattern formation method
JPH06104218A (en) * 1991-01-08 1994-04-15 Nec Corp Dry etching method
JP2006135266A (en) * 2004-11-09 2006-05-25 Sharp Corp Method for manufacturing semiconductor laser element, and semiconductor laser element manufactured thereby
JP5089215B2 (en) * 2007-03-28 2012-12-05 古河電気工業株式会社 Nitride compound semiconductor layer etching method and semiconductor device manufactured using the method

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