JP2010153487A - 半導体装置及びその製造方法 - Google Patents

半導体装置及びその製造方法 Download PDF

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Publication number
JP2010153487A
JP2010153487A JP2008328193A JP2008328193A JP2010153487A JP 2010153487 A JP2010153487 A JP 2010153487A JP 2008328193 A JP2008328193 A JP 2008328193A JP 2008328193 A JP2008328193 A JP 2008328193A JP 2010153487 A JP2010153487 A JP 2010153487A
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JP
Japan
Prior art keywords
metal film
barrier metal
film
semiconductor device
trench
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2008328193A
Other languages
English (en)
Japanese (ja)
Other versions
JP2010153487A5 (https=
Inventor
Naoki Torasawa
直樹 虎澤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Original Assignee
Panasonic Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corp filed Critical Panasonic Corp
Priority to JP2008328193A priority Critical patent/JP2010153487A/ja
Priority to PCT/JP2009/004457 priority patent/WO2010073433A1/ja
Publication of JP2010153487A publication Critical patent/JP2010153487A/ja
Publication of JP2010153487A5 publication Critical patent/JP2010153487A5/ja
Priority to US12/950,450 priority patent/US8310052B2/en
Pending legal-status Critical Current

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    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/04—Coating on selected surface areas, e.g. using masks
    • C23C14/046—Coating cavities or hollow spaces, e.g. interior of tubes; Infiltration of porous substrates
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
    • C23C14/0641—Nitrides
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
    • C23C14/14—Metallic material, boron or silicon
    • C23C14/16—Metallic material, boron or silicon on metallic substrates or on substrates of boron or silicon
    • C23C14/165—Metallic material, boron or silicon on metallic substrates or on substrates of boron or silicon by cathodic sputtering
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • H10P14/42—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials using a gas or vapour
    • H10P14/44—Physical vapour deposition [PVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/033—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/033—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics
    • H10W20/035—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics combinations of barrier, adhesion or liner layers, e.g. multi-layered barrier layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/425—Barrier, adhesion or liner layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • H10P14/42—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials using a gas or vapour
    • H10P14/43—Chemical deposition, e.g. chemical vapour deposition [CVD]
    • H10P14/432—Chemical deposition, e.g. chemical vapour deposition [CVD] using selective deposition

Landscapes

  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Engineering & Computer Science (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Physical Vapour Deposition (AREA)
  • Electrodes Of Semiconductors (AREA)
JP2008328193A 2008-12-24 2008-12-24 半導体装置及びその製造方法 Pending JP2010153487A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2008328193A JP2010153487A (ja) 2008-12-24 2008-12-24 半導体装置及びその製造方法
PCT/JP2009/004457 WO2010073433A1 (ja) 2008-12-24 2009-09-09 半導体装置及びその製造方法
US12/950,450 US8310052B2 (en) 2008-12-24 2010-11-19 Semiconductor device and method for manufacturing same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008328193A JP2010153487A (ja) 2008-12-24 2008-12-24 半導体装置及びその製造方法

Publications (2)

Publication Number Publication Date
JP2010153487A true JP2010153487A (ja) 2010-07-08
JP2010153487A5 JP2010153487A5 (https=) 2010-11-11

Family

ID=42287098

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008328193A Pending JP2010153487A (ja) 2008-12-24 2008-12-24 半導体装置及びその製造方法

Country Status (3)

Country Link
US (1) US8310052B2 (https=)
JP (1) JP2010153487A (https=)
WO (1) WO2010073433A1 (https=)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013534370A (ja) * 2010-08-20 2013-09-02 マイクロン テクノロジー， インク． 半導体構造ならびに導電性材料を開口内に提供するための方法
JP2014123605A (ja) * 2012-12-20 2014-07-03 Tokyo Electron Ltd Ｃｕ配線の形成方法

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9558999B2 (en) 2013-09-12 2017-01-31 Globalfoundries Inc. Ultra-thin metal wires formed through selective deposition
US9659939B1 (en) 2015-11-30 2017-05-23 International Business Machines Corporation Integrated circuit having MIM capacitor with refractory metal silicided strap and method to fabricate same

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001053077A (ja) * 1999-08-13 2001-02-23 Hitachi Ltd 半導体集積回路装置およびその製造方法
JP2005203569A (ja) * 2004-01-15 2005-07-28 Semiconductor Leading Edge Technologies Inc 半導体装置の製造方法及び半導体装置
JP2008047886A (ja) * 2006-07-21 2008-02-28 Toshiba Corp 半導体装置の製造方法及び半導体装置
US20080206982A1 (en) * 2007-02-26 2008-08-28 Tokyo Electron Limited Interconnect structures with a metal nitride diffusion barrier containing ruthenium and method of forming
JP2008541428A (ja) * 2005-05-05 2008-11-20 アプライド マテリアルズ インコーポレイテッド 導電性バリヤ層、特にルテニウムとタンタルの合金及びそのスパッタ堆積

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007258390A (ja) 2006-03-23 2007-10-04 Sony Corp 半導体装置、および半導体装置の製造方法
TW200814156A (en) 2006-07-21 2008-03-16 Toshiba Kk Method for manufacturing semiconductor device and semiconductor device
US20080132050A1 (en) * 2006-12-05 2008-06-05 Lavoie Adrien R Deposition process for graded cobalt barrier layers
US8026605B2 (en) * 2006-12-14 2011-09-27 Lam Research Corporation Interconnect structure and method of manufacturing a damascene structure
GB2446824B (en) * 2007-02-26 2009-06-17 Thermo Fisher Scientific Inc Apparatus and method for detecting incomplete combustion in a combustion analyser
US20090166867A1 (en) * 2007-12-31 2009-07-02 Harsono Simka Metal interconnect structures for semiconductor devices

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001053077A (ja) * 1999-08-13 2001-02-23 Hitachi Ltd 半導体集積回路装置およびその製造方法
JP2005203569A (ja) * 2004-01-15 2005-07-28 Semiconductor Leading Edge Technologies Inc 半導体装置の製造方法及び半導体装置
JP2008541428A (ja) * 2005-05-05 2008-11-20 アプライド マテリアルズ インコーポレイテッド 導電性バリヤ層、特にルテニウムとタンタルの合金及びそのスパッタ堆積
JP2008047886A (ja) * 2006-07-21 2008-02-28 Toshiba Corp 半導体装置の製造方法及び半導体装置
US20080206982A1 (en) * 2007-02-26 2008-08-28 Tokyo Electron Limited Interconnect structures with a metal nitride diffusion barrier containing ruthenium and method of forming

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013534370A (ja) * 2010-08-20 2013-09-02 マイクロン テクノロジー， インク． 半導体構造ならびに導電性材料を開口内に提供するための方法
US9177917B2 (en) 2010-08-20 2015-11-03 Micron Technology, Inc. Semiconductor constructions
US10121697B2 (en) 2010-08-20 2018-11-06 Micron Technology, Inc. Semiconductor constructions; and methods for providing electrically conductive material within openings
US10879113B2 (en) 2010-08-20 2020-12-29 Micron Technology, Inc. Semiconductor constructions; and methods for providing electrically conductive material within openings
JP2014123605A (ja) * 2012-12-20 2014-07-03 Tokyo Electron Ltd Ｃｕ配線の形成方法

Also Published As

Publication number Publication date
US8310052B2 (en) 2012-11-13
US20110062588A1 (en) 2011-03-17
WO2010073433A1 (ja) 2010-07-01

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