JP2010146084A5 - - Google Patents

Download PDF

Info

Publication number
JP2010146084A5
JP2010146084A5 JP2008319809A JP2008319809A JP2010146084A5 JP 2010146084 A5 JP2010146084 A5 JP 2010146084A5 JP 2008319809 A JP2008319809 A JP 2008319809A JP 2008319809 A JP2008319809 A JP 2008319809A JP 2010146084 A5 JP2010146084 A5 JP 2010146084A5
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2008319809A
Other versions
JP2010146084A (ja
Filing date
Publication date
Application filed filed Critical
Priority to JP2008319809A priority Critical patent/JP2010146084A/ja
Priority claimed from JP2008319809A external-priority patent/JP2010146084A/ja
Priority to US12/638,133 priority patent/US8261023B2/en
Publication of JP2010146084A publication Critical patent/JP2010146084A/ja
Publication of JP2010146084A5 publication Critical patent/JP2010146084A5/ja
Pending legal-status Critical Current

Links

JP2008319809A 2008-12-16 2008-12-16 キャッシュメモリ制御部を備えるデータ処理装置 Pending JP2010146084A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2008319809A JP2010146084A (ja) 2008-12-16 2008-12-16 キャッシュメモリ制御部を備えるデータ処理装置
US12/638,133 US8261023B2 (en) 2008-12-16 2009-12-15 Data processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008319809A JP2010146084A (ja) 2008-12-16 2008-12-16 キャッシュメモリ制御部を備えるデータ処理装置

Publications (2)

Publication Number Publication Date
JP2010146084A JP2010146084A (ja) 2010-07-01
JP2010146084A5 true JP2010146084A5 (ja) 2011-04-14

Family

ID=42241955

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008319809A Pending JP2010146084A (ja) 2008-12-16 2008-12-16 キャッシュメモリ制御部を備えるデータ処理装置

Country Status (2)

Country Link
US (1) US8261023B2 (ja)
JP (1) JP2010146084A (ja)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10303372B2 (en) * 2015-12-01 2019-05-28 Samsung Electronics Co., Ltd. Nonvolatile memory device and operation method thereof
US10379747B2 (en) * 2015-12-21 2019-08-13 Western Digital Technologies, Inc. Automated latency monitoring
US11204867B2 (en) * 2017-09-29 2021-12-21 Intel Corporation PCIe controller with extensions to provide coherent memory mapping between accelerator memory and host memory
US11263143B2 (en) 2017-09-29 2022-03-01 Intel Corporation Coherent accelerator fabric controller
US10642519B2 (en) 2018-04-06 2020-05-05 Western Digital Technologies, Inc. Intelligent SAS phy connection management
US10606756B2 (en) * 2018-06-29 2020-03-31 Intel Corporation Impeding malicious observation of CPU cache operations

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0553909A (ja) 1991-08-23 1993-03-05 Pfu Ltd 画像データ処理におけるキヤツシユメモリ制御方式
US5745729A (en) * 1995-02-16 1998-04-28 Sun Microsystems, Inc. Methods and apparatuses for servicing load instructions
DE69727465T2 (de) * 1997-01-09 2004-12-23 Hewlett-Packard Co. (N.D.Ges.D.Staates Delaware), Palo Alto Rechnersystem mit Speichersteuerung für Stossbetrieb-Übertragung
US6185660B1 (en) * 1997-09-23 2001-02-06 Hewlett-Packard Company Pending access queue for providing data to a target register during an intermediate pipeline phase after a computer cache miss
US6499085B2 (en) * 2000-12-29 2002-12-24 Intel Corporation Method and system for servicing cache line in response to partial cache line request
JP4417715B2 (ja) * 2001-09-14 2010-02-17 サン・マイクロシステムズ・インコーポレーテッド キャッシュメモリにおける、タグおよびデータアクセスを分断する方法および装置
JP3961371B2 (ja) * 2002-08-21 2007-08-22 富士通株式会社 情報処理装置
US7360020B2 (en) * 2003-03-31 2008-04-15 Sun Microsystems, Inc. Method for improving cache-miss performance
US7464242B2 (en) * 2005-02-03 2008-12-09 International Business Machines Corporation Method of load/store dependencies detection with dynamically changing address length
US7461239B2 (en) * 2006-02-02 2008-12-02 International Business Machines Corporation Apparatus and method for handling data cache misses out-of-order for asynchronous pipelines
JP4867451B2 (ja) * 2006-04-19 2012-02-01 日本電気株式会社 キャッシュメモリ装置及びそれに用いるキャッシュメモリ制御方法並びにそのプログラム

Similar Documents

Publication Publication Date Title
BRPI0917573A2 (ja)
BRPI0918697A2 (ja)
BRPI0917525A2 (ja)
BRPI0919470A2 (ja)
BRPI0920750A2 (ja)
BRPI0922455A2 (ja)
BRPI0917618A8 (ja)
BRPI0923734A2 (ja)
BRPI0912727A2 (ja)
BRPI0922669A2 (ja)
BRPI0914750A2 (ja)
BRPI0919811A2 (ja)
BRPI0912462A2 (ja)
BRPI0915616A2 (ja)
BRPI0920914A2 (ja)
BRPI0922550A2 (ja)
BRPI0916284A2 (ja)
BRPI0913605A2 (ja)
BRPI0914852A2 (ja)
CH2352018H2 (ja)
BRPI0914820A2 (ja)
BRPI0919477A2 (ja)
JP2010146084A5 (ja)
BRPI0923127A (ja)
BRPI0923137A2 (ja)