JP2010143052A - Image forming apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a technology capable of easily performing the extension of an apparatus, the change of a configuration, or the like. <P>SOLUTION: A receiving board 10 and distribution boards 11-1 to 11-3 are cascade-connected. The receiving board 10 includes: a destination address generating section 22E for determining a destination address; and a data transfer section 22F for transmitting the destination address and image data read from a memory 23, to the distribution board 11-1. The distribution boards 11-1 to 11-3 have a receiving section 26A that receives the image data and destination address from the receiving board 10 or the previous delivery board 11; and a head controller transfer section 26E that transmits the received image data to the head controller 7 when the delivery address indicates a head controller 7 assigned for the delivery board 10 itself. The receiving section 26A is configured so that the image data and the delivery address are transmitted to the subsequent delivery board 11. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to an image forming apparatus that controls a nozzle group for forming an image on an image forming medium based on image data.

  2. Description of the Related Art Conventionally, a line inkjet printer that includes a head row that can eject ink over an entire row in the paper width direction and that can print in the paper width direction without moving the head is known. In such a line ink jet printer, for example, in order to realize high image quality and multiple colors, a plurality of head arrays are arranged in the paper transport direction.

  For example, in such a line inkjet printer, there is a type in which a head row is configured by a plurality of heads and a plurality of head controllers for controlling each head (a group of nozzles formed in each head). . In such a line inkjet printer, it is necessary to transfer image data received from an external device to a plurality of head controllers.

  For example, in order to transfer image data to a plurality of head controllers by a processing unit formed on one substrate, it is necessary to provide a plurality of data output ports (slots) to the head controller on the substrate. In this case, there is a possibility that a problem arises that the number of wirings on the substrate increases and it becomes physically difficult, and the influence of noise increases.

  In contrast, a plurality of distribution processing units that can be connected to a certain number of head controllers are provided, the transfer processing unit transmits image data received from an external device to the plurality of distribution processing units, and the distribution processing unit receives the image data. It is considered to transmit to each head controller connected to each. In this case, the transfer processing unit needs to transmit image data to a plurality of distribution processing units.

  For example, as a technique of data communication between a plurality of communication objects, for example, a master controller and a plurality of slave controllers are connected by a data bus and a control bus, and the master controller and an arbitrary slave control are connected. A technique that enables mutual transmission between devices is known (for example, see Patent Document 1).

JP-A-6-96000

  For example, if the technique of Patent Document 1 is used as a configuration in which the transfer processing unit transmits image data to a plurality of distribution processing units, the wiring lengths of the transfer processing unit and the plurality of distribution processing units are different. Therefore, it is difficult to design for receiving signals properly. Further, when the configuration is expanded to add a new distribution processing unit, it is necessary to consider impedance matching between the distribution processing unit to be added and the transfer processing unit, which is very difficult. Also, when newly creating a device having a different number of distribution processing units, it is necessary to consider impedance matching between each distribution processing unit and the transfer processing unit, which is very difficult to design.

  On the other hand, when a printer breaks down, it is required that maintenance can be performed quickly and easily.

  The present invention has been made in view of the above problems, and an object thereof is to provide a technique capable of easily performing expansion, configuration change, design change, and the like of an apparatus. Another object is to provide a technique that can be maintained quickly and easily.

  To achieve the above object, an image forming apparatus according to a first aspect of the present invention includes a plurality of controllers that control a nozzle group for forming an image on an image forming medium based on image data, and a plurality of controllers among the plurality of controllers. A plurality of distribution processing units that are connected to a part of the controller and transmit the image data for controlling the nozzle group that the controller is responsible for to the controller, and a transfer for transferring the image data to the plurality of distribution processing units An image forming apparatus having a processing unit, wherein a higher-level distribution processing unit and a lower-level distribution processing unit can communicate from a first distribution processing unit as the highest level to a second distribution processing unit as the lowest level. And the first distribution processing unit is configured to be communicably connected to the transfer processing unit. The transfer processing unit is a memory for storing image data and a transfer destination. Transfer destination determining means for determining transfer destination identification information indicating a controller, image data reading means for reading out image data to be transmitted to a transfer destination controller from the memory, transfer destination identification information and image data in a first distribution process The distribution processing unit includes: a receiving unit that receives image data and transfer destination identification information from the transfer processing unit or a higher-level distribution processing unit; and the received transfer destination identification information When the controller shown is the controller that the distribution processing unit itself is in charge of, the distribution unit that transmits the received image data to the controller, the lower level that transmits the image data and the transfer destination identification information to the lower distribution processing unit Transmitting means.

  According to such an image forming apparatus, each distribution processing unit transmits the received image data to the controller when the controller indicated by the received transfer destination identification information is the controller in charge of the distribution processing unit itself, The transfer destination identification information and the image data are transmitted to the lower distribution processing unit. For this reason, by connecting a new distribution processing unit to the lowest distribution processing unit, image data can be transmitted to the new distribution processing unit. Therefore, by specifying the transfer destination identification information indicating the controller connected to the new distribution processing unit, it is possible to appropriately transmit the image data to the controller connected to the new distribution processing unit.

  In the image forming apparatus, the transfer processing unit further includes a status information receiving unit that receives status information indicating a connection state of the controller from the external device to the distribution processing unit, and the transfer destination determining unit includes the status information. Based on this, the transfer destination identification information of the image data may be determined. According to the image forming apparatus, since the transfer destination of the image data is determined based on the connection state of the controller to the distribution processing unit, the image data is appropriately transmitted to the distribution processing unit to which the controller is connected. Image data can be transferred to the controller. For this reason, for example, a distribution processing unit to which one or more controllers can be connected is provided, and a controller is connected using a connectable distribution processing unit in the event that a failure occurs in which other controllers cannot be connected. You can make it. Thereby, maintenance can be performed quickly and easily at the time of failure.

  In the image forming apparatus, the plurality of distribution processing units may have the same hardware configuration. According to such an image forming apparatus, the cost of manufacturing the distribution processing unit can be reduced.

  Further, in the image forming apparatus, the distribution processing unit includes a host connector for communicatively connecting a transfer processing unit or a higher-order distribution processing unit and a lower-level connector for communicatively connecting a lower-level distribution processing unit. The upper connector and the lower connector may be arranged at a position that is substantially symmetric with respect to the board for configuring the distribution processing unit. According to such an image forming apparatus, the distribution processing unit can have the same shape, and the cost for manufacturing the distribution processing unit can be reduced.

  Embodiments of the present invention will be described with reference to the drawings. The embodiments described below do not limit the invention according to the claims, and all the elements and combinations described in the embodiments are essential for the solution of the invention. Is not limited.

  First, an image forming system including a line inkjet printer (hereinafter referred to as a printer) as an example of an image forming apparatus according to a first embodiment of the present invention will be described.

  FIG. 1 is a configuration diagram of an image forming system according to the first embodiment of the present invention.

  The image forming system 1 includes a PC (Personal Computer) 2 and a printer 3.

  The PC 2 includes a PC main body 4 and a transfer unit 5. The PC main body unit 4 includes, for example, a CPU (Central Processing Unit), a ROM (Read Only Memory), a RAM (Random Access Memory), and the like, and generates image data to be printed by the printer 3 and passes it to the transfer unit 5 Execute. The transfer unit 5 generates image data for the printer 3 based on the image data received from the PC body unit 4. For example, the transfer unit 5 generates image data for each color (for example, C (cyan), M (magenta), Y (yellow), and K (black)) for one image formed by the printer 3. In addition, the transfer unit 5 transmits image data for each color to the printer 3.

  Further, the transfer unit 5 transmits distribution unit setting information for setting the distribution unit 6 of the printer 3. In the present embodiment, the distribution unit setting information includes the number of colors of the image to be printed, the image size in the transport direction, the image size in the width direction, and head controller connection state information. The head controller connection state information is information indicating the connection state (connection presence / absence) of the head controller 7 with respect to the slot 27 of the distribution board unit 11 of the distribution unit 6, for example, 1 each as data indicating the connection state in each slot 27. Bits are assigned bit by bit, and when the head controller 7 is connected to the corresponding slot 27, the bit is set to “1”, and when not connected, the bit is set to “0”.

  The printer 3 includes a distribution unit 6 and a plurality of (for example, 12) head controllers 7-1 to 7-12 (in the case where a specific head controller is not shown, the head controller 7 may be described), A plurality of (for example, 12) heads 8-1 to 8-12 (in the case where a specific head is not shown, the head 8 may be described). In the present embodiment, one head controller 7 is connected to one head 8 and controls the one head 8. One head controller 7 may be connected to the plurality of heads 8 to control the plurality of heads 8. The distribution unit 6 includes a reception board unit (transfer processing unit) 10 and a plurality of distribution board units (distribution processing units) 11-1 to 11-3 (if a specific distribution board unit is not shown, May be described). In the present embodiment, a plurality of (for example, four) head controllers 7 are connected to the distribution board unit 11.

  FIG. 2 is a diagram illustrating the arrangement and configuration of the head according to the first embodiment of the present invention. FIG. 2A is a top view of the printer 3 showing the arrangement of the head, and FIG. 2B is a top view of the head. 2A and 2B show the nozzles seen through from the top.

  The printer 3 includes a belt 12 that transports paper (image forming medium) such as paper, an OHP sheet, and cloth supplied from a paper feed tray (not shown). The belt 12 is driven by a motor (not shown). When printing (image formation) on a sheet, the belt 12 conveys the sheet in the conveyance direction X, that is, from the upstream side (left side in FIG. 2A) to the downstream side (right side in FIG. 2A) at a substantially constant speed.

  The printer 3 can print on a plurality of sizes of paper. In the present embodiment, the printer 3 can print sheets of various sizes up to a width W (maximum printable width) as shown in FIG. 2A. The printer 3 according to the present embodiment is configured such that the approximate center in the width direction Y of the sheet is conveyed along the approximate center in the width direction Y of the belt 12 regardless of the size of the sheet.

  The printer 3 is provided with a plurality of heads 8 (8-1 to 8-12). With the plurality of heads 8, ink is printed at a predetermined resolution over the entire maximum printable width W in the width direction Y. Can be injected. A group of heads 8 configured to be able to print over the entire maximum printable width W is referred to as a head row.

  As shown in FIG. 2B, the head 8 includes a plurality of nozzles (nozzle group: for example, a plurality of nozzles for discharging cyan ink 80C and a plurality of nozzles for discharging magenta ink). 80M, a plurality of nozzles 80Y for discharging yellow ink, and a plurality of nozzles 80K for discharging black ink) are provided toward the paper transport side (the depth direction in the drawing). In the present embodiment, the head 8 includes, for example, a magenta nozzle row in which a plurality of (for example, 180) cyan ink nozzles 80C are arranged in the width direction Y and a plurality of nozzles 80M are arranged. , A nozzle row for yellow in which a plurality of nozzles 80Y are arranged, and a nozzle row for black in which a plurality of nozzles 80K are arranged are formed side by side in the transport direction X. The head 8 is provided with a piezoelectric vibrator (not shown) that expands and contracts according to the supplied drive signal so as to correspond to each nozzle (80C, 80M, 80Y, 80K), and controls expansion and contraction of the piezoelectric vibrator. By doing so, the ejection of ink from each nozzle can be controlled.

  As shown in FIG. 2A, the head row 9 is configured such that a plurality of heads 8 are arranged in a staggered manner (alternately) in the width direction Y. The plurality of heads 8 (8-1, 8-3, 8-5, 8-7, 8-9, 8-11) arranged on the upstream side of the head row 9 are arranged in the width direction Y at predetermined intervals. Are arranged along. Each of the plurality of heads 8 (8-2, 8-4, 8-6, 8-8, 8-10, 8-12) arranged on the downstream side is caused by the upstream head 8 in the maximum printable width. It arrange | positions so that printing of the part which cannot be printed (for example, between each head 8) is supplemented. In this way, by arranging the plurality of heads 8, ink can be ejected with a predetermined resolution over the entire maximum printable width W in the width direction Y.

  FIG. 3 is a diagram illustrating image data and image data used for controlling each head according to the first embodiment of the present invention. FIG. 3A is a diagram illustrating image data of an image having a maximum printable width W, and FIG. 3B is a diagram illustrating image data of an image having a width shorter than the maximum printable width W.

  As shown in FIG. 3A, when the image to be printed is an image having the maximum printable width W, the transfer unit 5 uses the corner of the image to be printed first with respect to the image data GC for each color of the image to be formed. 1 line of pixel data corresponding to each pixel is read from the pixel data corresponding to the pixel GS located at the position in the reverse direction of the transport direction X, and then the pixel is similarly applied to the line next to the pixel GS (upper side in the drawing). By repeatedly executing the process of reading out pixel data for each line so as to read out data, pixel data corresponding to the pixel GE is read out, and the read image data is transmitted to the printer 3. This image data is used to control the head 8 in charge of the position in the width direction Y of each pixel. In this embodiment, the data is head 8-1 data to head 8-12 data in the order of reading. Yes.

  Further, as shown in FIG. 3B, when the image to be printed is an image having a width shorter than the maximum printable width W, the transfer unit 5 first sets the image data GC for each color of the image to be formed. One line of pixel data corresponding to each pixel is read out from the pixel data corresponding to the pixel GS located at the corner of the image to be printed in the reverse direction of the transport direction X, and then next to the pixel GS (upper side of the drawing). Similarly, the pixel data is read for each of the lines, and the process of reading the pixel data for each line is repeatedly executed to read the pixel data corresponding to the pixel GE and transmit the read image data to the printer 3. This image data is used for controlling the head 8 in charge of the position in the width direction Y of each pixel. In this embodiment, for example, in the order of reading, the data for the head 8-3 to the data for the head 8-10 It has become.

  FIG. 4 is a hardware configuration diagram of the distribution unit according to the first embodiment of the present invention. 4A shows a configuration of the receiving board unit 10, FIG. 4B shows a configuration of the distribution board unit 11, and FIG. 4C shows a connection state between the receiving board unit 10 and the distribution board unit 11.

  In the receiving board unit 10, as shown in FIG. 4A, a male connector 21 for communicably connecting to the uppermost distribution board unit 11-1 of the plurality of distribution board units 11 on the board 10A. An FPGA (Field Programmable Gate Array) 22 that executes various processes, a memory 23, and a slot 24 for connecting a communication line between the transfer unit 5 are arranged. Here, the higher rank of the distribution board unit 11 means that it is on the receiving board unit 10 side for communication.

  In the distribution board unit 11, as shown in FIG. 4B, on the board 11A, a female connector 25A for communicably connecting to an upper part (reception board unit 10 or distribution board unit 11) and a lower distribution A plurality of (for example, four) slots for connecting communication lines between the male connector 25B for communicably connecting to the board unit 11, the FPGA 26 for executing various processes, and the plurality of head controllers 7. 27 are arranged. In the present embodiment, one head controller 7 can be connected to the slot 27. As shown in FIG. 4C, the connector 25A and the connector 25B are arranged at positions that are substantially symmetrical with respect to the board 11A. Since the connector 25A and the connector 25B are arranged in this way, each distribution board portion 11 can be formed in the same shape. Thereby, the manufacturing cost of each distribution board part 11 can be reduced.

  In the distribution unit 6, as shown in FIG. 4C, the male connector 21 of the reception board unit 10 and the female connector 25A of the uppermost distribution board unit 11-1 are connected, and the distribution board unit 11-1 The male connector 25B and the female connector 25A of the distribution board unit 11-2 are connected, and the male connector 25B of the distribution board unit 11-2 and the distribution board unit 11-3 which is the lowest in this embodiment. The female connector 25A is connected.

  In the present embodiment, as shown in FIG. 4C, communication can be performed between the transfer unit 5 and the FPGA 22 of the reception board unit 10. Further, the FPGA 22 of the receiving board unit 10 and the FPGA 26 of the uppermost distribution board unit 11-1 can communicate with each other via the connector 21 and the connector 25A. Further, the FPGA 26 of the distribution board unit 11-1 and the FPGA 26 of the lower distribution board unit 11-2 can communicate with each other via the connector 25B and the connector 25A. Further, the FPGA 26 of the distribution board unit 11-2 and the FPGA 26 of the lower distribution board unit 11-3 can communicate with each other via the connector 25B and the connector 25A.

  FIG. 5 is a diagram illustrating signal lines of the distribution unit according to the first embodiment of the present invention.

  In the distribution unit 6, the reception board unit 10 and a plurality of distribution board units 11-1 to 11-3 are cascade-connected. That is, a data bus, an address bus, a Valid signal line for transmitting a Valid signal described later, and a Busy signal described later are transmitted between the receiving board unit 10 and the distribution board unit 11-1. To the Busy signal line. Further, a data bus, an address bus, a Valid signal line, and a Busy signal line are connected between the distribution board unit 11-1 and the distribution board unit 11-2. Further, a data bus, an address bus, a Valid signal line, and a Busy signal line are connected between the distribution board unit 11-2 and the distribution board unit 11-3.

  FIG. 6 is a functional configuration diagram of the receiving board unit according to the first embodiment of the present invention.

  The FPGA 22 of the reception board unit 10 includes a reception unit 22A, a data storage processing unit 22B, a read address generation unit 22C, a data read processing unit 22D as an example of an image data reading unit, and an example of a transfer destination determination unit. Transfer destination address generation unit 22E, a data transfer unit 22F as an example of a data transmission unit, and a Busy management unit 22G as an example of a status information reception unit.

  The receiving unit 22A receives the image data transmitted from the transfer unit 5, and sequentially passes the received image data to the data storage processing unit 22B. The data storage processing unit 22B stores the image data received from the receiving unit 22A in the memory 23. In the present embodiment, the data storage processing unit 22B continuously stores the image data received from the receiving unit A.

  FIG. 7 is a diagram for explaining an area in the memory according to the first embodiment of the present invention.

  As shown in FIG. 7, the data storage processing unit 22B divides the memory space of the memory 23 into a plurality of memory blocks MB and stores one color image data of one page of image in one memory block MB. For example, when the image data for printing is composed of CMYK four-color image data, the data storage processing unit 22B displays cyan image data for one page, magenta image data for one page, Each page of yellow image data and one page of black image data are stored in one memory block MB. If there is room in the memory space of the memory 23, image data of other pages is also stored.

  In the memory block MB, the number of lines that can store the pixel data constituting the image data is the total number of nozzles in charge of printing one color of the maximum printable width W, and the size of each line Is a size that can store pixel data of the line size of the image data to be transferred (the number of pixels in the transport direction constituting the image), so that one color image data of an image with the maximum printable width W can be stored. It has become. Information such as the line size of the image data to be transferred and the number of lines in the width direction is transmitted from the transfer unit 5 in advance before the image data is transferred.

  For example, in the case of image data having a width smaller than the maximum printable width W as shown in FIG. 3B, the data storage processing unit 22B displays data for nozzles that do not eject ink during printing, as shown in FIG. Is stored in a space (storage start offset) for storing image data GC. In the image data GC, pixel data corresponding to the pixel GS located at the corner of the image to be printed first is stored in the upper left of the area, and pixel data corresponding to the pixel GE is stored in the lower right of the area. The total number of lines in which the image data GC is stored is the actual number of lines in the image.

  FIG. 8 is a diagram for explaining the state of the memory block and image data transfer according to the first embodiment of the present invention. FIG. 8A shows the correspondence between the image data stored in the memory block and the head controller to be transmitted, and FIG. 8B shows the transfer order of each line of the image data.

  In the memory block MB in which the image data is stored, as shown in FIG. 8A, image data (image data for the head 8-1) to be transferred to the head controller 7-1 is stored in order from the uppermost area. Image data to be transferred to the head controller 7-2 (image data for the head 8-2) is stored, and image data to be transferred to the head controller 7-3 (image data for the head 8-3) is stored. The image data to be transferred to the head 7-4 (image data for the head 8-4) is stored. Thereafter, the image data to be transferred to the head controller 7-5 (the image data for the head 8-5) is transferred to the head controller 7-12. Up to the image data to be transferred (image data for the head 8-12). When the image data is an image having a width smaller than the maximum printable width W, the uppermost area and the lowermost area are stored in advance in the memory block MB as shown in FIG. 8A. A NULL value indicating that no ink is ejected is set.

  The read address generation unit 22C generates an address of the memory 23 from which data is to be read based on preset information and notifies the data read processing unit 22D. Note that, even when actual image data is stored in a part of the memory block MB, an address is generated so as to read out all data in the memory block MB.

  Here, the distribution board unit 11 sends the image data to the head controller 7 in comparison with the speed at which the image data is transferred from the transfer unit 5 to the receiving board unit 10 and stored in the memory 23 and the image data is read out from the memory 23. The transfer speed is slow. For this reason, when image data to be transmitted to the same head controller 7 is continuously transmitted, the image data to all the head controllers 7 is transmitted due to the influence of the speed at which the distribution board unit 11 transmits to the same head controller 7. It will take a long time to finish.

  Therefore, in the present embodiment, the read address generation unit 22C has a different head controller for each N line so that image data can be transferred to a different head controller 7 for each predetermined N (integer greater than or equal to 1) line. The address where the image data to 7 is stored is generated.

  For example, when image data is transferred to a different head controller 7 for each line, addresses are generated in the order shown in FIG. 8B. That is, the read address generation unit 22C generates data indicating the image data L of the first line, which is data to be transferred to the head controller 7-1, and then transfers the data to the head controller 7-2. Similarly, an address indicating the image data L of the second line is generated. Similarly, an address indicating data to be transferred to each of the head controllers 7-3 to 7-11 is generated and transferred to the head controller 7-12. After generating the address indicating the image data L of the 12th line as data, the address indicating the data to be transferred to the head controller 7-1 is generated again, and all the data in the memory block MB is read out. To generate an address. In this way, for example, the addresses of data to be transferred to the head controller 7-1 are generated at the first, thirteenth, 25th, 37th, etc., and the address of the data to be transferred to the head controller 7-2 is 2nd, 14th, 26th, 38th, etc., and the addresses of data to be transferred to the head controller 7-12 are generated at the 12th, 24th, 36th, 48th,. It will be.

  The data read processing unit 22D reads data corresponding to the address generated by the read address generation unit 22C from the memory 23. In the present embodiment, the data read processing unit 22D reads N lines for each line of data corresponding to the address, and transmits the data to the data transfer unit 22F.

  Next, a process for determining the number N of lines as a unit of image data sent from the read address generator 22C to each head controller 7 will be described.

  FIG. 9 is a diagram illustrating the latency of the busy signal according to the first embodiment of the present invention.

  In this embodiment, as will be described later, when image data is transferred to one transfer destination, a distribution board unit in charge of (connected to) the head controller that is the next transfer destination in parallel A busy signal indicating whether or not image data from 11 can be received is received. For this reason, the image data cannot be transferred to the next transfer destination before receiving a busy signal indicating that the image data can be received from the distribution board unit 11 in charge of the head controller 7 as the next transfer destination. .

  In such a case, when the transfer of the image data of one transfer destination is finished, no image data is transferred, and the data transfer efficiency is lowered.

  Therefore, in the present embodiment, the number of lines of image data to be transmitted to one head controller 7 so that the image data can be transferred in the time until the busy signal from the transfer destination is received. To adjust.

  Here, there are the following five types of latency (delay) related to the busy signal.

  That is, the time TA until the distribution board unit 11-1 latches the address data (next transfer destination address) output from the receiving board unit 10, and the next (lower) distribution board unit 11 after latching the address data. After latching the time TB and the address data, the distribution board unit 11 determines whether the image data can be accepted, and is ready to send it back to the previous (upper) distribution board unit 11. The time TC until the previous distribution board unit 11 is ready to return to the previous distribution board unit 11 after the busy signal is output, and the busy board from the distribution board unit 11-1 There is a time TE from when the signal is transmitted to the unit 10 until the reception board unit 10 can determine the busy signal.

  In the present embodiment, the adjustment of the number of lines of image data is determined based on a critical path, that is, a path on which a busy signal from the lowest distribution board 11-3 returns.

  The latency TL until the busy signal returns from the lowest distribution board 11-3 is expressed by the following equation.

TL = TA + TE + TC + (TB + TD) × (number of connections of distribution board unit 11−1)
Here, the unit of TA, TB, TC, TD, TE, and TL is the number of clocks of the reference clock, and each value is measured in advance and stored in the read address generation unit 22C.

  In the present embodiment, such a data amount that requires a transfer time equal to or higher than the latency TL is transmitted to each transfer destination as a unit. For example, if 1 pixel data is 1 bit, the number of lines N such that TL × data bus width (bit / 1 clock) ≦ 1 line size × N is determined as a unit of data to be transmitted to each transfer destination. Yes. By doing so, it is possible to reduce the occurrence of time during which data is not transferred before the busy signal is received.

  The transfer destination address generation unit 22E generates an address (transfer destination address: transfer destination identification information) indicating the head controller 7 that is a transfer destination of the image data read by the data read processing unit 22D, and sends it to the data transfer unit 22F. Output. The head controller 7 serving as a transfer destination is a head controller 7 to which data corresponding to the address of the memory 23 generated by the read address generation unit 22C is to be transferred, and the arrangement, configuration, and read address of the head 8 of the printer 3 This can be determined according to the rules for generating the address of the generation unit 22C. Since the head controller 7 is connected to one of the slots 27, in this embodiment, the identification information (slot ID) of the slot 27 connected to the head controller 7 and its slot are used as the address of the head controller 7. 27, the identification information (distribution board part ID) of the distribution board part 11 having 27 is used. In this embodiment, by referring to the head controller connection information, the slot 27 connected to the head controller 7 to which the image data is to be transferred is specified, and a corresponding transfer destination address is generated. Therefore, there is no problem even if there is a slot 27 in the distribution board unit 11 to which the head controller 7 is not connected. For example, a spare slot 27 to which the head controller 7 is not connected is secured in any of the distribution board units 11, and if any slot 27 breaks down, the spare slot 27 is used for the head controller 7. By connecting and subsequently specifying the address of the slot 27, the image data can be appropriately transferred to the head controller 7. Further, the head controller 7 can be connected using the slot 27 of the newly added distribution board unit 11 by connecting the new distribution board unit 11 to the lower level of the distribution board unit 11-3. For example, by receiving connection information corresponding to the connection state in this case, the address of the slot 27 to which the head controller 7 is connected can be designated and image data can be appropriately transmitted to the desired head controller 7. it can.

  Further, the transfer destination address generation unit 22E generates an address (next transfer destination address: next transfer destination identification information) of the head controller 7 that is the next transfer destination, and outputs the generated address to the data transfer unit 22F.

  In the present embodiment, the transfer destination address is managed as follows.

  FIG. 10 is a diagram for explaining the management of transfer destination addresses according to the first embodiment of the present invention.

  The transfer destination address generation unit 22E includes a shift register including three registers. The left register of the shift register stores the current transfer destination address, the middle register stores the next transfer destination address, and the right register stores the next next transfer destination address. This shift register can move (shift) the data of each register to the left register.

  When starting transfer of image data, the transfer destination address generation unit 22E generates a first transfer destination address for transferring image data and stores it in a central register as shown in FIG. 10A. A second transfer destination address for transferring data is generated and stored in the right register. Then, the transfer destination address generation unit 22E performs data transfer using the left register value (initial value 0) as the current transfer destination address and the central register value (second transfer destination address) as the next transfer destination address. To the unit 22F. As a result, the busy signal for the transfer destination corresponding to the first transfer destination address is confirmed.

  Next, as illustrated in FIG. 10B, the transfer destination address generation unit 22E shifts the value of the shift register to the left, generates the next next transfer destination address (third transfer destination address), and stores it in the right register. Store and transmit the value of the left register (first transfer destination address) to the data transfer unit 22F as the current transfer destination address and the value of the center register (second transfer destination address) as the next transfer destination address. . As a result, the image data is transferred to the first transfer destination, and the busy signal for the second transfer destination is confirmed.

  Next, as illustrated in FIG. 10C, the transfer destination address generation unit 22E shifts the value of the shift register to the left, generates the next next transfer destination address, stores the next transfer destination address, and stores the value of the left register. Is sent to the data transfer unit 22F as the current transfer destination address and the value in the center register as the next transfer destination address. Thereafter, the transfer destination address generation unit 22E repeatedly executes this process.

  The data transfer unit 22F has an internal memory (temporary storage unit) having a FIFO (First In First Out) or double buffer structure, and temporarily stores image data from the data read processing unit 22D.

  When the data transfer unit 22F receives a notification from the Busy management unit 22G that the transfer destination that starts the transfer can accept the image data, the data transfer unit 22F sends the image data to the corresponding transfer destination in the internal memory, The transfer destination address received as the transfer destination and the next transfer destination address received as the next transfer destination are transmitted to the distribution board unit 11-1 via the connector 21. In this embodiment, when image data, a transfer destination address, and a next transfer destination address are transmitted to the distribution board unit 11-1, these data are transmitted to the lower distribution board units 11-2 and 11-3. Is done. In the present embodiment, the data transfer unit 22F transmits data for one clock of the image data to be transferred through the data bus in synchronization with one clock generated by the FPGA 22, and sets the transfer destination address and the next transfer destination address. Transmit by address bus. Since the data for one clock and the transfer destination address are transmitted in synchronization with one clock in this way, for example, the transfer destination address can be changed for each clock and transmitted. Further, when transmitting the image data, the data transfer unit 22F transmits a signal indicating that the image data being transmitted is valid, that is, a Valid signal in the H (high) state.

  The Busy management unit 22G determines whether or not the next transfer destination can accept data based on the busy signal transmitted from the distribution board unit 11-1, and notifies the data transfer unit 22F of the result. . In the present embodiment, the busy signal is set to an H (high) state when the transfer destination can accept data, and the busy signal is set to an L (low) state when the transfer destination cannot accept data. It has become.

  FIG. 11 is a functional configuration diagram of the distribution board unit according to the first embodiment of the present invention.

  The FPGA 26 of the distribution board unit 11 includes a receiving unit 26A as an example of a receiving unit and a low-level transmitting unit, a busy determining unit 26B, a data determining unit 26C, a transfer destination determining unit 26D, and a plurality of head controller transfer units ( Distribution means) 26E.

  The receiving unit 26A receives a clock, image data, a transfer destination address, a next transfer destination address, and a Valid signal transmitted from the upper connector 25A. In addition, when the Valid signal indicates that the data is valid (when the Valid signal is in the H state), the receiving unit 26A passes the image data and the transfer destination address to the own data determination unit 26C. When the Valid signal indicates that the data is not valid (when the Valid signal is in the L state), the image data and the transfer destination address are discarded. In addition, the reception unit 26A passes the next transfer destination address to the busy determination unit 26B. In addition, the receiving unit 26A transmits the clock generated by its own distribution board unit 11 to the lower distribution board unit 11, and the received image data, transfer destination address, and next transfer destination address are synchronized with the clock. It also sends a Valid signal. Here, since the distribution board unit 11 transmits the image data, the transfer destination address, and the next transfer destination address in synchronization with the clock generated by itself, the clock generated when the distribution board unit 11 is transmitted to the distribution board unit 11. And the difference between each data can be eliminated and transmitted to the lower distribution board unit 11. Therefore, the lower distribution board unit 11 can appropriately receive each data.

  The own data determination unit 26C determines whether or not the transfer destination address received from the reception unit 26A indicates the head controller 7 connected to its own distribution board unit 11. Here, whether or not the head controller 7 connected to its own distribution board unit 11 is indicated can be determined by whether or not its own identification information (distribution board unit ID) is stored in the transfer destination address. it can. Here, the identification information of the distribution board unit 11 itself is set by, for example, a dip switch (not shown). When the own data determination unit 26C determines that the head controller 7 connected to its own distribution board unit 11 is indicated, the image data received from the reception unit 26A and the transfer destination address are transferred to the transfer destination address. If it is determined that the head controller 7 connected to its own distribution board unit 11 is not shown while it is passed to the determination unit 26D, the image data and the transfer destination address are discarded.

  The transfer destination determination unit 26D specifies the slot 27 to be transmitted from the transfer destination address received from the data determination unit 26C itself. In the present embodiment, the slot 27 can be specified by the ID of the slot 27 in the transfer destination address. The transfer destination determination unit 26D transmits the image data to the head controller transfer unit 26E connected to the identified slot 27.

  The head controller transfer unit 26E has a FIFO internal memory for temporarily storing image data to be transmitted to the head controller 7. The head controller transfer unit 26E stores the image data transmitted from the transfer destination determination unit 26D in the internal memory, extracts the image data from the internal memory, and transmits the image data to the head controller 7 through the slot 27. Further, the head controller transfer unit 26E, when the storage amount of the image data stored in the internal memory of the FIFO exceeds a predetermined threshold value, indicates a signal indicating that the image data cannot be received (H state busy Signal) is output to the Busy determination unit 26B. In other cases, a signal indicating that image data can be accepted (H state busy signal) is transmitted to the Busy determination unit 26B. The threshold value may be, for example, a storage amount when there is no remaining capacity for storing image data for N lines as a transmission unit.

  The Busy determination unit 26B determines whether or not the next transfer destination address received from the reception unit 26A indicates the head controller 7 connected to its own distribution board unit 11. When the next transfer destination address indicates the head controller 7 connected to its own distribution board unit 11, the Busy determination unit 26B is connected to the head controller transfer unit 26E connected to the slot 27 corresponding to the next transfer destination address. And the busy signal transmitted from the head controller transfer unit 26E is selected and transmitted to the upper part (the receiving board unit 10 or the distribution board unit 11). On the other hand, if the next transfer destination address does not indicate the head controller 7 connected to its own distribution board unit 11, the busy determination unit 26B sends a busy signal transmitted from a lower part (distribution board unit 11). Is transmitted to the upper part (reception board unit 10 or distribution board unit 11).

  Next, image data transmission processing by the receiving board unit 10 of the printer 3 will be described.

  FIG. 12 is a flowchart of image data transmission processing by the reception board unit according to the first embodiment of the present invention.

  The image data transmission process is started after the receiving unit 22A of the receiving board unit 10 receives the image data from the transfer unit 5 and the data storage processing unit 22B stores the image data in the memory 23.

  First, the transfer destination address generation unit 22E passes the transfer destination address indicating the transfer destination head controller 7 to which image data is first transmitted to the data transfer unit 22F as the next transfer destination address. The data transfer unit 22F transmits the next transfer destination address to the distribution board unit 11-1 via the connector 21 (step S1). As a result, a busy signal indicating whether or not image data can be received from the distribution board unit 11 corresponding to the next transfer destination address is returned from the distribution board unit 11-1.

  In parallel with this, the read address generation unit 22C generates an address of the memory 23 from which image data to be transferred next is read, and passes it to the data read processing unit 22D. The data read processing unit 22D reads the image data stored at the passed address from the memory 23 and passes it to the data transfer unit 22F. As a result, the image data is stored in the data transfer unit 22F. On the other hand, the transfer destination address generator 22E generates a transfer destination address to which image data is transferred and a next transfer destination address to which the next image data is transferred, and outputs it to the data transfer unit 22F.

  The Busy management unit 22G checks the busy signal received via the connector 21 (Step S2), and indicates that the busy signal is not acceptable (is busy) (Step S3: YES). Returns to step S2. On the other hand, when the busy signal indicates that it is not acceptable (step S3: NO), the data transfer unit 22F is notified of this.

  The data transfer unit 22F transmits the image data stored in the internal memory, the transfer destination address, and the next transfer destination address to the distribution board unit 11-1, and transmits the Valid signal in the H state (Step S1). S4). As a result, a busy signal indicating whether or not image data can be received from the distribution board unit 11 corresponding to the next transfer destination address is returned from the distribution board unit 11-1.

  In parallel with this, the read address generator 22C generates an address of the memory 23 from which image data to be transferred next is read, and passes it to the data read processor 22D. The data read processing unit 22D reads the image data stored at the passed address from the memory 23 and passes it to the data transfer unit 22F. As a result, the image data is stored in the internal memory of the data transfer unit 22F. On the other hand, the transfer destination address generator 22E generates a transfer destination address to which image data is transferred and a next transfer destination address to which the next image data is transferred, and outputs it to the data transfer unit 22F.

  The data transfer unit 22F determines whether or not the data transmission in step S4 is completed (step S5). If the data transmission is not completed (step S5: NO), the data transfer unit 22F waits until the data transmission is completed.

  On the other hand, when the data transmission is completed (step S5: YES), the busy management unit 22G checks the busy signal received via the connector 21 (step S6), and the busy signal cannot be accepted (step S6). If it is busy (step S7: YES), the process returns to step S6. On the other hand, when the busy signal indicates that it cannot be accepted (step S7: NO), the fact is notified to the data transfer unit 22F. Thereby, the processing after step S4 is executed, and the image data to the next transfer destination is transmitted.

  Next, a specific example of the above-described image data transmission process will be described with reference to FIG.

  FIG. 13 is a timing chart of various signals related to transmission of image data according to the first embodiment of the present invention.

  When it is determined in step S3 in FIG. 12 that the first transfer destination is acceptable, the data transfer unit 22F, in accordance with each clock of the clock signal CLK, as shown after time T0 in FIG. Data DATA for one clock of image data to transfer destination “1” (first transfer destination), transfer destination address (“1”), and next transfer destination address (“2”) are repeatedly transmitted. In addition, the Valid signal is transmitted in the H state.

  Before the transmission of the image data to the transfer destination “1” is completed, the busy signal from the next transfer destination “2” is returned. Here, since the busy signal is in the H state at the time T1 when the transmission of the image data to the transfer destination “1” is completed, the next transfer destination “2” can accept the image data. Show.

  After the transmission of the image data to the transfer destination “1” is completed, the data transfer unit 22F transfers the image data to the transfer destination “2” in accordance with each clock of the clock signal CLK, as shown after time T1. The data DATA for one clock, the transfer destination address (“2”), and the next transfer destination address (“3”) are repeatedly transmitted, and the Valid signal is transmitted in the H state.

  Before the transmission of the image data to the transfer destination “2” is completed, the busy signal from the next transfer destination “3” is returned. Here, since the busy signal is in the L state before the time T2, the next transfer destination “3” indicates that the image data cannot be received.

  Even at time T2 when the transmission of the image data to the transfer destination “2” is completed, the busy signal remains in the L state, and the next transfer destination “3” indicates that the image data cannot be received. Therefore, the data transfer unit 22F does not transfer the image data to the transfer destination “3”. In this case, the data transfer unit 22F transmits the transfer destination address (“2”) and the next transfer destination address (“3”) in accordance with each clock of the clock signal CLK. The Valid signal is transmitted as an L state indicating that the data is not valid.

  When the busy signal is changed to the H state, the next transfer destination “3” indicates that the image data can be received. Therefore, as shown after the time T3, the data transfer unit 22F is the data DATA for one clock of the image data to the transfer destination “3”, the transfer destination address (“3”), and the next transfer destination address (“4”) in accordance with each clock of the clock signal CLK. ) Are repeatedly transmitted, and the Valid signal is transmitted in the H state.

  FIG. 14 is a flowchart of image data reception processing by the distribution board unit according to the first embodiment of the present invention.

  The receiving unit 26A of the distribution board unit 11 receives data, a transfer destination address, a next transfer destination address, and a Valid signal from the above part (the reception board unit 10 or the upper distribution board unit 11) (step S11).

  If there is a lower distribution board unit 11, the receiving unit 26 </ b> A transfers the received data, the transfer destination address and the next transfer destination address to the lower distribution board unit 11 in accordance with its own clock. The valid signal is transferred (step S12).

  In parallel with this, the receiving unit 26A determines whether or not the Valid signal indicates that the data is valid (step S13). If the data is not valid, the receiving unit 26A discards the data ( Step S14), the process is terminated.

  On the other hand, when the Valid signal indicates that the data is valid (step S13: YES), the data and the transfer destination address are passed to the own data determination unit 26C. The own data determination unit 26C determines whether or not the transfer destination address indicates the head controller 7 connected to its own distribution board unit 11, that is, the transfer destination address includes the identification information of its own distribution board unit 11. Whether or not the identification information of its own distribution board unit 11 is not included (step S15: NO), the data is discarded (step S14), and the process is terminated.

  On the other hand, when the identification information of its own distribution board unit 11 is included (step S15: YES), the own data determination unit 26C takes in the data and the transfer destination address, and sends it to the transfer destination determination unit 26D. Then, the transfer destination determination unit 26D specifies the head controller transfer unit 26E corresponding to the transfer destination address (step S17), and transfers the image data to the specified head controller transfer unit 26E. The head controller transfer unit 26E transmits the transferred image data to the head controller 7 via the slot 27 (step S18). As a result, the head controller 7 controls the head 8 connected to itself based on the image data.

  Next, an image forming system according to a second embodiment of the present invention will be described.

  FIG. 15 is a configuration diagram of an image forming system according to the second embodiment of the present invention. The same reference numerals are given to the same parts as those in the image forming system according to the first embodiment.

  The printer 3 according to the second embodiment includes the plurality of head arrays 9-1 and 9-2 in the printer 3 according to the first embodiment, and accordingly, the head controllers 7-13 to 13-13. 7-24 and the distribution part 6-2 are further provided.

  In the image forming system 1 according to the second embodiment, the transfer unit 5, the distribution unit 6-1 and the lower distribution unit 6-2 form a ring network. That is, the transfer unit 5 and the reception board unit 10 of the distribution unit 6-1 are communicably connected, and the reception board unit 10 of the distribution unit 6-1 and the reception board unit 10 of the lower distribution unit 6-2 communicate with each other. The receiving board unit 10 and the transfer unit 5 of the distribution unit 6-2 are connected so as to be communicable.

  FIG. 16 is a diagram illustrating the arrangement and configuration of the head according to the second embodiment of the present invention. FIG. 16A is a top view of the printer 3 showing the arrangement of the head, and FIG. 16B is a top view of the head. In addition, in FIG. 16A and FIG. 16B, it has shown a mode that each nozzle was seen through from the upper surface.

  In the printer 3, a plurality of head rows 9-1 and 9-2 are arranged. The configuration of the heads 8 and the arrangement of the heads 8 in each of the head rows 9-1 and 9-2 are substantially the same as the configuration of the heads 8 and the arrangement of the heads 8 in the head row 9 of the first embodiment.

  In the present embodiment, the nozzles 80C and 80M of each head 8 of the head row 9-1 and each corresponding head 8 of the head row 9-2 (the head 8 arranged at a corresponding position in the nozzle row). , 80Y, 80K are different in the arrangement position in the width direction.

  That is, as shown in FIG. 16B, the arrangement positions of the nozzles 80C, 80M, 80Y, and 80K in the head 8-1 of the nozzle row 9-1 in the width direction are the nozzles of the corresponding head 8-13 in the nozzle row 9-2. The arrangement positions in the width direction of 80C, 80M, 80Y, and 80K are shifted by half the nozzle pitch. As described above, since the arrangement positions of the nozzles in the width direction of the corresponding heads of the two head rows are shifted by half of the nozzle pitch, when an image is formed by the two head rows, the head can be formed by one head row. An image having a resolution twice that of the image can be formed.

  FIG. 17 is a diagram illustrating image data and image data transmitted to the head according to the second embodiment of the present invention.

  In the present embodiment, an image is formed with a plurality of head arrays 9-1 and 9-2 with a resolution in the width direction that is twice that of the first embodiment, so an image of the same size is printed. In this case, the image data needs to have a double resolution in the width direction. In addition, since the head rows to which the nozzles forming pixels adjacent in the width direction belong are different, the data used in each head row is alternately arranged in the data of each line in the image data.

  For example, as shown in FIG. 17, in the image data, the data for the head 8-1 in the head row 9-1 and the data for the head 8-13 in the head row 9-2 are alternately arranged, Similarly, the data for the head 8-2 in the head row 9-1 and the data for the head 8-14 in the head row 9-2 are alternately arranged.

  FIG. 18 is a functional configuration diagram of the receiving board unit according to the second embodiment of the present invention.

  The receiving board unit 10 according to the second embodiment is the same as the receiving board unit 10 according to the first embodiment, further including a slot 24B and a filtering unit 22H, and a new function added to the receiving unit 22A. is there.

  The slot 24B can be connected to a communication line with a part in the next order (another receiving board unit 10 or the transfer unit 5).

  The receiving unit 22A receives image data and the like transmitted from the upper slot 24. The receiving unit 22A transmits the received image data and the like to the next part (the lower receiving board unit 10 or the transfer unit 5) via the slot 24B.

  The filtering unit 22H takes in only the necessary data from the image data received by the receiving unit 22A by the head controller 7 connected to the distribution board unit 11 connected to the receiving unit 22A, and passes it to the data storage processing unit 22B. In the present embodiment, the line to be captured in the image data is set in the filtering unit 22H in advance, and only the necessary line image data is captured from the image data based on the setting.

  For example, when the image data shown in FIG. 17 is received from the receiving unit 22A, the heads 8-1 to 8- of the head row 9-1 in the image data are used in the filtering unit 22H of the receiving board unit 6-1. While the image data of only the line that is the data for 12 is captured, if the filtering unit 22H of the reception board unit 6-2, the data for the heads 8-13 to 8-24 of the head row 9-2 in the image data. The image data of only the line which is is taken in.

  FIG. 19 is a diagram for explaining distribution unit setting information according to the second embodiment of the present invention.

  In the present embodiment, for a part of information required by the distribution units 6-1 and 6-2, the distribution unit 6 itself has an internal register (not shown) based on the distribution unit setting information transmitted from the distribution unit 5. It can be set to. The distribution unit setting information includes the number of colors of image data, the image size in the transport direction, the image size in the width direction, and the image data to be captured by the distribution unit 6 with respect to the distribution unit ID that identifies the distribution unit 6 to be set. , The line of image data to be captured by the distribution unit 6 (capture target line), and the head controller connection state.

  Here, the head controller connection state information is information indicating the connection state (connection presence / absence) of the head controller 7 with respect to the slot 27 of the distribution board unit 11 of the corresponding distribution unit 6. 1 bit is assigned as each data to be shown, and when the head controller 7 is connected to the corresponding slot 27, the bit is set to “1”, and when not connected, the bit is set to “0”. ing. By referring to this head controller connection state, even if the head controller 7 is not connected to some of the slots 27, the transfer destination address generation unit 22E of the head controller 7 to which the image data should be transferred It is possible to identify the connected slot 27 and generate a corresponding transfer destination address.

  Next, a printer according to a third embodiment of the invention will be described.

  The printer according to the third embodiment of the present invention differs from the printer according to the second embodiment shown in FIG. 15 in the configuration and arrangement of the heads used, and the function of the filtering unit 22H of the reception board unit 10 is different. They are different only, and the other configurations are the same.

  FIG. 20 is a diagram illustrating the arrangement and configuration of the head according to the third embodiment of the invention. FIG. 20A is a top view of the printer 3 showing the arrangement of the head, and FIG. 20B is a top view of the head. In FIGS. 20A and 20B, each nozzle is shown as seen through from above.

  In the printer 3 of the present embodiment, a plurality of head rows 9-1 and 9-2 are arranged. The head row 9-1 is in charge of printing cyan and magenta, and the head row 9-2 is in charge of printing yellow and black.

  The head 15 (15-1 to 15-24) of this embodiment has four nozzle rows in which nozzles 80C, 80M, 80Y, and 80K are arranged in the width direction as shown in FIG. 20B. The two upstream nozzle rows and the two downstream nozzle rows are nozzle rows for ejecting different colors of ink. That is, for the heads 15-1 to 15-12, the two upstream nozzle rows are nozzle rows for discharging cyan, and the two downstream nozzle rows are nozzle rows for discharging magenta. . Regarding the heads 15-13 to 15-24, the two upstream nozzle rows are nozzle rows for discharging yellow, and the two downstream nozzle rows are nozzle rows for discharging black. . The positions in the width direction Y of the nozzles of the two nozzle rows for ejecting ink of each color are shifted from each other by half the nozzle pitch.

  In the present embodiment, the positions of the nozzles 80C and 80M of the heads 15-1 to 15-12 in the head row 9-1 in the width direction are the nozzles 80Y of the heads 15-13 to 15-24 of the head row 9-2, It is the same position as the arrangement position in the width direction of 80K.

  In this embodiment, the hardware configuration of the receiving board unit 10 is the same as that of the receiving board unit 10 of the second embodiment, and the filtering unit is different from the second embodiment by setting information in the receiving board unit 10 different. 22H has different functions.

  In the filtering unit 22H, a color to be captured in the image data is set. Based on the setting, the filtering unit 22H captures only necessary color image data from the image data. For example, the filtering unit 22H of the receiving board unit 10 of the distribution unit 6-1 is set to capture image data of cyan and magenta, and the filtering unit 22H of the receiving board unit 10 of the distribution unit 6-2 has a yellow color. And black image data. The setting of the filtering unit 22H can be set based on the target color in the distribution unit setting information illustrated in FIG.

  Although the present invention has been described based on the embodiments, the present invention is not limited to the above-described embodiments, and can be applied to various other modes.

  For example, in the above-described embodiment, the head row includes a plurality of heads capable of printing only a part of the maximum printable width in order to enable printing of the entire maximum printable width, and these heads are provided with the maximum printable width. However, the present invention is not limited to this, and one head capable of printing the entire maximum printable width, that is, the entire maximum printable width can be printed. One head in which a plurality of nozzles are arranged may be provided. In the above embodiment, the plurality of nozzles are arranged in the width direction. However, the present invention is not limited to this, and the plurality of nozzles are arranged in a direction that is different from the width direction and intersects the conveyance direction. In short, the nozzle may be arranged over the entire width direction.

  In the above embodiment, the head controller that controls the plurality of nozzles (nozzle group) of the entire head as a minimum unit is provided. However, the present invention is not limited to this. For example, some nozzles of the head A controller that controls a group as a unit may be provided, and the distribution board unit may transmit corresponding image data to one or more controllers.

  In the above-described embodiment, the image data, the transfer destination address, and the next transfer destination address are paired and transmitted through another signal line in synchronization with one clock. However, the present invention is not limited to this. In addition, data including a combination of the transfer destination address and the next transfer destination address may be transmitted through the same signal line.

  In the above-described embodiment, the reception board unit 10 and the plurality of distribution board units 11-1 to 11-3 are cascade-connected. However, the present invention is not limited to this. For example, the reception board unit 10 and the plurality of distribution boards The board units 11-1 to 11-3 may be connected to each other via a bus-type network. In short, it is only necessary that data can be transmitted directly or indirectly from the receiving board unit 10 to the distribution board unit.

  In the above embodiment, the transfer destination address and the next transfer destination address are transmitted at the same time. However, the present invention is not limited to this, and at least before the transfer of the image data to the transfer destination is completed, the next transfer destination is sent. The address may be transmitted. In this way, after the transmission of image data to the transfer destination is completed, the judgment result is returned more quickly than when an inquiry about the status of the next transfer destination is started. Transmission of image data to the destination can be started, and communication efficiency can be improved.

  In the above embodiment, two head rows are provided in the transport direction. However, the present invention is not limited to this, and three or more head rows may be provided in the transport direction.

  In the above embodiment, a line inkjet printer has been described as an example of the image forming apparatus. However, the present invention is not limited to this, and an image forming apparatus that ejects a liquid other than ink or a powdery substance such as toner is used. The present invention can also be applied to an image forming apparatus that flies.

1 is a configuration diagram of an image forming system according to a first embodiment of the present invention. It is a figure explaining arrangement and composition of a head concerning a 1st embodiment of the present invention. It is a figure explaining the image data based on 1st Embodiment of this invention, and the image data used for control of each head. It is a hardware block diagram of the distribution part which concerns on 1st Embodiment of this invention. It is a figure explaining the signal wire | line of the distribution part which concerns on 1st Embodiment of this invention. It is a functional block diagram of the receiving board part which concerns on 1st Embodiment of this invention. It is a figure explaining the area | region in the memory which concerns on 1st Embodiment of this invention. It is a figure explaining the state of a memory block and transfer of image data concerning a 1st embodiment of the present invention. It is a figure explaining the latency of the busy signal which concerns on 1st Embodiment of this invention. It is a figure explaining management of the forwarding address concerning a 1st embodiment of the present invention. It is a functional block diagram of the distribution board part which concerns on 1st Embodiment of this invention. It is a flowchart of the transmission process of the image data by the receiving board part which concerns on 1st Embodiment of this invention. 4 is a timing chart of various signals related to transmission of image data according to the first embodiment of the present invention. It is a flowchart of the reception process of the image data by the distribution board part which concerns on 1st Embodiment of this invention. It is a block diagram of the image forming system which concerns on 2nd Embodiment of this invention. It is a figure explaining arrangement and composition of a head concerning a 2nd embodiment of the present invention. It is a figure explaining the image data based on 2nd Embodiment of this invention, and the image data used for control of each head. It is a functional block diagram of the receiving board part which concerns on 2nd Embodiment of this invention. It is a figure explaining the distribution part setting information which concerns on 2nd Embodiment of this invention. It is a figure explaining arrangement and composition of a head concerning a 3rd embodiment of the present invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Image forming system, 2 PC, 3 line inkjet printer PC main-body part, 5 Transfer part, 6 Distribution part, 7 (7-1 to 7-12) Head controller, 8 (8-1 to 8-24) Head, 9 Head array, 10 receiving board section, 11 distribution board section, 12 belt, 21 connector, 22 FPGA, 22A receiving section, 22B data storage processing section, 22C read address generation section, 22D data read processing section, 22E transfer destination address generation section , 22F data transfer unit, 22G Busy management unit, 23 memory, 24 slot, 25 connector, 26 FPGA, 26A reception unit, 26B Busy determination unit, 26C own data determination unit, 26D transfer destination determination unit, 26E head controller transfer unit, 27 slot.

Claims (4)

A plurality of controllers for controlling the nozzle group for forming an image on the image forming medium based on the image data and a part of the plurality of controllers for controlling the nozzle group in charge of the controller A plurality of distribution processing units for transmitting the image data to the controller, and a transfer processing unit for transferring the image data to the plurality of distribution processing units,
An upper distribution processing unit and a lower distribution processing unit are communicably connected to the first distribution processing unit from the first distribution processing unit that is the highest level to the second distribution processing unit that is the lowest level. The unit is configured to be communicably connected to the transfer processing unit,
The transfer processing unit
A memory for storing image data;
Transfer destination determining means for determining transfer destination identification information indicating a controller as a transfer destination;
Image data reading means for reading image data to be transmitted to the transfer destination controller from the memory;
Data transmission means for transmitting the transfer destination identification information and the image data to the first distribution processing unit;
The distribution processing unit includes:
Receiving means for receiving the image data and the transfer destination identification information from a transfer processing unit or a higher-level distribution processing unit;
When the controller indicated by the received transfer destination identification information is a controller in charge of the distribution processing unit itself, a distribution unit that transmits the received image data to the controller;
An image forming apparatus comprising: a lower transmission unit that transmits the image data and the transfer destination identification information to a lower distribution processing unit. The transfer processing unit
It further has status information receiving means for receiving status information indicating the connection status of the controller from the external device to the distribution processing unit,
The image forming apparatus according to claim 1, wherein the transfer destination determination unit determines the transfer destination identification information of the image data based on the state information. The image forming apparatus according to claim 1, wherein the plurality of distribution processing units have the same hardware configuration. The distribution processing unit has an upper connector for communicably connecting the transfer processing unit or the upper distribution processing unit and a lower connector for communicably connecting the lower distribution processing unit. 4. The image forming apparatus according to claim 1, wherein the upper connector and the lower connector are disposed at substantially symmetrical positions with respect to a board for configuring the distribution processing unit. 5. .

Images