JP2010141216A - Laminate for flexible printed wiring board, flexible printed wiring board, and method of manufacturing the same - Google Patents

Laminate for flexible printed wiring board, flexible printed wiring board, and method of manufacturing the same Download PDF

Info

Publication number
JP2010141216A
JP2010141216A JP2008317748A JP2008317748A JP2010141216A JP 2010141216 A JP2010141216 A JP 2010141216A JP 2008317748 A JP2008317748 A JP 2008317748A JP 2008317748 A JP2008317748 A JP 2008317748A JP 2010141216 A JP2010141216 A JP 2010141216A
Authority
JP
Japan
Prior art keywords
printed wiring
flexible printed
plating layer
wiring board
laminate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2008317748A
Other languages
Japanese (ja)
Inventor
Katsuhiko Fujiwara
克彦 藤原
Hirokazu Kawamura
裕和 河村
Tatsuo Kataoka
龍男 片岡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsui Mining and Smelting Co Ltd
Original Assignee
Mitsui Mining and Smelting Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsui Mining and Smelting Co Ltd filed Critical Mitsui Mining and Smelting Co Ltd
Priority to JP2008317748A priority Critical patent/JP2010141216A/en
Priority to TW098130169A priority patent/TW201023699A/en
Priority to KR1020090100688A priority patent/KR20100068185A/en
Publication of JP2010141216A publication Critical patent/JP2010141216A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/423Plated through-holes or plated via connections characterised by electroplating method
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0201Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • H05K1/0203Cooling of mounted components
    • H05K1/0204Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate
    • H05K1/0206Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate by printed thermal vias
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/115Via connections; Lands around holes or via connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/429Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/18Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material

Abstract

<P>PROBLEM TO BE SOLVED: To provide a laminate for flexible printed wiring boards, wherein ultra-fine pitch wiring can be efficiently formed and an ultra-fine pitch COF film carrier tape or the like can be used. <P>SOLUTION: The laminate includes an insulating substrate 11 having a through hole 13 for conduction formed therein and a conductor layer 14 bonded to one surface of the insulating substrate 11, and a buried conductor plating layer 15 is provided in the through hole 13 for conduction so that a top surface of the buried conductor plating layer 15 is level with the surface of the insulating substrate 11, and a conductor plating layer 18 covering the surface of the insulating substrate 11 and the top surface of the buried conductor plating layer 15 is provided. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

本発明は、COFフィルムキャリアテープなどに用いることができるフレキシブルプリント配線基板用積層体及びフレキシブルプリント配線基板並びにこれらの製造方法に関する。   The present invention relates to a flexible printed wiring board laminate that can be used for a COF film carrier tape and the like, a flexible printed wiring board, and methods for producing the same.

絶縁フィルム、接着剤層および導電性金属箔から形成された配線パターンが形成された3層構造のTABテープあるいは絶縁フィルム上に直接導電性金属箔からなる配線パターンが形成された2層構造のCOFテープなどのプリント配線板の出力側アウターリードおよび入力側アウターリードは、例えば、液晶パネルあるいはリジッドプリント配線板の回路部と異方性導電フィルム(ACF;Anisotoropic Conductive Film)で電気的に接続される。   A three-layer TAB tape in which a wiring pattern formed from an insulating film, an adhesive layer, and a conductive metal foil is formed, or a two-layer structure COF in which a wiring pattern made of a conductive metal foil is directly formed on an insulating film The output-side outer lead and the input-side outer lead of a printed wiring board such as a tape are electrically connected to a circuit portion of a liquid crystal panel or a rigid printed wiring board, for example, by an anisotropic conductive film (ACF). .

近年液晶画面の高精細化に伴ってドライバーICチップの金バンプのファインピッチ化が進むに従いCOFなどのIC実装用プリント配線板においてもインナーリードピッチを20μm以下に細線化された回路を形成することが必要になりつつあり、15μmピッチも視野に入ってきた。   In recent years, as the fine pitch of the gold bumps on the driver IC chip has increased with the increase in the resolution of the liquid crystal screen, a circuit in which the inner lead pitch is thinned to 20 μm or less is formed on the printed wiring board for IC mounting such as COF. Is becoming necessary, and a pitch of 15 μm has entered the field of view.

このような高精細配線へ対応するに当たり、最近では、セミアディティブ(Semi−Additive)法による超ファインピッチ配線パターンの形成技術が注目されているが、コストの上昇をいかに抑えるか、また、累積ピッチ精度をいかに確保するか等の課題が残っている。   In responding to such high-definition wiring, recently, a technique for forming an ultrafine pitch wiring pattern by a semi-additive method has been attracting attention. Issues such as how to ensure accuracy remain.

一方、プリント配線板を2メタル構造にして裏側にも配線パターンを配置することで、ファインピッチ化に対応する方法も検討されている。   On the other hand, a method corresponding to a fine pitch is also being studied by arranging a printed wiring board with a two-metal structure and arranging a wiring pattern on the back side.

例えば、両面銅張り積層体に金型又はドリルなどで貫通孔を形成し、貫通孔の内周壁面に無電解銅めっきを施してさらに電気銅めっきを施して表裏銅層の導通を図り、その後、フォトリソグラフィーによりパターンを形成する方法が検討されているが、スルーホールランド間の配線の引き回しがファインピッチとなってしまい、2メタル構造とする意味が小さいという課題がある。   For example, a through-hole is formed in a double-sided copper-clad laminate with a die or a drill, electroless copper plating is applied to the inner peripheral wall surface of the through-hole, and further copper electroplating is performed to achieve conduction between the front and back copper layers, Although a method of forming a pattern by photolithography has been studied, there is a problem that the wiring between the through-hole lands has a fine pitch, and the meaning of the two-metal structure is small.

そこで、貫通孔内を銅めっきで埋め込む方法が提案されている(特許文献1参照)。この方法は絶縁層にレーザーやエッチングにより開口部を形成した後、導通化処理をした後、電解銅めっきを行うことにより開口部に銅めっきを充填する方法であるが、配線パターンを形成しながら開口部を形成して積層するプロセスであるため、プロセスが複雑となるという課題がある。   Therefore, a method of filling the through hole with copper plating has been proposed (see Patent Document 1). This method is a method of filling the opening with copper plating by performing electrolytic copper plating after forming an opening in the insulating layer by laser or etching, while forming a wiring pattern. Since this is a process of forming an opening and laminating, there is a problem that the process becomes complicated.

一方、接着剤層を有する絶縁性フィルムに両面導通用のビアホールを形成して銅箔を貼り合わせた後、ビアホールに充填めっきを行ってブラインドビアホールを形成する方法が提案されている(特許文献2参照)。   On the other hand, a method has been proposed in which a via hole for double-sided conduction is formed on an insulating film having an adhesive layer and a copper foil is bonded to the insulating film, and then a via hole is filled and plated to form a blind via hole (Patent Document 2). reference).

しかしながら、この方法では、ビアホールの1/2程度の深さまで埋めてめっきした後、一方面の銅めっき層を形成する際にビアホールの半分を埋めるので、銅めっき層の表面が完全に平坦にはならず、ファインピッチの配線の形成の妨げになるという課題がある。   However, in this method, after filling and plating to a depth of about ½ of the via hole, half of the via hole is filled when forming the copper plating layer on one side, so that the surface of the copper plating layer is completely flat In other words, there is a problem that the formation of fine pitch wiring is hindered.

特開2001−156453号公報JP 2001-156453 A 特開2005−217216号公報JP 2005-217216 A

本発明は、上述した事情に鑑み、超ファインピッチの配線を効率よく形成でき、超ファインピッチのCOFフィルムキャリアテープなどに用いることができるフレキシブルプリント配線基板用積層体及びフレキシブルプリント配線基板並びにこれらの製造方法を提供することを目的とする。   In view of the above-described circumstances, the present invention can efficiently form ultrafine pitch wiring, and can be used for an ultrafine pitch COF film carrier tape, etc., a laminate for a flexible printed wiring board, a flexible printed wiring board, and these An object is to provide a manufacturing method.

前記目的を達成する本発明の第1の態様は、導通用貫通孔が形成された絶縁基材と、この絶縁基材の一方面に接着された導電体層とを具備し、前記導通用貫通孔には埋設導電体めっき層がその上面が前記絶縁基材の表面と面一になるように設けられ、前記絶縁基材の表面及び前記埋設導電体めっき層の上面を覆う導電体めっき層が設けられていることを特徴とするフレキシブルプリント配線基板用積層体にある。   A first aspect of the present invention that achieves the above object comprises an insulating base material in which a through hole for conduction is formed, and a conductor layer bonded to one surface of the insulating base material. A buried conductor plating layer is provided in the hole so that an upper surface thereof is flush with a surface of the insulating base material, and a conductor plating layer covering the surface of the insulating base material and the upper surface of the embedded conductor plating layer is provided. It is in the laminated body for flexible printed wiring boards characterized by being provided.

かかる第1の態様では、導通用貫通孔を打ち抜き等により容易に形成した絶縁基材を用いて2メタル構造を形成でき且つ導通用貫通孔に埋め込まれた埋設導電体めっき層の上面が絶縁基材の表面と面一なので、その上に形成された導電体めっき層も平坦であり、プリント配線基板とした場合、導通用貫通孔間にファインピッチの配線を効率的に配置した配線パターンを形成することが可能となる。   In the first aspect, a two-metal structure can be formed using an insulating base material in which a through hole for conduction is easily formed by punching or the like, and the upper surface of the embedded conductor plating layer embedded in the through hole for conduction is an insulating group. Since the conductor plating layer formed on the surface of the material is flat, the printed wiring board is also flat, and when a printed wiring board is used, a wiring pattern is formed in which fine-pitch wiring is efficiently arranged between through holes for conduction. It becomes possible to do.

本発明の第2の態様は、第1の態様に記載のフレキシブルプリント配線基板用積層体において、前記導通用貫通孔が、30〜800μmの径で、60〜1600μmのピッチで設けられていることを特徴とするフレキシブルプリント配線基板用積層体にある。   According to a second aspect of the present invention, in the laminate for a flexible printed wiring board according to the first aspect, the through holes for conduction are provided with a diameter of 30 to 800 μm and a pitch of 60 to 1600 μm. A laminate for a flexible printed wiring board characterized by the above.

かかる第2の態様では、所定の径、所定のピッチで設けられた導通用貫通孔が埋設導電体めっき層により上面が面一となるように埋め込まれた導通配線が形成された2メタル構造のフレキシブルプリント配線基板用積層体となる。   In the second aspect, a two-metal structure in which a conductive wiring is formed in which conductive through holes provided with a predetermined diameter and a predetermined pitch are embedded by an embedded conductive plating layer so that the upper surface is flush with each other. It becomes a laminated body for flexible printed wiring boards.

本発明の第3の態様は、第1又は2の態様に記載のフレキシブルプリント配線基板用積層体において、前記埋設導電体めっき層が、硫酸銅五水和物の濃度が50〜90g/Lで硫酸濃度が180〜210g/Lのめっき液を用い、印加するパルスの電流密度比を正:負=1:1.2〜1:1.8の範囲のめっき条件とするPPR(周期的逆電流パルス)めっき法で形成されたものであることを特徴とするフレキシブルプリント配線基板用積層体にある。   According to a third aspect of the present invention, in the laminate for a flexible printed wiring board according to the first or second aspect, the embedded conductor plating layer has a copper sulfate pentahydrate concentration of 50 to 90 g / L. PPR (periodic reverse current) using a plating solution having a sulfuric acid concentration of 180 to 210 g / L and a current density ratio of applied pulses in the range of positive: negative = 1: 1.2 to 1: 1.8. The laminate for a flexible printed wiring board is characterized by being formed by a pulse) plating method.

かかる第3の態様では、埋設導電体めっき層となる銅めっき層を所定の条件のPPRめっきで形成することにより、上面がより確実に平坦となり、絶縁基材の表面と面一になった埋設導電体めっき層をより簡便に形成することができる。   In the third aspect, the copper plating layer to be the buried conductor plating layer is formed by PPR plating under a predetermined condition, so that the upper surface is more surely flat and is flush with the surface of the insulating substrate. A conductor plating layer can be formed more simply.

本発明の第4の態様は、第3の態様に記載のフレキシブルプリント配線基板用積層体において、前記埋設導電体めっき層の形成で印加するパルスの印加時間を、正を18〜22msec、負を0.5〜1.5msecとしたことを特徴とするフレキシブルプリント配線基板用積層体にある。   According to a fourth aspect of the present invention, in the laminate for a flexible printed wiring board according to the third aspect, the pulse application time applied in the formation of the embedded conductor plating layer is set to a positive value of 18 to 22 msec and a negative value. It is in the laminated body for flexible printed wiring boards characterized by being 0.5-1.5 msec.

かかる第4の態様では、PPR法のパルスを所定のパルスとすることにより、さらに確実に上面が平坦な埋設導電体めっき層とすることができる。   In the fourth aspect, by setting the pulse of the PPR method to a predetermined pulse, it is possible to more reliably form an embedded conductor plating layer having a flat upper surface.

本発明の第5の態様は、第1〜4の何れか1つの態様に記載のフレキシブルプリント配線基板用積層体において、前記埋設導電体めっき層が、めっき後の上面が研磨処理により平坦化されたものであることを特徴とするフレキシブルプリント配線基板用積層体にある。   According to a fifth aspect of the present invention, in the flexible printed wiring board laminate according to any one of the first to fourth aspects, the embedded conductor plating layer has a flattened upper surface after polishing by polishing. It is in the laminated body for flexible printed wiring boards characterized by the above-mentioned.

かかる第5の態様では、埋設導電体めっき層となる銅めっき層をめっきした後、研磨処理することにより、上面をより確実に平坦とすることができる。   In the fifth aspect, the upper surface can be more reliably flattened by performing a polishing process after plating a copper plating layer to be an embedded conductor plating layer.

本発明の第6の態様は、第1〜5の何れか1つの態様に記載のフレキシブルプリント配線基板用積層体において、前記絶縁基材が、放熱用貫通孔を具備し、当該放熱用貫通孔には前記埋設導電体めっき層と一緒に形成された埋設放熱用めっき層が設けられていることを特徴とするフレキシブルプリント配線基板用積層体にある。   According to a sixth aspect of the present invention, in the laminate for a flexible printed wiring board according to any one of the first to fifth aspects, the insulating base material includes a heat radiating through hole, and the heat radiating through hole. Is provided with a buried heat-dissipating plating layer formed together with the buried conductor plating layer.

かかる第6の態様では、放熱用貫通孔に埋設めっき層を設けることにより、配線から発生する熱を裏面側へ放熱することができる。   In the sixth aspect, the heat generated from the wiring can be radiated to the back surface side by providing the buried plating layer in the heat radiating through hole.

本発明の第7の態様は、第1〜6の何れか1つの態様に記載のフレキシブルプリント配線基板用積層体を用いて形成され、前記導電体層及び前記導電体めっき層のそれぞれに配線パターンが形成されていることを特徴とするフレキシブルプリント配線基板にある。   A seventh aspect of the present invention is formed using the flexible printed wiring board laminate according to any one of the first to sixth aspects, and a wiring pattern is formed on each of the conductor layer and the conductor plating layer. The flexible printed wiring board is characterized in that is formed.

かかる第7の態様では、導通用貫通孔を打ち抜き等により容易に形成した絶縁基材を用いて形成され且つ導通用貫通孔に埋め込まれた埋設導電体めっき層の上面が絶縁基材の表面と面一な2メタル構造の積層体を用いているので、導通用貫通孔間にファインピッチの配線を効率的に配置した配線パターンを有するフレキシブルプリント配線基板となる。   In the seventh aspect, the upper surface of the embedded conductor plating layer formed using the insulating base material that is easily formed by punching the through hole for conduction and embedded in the through hole for conduction is the surface of the insulating base material. Since a laminate having a flat two-metal structure is used, a flexible printed wiring board having a wiring pattern in which fine pitch wiring is efficiently arranged between through holes for conduction is obtained.

本発明の第8の態様は、第7の態様に記載のフレキシブルプリント配線基板において、前記配線パターンの端子部の配線のピッチ(ラインアンドスペース)が30μm以下、線幅(ライン)が6μm以上、配線間の間隔(スペース)が15μm以下であることを特徴とするフレキシブルプリント配線基板にある。   According to an eighth aspect of the present invention, in the flexible printed wiring board according to the seventh aspect, the wiring pitch (line and space) of the terminal portion of the wiring pattern is 30 μm or less, the line width (line) is 6 μm or more, The flexible printed wiring board is characterized in that an interval (space) between the wirings is 15 μm or less.

かかる第8の態様では、所定範囲のファインピッチの配線を有するフレキシブルプリント配線基板となる。   In the eighth aspect, a flexible printed wiring board having fine pitch wiring within a predetermined range is obtained.

本発明の第9の態様は、絶縁基材に導通用貫通孔を形成する工程と、この絶縁基材の一方面に導電体層を接着する工程と、前記導通用貫通孔に埋設導電体めっき層をその上面が前記絶縁基材の表面と面一となるように形成する工程と、前記絶縁基材の表面及び前記埋設導電体めっき層の上面を覆うように導電体めっき層を設ける工程とを具備することを特徴とするフレキシブルプリント配線基板用積層体の製造方法にある。   A ninth aspect of the present invention includes a step of forming a through hole for conduction in an insulating base material, a step of adhering a conductor layer to one surface of the insulating base material, and an embedded conductor plating in the through hole for conduction Forming a layer so that the upper surface thereof is flush with the surface of the insulating substrate, and providing a conductor plating layer so as to cover the surface of the insulating substrate and the upper surface of the embedded conductor plating layer; In the manufacturing method of the laminated body for flexible printed wiring boards characterized by comprising.

かかる第9の態様では、導通用貫通孔を打ち抜き等により容易に形成した絶縁基材を用いて2メタル構造を比較的簡便に形成でき且つ導通用貫通孔に埋め込まれた埋設導電体めっき層の上面が絶縁基材の表面と面一なので、その上に形成された導電体めっき層も平坦であり、プリント配線基板とした場合、導通用貫通孔間にファインピッチの配線を効率的に配置した配線パターンを形成することが可能なプリント配線基板用積層体を製造できる。   In the ninth aspect, a two-metal structure can be formed relatively easily using an insulating base material in which a through hole for conduction is easily formed by punching or the like, and an embedded conductor plating layer embedded in the through hole for conduction is provided. Since the top surface is flush with the surface of the insulating base material, the conductor plating layer formed on it is also flat. When a printed wiring board is used, fine-pitch wiring is efficiently arranged between through holes for conduction. A laminate for a printed wiring board capable of forming a wiring pattern can be manufactured.

本発明の第10の態様は、第9の態様に記載のフレキシブルプリント配線基板用積層体の製造方法において、前記導通用貫通孔が、30〜800μmの径で、60〜1600μmのピッチで設けられていることを特徴とするフレキシブルプリント配線基板用積層体の製造方法にある。   According to a tenth aspect of the present invention, in the method for manufacturing a laminate for a flexible printed wiring board according to the ninth aspect, the through holes for conduction are provided with a diameter of 30 to 800 μm and a pitch of 60 to 1600 μm. The method for producing a laminate for a flexible printed circuit board is characterized in that:

かかる第10の態様では、所定の径で所定のピッチで設けられた導通用貫通孔が埋設導電体めっき層により上面が面一となるように埋め込まれた導通配線が形成された2メタル構造のフレキシブルプリント配線基板用積層体を製造できる。   In the tenth aspect, a two-metal structure in which a conductive wiring in which conductive through holes provided with a predetermined diameter and a predetermined pitch are embedded by an embedded conductive plating layer so that the upper surface is flush with each other is formed. A laminate for a flexible printed wiring board can be manufactured.

本発明の第11の態様は、第9又は10の態様に記載のフレキシブルプリント配線基板用積層体の製造方法において、前記埋設導電体めっき層を、硫酸銅五水和物の濃度が50〜90g/Lで硫酸濃度が180〜210g/Lのめっき液を用い、印加するパルスの電流密度比を正:負=1:1.2〜1:1.8の範囲のめっき条件とするPPR(周期的逆電流パルス)めっき法で形成することを特徴とするフレキシブルプリント配線基板用積層体の製造方法にある。   An eleventh aspect of the present invention is the method for producing a laminate for a flexible printed wiring board according to the ninth or tenth aspect, wherein the buried conductor plating layer has a copper sulfate pentahydrate concentration of 50 to 90 g. PPR (period) using a plating solution having a sulfuric acid concentration of 180 to 210 g / L at a flow rate of / L and a current density ratio of applied pulses in the range of positive: negative = 1: 1.2 to 1: 1.8 In the manufacturing method of the laminated body for flexible printed wiring boards, it is formed by a plating method.

かかる第11の態様では、埋設導電体めっき層となる銅めっき層を所定の条件のPPRめっきで形成することにより、上面がより確実に平坦となり、絶縁基材の表面と面一になった埋設導電体めっき層をより簡便に形成することができる。   In the eleventh aspect, the copper plating layer to be the buried conductor plating layer is formed by PPR plating under a predetermined condition, so that the upper surface is more surely flat and is flush with the surface of the insulating substrate. A conductor plating layer can be formed more simply.

本発明の第12の態様は、第11の態様に記載のフレキシブルプリント配線基板用積層体において、前記埋設導電体めっき層の形成で印加するパルスの印加時間を、正を18〜22msec、負を0.5〜1.5msecとしたことを特徴とするフレキシブルプリント配線基板用積層体の製造方法にある。   According to a twelfth aspect of the present invention, in the laminate for a flexible printed wiring board according to the eleventh aspect, the pulse application time applied in the formation of the embedded conductor plating layer is set to a positive value of 18 to 22 msec and a negative value. It is in the manufacturing method of the laminated body for flexible printed wiring boards characterized by being 0.5-1.5 msec.

かかる第11の態様では、PPR法のパルスを所定のパルスとすることにより、さらに確実に上面が平坦な埋設導電体めっき層とすることができる。   In the eleventh aspect, by setting the pulse of the PPR method to a predetermined pulse, it is possible to more reliably form an embedded conductor plating layer having a flat upper surface.

本発明の第13の態様は、第9〜12の何れかの1つの態様に記載のフレキシブルプリント配線基板用積層体の製造方法において、前記埋設導電体めっき層を、めっき後の上面を研磨処理により平坦化して形成することを特徴とするフレキシブルプリント配線基板用積層体の製造方法にある。   According to a thirteenth aspect of the present invention, in the method for manufacturing a laminate for a flexible printed wiring board according to any one of the ninth to twelfth aspects, the embedded conductor plating layer is polished on the upper surface after plating. It is in the manufacturing method of the laminated body for flexible printed wiring boards characterized by forming by flattening.

かかる第13の態様では、埋設導電体めっき層となる銅めっき層をめっきした後、研磨処理することにより、上面をより確実に平坦とすることができる。   In the thirteenth aspect, the upper surface can be more reliably flattened by performing a polishing process after plating a copper plating layer to be an embedded conductor plating layer.

本発明の第14の態様は、第9〜13の何れか1つの態様に記載のフレキシブルプリント配線基板用積層体の製造方法において、前記絶縁基材に、前記導通用貫通孔と共に放熱用貫通孔を形成し、前記埋設導電体めっき層の形成の際に前記放熱用貫通孔を埋設するように埋設放熱用めっき層を形成することを特徴とするフレキシブルプリント配線基板用積層体の製造方法にある。   According to a fourteenth aspect of the present invention, in the method for manufacturing a laminate for a flexible printed wiring board according to any one of the ninth to thirteenth aspects, a heat dissipation through hole is formed in the insulating base material together with the conduction through hole. And forming a buried heat-dissipating plating layer so as to embed the heat-dissipating through-holes when forming the buried conductor plating layer. .

かかる第14の態様では、放熱用貫通孔に埋設放熱用めっき層を設けることにより、埋設放熱用めっき層上に実装したチップ部品から発生する熱を裏面側へ放熱することができるフレキシブルプリント配線基板用積層体を製造できる。   In the fourteenth aspect, the flexible printed wiring board can dissipate heat generated from the chip component mounted on the embedded heat-dissipating plating layer to the back surface side by providing the embedded heat-dissipating plating layer in the heat-dissipating through hole. Can be produced.

本発明の第15の態様は、第9〜14の何れか1つの態様に記載の製造方法により得られたフレキシブルプリント配線基板用積層体の前記導電体層及び前記導電体めっき層のそれぞれに配線パターンを形成する工程をさらに具備することを特徴とするフレキシブルプリント配線基板の製造方法にある。   According to a fifteenth aspect of the present invention, wiring is provided to each of the conductor layer and the conductor plating layer of the laminate for a flexible printed wiring board obtained by the manufacturing method according to any one of the ninth to fourteenth aspects. The method of manufacturing a flexible printed wiring board further includes a step of forming a pattern.

かかる第15の態様では、導通用貫通孔を打ち抜き等により容易に形成した絶縁基材を用いて形成でき且つ導通用貫通孔に埋め込まれた埋設導電体めっき層の上面が絶縁基材の表面と面一な2メタル構造の積層体を用いて製造するので、導通用貫通孔間にファインピッチの配線を効率的に配置した配線パターンを有するフレキシブルプリント配線基板を製造できる。   In the fifteenth aspect, the upper surface of the buried conductor plating layer embedded in the through hole for conduction can be formed using an insulating base material in which the through hole for conduction is easily formed by punching or the like. Since it manufactures using the laminated body of a flat 2 metal structure, the flexible printed wiring board which has a wiring pattern which has arrange | positioned the fine pitch wiring efficiently between the through-holes for conduction | electrical_connection can be manufactured.

本発明の第16の態様は、第15の態様に記載のフレキシブルプリント配線基板の製造方法において、前記配線パターンの形成の際に、端子部の配線のピッチ(ラインアンドスペース)が30μm以下、線幅(ライン)が6μm以上、配線間の間隔(スペース)が15μm以下である配線パターンを形成することを特徴とするフレキシブルプリント配線基板の製造方法にある。   According to a sixteenth aspect of the present invention, in the method for manufacturing a flexible printed wiring board according to the fifteenth aspect, when the wiring pattern is formed, the wiring pitch (line and space) of the terminal portion is 30 μm or less, A flexible printed wiring board manufacturing method is characterized in that a wiring pattern having a width (line) of 6 μm or more and an interval (space) between wirings of 15 μm or less is formed.

かかる第16の態様では、所定範囲のファインピッチの配線を有するフレキシブルプリント配線基板を製造できる。   In the sixteenth aspect, a flexible printed wiring board having fine pitch wiring within a predetermined range can be manufactured.

以下、本発明の一実施形態に係るフレキシブルプリント配線基板用積層体及びフレキシブルプリント配線基板の一例を実施例に基づいて説明する。   Hereinafter, an example of a laminate for a flexible printed wiring board and a flexible printed wiring board according to an embodiment of the present invention will be described based on examples.

図1には、一実施形態に係るフレキシブルプリント配線基板用積層体の断面図、図2には、フレキシブルプリント配線基板の断面図を示す。   FIG. 1 is a cross-sectional view of a laminate for a flexible printed wiring board according to an embodiment, and FIG. 2 is a cross-sectional view of the flexible printed wiring board.

図1に示すように、本実施形態のフレキシブルプリント配線基板用積層体10は、フレキシブルな絶縁基材11と、絶縁基材11の一方面に接着剤層12を介して接着された金属箔からなる導電体層14と、絶縁基材11に形成された複数の導通用貫通孔13に埋設された埋設導電体めっき層15と、絶縁基材11の他方面側に設けられた第1の導電体めっき層及び第2の導電体めっき層からなる導電体めっき層18とを具備する積層構造を有する。   As shown in FIG. 1, a laminate 10 for a flexible printed wiring board according to this embodiment includes a flexible insulating base 11 and a metal foil bonded to one surface of the insulating base 11 via an adhesive layer 12. A conductive layer 14, an embedded conductor plating layer 15 embedded in a plurality of through holes 13 for conduction formed in the insulating base 11, and a first conductive provided on the other surface side of the insulating base 11. It has a laminated structure including a body plating layer and a conductor plating layer 18 composed of a second conductor plating layer.

ここで、埋設導電体めっき層15の上面は、絶縁基材11の表面と面一となっており、絶縁基材11の表面及び埋設導電体めっき層15の上面に設けられた第1のめっき層16及び第2のめっき層17は、埋設導電体めっき層15と完全に導通し且つ絶縁基材11と埋設導電体めっき層15との境界付近においても平坦に形成されている。また、第1のめっき層16及び第2のめっき層17が、本実施例の導電体めっき層18となる。   Here, the upper surface of the embedded conductor plating layer 15 is flush with the surface of the insulating substrate 11, and the first plating provided on the surface of the insulating substrate 11 and the upper surface of the embedded conductor plating layer 15. The layer 16 and the second plating layer 17 are completely conductive with the embedded conductor plating layer 15 and are formed flat even in the vicinity of the boundary between the insulating base material 11 and the embedded conductor plating layer 15. Moreover, the 1st plating layer 16 and the 2nd plating layer 17 become the conductor plating layer 18 of a present Example.

図2は、このようなフレキシブルプリント配線基板用積層体10を用いて製造されたフレキシブルプリント配線基板の断面図である。フレキシブルプリント配線基板20は、導電体層14と、導電体めっき層18とを、フォトグラフィープロセスによりパターニングし、絶縁基材11の両面に第1の配線パターン21及び第2の配線パターン22を形成したものであり、第1及び第2の配線パターン21、22は、埋設導電体めっき層15を介して適宜接続されて一体となる配線パターンを構成している。   FIG. 2 is a cross-sectional view of a flexible printed wiring board manufactured using such a flexible printed wiring board laminate 10. The flexible printed wiring board 20 forms the first wiring pattern 21 and the second wiring pattern 22 on both surfaces of the insulating base material 11 by patterning the conductor layer 14 and the conductor plating layer 18 by a photolithography process. Thus, the first and second wiring patterns 21 and 22 are appropriately connected via the embedded conductor plating layer 15 to form an integrated wiring pattern.

以下、フレキシブルプリント配線基板用積層体10及びフレキシブルプリント配線基板20について、製造方法を例示しながら、さらに詳細に説明する。   Hereinafter, the laminate 10 for the flexible printed wiring board and the flexible printed wiring board 20 will be described in more detail while illustrating the manufacturing method.

図3及び図4に、フレキシブルプリント配線基板用積層体の製造方法の一例を示す。同図(a)に示すように、まず、絶縁基材11の一方面に接着剤層12を設けた積層体を用意する。   3 and 4 show an example of a method for manufacturing a flexible printed circuit board laminate. As shown in FIG. 1A, first, a laminate in which an adhesive layer 12 is provided on one surface of an insulating base material 11 is prepared.

ここで絶縁基材11は、絶縁性樹脂からなる板、フィルム、シート、プリプレグなど、通常の絶縁基材として使用されているものであれば特に限定することなく使用することができる。ただし、本発明のプリント配線基板をリール・トゥ・リール方式で連続的に製造するためには、この絶縁基材11が長尺であり、可撓性を有してフレキシブルであることが望ましく、また、プリント配線基板を製造する工程において、この絶縁基材11は、酸性溶液あるいはアルカリ性溶液と接触することがあることから耐薬品性に優れていることが望ましく、さらに、高温に晒されることがあることから耐熱性に優れていることが望ましい。また、この絶縁基材11を用いてメッキ工程により配線パターンを製造することから、水との接触により、変性あるいは変形しないものであることが望ましい。こうした観点から本発明で使用する絶縁基材11としては、耐熱性の合成樹脂フィルムを使用することが好ましく、特にポリイミドフィルム、ポリアミドイミドフィルム、ポリエチレンテレフタレート(PET)樹脂フィルム、フッ素樹脂フィルム、液晶ポリマーフィルムなど、プリント配線基板の製造に通常使用されている樹脂フィルムを使用することが好ましく、これらの中でも耐熱性、耐薬品性、耐水性などの特性に優れるポリイミドフィルムが特に好ましい。また、本発明において絶縁基材11は上記のようなフィルム状である必要性はなく、例えば繊維状物とエポキシ樹脂などの複合体からなる板状の絶縁基材であっても良い。   Here, the insulating substrate 11 can be used without particular limitation as long as it is used as a normal insulating substrate such as a plate, film, sheet, prepreg made of an insulating resin. However, in order to continuously manufacture the printed wiring board of the present invention in a reel-to-reel method, it is desirable that the insulating base material 11 is long, flexible and flexible, Further, in the process of manufacturing a printed wiring board, the insulating base material 11 is preferably excellent in chemical resistance because it may come into contact with an acidic solution or an alkaline solution, and may be exposed to a high temperature. For this reason, it is desirable to have excellent heat resistance. Moreover, since a wiring pattern is manufactured by a plating process using this insulating base material 11, it is desirable that it is not modified or deformed by contact with water. From this point of view, it is preferable to use a heat-resistant synthetic resin film as the insulating substrate 11 used in the present invention, and in particular, a polyimide film, a polyamideimide film, a polyethylene terephthalate (PET) resin film, a fluororesin film, a liquid crystal polymer. It is preferable to use a resin film that is usually used for the production of a printed wiring board, such as a film, and among these, a polyimide film excellent in characteristics such as heat resistance, chemical resistance, and water resistance is particularly preferable. In the present invention, the insulating substrate 11 is not necessarily in the form of a film as described above, and may be a plate-shaped insulating substrate made of a composite material such as a fibrous material and an epoxy resin.

絶縁基材11の厚さは、10〜100μm、好ましくは、20〜40μmであり、耐熱樹脂フィルムとして製造されているものを用いるのがコスト、取り扱いの面で好ましく、フレキシブルプリント配線基材の基材として市販されているポリイミド系フィルム又はポリアミドイミド系フィルムを用いるのが好ましい。特に、ピロメリット酸2無水物と4,4’−ジアミノジフェニルエーテルの重合によって得られる全芳香族ポリイミド(例えば、商品名:カプトン;東レ・デュポン社製)や、ビフェニルテトラカルボン酸−2無水物とパラフェニレンジアミン(PPD)との重合物(例えば、商品名:ユーピレックスS;宇部興産社製)、アピカル(商品名;カネカ社製)などを用いるのが好ましい。   The thickness of the insulating substrate 11 is 10 to 100 μm, preferably 20 to 40 μm, and it is preferable to use a heat-resistant resin film manufactured in terms of cost and handling. It is preferable to use a commercially available polyimide film or polyamideimide film as the material. In particular, a wholly aromatic polyimide obtained by polymerization of pyromellitic dianhydride and 4,4′-diaminodiphenyl ether (for example, trade name: Kapton; manufactured by Toray DuPont), biphenyltetracarboxylic acid-2 anhydride, It is preferable to use a polymer with paraphenylenediamine (PPD) (for example, trade name: Upilex S; manufactured by Ube Industries), apical (trade name: manufactured by Kaneka Corporation), and the like.

接着剤層12は、例えば、ポリアミド系接着剤、エポキシ系接着剤などの絶縁性の接着剤を用いて形成すればよく、厚さは、例えば、5〜25μm、好ましくは、8〜12μmである。   The adhesive layer 12 may be formed using, for example, an insulating adhesive such as a polyamide adhesive or an epoxy adhesive, and the thickness is, for example, 5 to 25 μm, preferably 8 to 12 μm. .

次に、図3(b)に示すように、絶縁基材11と接着剤層12との積層体に、複数の導通用貫通孔13を所定の配置で形成する。かかる導通用貫通孔13は、ドリルによる穿孔、金型を用いたパンチング法、レーザー穿設法などによって形成すればよいが、パンチング法により形成するのがコスト的にも好ましい。   Next, as shown in FIG. 3 (b), a plurality of through holes 13 for conduction are formed in a predetermined arrangement in the laminated body of the insulating base material 11 and the adhesive layer 12. The conduction through-hole 13 may be formed by drilling, punching using a die, laser drilling, or the like, but it is preferable from the viewpoint of cost to form the through-hole 13 for conduction.

なお、図示は省略するが、絶縁基材11の幅方向両側には、搬送用又は位置決め用のスプロケットホール(又はパーフォレーション孔)が形成されるが、かかるスプロケットホールは、導通用貫通孔13と同時に形成するようにしてもよいが、この工程に先立って又はこの工程の後の別工程で形成してもよく、特に限定されない。   Although illustration is omitted, sprocket holes (or perforation holes) for conveyance or positioning are formed on both sides of the insulating base material 11 in the width direction. These sprocket holes are formed simultaneously with the through holes 13 for conduction. Although it may be formed, it may be formed prior to this step or in another step after this step, and is not particularly limited.

次に、図3(c)に示すように、絶縁基材11の接着剤層12が設けられた一方面側に、導電体層14を貼り付ける。この貼り付けは、例えば、熱ロールなどによる仮圧着を行った後、加熱処理による接着処理を行うことにより実施する。   Next, as shown in FIG.3 (c), the conductor layer 14 is affixed on the one surface side in which the adhesive bond layer 12 of the insulating base material 11 was provided. This affixing is performed, for example, by performing a temporary pressure bonding with a hot roll or the like and then performing a bonding process by heat treatment.

ここで、導電体層14は、金属箔からなり、フレキシブルプリント配線基材として使用できる厚さ、品質を有していれば、特に限定されない。一般的には、5〜35μm程度の厚さのものが用いられる。また、製造工程での取り扱い性の点から、製造過程ではキャリア付き金属箔を用い、最後にキャリアを除去するようにしてもよい。また、金属箔としては、銅箔、アルミ箔などを挙げることができ、キャリアとしては銅箔やアルミ箔などを挙げることができる。   Here, if the conductor layer 14 consists of metal foil and has thickness and quality which can be used as a flexible printed wiring base material, it will not specifically limit. Generally, a thickness of about 5 to 35 μm is used. Further, from the viewpoint of handling in the manufacturing process, a metal foil with a carrier may be used in the manufacturing process, and the carrier may be finally removed. In addition, examples of the metal foil include copper foil and aluminum foil, and examples of the carrier include copper foil and aluminum foil.

次に、図3(d)に示すように、導通用貫通孔13を埋設するように埋設導電体めっき層15を形成する。埋設導電体めっき層15は、電気めっき法などにより形成すればよいが、最終的に、上面が絶縁基材11の表面と面一となるように形成する必要がある。   Next, as shown in FIG. 3D, an embedded conductor plating layer 15 is formed so as to embed the through-holes 13 for conduction. The embedded conductor plating layer 15 may be formed by an electroplating method or the like, but finally it is necessary to form the upper surface so as to be flush with the surface of the insulating base material 11.

よって、図4(a)に示すように、絶縁基材11の表面より盛り上がるようにめっき層15Aを形成したのち、図4(b)に示すように、化学研磨やバフ研磨により上面が面一となるめっき層15Bとしてもよい。なお、かかる研磨工程はめっき層15A上に導電体めっき層を形成した後、行ってもよいが、全体に亘って平坦な状態を形成するためには、埋設導電体めっき層15の上面が絶縁基材と面一になるように研磨した後、導電体めっき層を設けるのが好ましい。   Therefore, after forming the plating layer 15A so as to rise from the surface of the insulating base 11 as shown in FIG. 4A, the upper surface is flushed by chemical polishing or buffing as shown in FIG. 4B. It is good also as plating layer 15B used as follows. The polishing step may be performed after the conductor plating layer is formed on the plating layer 15A. However, in order to form a flat state throughout, the upper surface of the embedded conductor plating layer 15 is insulated. After polishing to be flush with the substrate, it is preferable to provide a conductor plating layer.

また、PPR(周期的逆電流パルス)めっき法により、上面が面一となるようにめっきして研磨工程を行わなくてもよい。   Further, it is not necessary to perform the polishing step by plating so that the upper surface is flush with the PPR (periodic reverse current pulse) plating method.

ここで、埋設導電体めっき層15を銅めっき層として、PPRめっき法により形成する場合、硫酸銅五水和物の濃度が50〜90g/Lで硫酸濃度が180〜210g/Lのめっき液を用い、印加するパルスの電流密度比を正:負=1:1.2〜1:1.8の範囲のめっき条件でめっきするのが好ましい。これにより、上面が平坦で絶縁基材11の表面と面一となるように埋設導電体めっき層15を形成することができる。本件において、正とは銅めっきが試料に付着する方向であり、負とは銅めっきが溶解する方向を意味する。   Here, when the buried conductor plating layer 15 is formed as a copper plating layer by the PPR plating method, a plating solution having a copper sulfate pentahydrate concentration of 50 to 90 g / L and a sulfuric acid concentration of 180 to 210 g / L is used. It is preferable to perform plating under a plating condition in which the current density ratio of the applied pulse is in the range of positive: negative = 1: 1.2 to 1: 1.8. Thereby, the embedded conductor plating layer 15 can be formed so that the upper surface is flat and flush with the surface of the insulating base material 11. In this case, positive means the direction in which the copper plating adheres to the sample, and negative means the direction in which the copper plating dissolves.

また、特に、印加するパルスを、正が18〜22msec、負が0.5〜1.5msecとなるようなパルスとするのが好ましく、電流密度は1〜4A/dmとするのが好ましい。このようなめっき条件とすることにより、より確実に表面が平坦な配線を形成できる。 In particular, the pulse to be applied is preferably a pulse having a positive value of 18 to 22 msec and a negative value of 0.5 to 1.5 msec, and the current density is preferably 1 to 4 A / dm 2 . By setting it as such plating conditions, the wiring with a flat surface can be formed more reliably.

次いで、図3(e)に示すように、絶縁基材11の表面及び埋設導電体めっき層15の上面を覆うように、例えば、ニッケルからなる無電解めっき層16を、例えば、0.01〜0.2μmの厚さで設ける。かかる無電解めっき層16をより確実に且つ密着性よく形成するために、無電解めっきに先だってめっき前処理を行うのが好ましい。このめっき前処理は、例えば、絶縁基材11の上面を脱脂、アルカリ処理などを行った後、必要に応じて触媒などを含有する下地層を形成するものである。例えば、絶縁基材11がポリイミドの場合、脱脂し、アルカリ改質することにより、ポリイミド環を開環させ、その後、触媒化処理した後、還元するような前処理を行うのが好ましい。   Next, as shown in FIG. 3 (e), for example, an electroless plating layer 16 made of nickel is coated on the surface of the insulating substrate 11 and the upper surface of the embedded conductor plating layer 15, for example, 0.01 to It is provided with a thickness of 0.2 μm. In order to form the electroless plating layer 16 more reliably and with good adhesion, it is preferable to perform a plating pretreatment prior to the electroless plating. In this plating pretreatment, for example, the upper surface of the insulating substrate 11 is degreased and subjected to an alkali treatment, and then a base layer containing a catalyst or the like is formed as necessary. For example, when the insulating base material 11 is polyimide, it is preferable to perform pretreatment such as degreasing and alkali modification to open the polyimide ring, and then performing catalytic treatment and then reduction.

次に、図3(f)に示すように、無電解めっき層16の上に、例えば、銅からなる電気めっき層17を、例えば、1〜15μmの厚さで形成する。これにより、無電解めっき層16及び電気めっき層17からなる導電体めっき層18を形成する。   Next, as shown in FIG. 3F, an electroplating layer 17 made of, for example, copper is formed on the electroless plating layer 16 with a thickness of, for example, 1 to 15 μm. Thereby, the conductor plating layer 18 including the electroless plating layer 16 and the electroplating layer 17 is formed.

なお、無電解めっき層16及び電気めっき層17を形成する際には、裏面側はレジストなどでマスクしておく必要があるが、無電解めっき層16及び電気めっき層17の何れか又は両方と同時に裏面にもめっき層を設けるようにしてもよい。   Note that when the electroless plating layer 16 and the electroplating layer 17 are formed, the back side needs to be masked with a resist or the like, but either or both of the electroless plating layer 16 and the electroplating layer 17 are used. At the same time, a plating layer may be provided on the back surface.

また、上述したプロセスでは、導電体めっき層18が無電解めっき層16及び電気めっき層17からなるものとしたが、全体を無電解めっきで形成してもよい。   In the above-described process, the conductor plating layer 18 is composed of the electroless plating layer 16 and the electroplating layer 17, but the whole may be formed by electroless plating.

図5には、フレキシブルプリント配線基板20の製造方法の一例を示す。
図5(a)に示すようなフレキシブルプリント配線基板用積層体10を用意し、図5(b)に示すように、導電体層14全体を覆うマスクレジスト層101を設けると共に導電体めっき層18上に所定の形状にパターニングしたレジストパターン層102を形成する。
In FIG. 5, an example of the manufacturing method of the flexible printed wiring board 20 is shown.
A flexible printed circuit board laminate 10 as shown in FIG. 5A is prepared. As shown in FIG. 5B, a mask resist layer 101 covering the entire conductor layer 14 is provided and the conductor plating layer 18 is provided. A resist pattern layer 102 patterned in a predetermined shape is formed thereon.

次に、図5(c)に示すように、マスクレジスト層101及びレジストパターン層102をマスクとして導電体めっき層18をエッチングし、マスクレジスト層101及びレジストパターン層102を除去することにより、第1の配線パターン21を形成する。なお、第1の配線パターン21は、必要な箇所の埋設導電体めっき層15と導通したものとすることができる。   Next, as shown in FIG. 5C, the conductor plating layer 18 is etched using the mask resist layer 101 and the resist pattern layer 102 as a mask, and the mask resist layer 101 and the resist pattern layer 102 are removed. 1 wiring pattern 21 is formed. Note that the first wiring pattern 21 can be electrically connected to the buried conductive plating layer 15 at a necessary location.

次に、図5(d)に示すように、第1の配線パターン21を覆うマスクレジスト層103を設けると共に、導電体層14上に所定の形状にパターニングしたレジストパターン層104を形成する。   Next, as shown in FIG. 5D, a mask resist layer 103 that covers the first wiring pattern 21 is provided, and a resist pattern layer 104 that is patterned into a predetermined shape is formed on the conductor layer 14.

続いて、図5(e)に示すように、マスクレジスト層103及びレジストパターン層104をマスクとして導電体層14をエッチングし、マスクレジスト層103及びレジストパターン層104を除去することにより、第2の配線パターン22を形成する。かかる第2の配線パターン22は、所定の箇所の埋設導電体めっき層15を介して第1の配線パターン21と導通されており、第1の配線パターン21及び埋設導電体めっき層15と共に配線パターンを構成するものとなる。   Subsequently, as shown in FIG. 5E, the conductor layer 14 is etched using the mask resist layer 103 and the resist pattern layer 104 as a mask, and the mask resist layer 103 and the resist pattern layer 104 are removed, whereby the second The wiring pattern 22 is formed. The second wiring pattern 22 is electrically connected to the first wiring pattern 21 via the buried conductor plating layer 15 at a predetermined location, and the wiring pattern together with the first wiring pattern 21 and the buried conductor plating layer 15. It becomes what constitutes.

なお、このようにして配線パターン21、22の少なくとも一部を覆うようにソルダーレジスト層を形成してフレキシブルプリント配線基板20とすることができる。   The flexible printed wiring board 20 can be formed by forming a solder resist layer so as to cover at least a part of the wiring patterns 21 and 22 in this way.

図6及び図7には、フレキシブルプリント配線基板の製造方法の他の例を示す。この製造方法は、セミアディティブ法によるものであるので、図6(a)に示すように、厚さが比較的薄い導電体めっき層19を有するフレキシブルプリント配線基板用積層体10Aを用意した。   6 and 7 show another example of a method for manufacturing a flexible printed wiring board. Since this manufacturing method is based on a semi-additive method, as shown in FIG. 6A, a flexible printed wiring board laminate 10A having a conductive plating layer 19 with a relatively small thickness was prepared.

次に、図6(b)に示すように、導電体層14全体を覆うマスクレジスト層111を設けると共に導電体めっき層19上に所定の形状にパターニングしたレジストパターン層112を形成する。   Next, as shown in FIG. 6B, a mask resist layer 111 covering the entire conductor layer 14 is provided, and a resist pattern layer 112 patterned in a predetermined shape is formed on the conductor plating layer 19.

次に、図6(c)に示すように、マスクレジスト層111及びレジストパターン層112をマスクとして導電体めっき層19が露出した領域にセミアディティブめっき層31を形成し、その後、図6(d)に示すように、マスクレジスト層111及びレジストパターン層112を除去する。   Next, as shown in FIG. 6C, a semi-additive plating layer 31 is formed in a region where the conductor plating layer 19 is exposed using the mask resist layer 111 and the resist pattern layer 112 as a mask. ), The mask resist layer 111 and the resist pattern layer 112 are removed.

次に、図7(a)に示すように、セミアディティブめっき層31をマスクとして導電体めっき層19をフラッシュエッチングしてセミアディティブめっき層31と、その下層となる同一パターンの導電体めっき層パターン19Aとからなる第1の配線パターン32を形成する。なお、第1の配線パターン32は、必要な箇所の埋設導電体めっき層15と導通したものすることができる。   Next, as shown in FIG. 7 (a), the conductive plating layer 19 is flash-etched using the semi-additive plating layer 31 as a mask, and the semi-additive plating layer 31 and the conductive plating layer pattern of the same pattern as the lower layer are formed. A first wiring pattern 32 made of 19A is formed. The first wiring pattern 32 can be electrically connected to the buried conductive plating layer 15 at a necessary location.

次に、図7(b)に示すように、第1の配線パターン32を覆うマスクレジスト層113を設けると共に、導電体層14上に所定の形状にパターニングしたレジストパターン層114を形成する。   Next, as shown in FIG. 7B, a mask resist layer 113 covering the first wiring pattern 32 is provided, and a resist pattern layer 114 patterned in a predetermined shape is formed on the conductor layer 14.

続いて、図7(c)に示すように、マスクレジスト層113及びレジストパターン層114をマスクとして導電体層14をエッチングし、マスクレジスト層113及びレジストパターン層114を除去することにより、第2の配線パターン33を形成する。かかる第2の配線パターン33は、所定の箇所の埋設導電体めっき層15を介して第1の配線パターン32と導通されており、第1の配線パターン32及び埋設導電体めっき層15と共に配線パターンを構成するものとなる。   Subsequently, as shown in FIG. 7C, the conductor layer 14 is etched using the mask resist layer 113 and the resist pattern layer 114 as a mask, and the mask resist layer 113 and the resist pattern layer 114 are removed, whereby the second The wiring pattern 33 is formed. The second wiring pattern 33 is electrically connected to the first wiring pattern 32 via the buried conductor plating layer 15 at a predetermined location, and the wiring pattern together with the first wiring pattern 32 and the buried conductor plating layer 15. It becomes what constitutes.

なお、このようにして配線パターン32、33の少なくとも一部を覆うようにソルダーレジスト層を形成してフレキシブルプリント配線基板20とすることができる。   The flexible printed wiring board 20 can be formed by forming a solder resist layer so as to cover at least a part of the wiring patterns 32 and 33 in this way.

以上説明したフレキシブル配線基板用積層体及びフレキシブル配線基板では、導通用貫通孔とこれに埋設された埋設導電体めっき層について説明したが、本発明では、絶縁基材に導通用貫通孔と共にそれより大径の放熱用貫通孔を形成すると共に埋設導電体めっき層の形成の際に放熱用貫通孔を埋設するように埋設放熱用めっき層を形成することもできる。この場合には、例えば、表面側の配線パターン(埋設放熱用めっき層を含む)に実装されたICチップなどからの熱を、ICチップ実装領域及びその周辺にある放熱用貫通孔に設けられた埋設めっき層を介して裏面側へ放熱することができるという効果を奏する。   In the laminate for a flexible wiring board and the flexible wiring board described above, the through-hole for conduction and the embedded conductor plating layer embedded in this have been described. It is also possible to form the embedded heat-dissipating plating layer so as to embed the heat-dissipating through-hole when forming the large-diameter heat dissipating through-hole and forming the embedded conductor plating layer. In this case, for example, heat from an IC chip or the like mounted on the surface-side wiring pattern (including the embedded heat dissipation plating layer) is provided in the IC chip mounting region and the heat dissipation through hole in the periphery thereof. There is an effect that heat can be radiated to the back surface side through the buried plating layer.

次に本発明の実施例を示して本発明をさらに詳細に説明するが、本発明はこれらによって限定されるものではない。   EXAMPLES Next, the present invention will be described in more detail with reference to examples of the present invention, but the present invention is not limited thereto.

[実施例1]
絶縁基材としての厚さ37.5μmのポリイミドフィルム(東レ・デュポン社製、商品名:カプトン)にポリアミド系接着剤をロールコーターで10μm厚に塗布し、乾燥した後、35mm幅にスリットし、金型を用いたパンチングにより、0.8mmピッチで直径0.4mmの放熱用貫通孔を81個、0.17mmピッチで直径0.08mmの導通用貫通孔を100個、合計181個の孔を形成した。これと同時に、同じ金型でフィルム両端に、直径1.42mmのパーフォレーション孔を4.75mmピッチで形成して送りガイドとした。
[Example 1]
A polyamide adhesive was applied to a 10 μm thickness with a roll coater on a polyimide film (product name: Kapton, manufactured by Toray DuPont Co., Ltd.) having a thickness of 37.5 μm as an insulating substrate, dried, and then slit to a width of 35 mm. By punching using a die, 81 heat radiation through holes with a diameter of 0.8 mm at a pitch of 0.8 mm and 100 conduction through holes with a diameter of 0.08 mm at a pitch of 0.17 mm, totaling 181 holes. Formed. At the same time, perforation holes with a diameter of 1.42 mm were formed at both ends of the film with the same mold at a pitch of 4.75 mm to form a feed guide.

このような絶縁基材に導電体層として厚さ15μm、幅30mmの電解銅箔(三井金属鉱業(株)製NA−DFF)を接着剤層側に仮圧着し、その後、加熱して完全に接着した。   An electrolytic copper foil (NA-DFF manufactured by Mitsui Kinzoku Mining Co., Ltd.) having a thickness of 15 μm and a width of 30 mm is temporarily bonded to such an insulating substrate as a conductor layer, and then heated to completely Glued.

次に、絶縁基材と導電体層との積層体を塩酸で処理して酸性脱脂し、カバーグリーム入り銅めっき液(メルテックス社製;CuSO・5HO:110gr/L、硫酸190gr/L、Cl50ppm)を用い、温度25℃、電流密度4A/dmで57分間、めっき厚50μmでめっきし、放熱用貫通孔及び導通用貫通孔を埋設銅めっき層により埋設した。埋設銅めっき層は絶縁基材の表面より約2μm程度高くなった。 Next, the laminated body of the insulating substrate and the conductor layer was treated with hydrochloric acid to be acid degreased, and a cover plating-containing copper plating solution (manufactured by Meltex; CuSO 4 .5H 2 O: 110 gr / L, sulfuric acid 190 gr / L L, Cl - 50 ppm) was used, plating was performed at a temperature of 25 ° C., a current density of 4 A / dm 2 for 57 minutes, with a plating thickness of 50 μm, and the heat radiating through hole and the conductive through hole were embedded with an embedded copper plating layer. The buried copper plating layer was about 2 μm higher than the surface of the insulating substrate.

その後、耐水性シリコンカーバイドペーパー(丸本ストルアス社製、FEPA P #2400)により絶縁基材の表面から突出した埋設銅めっき層の上面を、360回/分の回転型研磨装置で研磨し、絶縁基材の表面と面一となるようにした。   Thereafter, the upper surface of the buried copper plating layer protruding from the surface of the insulating base material is polished with a water-resistant silicon carbide paper (manufactured by Marumoto Struers, FEPA P # 2400) with a rotary polishing apparatus 360 times / minute for insulation. It was made to be flush with the surface of the substrate.

次に、絶縁基材の表面をアルカリ脱脂処理してアルカリで開環処理し、触媒化処理してさらに還元処理した後、無電解ニッケルめっき(荏原電産社製)を38℃で5分間実施し、絶縁基材及び埋設銅めっき層の表裏全体に100nmの厚さのニッケルめっき層を形成した。   Next, the surface of the insulating substrate is subjected to alkaline degreasing treatment, ring-opening treatment with alkali, catalytic treatment and further reduction treatment, and then electroless nickel plating (manufactured by Ebara Densan Co., Ltd.) is performed at 38 ° C. for 5 minutes. Then, a nickel plating layer having a thickness of 100 nm was formed on the entire front and back surfaces of the insulating substrate and the buried copper plating layer.

さらに、130℃で5分間加熱して水分を除去し、さらに銅置換処理を行った後、カバーグリーム入り銅めっき液(メルテックス社製;CuSO・5HO:110gr/L、硫酸190gr/L、Cl50ppm)を用いて、液温24℃、電流密度3A/dmで15分間めっきし、ニッケルめっき層上に10μmの厚さの銅めっき層を形成し、フレキシブルプリント配線基板用積層体とした。なお、このとき、裏面の銅箔面は塩化ビニル製バックプレートに押しつけてテーピングすることにより保護してめっき液が回り込まないようにし、銅めっきが付着しないようにした。 Furthermore, after removing water by heating at 130 ° C. for 5 minutes and further performing copper replacement treatment, a copper plating solution containing cover grease (Meltex; CuSO 4 .5H 2 O: 110 gr / L, sulfuric acid 190 gr / L L, Cl - 50 ppm), plating at a liquid temperature of 24 ° C. and a current density of 3 A / dm 2 for 15 minutes, forming a 10 μm thick copper plating layer on the nickel plating layer, and laminating for a flexible printed circuit board The body. At this time, the copper foil surface on the back surface was protected by pressing against the back plate made of vinyl chloride to prevent the plating solution from flowing in, so that the copper plating did not adhere.

次に、このように製造したフレキシブルプリント配線基板用積層体の表裏面に、15μmの厚さのネガ型ドライフィルムレジスト(旭化成社製、M−50B)を、ラミネーターを用いて105℃で貼り付けた。   Next, a negative dry film resist (M-50B, manufactured by Asahi Kasei Co., Ltd.) having a thickness of 15 μm is pasted at 105 ° C. using a laminator on the front and back surfaces of the laminate for a flexible printed wiring board thus manufactured. It was.

次いで、表面側とした電解銅箔側のドライフィルムレジストを、20μmピッチから460μmピッチの配線パターンを描画したガラスマスクを用いて露光装置により180mJ/cmの露光量で紫外線露光し、裏面側のドライフィルムレジストは180mJ/cmの露光量で全面紫外線露光した。その後、炭酸ソーダ溶液により現像して未露光部分を溶解し、各ピッチのフォトレジストパターンを形成した。 Next, the electrolytic copper foil side dry film resist on the front side was exposed to UV light at an exposure amount of 180 mJ / cm 2 by an exposure apparatus using a glass mask on which a wiring pattern having a pitch of 20 μm to 460 μm was drawn, The dry film resist was exposed to the entire surface with ultraviolet light at an exposure amount of 180 mJ / cm 2 . Then, it developed with the sodium carbonate solution, the unexposed part was melt | dissolved, and the photoresist pattern of each pitch was formed.

現像後フォトレジストパターンから露出した電解銅箔をエッチング液でエッチングし、続いて、剥離液で表裏両面のレジスト層を剥離し、表面側の第1の配線パターンを形成した。   After development, the electrolytic copper foil exposed from the photoresist pattern was etched with an etching solution, and then the resist layers on both the front and back surfaces were peeled off with a stripping solution to form a first wiring pattern on the surface side.

次に、同様に両面にドライフィルムレジストをラミネートし、表面側のドライフィルムレジストを全面露光すると共に、裏面側のドライフィルムレジストを所定のパターンに露光し且つ現像し、裏面側のめっき層を塩化第2銅エッチング液によりエッチングして第2の配線パターンを形成し、その後、剥離液で表裏のレジストを剥離し、マイクロエッチング液に浸漬してフラッシュエッチングにより裏面の配線パターンの上面のニッケルめっき層を除去した。このフラッシュエッチングは、無電解ニッケルめっき層が100nmと薄いため短時間ですむので、配線パターンの線幅への影響はほとんどない。   Next, similarly, dry film resist is laminated on both sides, the entire surface of the dry film resist on the front side is exposed, the dry film resist on the back side is exposed to a predetermined pattern and developed, and the plating layer on the back side is chlorinated. A second wiring pattern is formed by etching with a second copper etchant, and then the front and back resists are stripped with a stripping solution, dipped in a microetching solution, and a nickel plating layer on the upper surface of the back wiring pattern by flash etching. Was removed. This flash etching requires only a short time because the electroless nickel plating layer is as thin as 100 nm, and therefore has almost no effect on the line width of the wiring pattern.

そして、配線パターン上に無電解すずめっきを0.5μm厚に形成し、フレキシブルプリント配線基板とした。   And electroless tin plating was formed in 0.5 micrometer thickness on the wiring pattern, and it was set as the flexible printed wiring board.

[実施例2]
実施例1と同様に絶縁基材として厚さ37.5μmのポリイミドフィルム(東レ・デュポン社製、商品名:カプトン)を用い、実施例1と同様に処理して電解銅箔との積層体を形成した後、同様に導通用貫通孔に埋設銅めっき層を形成し、同様に上面を研磨し、実施例1と同様に前処理した後、無電解ニッケルめっき(荏原電産社製)を38℃で5分間実施し、絶縁基材及び埋設銅めっき層の表裏全体に100nmの厚さのニッケルめっき層を形成した。
[Example 2]
As in Example 1, a 37.5 μm-thick polyimide film (trade name: Kapton, manufactured by Toray DuPont Co., Ltd.) was used as the insulating substrate, and the laminate with the electrolytic copper foil was treated in the same manner as in Example 1. After the formation, an embedded copper plating layer is similarly formed in the through hole for conduction, the upper surface is similarly polished, and pretreatment is performed in the same manner as in Example 1, followed by electroless nickel plating (manufactured by Ebara Densan) 38 This was carried out at 5 ° C. for 5 minutes, and a nickel plating layer having a thickness of 100 nm was formed on the entire surface of the insulating substrate and the buried copper plating layer.

続いて、130℃で5分間加熱して水分を除去し、さらに銅置換処理を行った後、カバーグリーム入り銅めっき液(メルテックス社製;CuSO・5HO:75gr/L、硫酸200gr/L、Cl50ppm)を用いて、液温24℃、電流密度2A/dmで30秒間めっきし、表裏両面のニッケルめっき層上に0.2μmの厚さの銅めっき層を形成し、フレキシブルプリント配線基板用積層体とした。 Subsequently, after removing moisture by heating at 130 ° C. for 5 minutes, and further performing a copper replacement treatment, a copper plating solution containing cover grease (Meltex Co., Ltd .; CuSO 4 .5H 2 O: 75 gr / L, sulfuric acid 200 gr) / L, Cl - 50ppm), plating at a liquid temperature of 24 ° C. and a current density of 2 A / dm 2 for 30 seconds to form a copper plating layer having a thickness of 0.2 μm on the nickel plating layers on both sides, It was set as the laminated body for flexible printed wiring boards.

次に、このように製造したフレキシブルプリント配線基板用積層体の表裏面に、15μmの厚さのネガ型ドライフィルムレジスト(旭化成社製、M−50B)を、ラミネーターを用いて105℃で貼り付けた。   Next, a negative dry film resist (M-50B, manufactured by Asahi Kasei Co., Ltd.) having a thickness of 15 μm is pasted at 105 ° C. using a laminator on the front and back surfaces of the laminate for a flexible printed wiring board thus manufactured. It was.

次いで、表面側とした0.2μm厚銅めっき層側のドライフィルムレジストを、20μmピッチから460μmピッチの配線パターンを描画したガラスマスクを用いて露光装置により180mJ/cmの露光量で紫外線露光し、裏面側のドライフィルムレジストは180mJ/cmの露光量で全面紫外線露光した。その後、炭酸ソーダ溶液により現像して未露光部分を溶解し、各ピッチのフォトレジストパターンを形成した。 Next, the 0.2 μm thick copper plating layer side dry film resist on the surface side was exposed to ultraviolet rays at an exposure amount of 180 mJ / cm 2 by an exposure apparatus using a glass mask on which a wiring pattern having a pitch of 20 μm to 460 μm was drawn. The dry film resist on the back side was exposed to ultraviolet light at an exposure amount of 180 mJ / cm 2 . Then, it developed with the sodium carbonate solution, the unexposed part was melt | dissolved, and the photoresist pattern of each pitch was formed.

続いて、ST901を添加した銅めっき液(メルテックス社製;CuSO・5HO:75gr/L、硫酸200gr/L)を用いて、液温24℃、電流密度2A/dmで20分間めっきし、セミアディティブ法による8μm厚の銅めっき配線パターンを得た。 Subsequently, using a copper plating solution to which ST901 was added (Meltex; CuSO 4 .5H 2 O: 75 gr / L, sulfuric acid 200 gr / L) at a liquid temperature of 24 ° C. and a current density of 2 A / dm 2 for 20 minutes. Plating was performed to obtain an 8 μm thick copper-plated wiring pattern by a semi-additive method.

次に、剥離液で表裏両面のレジスト層を剥離し、さらに、硫酸+過酸化水素系エッチング液で35℃、45秒の条件で処理し、水洗することなく、13%硫酸+13%塩酸混合溶液で13秒間処理して両面の無電解ニッケルめっき層を溶解し、表面はレジストを除去した領域の絶縁基材を露出させて所定の表面側の第1の配線パターンを形成し、裏面側は電解銅箔が露出した状態を得る。   Next, the resist layers on both the front and back surfaces are stripped with a stripping solution, and further treated with a sulfuric acid + hydrogen peroxide-based etching solution at 35 ° C. for 45 seconds, and a 13% sulfuric acid + 13% hydrochloric acid mixed solution without washing with water. For 13 seconds to dissolve the electroless nickel plating layers on both sides, exposing the insulating substrate in the region where the resist has been removed to form a first wiring pattern on the predetermined surface side, and the back side to be electrolyzed A state in which the copper foil is exposed is obtained.

次に、同様に両面にドライフィルムレジストをラミネートし、表面側のドライフィルムレジストを全面露光すると共に、裏面側のドライフィルムレジストを所定のパターンに露光し且つ現像し、裏面側のめっき層を塩化第2銅エッチング液によりエッチングして第2の配線パターンを形成し、その後、剥離液で表裏のレジストを剥離し、配線パターン上に無電解すずめっきを0.5μm厚で形成し、フレキシブルプリント配線基板とした。   Next, similarly, dry film resist is laminated on both sides, the entire surface of the dry film resist on the front side is exposed, the dry film resist on the back side is exposed to a predetermined pattern and developed, and the plating layer on the back side is chlorinated. A second wiring pattern is formed by etching with a second copper etchant, and then the front and back resists are stripped with a stripper, and electroless tin plating is formed on the wiring pattern to a thickness of 0.5 μm. A substrate was used.

[実施例3]
実施例1と同様に絶縁基材として厚さ37.5μmのポリイミドフィルム(東レ・デュポン社製、商品名:カプトン)を用い、実施例1と同様に処理して電解銅箔との積層体を形成した。
[Example 3]
As in Example 1, a 37.5 μm-thick polyimide film (trade name: Kapton, manufactured by Toray DuPont Co., Ltd.) was used as the insulating substrate, and the laminate with the electrolytic copper foil was treated in the same manner as in Example 1. Formed.

次に、実施例1とは異なり、カバーグリームPPRを添加した銅めっき液(メルテックス社製;CuSO・5HO:75gr/L、硫酸200gr/L)を用い、温度25℃、電流密度4A/dm、FR電流密度比(正:負=1:1.5)、FRパルス時間(正側20msec、負側1msec)で57分間PPR(周期的逆電流パルス)めっきし、導通用貫通孔及び放熱用貫通孔内に48μm厚さの銅めっき層を形成した。孔内の埋設銅めっき層及び埋設放熱用めっき層の上面は絶縁基材の表面と面一となり、研磨による平坦化は実施しなかった。なお、電源には、(株)中央製作所製の高速極性反転パルス電流出力整流器(PPS−050−1)を用いた。また、アノードには、チタンに酸化イリジウムを被覆した不溶性電極を用いた。以下、実施例1と同様にしてフレキシブルプリント配線基板用積層体とした。 Next, unlike Example 1, a copper plating solution to which cover grease PPR was added (manufactured by Meltex; CuSO 4 .5H 2 O: 75 gr / L, sulfuric acid 200 gr / L), temperature 25 ° C., current density 4A / dm 2 , FR current density ratio (positive: negative = 1: 1.5), FR pulse time (positive side 20msec, negative side 1msec), PPR (periodic reverse current pulse) plating for 57 minutes, through for conduction A copper plating layer having a thickness of 48 μm was formed in the hole and the heat radiating through hole. The upper surfaces of the buried copper plating layer and the buried heat-dissipating plating layer in the hole were flush with the surface of the insulating substrate, and flattening by polishing was not performed. A high-speed polarity reversal pulse current output rectifier (PPS-050-1) manufactured by Chuo Seisakusho Co., Ltd. was used as the power source. The anode used was an insoluble electrode in which titanium was coated with iridium oxide. Hereinafter, it was set as the flexible printed wiring board laminated body like Example 1. FIG.

また、このフレキシブルプリント配線基板用積層体を用い、実施例1と同様にしてフレキシブルプリント配線基板を製造した。   Moreover, the flexible printed wiring board was manufactured like Example 1 using this laminated body for flexible printed wiring boards.

[実施例4]
実施例1と同様に絶縁基材として厚さ37.5μmのポリイミドフィルム(東レ・デュポン社製、商品名:カプトン)を用い、実施例1と同様に処理して電解銅箔との積層体を形成した。
[Example 4]
As in Example 1, a 37.5 μm-thick polyimide film (trade name: Kapton, manufactured by Toray DuPont Co., Ltd.) was used as the insulating substrate, and the laminate with the electrolytic copper foil was treated in the same manner as in Example 1. Formed.

次に、実施例3と同様にPPRめっきを行ったが、めっき時間を60分間とし、導通用貫通孔及び放熱用貫通孔内に50μm厚さの銅めっき層を形成した。孔内の埋設銅めっき層及び埋設放熱用めっき層の上面は絶縁基材の表面より2.5μm程度盛り上がっていたが、上面は平坦であった。   Next, PPR plating was performed in the same manner as in Example 3. The plating time was 60 minutes, and a copper plating layer having a thickness of 50 μm was formed in the through hole for conduction and the through hole for heat dissipation. The upper surfaces of the buried copper plating layer and the buried heat-dissipating plating layer in the hole were raised about 2.5 μm from the surface of the insulating substrate, but the upper surface was flat.

この埋設銅めっき層及び埋設放熱用めっき層を実施例1と同様に研磨して絶縁基材の表面と面一にした後、実施例1と同様にしてフレキシブルプリント配線基板用積層体を得た。   The buried copper plating layer and the buried heat dissipation plating layer were polished in the same manner as in Example 1 to be flush with the surface of the insulating base material, and then a flexible printed wiring board laminate was obtained in the same manner as in Example 1. .

また、このフレキシブルプリント配線基板用積層体を用い、実施例1と同様にしてフレキシブルプリント配線基板を製造した。   Moreover, the flexible printed wiring board was manufactured like Example 1 using this laminated body for flexible printed wiring boards.

[実施例5]
実施例1と同様に絶縁基材として厚さ37.5μmのポリイミドフィルム(東レ・デュポン社製、商品名:カプトン)を用い、実施例1と同様に処理して電解銅箔との積層体を形成した。
[Example 5]
As in Example 1, a 37.5 μm-thick polyimide film (trade name: Kapton, manufactured by Toray DuPont Co., Ltd.) was used as the insulating substrate, and the laminate with the electrolytic copper foil was treated in the same manner as in Example 1. Formed.

次に、実施例3と同様にPPRめっきを行い、導通用貫通孔及び放熱用貫通孔内に48μm厚さの銅めっき層を形成した。孔内の埋設銅めっき層及び埋設放熱用めっき層の上面は絶縁基材の表面と面一となっていたので、研磨を行わない以外は実施例2と同様にして、フレキシブルプリント配線基板用積層体を得た。   Next, PPR plating was performed in the same manner as in Example 3 to form a 48 μm thick copper plating layer in the through hole for conduction and the through hole for heat dissipation. Since the upper surfaces of the buried copper plating layer and the buried heat-dissipating plating layer in the hole were flush with the surface of the insulating base material, the laminate for the flexible printed wiring board was performed in the same manner as in Example 2 except that polishing was not performed. Got the body.

また、このフレキシブルプリント配線基板用積層体を用い、実施例2と同様にしてフレキシブルプリント配線基板を製造した。   Moreover, the flexible printed wiring board was manufactured like Example 2 using this laminated body for flexible printed wiring boards.

[実施例6]
実施例1と同様に絶縁基材として厚さ37.5μmのポリイミドフィルム(東レ・デュポン社製、商品名:カプトン)を用い、実施例1と同様に処理して電解銅箔との積層体を形成した。
[Example 6]
As in Example 1, a 37.5 μm-thick polyimide film (trade name: Kapton, manufactured by Toray DuPont Co., Ltd.) was used as the insulating substrate, and the laminate with the electrolytic copper foil was treated in the same manner as in Example 1. Formed.

次に、実施例4と同様にPPRめっきを60分間行い、導通用貫通孔及び放熱用貫通孔内に50μm厚さの銅めっき層を形成した。孔内の埋設銅めっき層及び埋設放熱用めっき層の上面は絶縁基材の表面より2.5μm程度盛り上がっていたが、上面は平坦であった。   Next, PPR plating was performed for 60 minutes in the same manner as in Example 4 to form a copper plating layer having a thickness of 50 μm in the through hole for conduction and the through hole for heat dissipation. The upper surfaces of the buried copper plating layer and the buried heat-dissipating plating layer in the hole were raised about 2.5 μm from the surface of the insulating substrate, but the upper surface was flat.

この埋設銅めっき層を実施例1と同様に研磨して絶縁基材の表面と面一にした後、実施例2と同様にしてフレキシブルプリント配線基板用積層体を得た。   After this embedded copper plating layer was polished in the same manner as in Example 1 to be flush with the surface of the insulating substrate, a flexible printed wiring board laminate was obtained in the same manner as in Example 2.

また、このフレキシブルプリント配線基板用積層体を用い、実施例2と同様にしてフレキシブルプリント配線基板を製造した。   Moreover, the flexible printed wiring board was manufactured like Example 2 using this laminated body for flexible printed wiring boards.

(まとめ)
実施例1〜6のフレキシブルプリント配線基板用積層体を用いると、導電体めっき層の表面が平坦となり、フォトレジストを均一な厚さで塗布できるので、露光紫外線はレジスト面に直角に照射されることになり、露光精度が良好で均一な線幅で且つ位置合わせ精度の高い配線パターンを有するフレキシブルプリント配線基板となる。
(Summary)
When the laminates for flexible printed wiring boards of Examples 1 to 6 are used, the surface of the conductive plating layer becomes flat and the photoresist can be applied with a uniform thickness, so that the exposure ultraviolet rays are irradiated at right angles to the resist surface. Thus, a flexible printed wiring board having a wiring pattern with good exposure accuracy, uniform line width, and high alignment accuracy is obtained.

したがって、導通用貫通孔の埋設銅めっき層と配線との接続部となるランドは貫通孔の直径と同一径とすることが可能であり、孔間隔0.09mmピッチの直径0.08mmの導通用貫通孔の間に、線幅10μm(ピッチ20μm)の配線を4本配置することが可能となる。   Therefore, the land which becomes the connecting portion between the copper plated layer embedded in the through hole for conduction and the wiring can have the same diameter as the diameter of the through hole, and the diameter for the conduction of 0.08 mm in pitch between the holes is 0.09 mm. It is possible to arrange four wires having a line width of 10 μm (pitch of 20 μm) between the through holes.

なお、従来の配線基板用積層体のように導通用貫通孔上の導電体めっき層が平坦でなければ、接続用のランドは、例えば、直径0.12mm程度に拡げる必要があり、このような条件では、線幅10μm(ピッチ20μm)の配線を2本配置するのが限界であった。   If the conductor plating layer on the through hole for conduction is not flat like the conventional laminate for a wiring board, the connection land must be expanded to a diameter of about 0.12 mm, for example. Under the condition, it was the limit to arrange two wirings having a line width of 10 μm (pitch of 20 μm).

本発明の一実施形態に係るフレキシブルプリント配線基板用積層体の概略断面図である。It is a schematic sectional drawing of the laminated body for flexible printed wiring boards which concerns on one Embodiment of this invention. 本発明の一実施形態に係るフレキシブルプリント配線基板の概略断面図である。It is a schematic sectional drawing of the flexible printed wiring board concerning one Embodiment of this invention. 本発明の一実施形態に係るフレキシブルプリント配線基板用積層体の製造工程を示す概略断面図である。It is a schematic sectional drawing which shows the manufacturing process of the laminated body for flexible printed wiring boards which concerns on one Embodiment of this invention. 本発明の一実施形態に係るフレキシブルプリント配線基板用積層体の製造工程の変形例を示す概略断面図である。It is a schematic sectional drawing which shows the modification of the manufacturing process of the laminated body for flexible printed wiring boards which concerns on one Embodiment of this invention. 本発明の一実施形態に係るフレキシブルプリント配線基板の製造工程を示す概略断面図である。It is a schematic sectional drawing which shows the manufacturing process of the flexible printed wiring board which concerns on one Embodiment of this invention. 本発明の他の実施形態に係るフレキシブルプリント配線基板の製造工程を示す概略断面図である。It is a schematic sectional drawing which shows the manufacturing process of the flexible printed wiring board which concerns on other embodiment of this invention. 本発明の他の実施形態に係るフレキシブルプリント配線基板の製造工程を示す概略断面図である。It is a schematic sectional drawing which shows the manufacturing process of the flexible printed wiring board which concerns on other embodiment of this invention.

符号の説明Explanation of symbols

10 フレキシブルプリント配線基板用積層体
11 絶縁基材
12 接着剤層
13 導通用貫通孔
14 導電体層
15 埋設導電体めっき層
16 無電解めっき層
17 電気めっき層
18 導電体めっき層
20 フレキシブルプリント配線基板
21 第1の配線パターン
22 第2の配線パターン

DESCRIPTION OF SYMBOLS 10 Laminated body for flexible printed wiring boards 11 Insulating base material 12 Adhesive layer 13 Conducting through-hole 14 Conductor layer 15 Embedded conductor plating layer 16 Electroless plating layer 17 Electroplating layer 18 Conductor plating layer 20 Flexible printed wiring board 21 First wiring pattern 22 Second wiring pattern

Claims (16)

導通用貫通孔が形成された絶縁基材と、この絶縁基材の一方面に接着された導電体層とを具備し、前記導通用貫通孔には埋設導電体めっき層がその上面が前記絶縁基材の表面と面一になるように設けられ、前記絶縁基材の表面及び前記埋設導電体めっき層の上面を覆う導電体めっき層が設けられていることを特徴とするフレキシブルプリント配線基板用積層体。   An insulating base material in which a through hole for conduction is formed; and a conductor layer bonded to one surface of the insulating base material. For a flexible printed wiring board, characterized in that a conductor plating layer is provided so as to be flush with the surface of the substrate, and covers the surface of the insulating substrate and the upper surface of the embedded conductor plating layer. Laminated body. 請求項1に記載のフレキシブルプリント配線基板用積層体において、前記導通用貫通孔が、30〜800μmの径で、60〜1600μmのピッチで設けられていることを特徴とするフレキシブルプリント配線基板用積層体。   2. The laminate for a flexible printed wiring board according to claim 1, wherein the through holes for conduction are provided with a diameter of 30 to 800 [mu] m and a pitch of 60 to 1600 [mu] m. body. 請求項1又は2に記載のフレキシブルプリント配線基板用積層体において、前記埋設導電体めっき層が、硫酸銅五水和物の濃度が50〜90g/Lで硫酸濃度が180〜210g/Lのめっき液を用い、印加するパルスの電流密度比を正:負=1:1.2〜1:1.8の範囲のめっき条件とするPPR(周期的逆電流パルス)めっき法で形成されたものであることを特徴とするフレキシブルプリント配線基板用積層体。   The laminate for a flexible printed wiring board according to claim 1 or 2, wherein the embedded conductor plating layer is plated with a copper sulfate pentahydrate concentration of 50 to 90 g / L and a sulfuric acid concentration of 180 to 210 g / L. It is formed by a PPR (periodic reverse current pulse) plating method using a solution and setting the current density ratio of the pulse to be applied in the range of positive: negative = 1: 1.2 to 1: 1.8. A laminate for a flexible printed wiring board, characterized in that it is present. 請求項3に記載のフレキシブルプリント配線基板用積層体において、前記埋設導電体めっき層の形成で印加するパルスの印加時間を、正を18〜22msec、負を0.5〜1.5msecとしたことを特徴とするフレキシブルプリント配線基板用積層体。   In the laminate for a flexible printed wiring board according to claim 3, the application time of a pulse applied in forming the embedded conductor plating layer is 18-22 msec for positive and 0.5-1.5 msec for negative. A laminate for a flexible printed wiring board characterized by the above. 請求項1〜4の何れか1項に記載のフレキシブルプリント配線基板用積層体において、前記埋設導電体めっき層が、めっき後の上面が研磨処理により平坦化されたものであることを特徴とするフレキシブルプリント配線基板用積層体。   The laminate for a flexible printed wiring board according to any one of claims 1 to 4, wherein the embedded conductor plating layer is obtained by planarizing an upper surface after plating by a polishing process. Laminated body for flexible printed wiring board. 請求項1〜5の何れか1項に記載のフレキシブルプリント配線基板用積層体において、前記絶縁基材が、放熱用貫通孔を具備し、当該放熱用貫通孔には前記埋設導電体めっき層と一緒に形成された埋設放熱用めっき層が設けられていることを特徴とするフレキシブルプリント配線基板用積層体。   The laminate for a flexible printed wiring board according to any one of claims 1 to 5, wherein the insulating base material includes a heat radiating through hole, and the heat radiating through hole includes the embedded conductor plating layer and A laminate for a flexible printed wiring board, comprising a buried heat-dissipating plating layer formed together. 請求項1〜6の何れか1項に記載のフレキシブルプリント配線基板用積層体を用いて形成され、前記導電体層及び前記導電体めっき層のそれぞれに配線パターンが形成されていることを特徴とするフレキシブルプリント配線基板。   It is formed using the laminated body for flexible printed wiring boards of any one of Claims 1-6, and the wiring pattern is formed in each of the said conductor layer and the said conductor plating layer, It is characterized by the above-mentioned. Flexible printed wiring board. 請求項7に記載のフレキシブルプリント配線基板において、前記配線パターンの端子部の配線のピッチが30μm以下、線幅が6μm以上、配線間の間隔が15μm以下であることを特徴とするフレキシブルプリント配線基板。   8. The flexible printed wiring board according to claim 7, wherein the wiring pitch of the terminal portions of the wiring pattern is 30 μm or less, the line width is 6 μm or more, and the interval between the wirings is 15 μm or less. . 絶縁基材に導通用貫通孔を形成する工程と、この絶縁基材の一方面に導電体層を接着する工程と、前記導通用貫通孔に埋設導電体めっき層をその上面が前記絶縁基材の表面と面一となるように形成する工程と、前記絶縁基材の表面及び前記埋設導電体めっき層の上面を覆うように導電体めっき層を設ける工程とを具備することを特徴とするフレキシブルプリント配線基板用積層体の製造方法。   A step of forming through holes for conduction in the insulating base material, a step of adhering a conductor layer to one surface of the insulating base material, a conductive plating layer embedded in the through hole for conduction, and the top surface of the insulating base material And a step of forming a conductor plating layer so as to cover the surface of the insulating base and the upper surface of the embedded conductor plating layer. A method for producing a laminate for a printed wiring board. 請求項9に記載のフレキシブルプリント配線基板用積層体の製造方法において、前記導通用貫通孔が、30〜800μmの径で、60〜1600μmのピッチで設けられていることを特徴とするフレキシブルプリント配線基板用積層体の製造方法。   10. The method of manufacturing a laminate for a flexible printed wiring board according to claim 9, wherein the through holes for conduction are provided with a diameter of 30 to 800 [mu] m and a pitch of 60 to 1600 [mu] m. A method for manufacturing a laminate for a substrate. 請求項9又は10に記載のフレキシブルプリント配線基板用積層体の製造方法において、前記埋設導電体めっき層を、硫酸銅五水和物の濃度が50〜90g/Lで硫酸濃度が180〜210g/Lのめっき液を用い、印加するパルスの電流密度比を正:負=1:1.2〜1:1.8の範囲のめっき条件とするPPR(周期的逆電流パルス)めっき法で形成することを特徴とするフレキシブルプリント配線基板用積層体の製造方法。   In the manufacturing method of the laminated body for flexible printed wiring boards of Claim 9 or 10, the said embedded conductor plating layer has a sulfuric acid density | concentration of 180-210 g / L with the density | concentration of 50-90 g / L of copper sulfate pentahydrate. Using a plating solution of L, the PPR (periodic reverse current pulse) plating method is used in which the current density ratio of the pulse to be applied is in the range of positive: negative = 1: 1.2 to 1: 1.8. The manufacturing method of the laminated body for flexible printed wiring boards characterized by the above-mentioned. 請求項11に記載のフレキシブルプリント配線基板用積層体において、前記埋設導電体めっき層の形成で印加するパルスの印加時間を、正を18〜22msec、負を0.5〜1.5msecとしたことを特徴とするフレキシブルプリント配線基板用積層体の製造方法。   The laminate for a flexible printed wiring board according to claim 11, wherein the pulse application time applied in forming the buried conductor plating layer is 18 to 22 msec for positive and 0.5 to 1.5 msec for negative. The manufacturing method of the laminated body for flexible printed wiring boards characterized by these. 請求項9〜12の何れか1項に記載のフレキシブルプリント配線基板用積層体の製造方法において、前記埋設導電体めっき層を、めっき後の上面を研磨処理により平坦化して形成することを特徴とするフレキシブルプリント配線基板用積層体の製造方法。   In the manufacturing method of the laminated body for flexible printed wiring boards of any one of Claims 9-12, The said embedded conductor plating layer is formed by planarizing the upper surface after plating by polishing process, It is characterized by the above-mentioned. The manufacturing method of the laminated body for flexible printed wiring boards to do. 請求項9〜13の何れか1項に記載のフレキシブルプリント配線基板用積層体の製造方法において、前記絶縁基材に、前記導通用貫通孔と共に放熱用貫通孔を形成し、前記埋設導電体めっき層の形成の際に前記放熱用貫通孔を埋設するように埋設放熱用めっき層を形成することを特徴とするフレキシブルプリント配線基板用積層体の製造方法。   The method for manufacturing a flexible printed wiring board laminate according to any one of claims 9 to 13, wherein a heat dissipation through hole is formed together with the conduction through hole in the insulating base material, and the embedded conductor plating is performed. A method for producing a laminate for a flexible printed wiring board, comprising forming a buried heat-dissipating plating layer so as to embed the heat-dissipating through-holes when forming the layer. 請求項9〜14の何れか1項に記載の製造方法により得られたフレキシブルプリント配線基板用積層体の前記導電体層及び前記導電体めっき層のそれぞれに配線パターンを形成する工程をさらに具備することを特徴とするフレキシブルプリント配線基板の製造方法。   The process of forming a wiring pattern in each of the said conductor layer of the laminated body for flexible printed wiring boards obtained by the manufacturing method of any one of Claims 9-14, and the said conductor plating layer is further comprised. A method for producing a flexible printed wiring board, comprising: 請求項15に記載のフレキシブルプリント配線基板の製造方法において、前記配線パターンの形成の際に、端子部の配線のピッチが30μm以下、線幅が6μm以上、幅線間の間隔が15μm以下である配線パターンを形成することを特徴とするフレキシブルプリント配線基板の製造方法。
16. The method of manufacturing a flexible printed wiring board according to claim 15, wherein, when forming the wiring pattern, the wiring pitch of the terminal portion is 30 μm or less, the line width is 6 μm or more, and the interval between the width lines is 15 μm or less. A method of manufacturing a flexible printed wiring board, comprising forming a wiring pattern.
JP2008317748A 2008-12-12 2008-12-12 Laminate for flexible printed wiring board, flexible printed wiring board, and method of manufacturing the same Pending JP2010141216A (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2008317748A JP2010141216A (en) 2008-12-12 2008-12-12 Laminate for flexible printed wiring board, flexible printed wiring board, and method of manufacturing the same
TW098130169A TW201023699A (en) 2008-12-12 2009-09-08 Laminate for flexible printing circuit substrate and flexible printing circuit substrate and methods for manufacturing the same
KR1020090100688A KR20100068185A (en) 2008-12-12 2009-10-22 Laminate for flexible printed wiring board, flexible printed wiring board, and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008317748A JP2010141216A (en) 2008-12-12 2008-12-12 Laminate for flexible printed wiring board, flexible printed wiring board, and method of manufacturing the same

Publications (1)

Publication Number Publication Date
JP2010141216A true JP2010141216A (en) 2010-06-24

Family

ID=42351070

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008317748A Pending JP2010141216A (en) 2008-12-12 2008-12-12 Laminate for flexible printed wiring board, flexible printed wiring board, and method of manufacturing the same

Country Status (3)

Country Link
JP (1) JP2010141216A (en)
KR (1) KR20100068185A (en)
TW (1) TW201023699A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102447507B1 (en) * 2015-12-17 2022-09-27 삼성디스플레이 주식회사 Flexible display apparatus and manufacturing method thereof

Also Published As

Publication number Publication date
KR20100068185A (en) 2010-06-22
TW201023699A (en) 2010-06-16

Similar Documents

Publication Publication Date Title
US7681310B2 (en) Method for fabricating double-sided wiring board
JP4855186B2 (en) Manufacturing method of double-sided flexible printed wiring board
KR20100007729A (en) Printed circuit board with excellent heat-dissipating
JP2009295949A (en) Printed circuit board with electronic component embedded therein and manufacturing method therefor
JP2008047655A (en) Wiring substrate and its manufacturing method
JP2007128970A (en) Manufacturing method of multilayer wiring board having cable section
JP5177968B2 (en) Through-hole forming method and printed circuit board manufacturing method
JP5256747B2 (en) Manufacturing method of copper wiring insulating film by semi-additive method, and copper wiring insulating film manufactured therefrom
JP2009176770A (en) Method of manufacturing copper wiring insulation film, and copper wiring insulation film manufactured from the same
WO2007116622A1 (en) Multilayer circuit board having cable portion and method for manufacturing same
JP2009277987A (en) Film-carrier tape for mounting electronic component and its manufacturing method, and semiconductor device
JP2011003562A (en) Printed wiring board and method for manufacturing the same
JP2010141216A (en) Laminate for flexible printed wiring board, flexible printed wiring board, and method of manufacturing the same
JP2009295957A (en) Method for manufacturing of printed wiring board
JP2010016061A (en) Printed wiring board, and manufacturing method therefor
JP2009272571A (en) Printed circuit board and method of manufacturing the same
JP4738895B2 (en) Manufacturing method of build-up type multilayer flexible circuit board
JP2009177071A (en) Polyimide film circuit board and method of manufacturing the same
JP2005217216A (en) Double-sided wiring tape carrier for semiconductor device and its manufacturing method
JP2005197648A (en) Method for manufacturing a circuit board wired by electroplating
JP2015012078A (en) Method for manufacturing flexible printed wiring board and flexible printed wiring board
JP5512578B2 (en) Manufacturing method of build-up type multilayer flexible circuit board
JP4466169B2 (en) Manufacturing method of substrate for semiconductor device
JP2009283502A (en) Flexible printed wiring board
JP2005183587A (en) Manufacturing method for printed-circuit board and semiconductor device