JP2010136568A - Failure detector for switching element - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a failure detector which can hold a failure-detected state for a sufficient period of time. <P>SOLUTION: A failure detector for a switching element comprises a first detection circuit 8 which detects a first failure of a switching element 4 based on a first reference value Vref1 and outputs a first failure detection signal; a second detection circuit 9 which detects a second failure of the switching element based on a second reference value Vref2 and outputs a second failure detection signal; an OR circuit 10 which outputs a failure detection signal when at least either of the first failure detection signal and the second failure detection signal is output; and an AND circuit 2 which outputs an OFF signal to the switching element when the failure detection signal is output from the OR circuit, regardless of a gate signal 1 to the switching element. The failure detector is equipped with a switching circuit 95 for switching the second reference value Vref2 to a third reference value Vref3 at which the second failure detection signal is output when the first failure detection signal is output. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to an abnormality detection device that detects an abnormality such as an overcurrent abnormality of a switching element.

  An overcurrent protection circuit disclosed in Patent Document 1 is known as a circuit that protects an IGBT by detecting an overcurrent flowing through an insulated gate bipolar transistor (hereinafter also referred to as an IGBT) of the inverter circuit. This overcurrent protection circuit is designed to maintain the overcurrent detection state for a certain period of time by lowering the reference voltage for overcurrent detection when an overcurrent is detected.

JP 2006-288148 A

  However, in the above-described conventional overcurrent protection circuit, if the IGBT gate signal is turned OFF after detecting the overcurrent, the current flowing through the IGBT also becomes zero, so the output of the error amplifier may be inverted, and the overcurrent detection state May not be held for a sufficient time.

The problem to be solved by the present invention is to provide an abnormality detection device that can maintain an abnormality detection state for a sufficient time.

The present invention detects the first abnormality by the first detection circuit, switches the reference value of the second detection circuit by the detection signal of the first abnormality, and generates the second abnormality detection signal. To solve.

  According to the present invention, when the first abnormality is detected by the first detection circuit, the reference value of the second detection circuit is switched by the detection signal of the first abnormality, and the second abnormality detection signal is generated. Since it is input to the OR circuit, the abnormality detection state can be held for a sufficient time.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

<< First Embodiment >>
FIG. 1 is an electric circuit diagram showing an abnormality detection apparatus according to the present embodiment. The abnormality detection device of the present embodiment can be embodied in, for example, a device that detects an abnormality of the IGBT that constitutes the intelligent power module, and an example thereof will be described. However, the present invention is not limited to this, and can be applied to various switching elements.

  An IGBT (switching element) 4 that is an abnormality detection target is switched when an ON / OFF signal from the gate drive circuit 3 is input to the gate G, and a collector current Ic flows from the collector C to the emitter E by the ON drive signal.

  The IGBT 4 in this example is a transistor having a current sense terminal S. When a current Ic flows from the collector C to the emitter E by an ON drive signal to the gate G, a current Is (current) proportional to the current Ic flows to the current sense terminal S. The mask ratio N between Ic and current Is is known, Is = Ic / N). The current Is flowing from the current sense terminal S is converted to a voltage by the current detection resistor 5, and the detected voltage is output to the filter circuit 6, where high-frequency noise of a certain level or more is removed from the detected voltage.

  Further, the IGBT 4 of this example has a temperature sensor D composed of a diode for detecting the temperature of the IGBT 4, and the detection voltage of the temperature sensor D is output to the filter circuit 7, where the detection voltage exceeds a certain level from the detection voltage. High frequency noise is removed. Note that the temperature sensor D of this example has a characteristic that the detected voltage decreases as the temperature rises.

  The abnormality detection device of this example includes an overcurrent detection circuit 8 that detects that an overcurrent has flowed through the IGBT 4, and an overtemperature detection circuit 9 that detects that the IGBT 4 has become overtemperature.

  The overcurrent detection circuit 8 includes a comparator 81, and a detection voltage (in other words, a voltage across the current detection resistor 5) corresponding to the current Is that has passed through the filter circuit 6 is input to the −input terminal. A reference voltage Vref1 (first reference value), which is a threshold value for determining whether or not an overcurrent has passed, is input. Thereby, when the detection voltage input to the + input terminal is less than the reference voltage Vref1, a Hi level signal is output from the output terminal of the comparator 81. Conversely, when the detection voltage is equal to or higher than the reference voltage Vref1, the comparator A Lo level signal is output from the output terminal 81. That is, when an abnormal overcurrent flows through the IGBT 4, the detection voltage input to the negative input terminal of the comparator 81 rises accordingly, and when this exceeds the reference voltage Vref1, a Lo level signal (overcurrent detection signal) is generated. Is output. The first abnormality of the present invention corresponds to an abnormality in which an overcurrent flows through the IGBT 4.

  On the other hand, the over-temperature detection circuit 9 includes a comparator 91, and a detection voltage corresponding to the temperature of the IGBT 4 that has passed through the filter circuit 7 is input to the + input terminal, and whether or not the-input terminal is over-temperature. A reference voltage Vref2, which is a threshold for determining the above, is input.

  The setting circuit for the reference voltage Vref2 of this example has two resistors 92 and 93 that divide the reference power supply Vc, and an intermediate portion of these two resistors 92 and 93 is connected to the negative input terminal of the comparator 91. . The capacitor 94 is a capacitor for stabilizing the reference voltage.

  In addition, a switching element 95 (corresponding to the switching circuit of the present invention) composed of a MOS transistor is connected in parallel with one resistor 92, and its base is connected in series to the output terminals of the comparator 81 and the comparator 91. Yes. The switching element 95 is a normally-on type transistor that is turned on when a Lo level signal is inputted to the base and turned off when a Hi level signal is inputted.

  As a result, when the Lo level signal is input to the base of the switching element 95, the switching element 95 is turned on, so that a voltage corresponding to the reference voltage Vc is input to the negative input terminal of the comparator 91. On the other hand, when a Hi level signal is input to the gate of the switching element 95, the switching element 95 is turned off. Therefore, the reference power source Vc is divided by the two resistors 92 and 93 at the negative input terminal of the comparator 91. A voltage is input.

  That is, the reference voltage of the comparator 91 when the switching element 95 is turned on is higher than the reference voltage of the comparator 91 when the switching element 95 is turned off. Hereinafter, the reference voltage of the comparator 91 when the switching element 95 is turned off is Vref2 (second reference value), and the reference voltage of the comparator 91 when the switching element 95 is turned on is Vref3 (third reference value). Called.

  When the detection voltage corresponding to the temperature of the IGBT 4 input to the + input terminal via the filter circuit 7 is equal to or higher than the reference voltage Vref2 or Vref3, a Hi level signal is output from the comparator 91, and conversely, the detection voltage is When the voltage is less than the reference voltage Vref2 or Vref3, the comparator 91 outputs a Lo level signal. The second abnormality of the present invention corresponds to an abnormality in which the temperature of the IGBT 4 becomes an overtemperature.

  As will be described in detail later, except when an overcurrent abnormality is detected by the overcurrent detection circuit 8 or when an overtemperature abnormality is detected by the overtemperature detection circuit 9, that is, in a normal state, the switching element 95 is in an OFF state. Therefore, when the voltage corresponding to the temperature of the IGBT 4 detected by the temperature sensor D is equal to or higher than the reference voltage Vref2, a Hi level signal is output from the comparator 91, and conversely, when the detected voltage is lower than the reference voltage Vref2. The Lo level signal is output from the comparator 91.

  On the other hand, when an overcurrent abnormality is detected by the overcurrent detection circuit 8 or when an overtemperature abnormality is detected by the overtemperature detection circuit 9, that is, at the time of abnormality, the switching element 95 is in the ON state. When the voltage corresponding to the temperature of the IGBT 4 detected by the temperature sensor D is equal to or higher than the reference voltage Vref3, a Hi level signal is output from the comparator 91. Conversely, when the detected voltage is lower than the reference voltage Vref3, the comparator 91 is output. Outputs a Lo level signal.

  The output signal of the comparator 81 of the overcurrent detection circuit 8 and the output signal of the comparator 91 of the overtemperature detection circuit 9 are an abnormality detection signal when one of these output signals is an abnormality detection signal (Lo level signal). This is output to the OR circuit 10 that outputs (Lo level signal). The output of the OR circuit 10 is input to the AND circuit 2 together with the gate PWM signal 1 that controls the ON / OFF control of the IGBT 4.

  The logical product circuit 2 outputs an abnormality detection signal (Lo level signal) from the logical sum circuit 10 regardless of ON / OFF of the gate PWM signal 1 (a drive control signal obtained by pulse-width-modulating a Hi level signal and a Lo level signal). Is a circuit that outputs an OFF signal. That is, the logic circuit outputs the gate PWM signal 1 only when a Hi level signal is input from the OR circuit 10. The output signal of the AND circuit 2 is output to the gate of the IGBT 4 via the gate drive circuit 3.

  The detection signal 11 from the OR circuit 10 is also output to the CPU that controls the inverter including the IGBT 4.

  Next, the operation of this example will be described with reference to FIG.

  FIG. 2 is a timing chart showing the operation of the abnormality detection apparatus of this example. Time is plotted on the horizontal axis, the waveform of the gate PWM signal 1 is plotted on the vertical axis, and the sense current flowing through the current sense terminal S (correlated with the collector current waveform of the IGBT 4). Compared with the waveform of the detected voltage that passes through the filter circuit 6 and is input to the negative input terminal of the comparator 81, and the waveform of the detected temperature that is input to the positive input terminal of the comparator 91 of the overtemperature detection circuit 9 The waveforms of the reference voltages Vref2 and Vref3 of the detector 91 and the waveform of the detection signal 11 output from the OR circuit 10 are shown.

  First, during the period from time t1 to time t2, neither the overcurrent detection circuit 8 nor the overtemperature detection circuit 9 detects an overcurrent abnormality or an overtemperature abnormality. A level signal is output. As a result, a signal corresponding to the gate PWM signal 1 is output from the AND circuit 2 to the gate drive circuit 3, and as a result, the IGBT 4 repeats the ON / OFF switching operation.

  Now, it is assumed that at time t3, the sense current Is of the IGBT 4 exceeds the reference value of the overcurrent, and the detection voltage corresponding to this exceeds the reference voltage Vref1 of the comparator 81. At this moment, the Lo level signal is output from the output terminal of the comparator 81. This Lo level signal is input to the base of the switching element 95, whereby the switching element 95 is turned ON. When the switching element 95 is turned on, the reference voltage input to the negative input terminal of the comparator 91 is switched from the reference voltage Vref2 so far to a reference voltage Vref3 larger than this. The state of switching between the reference voltages Vref2 and Vref3 is indicated by a dotted line in the waveform of the overtemperature detection circuit in FIG.

  In the above-described conventional abnormality detection device, the output of the comparator 81 is between the time when the overcurrent is detected and the gate signal is turned off (t3 to t4) or until the CPU recognizes the overcurrent state. There is a risk of switching from the previous Lo level signal to the Hi level signal. Therefore, it is necessary to maintain at least the overcurrent state during this period.

  In the abnormality detection device of this example, when an overcurrent abnormality is detected by the overcurrent detection circuit 8, the switching element 95 is immediately turned ON, and the reference voltage Vref2 of the overtemperature detection circuit 9 is switched to a higher reference voltage Vref3. As a result, an overcurrent abnormality signal can be held on the overtemperature detection circuit 9 side. In particular, the temperature change of the IGBT 4 is gradual (slow) in time compared to the change of the collector current flowing through the IGBT 4, and even if an OFF signal is output to the IGBT 4, the temperature does not drop immediately, so the abnormal signal continues for a certain period of time. Can be made.

  Further, as shown in FIG. 1, even if a voltage stabilizing capacitor is connected in parallel to the resistors 93 of the reference voltages Vref2 and Vref3 of the comparator 91, the charge stored in the capacitor is extracted by the ON operation of the switching element 95. Therefore, abnormality detection can be quickly fixed with low output impedance.

  As described above, when the Lo level signal is output from the output terminal of the overcurrent detection circuit 8, the Lo level signal is also output from the output terminal of the overtemperature detection circuit 9. A Lo level signal is output to the product circuit 2. As a result, an OFF signal is input from the AND circuit 2 to the gate of the IGBT 4 via the gate drive circuit 3 regardless of the ON / OFF state of the gate PWM signal 1. Thereby, after detecting the overcurrent (t3), the IGBT 4 is turned off after a predetermined delay time (t4).

  As described above, according to the abnormality detection device of this example, when an overcurrent abnormality signal is detected by the overcurrent detection circuit 8, an overtemperature abnormality is intentionally performed by switching the reference voltage of the overtemperature detection circuit 9 having a slow response speed. Since the signal is generated, the OFF drive signal for the gate of the IGBT 4 can be held even if the Hi level signal is output from the overcurrent detection circuit 8 during the delay time. Therefore, it is not necessary to provide a dedicated holding circuit, and an apparatus that is advantageous in terms of cost and space can be provided.

  Further, since the response speed (temperature change speed) of the over-temperature detection circuit 9 is slower than the response speed (current change speed) of the over-current detection circuit 8, the value of the reference voltage Vref3 of the comparator 91 is appropriately selected. By doing so, the abnormality detection state can be held for a predetermined time.

<< Second Embodiment >>
In the abnormality detection device of the present invention, if the abnormality detection circuit has a characteristic that changes more slowly than the current change speed of the overcurrent detection circuit 8, for example, an undervoltage abnormality of the inverter power supply is used instead of the overtemperature detection circuit A voltage detection circuit that detects (or abnormal high voltage) can also be used.

  FIG. 3 is an electric circuit diagram showing an abnormality detection apparatus according to another embodiment of the invention, and FIG. 4 is a timing chart of this example.

  The abnormality detection device of this example is different from the above-described over temperature detection circuit of the first embodiment in that it is a low voltage detection circuit (reference numeral 9 for convenience) that detects a low voltage abnormality of the inverter power supply. Other configurations are the same as those of the first embodiment.

  In other words, the detection voltage of the power supply is input to the + input terminal of the comparator 91 of the low voltage detection circuit 9, and it is compared whether or not the reference voltage Vref2 is abnormal in order to determine whether the voltage is low or not. When the voltage Vref2 is exceeded, the Hi level signal is output as normal. On the other hand, when the detection voltage of the power supply becomes equal to or lower than the reference voltage Vref2, a Lo level signal is output from the output terminal of the comparator 91 as an abnormal low voltage.

  Also in this example, a switching element 95 is provided which is turned on when a Lo level signal is output from the output terminal of the comparator 81 of the overcurrent detection circuit 8, thereby changing the reference voltage Vref2 so far to a higher reference voltage Vref3. Switch.

  Since the change rate of the power supply voltage of the inverter is also slower (slower) than the change rate of the current flowing through the IGBT 4, the reference voltage of the comparator 91 is instantaneously detected when an overcurrent is detected at time t3 as shown in FIG. Switches from Vref2 to Vref3 and can be held for a predetermined time.

  Note that the voltage abnormality of the inverter power supply is not limited to the low voltage side, but can also be configured as a high voltage detection circuit that detects a state where the voltage exceeds a predetermined voltage.

<< Third Embodiment >>
FIG. 5 is an electric circuit diagram showing an abnormality detecting apparatus according to still another embodiment of the invention, and FIG. 6 is a timing chart. In this example, a differentiating circuit using a resistor 96 and a capacitor 97 is added to the switching element 95 that switches between the reference voltages Vref2 and Vref3 of the overtemperature detection circuit 9, and the time constant of the reference voltage is utilized after detecting an overcurrent abnormality. The point which added the timer circuit is different from 1st Embodiment mentioned above.

  As described above, an object of the present invention is to hold the abnormal state of the overcurrent detected by the overcurrent detection circuit 8 for a predetermined time. Therefore, after the overcurrent abnormality is detected, it is also necessary to return to the original state after the IGBT 4 is protected, that is, after the gate signal is turned off and the switching is stopped for a predetermined time.

  Therefore, the abnormality detection device is automatically returned to the original state by returning the reference voltage of the comparator 91 of the detection circuit other than the overcurrent detection circuit 8, in this example, the comparator 91 of the overtemperature detection circuit 9, from Vref3 to the original Vref2. Can do.

  That is, as shown in FIG. 5, a differential circuit including a resistor 96 and a capacitor 97 is added to the switching element 95. Note that the switching element 98 (normally-off transistor) and the resistor 99 connected to the negative input terminal of the comparator 91 are circuits for preventing chattering that occurs near the reference voltage.

  The operation of this example will be described with reference to FIG.

  First, during the period from time t1 to time t2, neither the overcurrent detection circuit 8 nor the overtemperature detection circuit 9 detects an overcurrent abnormality or an overtemperature abnormality. A level signal is output. As a result, a signal corresponding to the gate PWM signal 1 is output from the AND circuit 2 to the gate drive circuit 3, and as a result, the IGBT 4 repeats the ON / OFF switching operation.

  Now, it is assumed that at time t3, the sense current Is of the IGBT 4 exceeds the reference value of the overcurrent, and the detection voltage corresponding to this exceeds the reference voltage Vref1 of the comparator 81. At this moment, the Lo level signal is output from the output terminal of the comparator 81. This Lo level signal is input to the base of the switching element 95, whereby the switching element 95 is turned ON. When the switching element 95 is turned on, the reference voltage input to the negative input terminal of the comparator 91 is switched from the reference voltage Vref2 so far to a reference voltage Vref3 larger than this. The state of switching between the reference voltages Vref2 and Vref3 is indicated by a dotted line in the waveform of the overtemperature detection circuit in FIG. The operation so far is the same as in the first embodiment.

  At t3, since the switching element 98 is in the OFF state, the reference voltage Vref3 is a value obtained by dividing the voltage Vc by the resistors 92 and 93.

  As time elapses from time t3, the reference voltage Vref3 is decreased by the differentiating circuits 96 and 97 described above, but the detected voltage corresponding to the temperature input through the filter circuit 7 is equal to or higher than the reference voltage Vref3. During the period from time t4 to time t5, the overcurrent abnormality detection state is maintained and the IGBT 4 is kept in the OFF state.

  When the detection voltage corresponding to the temperature input through the filter circuit 7 at time t5 becomes less than the reference voltage Vref3, a Hi level signal is output from the output terminal of the comparator 91 of the overtemperature detection circuit 9. At this moment, the switching element 95 is turned off and the switching element 98 is turned on. As a result, the reference voltage Vref4 (<Vref2) in which the reference voltage of the negative input terminal of the comparator 91 is divided by the three resistors 92, 93, and 99. ). Thereby, the protection processing of the IGBT 4 due to the overcurrent abnormality so far is canceled, and chattering that occurs in the vicinity of the threshold can be prevented by reducing the reference voltage to Vref4.

  Instead of the overtemperature detection circuit 9 shown in FIG. 5, the low voltage detection circuit 9 shown in the second embodiment can be used.

It is an electric circuit diagram which shows the abnormality detection apparatus which concerns on embodiment of invention. It is a timing chart which shows operation | movement of the abnormality detection apparatus shown in FIG. It is an electric circuit diagram which shows the abnormality detection apparatus which concerns on other embodiment of invention. It is a timing chart which shows operation | movement of the abnormality detection apparatus shown in FIG. It is an electric circuit diagram which shows the abnormality detection apparatus which concerns on other embodiment of invention. It is a timing chart which shows operation | movement of the abnormality detection apparatus shown in FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Gate PWM signal 2 ... AND circuit 3 ... Gate drive circuit 4 ... IGBT (switching element)
5 ... Current detection resistors 6, 7 ... Filter circuit 8 ... Overcurrent detection circuit 9 ... Overtemperature detection circuit 95 ... Switching element (switching circuit)
10 ... OR circuit 11 ... detection signal

Claims (9)

A first detection circuit that detects a first abnormality of the switching element based on a first reference value and outputs a first abnormality detection signal;
A second detection circuit that detects a second abnormality of the switching element based on a second reference value and outputs a second abnormality detection signal;
An OR circuit that outputs an abnormality detection signal when at least one of the first abnormality detection signal and the second abnormality detection signal is output;
An abnormality detection device for a switching element, comprising: an AND circuit that outputs an OFF signal to the switching element when the abnormality detection signal is output from the OR circuit regardless of a gate signal to the switching element. ,
An abnormality detection device for a switching element, comprising: a switching circuit that switches the second reference value to a third reference value from which the second abnormality detection signal is output by the output of the first abnormality detection signal. . In the switching element abnormality detection device according to claim 1,
An abnormality detecting device for a switching element, wherein a change speed of a characteristic for detecting the second abnormality is smaller than a change speed of a characteristic for detecting the first abnormality. In the switching element abnormality detection device according to claim 1 or 2,
An apparatus for detecting an abnormality of a switching element, further comprising an asymptotic circuit that gradually approximates the third reference value toward the second reference value in time. In the abnormality detection apparatus of the switching element of Claim 3,
The abnormality detection device for a switching element, wherein the asymptotic circuit is a differentiation circuit that receives the first abnormality detection signal. In the abnormality detection apparatus of the switching element as described in any one of Claims 1-4,
The first detection circuit includes:
A first sensor for detecting a current flowing through the switching element;
A first comparison that compares the current detected by the first sensor with the first reference value and outputs an overcurrent signal to the OR circuit when the current exceeds the first reference value. And an abnormality detecting device for a switching element. The switching element abnormality detection device according to claim 5,
The second detection circuit includes:
A second sensor for detecting a temperature of the switching element;
A second comparison that compares the temperature detected by the second sensor with the second reference value, and outputs an overtemperature signal to the OR circuit when the temperature exceeds the second reference value. And an abnormality detecting device for a switching element. The switching element abnormality detection device according to claim 5,
The second detection circuit includes:
A second sensor for detecting a voltage of a power source of the switching element;
The power supply voltage detected by the second sensor is compared with the second reference value, and when the voltage becomes less than the second reference value, a low voltage signal is output to the OR circuit. An abnormality detection device for a switching element, comprising: 2 comparators. In the switching element abnormality detection device according to claim 6 or 7,
The abnormality detection device for a switching element, wherein the second detection circuit includes a MOS transistor that switches a reference value of the second comparator to one of the second reference value and the third reference value. In the abnormality detection apparatus of the switching element as described in any one of Claims 1-8,
The switching element abnormality detection device, wherein an output signal of the AND circuit is sent to a gate drive circuit for driving the switching element.

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