JP2010135880A - Clock synchronization system and clock synchronization method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a clock supply device and a clock synchronization method when a device, that does not directly accommodate the clock supply device, performs voice or data communication in an IP network. <P>SOLUTION: In a clock distribution system, a clock distribution device which calculates a time spent until a device directly housing the clock supply device can output a packet after the device stores the packet in a transmission buffer of its own device, and transmits calculated time information in an IP packet to a device which does not directly house the clock supply device in a 8 kHz cycle is combined with a device which monitors an 8 kHz cycle information identification pattern from the IP packet received from the clock distribution device and corrects timing of the 8 kHz clock according to timing in the 8 kHz cycle, information about its output delay time, and statistic information about a network delay amount. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a clock synchronization system and a clock synchronization method, and more particularly to a clock synchronization system and a clock synchronization method in which a relay network is an IP network.

  IP (Internet Protocol) telephones based on VoIP (Voice over Internet Protocol) technology, which can make calls at low cost, have become widespread due to lower prices for large capacity lines and relaxation of regulations in the communications industry. It is increasing. On the other hand, the conventional communication network is an independent network vertically integrated for each service, such as a telephone network, a mobile network, a leased line network, and a broadcast network.

  In recent years, there has been a movement to reduce operation costs by integrating multiple existing networks into one. The integrated network is considered to be composed of an IP network. Accordingly, it is assumed that the public line telephone network (PSTN) also shifts from a network constituted by SONET (Synchronous Optical Network) / SDH (Synchronous Digital Hierarchy) to a network constituted by IP.

  When the relay network is changed to the IP network, the network synchronization realized in the SONET / SDH network cannot be performed. Here, the network synchronization is clock synchronization with a clock supply device for synchronizing each device of the public line telephone network. In a SONET / SDH network, a device that does not directly accommodate a clock supply device can extract a clock from a transmission line by connecting the device that directly accommodates the clock supply device with a SONET / SDH network. Network synchronization is possible.

  However, in an IP network, clock synchronization is generally not performed between devices. The IP network is a network that operates asynchronously because the clocks of each device are independent. Since each device operates independently with the reference clock in its own device, data loss may occur due to a difference in accuracy of the reference clock of each device. When data loss occurs, in the case of voice data, noise is superimposed on the voice during a call, resulting in a deterioration in call quality. Further, in the case of data communication such as FAX or modem, there is a phenomenon that correct data is not transmitted to the transmission destination and erroneous data is reproduced at the transmission destination.

Telephone service using IP as a relay network is becoming an important lifeline. Therefore, it is necessary to ensure the quality of telephone service using IP.
One factor of data loss in the IP network is a difference in clock accuracy between devices. As a technique for performing network synchronization in an IP network, IEEE 1588 described in Non-Patent Document 1 and NTP (Network Time Protocol) time synchronization protocol described in Non-Patent Document 2 have been proposed.

  The time synchronization methods shown in Non-Patent Document 1 and Non-Patent Document 2 are not connected to a time source and a master device that is directly connected to an accurate time source such as GPS (Global Positioning System), standard radio wave, and atomic clock. Consists of slave devices. The slave device transmits a time inquiry packet to the master device at an arbitrary timing. When receiving the time inquiry packet, the master device returns a packet with the current time inserted to the slave device that has transmitted the time inquiry packet. The slave device calculates the delay time in the transmission path using the time packet returned from the master device and the time stamp when the time inquiry packet is sent and when the time packet is received, and the time of the time packet received from the master device Is a method of performing network synchronization by correcting the time.

Kannisto J et al., “Software and Hardware Prototypes of the IEEE1588 Precision Time Protocol on Wireless LAN”, LOCAL AND METROPOLITAN AREA NETWORKS, 2005. LANMAN 2005. THE 14 TH IEEE WORKSHOP ON CHANIA, CRETE, GREECE 18-21 SEPT. 2005 , PISCATAWAY, NJ, USA, IEEE, 18 September 2005 (2005-09-18), pages 1-6 RFC1305

  When clock synchronization is performed using the time synchronization method in IEEE 1588 (Non-Patent Document 1) or NTP (Non-Patent Document 2) as described above, depending on the data amount of the transmission buffer of the IP network interface of the master device, Transmission of IP packets is delayed, and correct synchronization information may not be delayed to the slave device. For example, when the master device and the slave device are connected in a 1: n connection, the master device may be congested due to concentration of access of time inquiry packets from the slave device. At this time, the master device increases the number of transmission data loaded in the transmission buffer of the IP network interface. As a result, the master device cannot transmit the time synchronization packet at the intended timing, and transmits the packet to the slave device at a timing different from the time stamp inserted when the master device generates the packet.

  If the master device that supports IEEE 1588 or NTP is not a device dedicated to IEEE 1588 or NTP, but is a device integrated with a VoIP gateway deployed between the PSTN and the IP network, transmission processing of voice packets and call control packets And may overlap. At this time, the master device cannot transmit a response to the time inquiry packet from the slave device at an intended timing.

  The slave device operates in synchronization with the time synchronization packet received from the master device. When outputting from the master device at a timing different from the timing intended by the master device, the slave device receives information different from the actual time and performs synchronization.

  Therefore, in a telephone service using IP as a relay network, clock synchronization cannot be performed between telephone exchanges serving as slave devices due to packet output delays in the master device due to the state of the transmission buffer of the IP network interface in the master device. There is a case.

  In view of the above points, the present invention provides a clock synchronization system and a clock synchronization method that do not cause data loss due to a difference in clock accuracy between slave devices due to packet output delay in the master device in a telephone service using IP as a relay network. I will provide a.

  The above-described problem includes a clock distribution device and a clock extraction device connected by an IP network, and the clock distribution device generates a periodic synchronization packet for each predetermined period, and transmits a transmission buffer to the periodic synchronization packet. The first delay time and the period synchronization pattern depending on the accumulated amount are recorded and transmitted to the clock extraction apparatus via the IP network. When the clock extraction apparatus receives the period synchronization packet, This can be achieved by a clock distribution system that acquires the timing of a predetermined period from the pattern and adjusts the timing from the first delay time and the second delay time in the IP network.

  A step of generating a periodic synchronization packet for each predetermined period; and a first delay time and a periodic synchronization pattern depending on an accumulation amount of a transmission buffer are recorded in the periodic synchronization packet, and the IP network A step of transmitting the packet, a step of receiving a periodic synchronization packet, a step of obtaining a timing of a predetermined period from the periodic synchronization pattern, a first delay time, and a second delay time in the IP network And a clock distribution method comprising the steps of adjusting the timing.

  In a system in which the relay network is IP, clock synchronization of a clock recovery device that is not directly connected to an accurate time source such as a clock supply device is possible, and data loss due to a difference in clock accuracy can be eliminated.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings using examples. The same reference numerals are assigned to substantially the same parts, and the description will not be repeated.

  FIG. 1 is a block diagram of a telephone system 500 in which an IP network 100 is used as a relay network between the telephone exchange 300-1 and the telephone exchange 300-2. Two telephone exchanges 300, a clock distribution device 200, and a CA (Call Agent) 140 are connected to the IP network 100. The CA 140 performs call connection control between the telephone terminal 130-1 and the telephone terminal 130-2 in the IP network 100. The telephone exchange 300-1 is connected to the telephone terminal 130-1. The telephone exchange 300-2 is connected to the telephone terminal 130-2. The clock supply device 110 is a clock source of the telephone system 500 and is directly connected to the telephone exchange 300-2 and the clock distribution device 200. The clock distribution device 200 is connected to the telephone exchange 300-1 via the IP network 100 and serves as a clock source for the telephone exchange 300-1.

  FIG. 2 is a block diagram of a clock distribution device that realizes clock synchronization in an IP network. In FIG. 2, the clock distribution device 200 includes a clock interface unit 215, a clock extraction unit 220, a transmission data amount information management unit 245, an output delay information generation unit 240, an 8 kHz period synchronization packet generation unit 235, a packet A transmission unit 225, an IP network interface unit 230, a transmission destination information storage unit 250, an 8 kHz monitoring unit 205, and a control unit 210 are provided.

  The clock interface unit 215 is connected to the clock supply device 110 and receives a composite clock (64 kHz + 8 kHz) that is a source of the telephone system 500. The clock extraction unit 220 extracts 8 k pulses having a period of 8 kHz from the composite clock that is the source oscillation of the telephone system received by the clock interface unit 215. The transmission data amount information management unit 245 stores the data amount of transmission packets loaded in the packet transmission unit 225. The transmission destination information storage unit 250 stores the transmission destination information of the 8 kHz period synchronization packet.

  The output delay information generation unit 240 calculates a delay time until the 8 kHz period synchronization packet is output from the data amount stored in the transmission data amount information management unit 245 and the frequency of the transmission medium. The 8 kHz period synchronization packet generation unit 235 packetizes the 8 kHz period information identification pattern 445 indicating the 8 kHz period information at the 8 kHz period and the output delay information 440 by using the 8 kHz extracted by the clock extraction unit 220 as a reference. Load the packet into the send buffer. The 8 kHz period synchronization packet generation unit 235 simultaneously notifies the data amount of the packet loaded in the transmission data amount information management unit 245. The packet transmission unit 225 sequentially outputs the IP packet loaded from the control unit 210 or the IP packet generated by the 8 kHz period synchronization packet generation unit 235. The IP network interface unit 230 is connected to the IP network 100 and transmits the 8 kHz periodic synchronization packet or the packet generated by the control unit 210. The 8 kHz monitoring unit 205 monitors whether the extracted 8 kHz clock is normal. The control unit 210 controls each block.

  FIG. 3 is a block diagram of a telephone exchange that realizes clock synchronization in an IP network. In FIG. 3, the telephone exchange 300 includes an IP network interface 315, a TDM-IP conversion unit 320, a TDM signal transmission / reception unit 325, a telephone terminal interface 330, a network delay monitoring unit 335, a clock information extraction unit 340, A delay information reproduction unit 345, a PLL unit 350, a clock interface unit 355, a clock extraction unit 360, and a control unit 310 are provided.

  The clock interface unit 355 is connected to the clock supply device 110 and receives a clock that is a source oscillation of the telephone system 500. In the configuration of FIG. 1, only the telephone exchange 300-2 uses the clock interface unit 355. The clock extraction unit 360 extracts an 8 k pulse having a period of 8 kHz from the source clock received by the clock interface unit 355 and uses it as a reference clock of the PLL unit 350. The IP network interface unit 315 is connected to the IP network 100 and receives the 8 kHz periodic synchronization packet output from the clock distribution device 200 and transmits and receives voice packets and call control packets used in the IP telephone service.

  The clock information extraction unit 340 always monitors the 8 kHz period information identification pattern 445 included in the 8 kHz period synchronization packet output from the clock distribution apparatus 200, and extracts the timing of the 8 kHz period. The clock information extraction unit 340 also extracts information of the output delay time information 440 until the 8 kHz period synchronization packet is output from the clock distribution device 200. The clock information extraction unit 340 outputs information extracted from the 8 kHz period synchronization packet to the delay information reproduction unit 345.

  The delay information reproduction unit 345 reproduces an 8 kHz pulse by delaying the output delay time from the 8 kHz cycle timing output from the clock information extraction unit 340 and the output delay time information 440. The delay information reproducing unit 345 further delays the network delay amount calculated by the network delay monitoring unit 335.

  The network delay monitoring unit 335 monitors the cycle of the 8 kHz pulse generated by the delay information reproducing unit 345 with the current output clock of the PLL unit 350. The network delay monitoring unit 335 calculates a network delay time 501. The network delay monitoring unit 335 further calculates network delay statistical information 502. The delay time 501 and the statistical information 502 will be described later with reference to FIG.

  The PLL unit 350 is a phase-locked loop circuit that uses either the 8 kHz pulse generated by the delay information reproducing unit 345 or the 8 kHz pulse extracted by the clock extraction unit 360 as an input signal. The PLL unit 350 uses the generated clock as a reference clock in the apparatus.

  The telephone terminal interface unit 330 connects the telephone terminal 130. The TDM signal transmission / reception unit 325 transmits / receives data using the in-device reference clock generated by the PLL unit 350. The TDM-IP conversion unit 320 performs mutual conversion between TDM data and IP packets. The control unit 310 is a block that controls each of the above blocks.

  FIG. 4 shows the format of an 8 kHz period synchronization packet generated by the 8 kHz period synchronization packet generation unit of the clock distribution apparatus. The format of the 8 kHz periodic synchronization packet 400 includes a preamble 401, a frame start 405, a transmission destination address 410, a transmission source address 415, a type 420, a data area 425, and an FCS (Frame Check Sequence) 430.

  The data area 425 includes a UDP header 455, a sequence number 450 indicating the sequence of the 8 kHz periodic synchronization packet 400, an 8 kHz periodic information identification pattern 445 indicating that the packet is an 8 kHz periodic synchronization packet, and 8 kHz from the clock distribution device 200. The output delay time information 440 indicating the time until the period synchronization packet is output and the 8 kHz period abnormality flag 435 indicating the 8 kHz period abnormality in the clock distribution apparatus 200 are configured.

  FIG. 4 shows 8 kHz period synchronization information by a normal IP packet. However, when an 8 kHz periodic synchronization packet is transmitted to a plurality of devices at the time of 1: n connection, a multicast packet or a broadcast packet may be used.

  With reference to FIG. 5, the database configuration held by the network delay monitoring units of the two telephone exchanges will be described. The database 500 includes a delay time 501 and statistical information 502. Database 500 is updated to add new records at 8 kHz periods. The network delay monitoring unit 335 monitors the cycle of the 8 kHz pulse generated by the delay information reproducing unit 345 with the output clock of the PLL unit 350. The network delay monitoring unit 335 calculates the difference between them (that is, the network delay time) every 8 kHz period (125 μs period), and sequentially stores the difference in the delay information 501 of the database 500.

  The entry 503-1 indicates that there was a delay time 501 of 6 μs for the first 125 μs period. On the other hand, the 6 μs correction value of the statistical information 502 is an output to the delay time reproduction unit 345. The entry 503-n indicates that there is a delay time 501 of 1 μs for the 125th μs cycle. Further, the correction information of 3 μs is stored in the statistical information 502 up to the nth time. Here, the statistical information is calculated by statistical information = total delay amount received in the past / number of samples = cumulative moving average. However, the delay amount of the IP network can be corrected using statistical information other than the cumulative moving average (such as the moving average of the past five times). Also, the initial value of the statistical information 502 may be registered in advance.

  Here, the reason for using the statistical information 502 instead of the delay time 501 as the correction value will be described. The delay time 501 is the time that the 8 kHz periodic synchronization packet received at a certain time is delayed on the network. When IP packets instantaneously concentrate on the network at a certain time, the amount of delay on the network increases extremely due to congestion of the router / HUB. Thereafter, when the number of IP packets decreases, the delay amount on the network decreases and the original delay amount is restored. When such a delay time 501 is used for correction, the value of the delay time 501 becomes extremely large due to an instantaneous increase in the delay amount, and the frequency of the clock output by the PLL is extremely high when the PLL tries to follow that value. Becomes low (slow). In addition, due to the decrease in the delay amount, the PLL follows and the frequency of the clock output from the PLL becomes extremely high (fast).

  When a change in network delay occurs continuously in the order of increase → decrease → increase → decrease →…, the clock output by the PLL repeats slow → fast → slow → fast →…, the PLL does not lock and the PLL Becomes a fluttering (unstable) state of the output clock. Since the PLL synchronizes the clock with the delay amount reproduced by the delay information reproducing unit 345, in order to eliminate clock fluctuation (unstable state) due to instantaneous increase / decrease of network delay, Statistical information 502 that is a cumulative moving average value is used.

  When statistical information 502 that is a cumulative moving average value of delay times received in the past is used, the PLL follows the same as the delay time 501 due to an instantaneous increase in the delay amount. However, since the delay time of the network is an average value, the change in the frequency of the PLL is slight. On the other hand, when the delay time is decreased, the network delay time is an average value, so that the change in the PLL frequency is very small, and the PLL instability period can be shortened.

  The operation in the case where an 8 kHz period synchronization packet is transmitted from the clock distribution device 200 and clock synchronization is performed by the telephone exchange 300-1 will be described below with reference to FIGS. FIG. 6 is an operation flowchart of the clock distribution apparatus. FIG. 7 is an operation flowchart of the telephone exchange connected to the clock distribution device. FIG. 8 is a timing chart of clock correction between the clock distribution device and the telephone exchange.

  With reference to FIG. 6, description will be given of the 8 kHz period synchronization packet transmission operation of the clock distribution device. In FIG. 6, the clock distribution device 200 receives a clock serving as a clock source from the clock supply device 110. Specifically, the clock distribution device 200 uses the clock extraction unit 220 to extract a clock with an 8 kHz period necessary for distribution to the telephone exchange 300-1 via the clock interface unit 215 (S700). The 8 kHz monitoring unit 205 checks whether the extracted 8 kHz clock is normal (S705). If the 8k pulse is abnormal (S705: NO), the clock distribution device 200 uses the 8 kHz period abnormality flag to notify each device synchronized with the clock distribution device 200, here the telephone switch 300-1, of the abnormality. 435 is regarded as abnormal (S710). When the 8k pulse is normal (S705: YES), the clock distribution device 200 sets the 8 kHz period abnormality flag 435 to normal (S713).

  The controller 210 generates an 8 kHz period synchronization packet in units of 8 k periods (S715 to S725). Specifically, the control unit 210 acquires information on the delay time until the 8 kHz cycle synchronization packet is output from the output delay information generation unit 240 in units of 8 k cycles (S715). Here, the output delay information generation unit 240 calculates in advance the delay time until the 8 kHz periodic synchronization packet is output from the data amount stored in the transmission data amount information management unit 245 and the frequency of the transmission medium. In response to an inquiry from the control unit 210, the output delay time information is notified.

  The control unit 210 acquires the transmission destination information of the 8 kHz period synchronization packet from the transmission destination information storage unit 250 (S720). The transmission destination information is information registered in advance. The control unit 210 generates the 8 kHz periodic synchronization packet shown in FIG. 4 from the transmission destination information, the output delay time information 440, and the 8 kHz periodic abnormality flag 435 (S725). The 8 kHz period information identification pattern included in the 8 kHz period synchronization packet is an arbitrary identification pattern of several digits.

  After generating the 8 kHz periodic synchronization packet, the control unit 210 loads the transmission packet into the transmission buffer of the packet transmission unit 225 (S730). At the same time, the control unit 210 notifies the transmission data amount information management 245 of the amount of data loaded in the transmission buffer of the packet transmission unit 225 (S735). This information is used to generate a packet for 8 kHz period synchronization of the next period.

  The clock distribution apparatus 200 sequentially sends out the IP packet loaded in the transmission buffer from the IP network interface 230, transmits all the information stored before loading the 8 kHz period synchronization packet, and then transmits the 8 kHz period synchronization packet to the IP network. 100 (S740). The clock distribution apparatus 200 returns to step 700 and performs the above operation in an 8 kHz cycle.

  Here, 8 kHz periodic synchronization information is transmitted by a normal IP packet. However, the 8 kHz periodic synchronization packet may be transmitted simultaneously to a plurality of devices using multicast or broadcast.

  With reference to FIG. 7, the operation of receiving a packet for 8 kHz period synchronization of the telephone exchange will be described. In FIG. 7, the telephone exchange 300-1 monitors packets received from the IP network interface 315, and monitors the 8 kHz period information identification pattern 445 transmitted from the clock distribution apparatus 200 (S800). When the 8 kHz periodic information identification pattern 445 is received (S800: YES), the telephone exchange 300-1 extracts clock information (S803). Specifically, the telephone exchange 300-1 extracts the output delay time information 440, the sequence number 450 of the 8 kHz periodic synchronization packet, and the information of the 8 kHz periodic abnormality flag 435 from the 8 kHz periodic synchronization packet.

  The control unit 310 determines the normality of the 8 kHz period abnormality flag 435 from the extracted clock information and confirms whether the sequence number is consecutive from the sequence number 450 of the 8 kHz period synchronization packet received immediately before ( S805). If the 8 kHz period abnormality flag 435 indicates an abnormality or the sequence is abnormal (S805: NO), the extracted clock information is discarded and the next 8 kHz period synchronization packet is detected. The former is because the extracted clock information may be abnormal due to an abnormality in the clock distribution device 200. The latter is because when the sequence number 450 of the received 8 kHz periodic synchronization packet is abnormal, packet loss on the transmission path is considered.

  When the 8 kHz period abnormality flag 435 and the sequence number 450 are normal (S805: YES), the clock information extraction unit 340 generates 8 kHz period timing information using the 8 kHz period information identification pattern 445 (S810). The delay information reproduction unit 345 uses the delay time from the output delay time information 440 acquired in the clock distribution device 200 acquired by the clock information extraction unit 340 and the network delay calculated by the network delay monitoring unit 335 in the telephone exchange 300-1. The quantity statistical information 502 is acquired, and based on the output delay time information 440 and the statistical information 502, the 8 kHz period timing generated by the clock information extraction unit 340 is delayed by one period and the timing is adjusted (S815).

  Next, the control unit 310 outputs an 8 kHz pulse signal subjected to timing correction with an 8 kHz cycle to the network monitoring unit 335 and the PLL unit 350. The network delay monitoring unit 335 monitors whether the cycle of the 8 kHz pulse signal subjected to timing correction is a 125 μs cycle by using the output clock of the PLL unit 350, calculates the delay time of the transmission path by the network, and outputs the result to the network The data is stored in the database delay time 501 of the delay monitoring unit 335 (S835). The data is stored in the order of 503-1 to 503-2 and 503-3 in order of 503-n in a 125 μs cycle. Since 503-n depends on the amount of statistical information, it is an arbitrary value. Further, when the delay time 501 is stored in the database of the network delay monitoring unit 335, the control unit 310 calculates the statistical information of the delay amount in the network from the past delay information and stores it in the statistical information 502 of the database ( S840). Here, the statistical information is calculated as statistical information = total delay amount received in the past / number of samples. However, timing correction is also possible in other statistical information calculation methods. Note that the initial value of the statistical information 502 may be registered in advance.

  Further, the PLL unit 350 synchronizes the clock by comparing the phase with the feedback clock of the PLL unit output clock using the 8 kHz pulse signal that has been subjected to the timing correction of the 8 kHz cycle as a reference clock (S845).

  The clock synchronization state is continued by performing the above operation every time the 8 kHz period information identification pattern 445 is detected. Note that step 845 may be executed in parallel with step 835 and step 840, or may be executed in advance.

  Referring to FIG. 8, the clock timing between the clock distribution device and the telephone exchange receiving the clock distribution will be described. In FIG. 8, FIG. 8A is the timing of the clock extraction unit 220 of the clock distribution device 105. FIG. 8B shows the delay time of the output delay time information 440 that the clock distribution device 105 places on the 8 kHz period synchronization packet 400. FIG. 8C shows the delay value of the network delay statistical information 502 calculated by the telephone exchange 300-1. FIG. 8D shows the timing of the 8 kHz period generated by the clock information extraction unit 340. FIG. 8E shows the clock timing adjusted by the delay information reproducing unit 345.

  Here, when the clock state is 900, the output delay time information 440 is 0 μs, and there is no delay until the 8 kHz period synchronization packet is output in the clock distribution device 200. As the network delay statistical information 502 of the telephone exchange 300-1, the statistical information 502 of the entry 503-1 is used, and there is a delay of 6 μs in the IP network 100. The delay information reproducing unit 345 in the telephone exchange 300-1 corrects the next 8k timing period from the information of the output delay time information 440 and the statistical information 502. When the clock state is 900, since a delay of 6 μs has occurred in total, timing correction is performed so that an 8 k timing pulse rises after 125 μs−6 μs = 119 μs.

  When the clock state is 901, the delay information reproducing unit 345 performs the period correction of the next 8 kHz period from the information of the output delay time information 440 and the statistical information 502 as described above. When the clock state is 901, since a network delay of 4 μs has occurred, timing correction of 8 kHz period is performed so that an 8k timing pulse rises after 125 μs−4 μs = 121 μs.

  When the clock state is 902, the output delay time information 440 is 5 μs, and it takes a time of 5 μs to output the 8 kHz period synchronization packet in the clock distribution device 200. As the network delay statistical information 502 in the telephone exchange 300-1, the statistical information 502 of the entry 503-3 after two clocks is used, and there is a delay of 3.67 μs in the IP network 100. The delay information reproducing unit 345 in the telephone exchange 300-1 performs the period correction of the timing of the next 8 kHz period from the information of the output delay time information 440 and the statistical information 502. When the clock state is 902, a delay of 8.67 μs has occurred in total, so timing correction of 8 kHz period is performed so that an 8 k timing pulse rises after 125 μs−8.67 μs = 116.33 μs.

  In the above-described embodiment, the network delay time 501 is obtained from the phase difference between the generated 8 kHz and the current clock. However, the method of obtaining is not limited to this, and it may be obtained from a period until a ping is sent from the exchange 300 to the clock distribution device 200 and a response from the clock distribution device 200 is returned.

It is a hardware block diagram of a telephone system. It is a block diagram of a clock distribution apparatus. It is a block diagram of a telephone exchange. This is a format of an 8 kHz periodic synchronization packet. It is a network delay time storage database of a telephone exchange. It is the flowchart which showed operation | movement of the clock distribution apparatus. It is a flowchart of the clock synchronous operation | movement of a telephone switchboard. It is a timing chart of timing correction of 8 kHz pulse.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 100 ... IP network, 110 ... Clock supply apparatus, 130 ... Telephone terminal, 140 ... CA (Call Agent), 200 ... Clock distribution apparatus, 205 ... 8kHz monitoring part, 210 ... Control part, 215 ... Clock interface part, 220 ... Clock Extraction unit, 225 ... packet transmission unit, 230 ... IP network interface unit, 235 ... 8 kHz period synchronization packet generation unit, 240 ... output delay information generation unit, 245 ... transmission data amount information management unit, 250 ... destination information storage unit , 300 ... telephone exchange, 310 ... control unit, 315 ... IP network interface unit, 320 ... TDM-IP conversion unit, 325 ... TDM signal transmission / reception unit, 330 ... telephone terminal interface unit, 335 ... network delay unit, 340 ... clock information Extraction unit, 345 ... delay information reproduction unit, 350 ... PLL (Phase Locked Loop) unit, 3 5 ... clock interface unit, 360 ... clock extraction unit, 500 ... telephone system.

Claims (5)

In a clock distribution system comprising a clock distribution device and a clock extraction device connected by an IP network,
The clock distribution device generates a period synchronization packet for each predetermined period, and records a first delay time and a period synchronization pattern depending on the accumulated amount of the transmission buffer in the period synchronization packet. , Transmitted to the clock extraction device via the IP network,
When the clock extracting device receives the periodic synchronization packet, the clock extracting device acquires the timing of the predetermined period from the periodic synchronization pattern, and based on the first delay time and the second delay time in the IP network. A clock distribution system that adjusts the timing. The clock distribution system of claim 1,
The clock distribution system, wherein the clock extracting device obtains the second delay time from a phase difference between the timing and a current clock. The clock distribution system of claim 1,
The clock distribution system, wherein the clock extraction device obtains the second delay time based on a command transmission time to the clock distribution device and a response reception time from the clock distribution device. A clock distribution system according to any one of claims 1 to 3,
The clock distribution system, wherein the clock extraction device adjusts the timing based on a sum of a moving average of the first delay time and the second delay time. Generating a period synchronization packet for each predetermined period;
Recording the first delay time depending on the accumulated amount of the transmission buffer and the period synchronization pattern in the period synchronization packet, and transmitting the packet via the IP network;
Receiving the periodic synchronization packet;
Obtaining the timing of the predetermined cycle from the cycle synchronization pattern;
A clock distribution method comprising: adjusting the timing from the first delay time and a second delay time in the IP network.

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