JPH10336182A - Atm intra-network time synchronization system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To realize an ATM intra-network time synchronization system which performs time synchronization between ATM nodes with a simple configuration in an ATM network including plural ATM nodes. SOLUTION: In an ATM network that includes plural ATM nodes, a master station 1a is provided with a cell generating means 1a1 which generates a time transfer cell and a cell inserting means 1a2 which inserts a time transfer cell into a transmission line at a prescribed time when time correction should be executed; and a slave station 2a is provided with a cell extracting means 2a1 which extracts a time transfer cell from a multiplexed cell that is fetched from the transmission line and a setting means 2a2 that sets receiving time of an extracted time transfer cell as reference time of the slave station.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plurality of ATMs (As
The present invention relates to a time synchronization method in an ATM network for performing time synchronization between ATM nodes in an ATM network including nodes. ATM divides all digital information, such as voice, data, and images, into fixed-length blocks with headers (called "cells"), multiplexes them in units of cells, and, in a network, specifies the headers of the cells. The cell is transferred at high speed according to the logical channel number. This ATM
In the STM (Synchronous Multiplexing), information time slots that appear periodically and sequentially are transferred as they are by “synchronous multiplexing”.
Unlike the Nous Transfer Mode, an information time slot (cell) appears only when information is present, and is transferred "asynchronously multiplexed" and transferred each time. Therefore, it can be said that there is no need to synchronize the time between the ATM nodes in the ATM. However, for example, in order to adopt a method of performing charging in a certain time zone, an ATM node (master station) serving as a reference is used. It is necessary that time synchronization is established between the slave node and each ATM node serving as a slave station.

[0002]

2. Description of the Related Art In such a case, STM can be easily realized by assigning a specific time slot to time transfer.
Timing transfer by multi-frame can be easily realized. That is, in the STM, 125 μs (8 KHz) is defined as one frame, and a plurality of channels are time-division multiplexed and transmitted in the frame. If timing synchronization of 125 μs or more is required between the STM nodes, a multi-frame pattern is defined on a multi-frame composed of a plurality of frames, and transmission and reception of the multi-frame pattern is performed, so that a timing of an integral multiple of 125 μs is obtained. Transmission is possible.

[0003]

Here, the point that the clock of the entire network is synchronized by synchronizing the network with the ATM,
Similar to M, but ATM employs logical label multiplexing (cell multiplexing) for identifying a channel by a channel identifier (VPI / VCI) in a header, and the time position of a time slot in a frame as in STM. Does not employ time position multiplexing (time division multiplexing) for identifying channels.

Therefore, in an ATM, 125 μs
In the case of transferring a long timing as described above, a specific time slot cannot be assigned to the timing transfer unlike the STM. Therefore, development of a time information transfer method is desired. An object of the present invention is to provide a time synchronization method in an ATM network that can synchronize time between nodes with a simple configuration in an ATM.

[0005]

FIG. 1 is a block diagram showing the principle of the first aspect of the present invention. According to the first aspect of the present invention, in an ATM network including a plurality of ATM nodes, a master station 1a generates a time transfer cell by a cell generating means 1a.
1 and a cell insertion means 1a2 for inserting a time transfer cell into a transmission line at a predetermined time when it is desired to perform time correction, wherein the slave station 2a extracts a time transfer cell from a multiplexed cell taken in from the transmission line. Means for setting the reception time of the extracted time transfer cell as the reference time of the slave station.

That is, in the master station 1a, the cell generating means 1
The cell insertion means 1a2 inserts the time transfer cell generated by a1 into the transmission line at a predetermined time at which time correction is to be performed. Then, in the slave station 2a, the cell extracting means 2a1 sets the reception time of the time transfer cell taken in from the transmission path by the setting means 2a.
2 is set as the reference time of the slave station 2a. As a result, time synchronization between ATM nodes is achieved.

FIG. 2 is a block diagram showing the principle of the present invention. The second aspect of the present invention provides a plurality of ATMs.
In an ATM network including a node, a master station 1b generates a time transfer cell in which a predetermined time at which time correction is to be performed is set, and a cell insertion means 1b2 which inserts the time transfer cell into a transmission line at a predetermined time. The slave station 2b comprises: a cell extracting means 2b1 for extracting a time transfer cell from a multiplexed cell taken from a transmission line; and a predetermined time set in the extracted time transfer cell as a reference time of the slave station. Setting means 2b2 for setting.

That is, in the master station 1b, the cell generating means 1
The cell insertion means 1b2 inserts the time transfer cell in which the predetermined time at which the time correction is to be performed generated by b1 is set into the transmission line at the predetermined time. In the slave station 2b, the setting unit 2b2 sets the same time as the predetermined time set in the time transfer cell taken in from the transmission path by the cell extracting unit 2b1 as the reference time of the slave station 2b.
As a result, time synchronization between ATM nodes is achieved.

FIG. 3 is a block diagram showing the principle of the third aspect of the present invention. According to the third aspect of the present invention, a plurality of ATMs are provided.
In an ATM network including a node, a master station 1c extracts a first time transfer cell from a multiplexed cell taken in from a transmission line, a first cell extracting unit 1c1 and a reception time of the extracted first time transfer cell in a predetermined area. A first cell generating means 1c2 for generating a second time transfer cell set to the first time, and a first cell inserting means 1c3 for inserting the second time transfer cell into a transmission line at a first predetermined time at which time correction is to be performed. Slave station 2
c is a second cell generating means 2 for generating a first time transfer cell
c1 and the second cell for which time correction is to be performed on the first time transfer cell.
Second cell inserting means 2c2 for inserting into a transmission line at a predetermined time
A second cell extracting means 2c3 for extracting a second time transfer cell from the multiplexed cell taken in from the transmission line, a reception time set for the extracted second time transfer cell, and reception of the second time transfer cell. It is characterized by comprising a correction unit 2c4 for calculating a transmission path delay amount from a time as a correction value, and a setting unit 2c5 for setting the correction value as a reference time of the slave station.

That is, in the slave station 2c, the second time insertion cell 2c2 inserts the first time transfer cell generated by the second cell generation means 2c1 into the transmission line at the second predetermined time. In the master station 1c, the first cell extracting means 1c1 takes in the first time transfer cell from the transmission line, and the first cell generating means 1c2 generates a second time transfer cell in which the reception time of the first time transfer cell is set. The first cell insertion means 1c3 inserts the second time transfer cell into the transmission line at a first predetermined time. Then, in the slave station 2c, when the second cell extracting unit 2c3 takes in the second time transfer cell from the transmission line, the correcting unit 2c4
The transmission path delay amount is calculated as a correction value from the reception time set in the second time transfer cell and the reception time of the second time transfer cell, and the setting unit 2c5 sets the correction value as the reference time of the slave station. I do. As a result, time synchronization is achieved in a form in which phase correction has been performed between ATM nodes.

FIG. 4 is a block diagram showing the principle of the present invention. The invention according to claim 4 is a method for providing a plurality of ATMs.
In an ATM network including a node, a master station 1d extracts a first time transfer cell from a multiplexed cell taken in from a transmission line, and a first cell extracting means 1d1. A first cell generating means 1d2 for generating the second time transfer cell set in the first time transfer cell, and a first cell inserting means 1d3 for inserting the second time transfer cell into the transmission line without delay from the reception time of the first time transfer cell. With
A second cell generating means for generating a first time transfer cell; a second cell inserting means for inserting the first time transfer cell into a transmission line at a predetermined time at which time correction is to be performed; Cell extracting means 2d3 for extracting a second time transfer cell from the multiplexed cell taken from the multiplexing cell, and transmitting from the reception time set in the extracted second time transfer cell and the reception time of the second time transfer cell. Correction means 2d4 for calculating a path delay amount and outputting as a correction value an added value of the calculated transmission path delay amount and the reception time set in the second time transfer cell; Setting means 2d5 for setting as

That is, in the slave station 2d, the first time transfer cell generated by the second cell generation means 2d1 is inserted into the transmission line at a predetermined time at which the second cell insertion means 2d2 wants to perform time correction. In the master station 1d, the first cell extracting means 1d
1 fetches the first time transfer cell from the transmission line, the first cell generation means 1d2 generates the second time transfer cell in which the reception time of the first time transfer cell is set, and the first cell insertion means 1d3.
Inserts the second time transfer cell into the transmission line without delay from the reception time of the first time transfer cell.

In the slave station 2d, when the second cell extracting means 2d3 takes in the second time transfer cell from the transmission line, the correction means 2d4 sets the reception time set in the second time transfer cell and the second time transfer cell. The transmission path delay amount is calculated from the reception time of the time transfer cell, and the sum of the calculated transmission path delay amount and the reception time set in the second time transfer cell is output as a correction value. Sets the correction value as the reference time of the slave station. With this, ATM
Time synchronization is achieved in a form in which phase correction has been performed between nodes.

FIG. 5 is a block diagram showing the principle of the present invention. The invention according to claim 5 is a method for providing a plurality of ATMs.
In an ATM network including a node, the master station 1e generates a first time transfer cell requesting generation of a time transfer cell, and generates a third time transfer cell in which the reception time of the second time transfer cell is set in a predetermined area. A first cell generating means 1e1 for performing generation, inserting a first time transfer cell into a transmission line at a predetermined time at which time correction is to be performed, and delaying a third time transfer cell from the reception time of the second time transfer cell A first cell insertion unit 1e2 for inserting a second time transfer cell from a multiplexed cell taken in from a transmission line, and a first cell extraction unit 1e3 for extracting a second time transfer cell from a multiplexed cell taken in from the transmission line. Second cell extracting means 2e1 for extracting a first time transfer cell and a third time transfer cell from the multiplexed cell taken in from the transmission line, and responding to the cell extracting means extracting the first time transfer cell. A second cell generation means 2e2 to generate two time transfer cell, the insertion into without the transmission path is delayed a second time transfer cells from the reception time of the first time transfer cell 2
A transmission path delay amount is calculated from the cell insertion means 2e3, the reception time set in the extracted third time transfer cell, and the reception time of the third time transfer cell, and the calculated transmission path delay amount and the third time It is characterized by comprising a correction means 2e4 for outputting a value added to the reception time set in the transfer cell as a correction value, and a setting means 2e5 for setting the correction value as a reference time of the slave station.

That is, in the master station 1e, the first time transfer cell requesting the generation of the time transfer cell generated by the first cell generation means 1e1 is replaced by the first cell insertion means 1e2 at a predetermined time at which the time correction is to be performed. To the transmission line. In the slave station 2e, when the second cell extracting means 2e1 fetches the first time transfer cell from the transmission line, the second cell generating means 2e2 generates the second time transfer cell in response thereto, and the second cell inserting means 2e3 inserts the second time transfer cell into the transmission path.

In the master station 1e, when the first cell extracting means 1e3 takes in the second time transfer cell from the transmission line, the first cell generating means 1e1 sets the reception time of the second time transfer cell to a predetermined area. The third time transfer cell thus generated is generated, and the cell inserting means 1e2 inserts the third time transfer cell into the transmission line without delay from the reception time of the second time transfer cell.

Then, in the slave station 2e, when the second cell extracting means 2e1 takes in the third time transfer cell from the transmission line, the correction means 2e4 sets the reception time set in the third time transfer cell and the third time transfer cell. The transmission path delay amount is calculated from the reception time of the time transfer cell, and the sum of the calculated transmission path delay amount and the reception time set in the third time transfer cell is output as a correction value. Sets the correction value as the reference time of the slave station. With this, ATM
Time synchronization is achieved in a form in which phase correction has been performed between nodes.

FIG. 6 is a block diagram showing the principle of the present invention. The invention according to claim 6 is a method for providing a plurality of ATMs.
In an ATM network including a node, the master station 1f generates a first time transfer cell in which a time at which a time transfer cell is generated is set in a predetermined area, and generates a first time transfer cell in which a time at which a second time transfer cell is received is set in a predetermined area. First cell generating means 1f1 for generating a three-time transfer cell; inserting the first time-transfer cell into a transmission line at a time at which time correction is to be performed; First cell insertion means 1f2 for inserting the signal into the transmission path without delay from the reception time;
First cell extracting means 1f3 for extracting a time transfer cell, wherein the slave station 2f extracts a first time transfer cell and a third time transfer cell from the multiplexed cell taken in from the transmission line. 2f1, second cell generating means 2f2 for generating a second time transfer cell at the time set in the first time transfer cell extracted by the cell extracting means, and receiving the second time transfer cell for the first time transfer cell A second cell insertion means 2f3 for inserting into the transmission line without delay from the time, a reception time set in the extracted third time transfer cell, and the third time
Calculate the transmission path delay amount from the reception time of the time transfer cell,
Correcting means 2f4 for outputting the added value of the calculated transmission path delay amount and the reception time set in the third time transfer cell as a correction value, and setting means 2f5 for setting the correction value as the reference time of the slave station. It is characterized by having.

That is, in the master station 1f, the first time transfer cell in which the time at which the time transfer cell is generated generated by the first cell generation means 1f1 is set is inserted into the first cell insertion means 1f2.
Inserts the data into the transmission path at a predetermined time at which time correction is desired. In the slave station 2f, when the second cell extracting means 2f1 takes in the first time transfer cell from the transmission line, the second cell generating means 2f2 sets the time at which the second time transfer cell is set as the first time transfer cell. And the second cell insertion means 2
f3 inserts the second time transfer cell into the transmission path.

In the master station 1f, when the first cell extracting means 1f3 takes in the second time transfer cell from the transmission line, the first cell generating means 1f1 sets the reception time of the second time transfer cell to a predetermined area. The third time transfer cell thus generated is generated, and the cell inserting means 1f2 inserts the third time transfer cell into the transmission line without delay from the reception time of the second time transfer cell.

Then, in the slave station 2f, when the second cell extracting unit 2f1 takes in the third time transfer cell from the transmission line, the correction unit 2f4 checks the reception time set in the third time transfer cell and the third time transfer cell. The transmission path delay amount is calculated from the reception time of the time transfer cell, and the sum of the calculated transmission path delay amount and the reception time set in the third time transfer cell is output as a correction value. Sets the correction value as the reference time of the slave station. With this, ATM
Time synchronization is achieved in a form in which phase correction has been performed between nodes.

According to a seventh aspect of the present invention, in the time synchronization system in the ATM network according to any one of the third to sixth aspects, the master station and the slave station are arranged in the same manner as in the third to sixth aspects. The series of steps described in any one of the steps is performed a plurality of times, and the correction means of the slave station compares the transmission path delay amounts obtained by the plurality of executions and detects the minimum transmission path delay amount among them. It is characterized by comprising detection means for performing the above.

That is, when the master station and the slave station execute a series of procedures described in any one of claims 3 to 6 a plurality of times, the amount of transmission path delay changes due to fluctuations in the transmission path. Therefore, the detecting means compares the transmission line delay amounts obtained by performing the operations a plurality of times, detects the minimum transmission line delay amount, and corrects the time of the slave station using the minimum transmission line delay amount. I do. Thereby, phase correction can be performed in consideration of the delay fluctuation of the transmission path.

[0024]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 7 shows a first embodiment according to the first aspect.
It is a figure showing composition and operation of an embodiment. In the following embodiments, in an ATM network including a plurality of ATM nodes, an ATM node that provides time information is defined as a master station, and an ATM node that synchronizes time with the master station is defined as a slave station. In general, there is a plurality of slave stations for one master station. However, in each of the following embodiments, a time synchronization method including one master station and one slave station is shown for convenience of explanation.

In FIG. 7A, the master station 10a
It includes a timer 11, a cell generator 12, and a cell multiplexer 13. The slave station 20a includes a cell extractor 21 and a timer 22. In the above configuration, the correspondence with the claims is as follows. In the master station 1a,
The master station 10a corresponds. The cell generation means 1a1 includes:
The cell generator 12 corresponds. Cell insertion means 1a2 includes:
The cell multiplexer 13 corresponds. The slave station 20a corresponds to the slave station 2a. The cell extractor 21 corresponds to the cell extracting means 2a1. The timer 22 mainly corresponds to the setting means 2a2.

Hereinafter, the operation of the first embodiment corresponding to claim 1 will be described. In FIG. 7B, φ is a deviation amount between the timer phase of the master station 10a and the timer phase of the slave station 20a. This is an unavoidable phase difference, and is the same in the following embodiments. Master station 1
At 0a, the timer 11 is a clock that provides a reference for creating various timings in the master station, but measures the time and supplies the current time to the cell generator 12. Cell generator 12
Has a function of generating a time transfer cell. The time transfer cell has a special VCI / VPI and is distinguished from a normal user cell. In the first embodiment, the cell generator 12 generates a time transfer cell when the time measured by the timer 11 indicates a reference time (for example, a timer value = 0), and supplies the time transfer cell to one input of the cell multiplexer 13. . Cell multiplexer 13
Is a selector for multiplexing a user cell and a time transfer cell and sending the multiplexed cell to the transmission line. When a time transfer cell is input, the selector transfers the time transfer cell to the transmission line with the highest priority. Therefore, the cell multiplexer 13 inserts the time transfer cell into the transmission line at the reference time (for example, the timer value = 0), which is the predetermined time at which the time correction is to be performed.

In the slave station 20a, the cell extractor 21
However, the multiplexed cell fetched from the transmission line is distinguished between the user cell and the time transfer cell by the VCI / VPI value in the header portion, and the user cell is relayed and transmitted to the transmission line, while the time transfer cell is Take it inside. Cell extractor 21
In the first embodiment, when the reception of the time transfer cell can be extracted by the VCI / VPI value, the timer notifies the timer 22 of the cell reception.

The timer 22 is a clock that provides a reference for creating various timings in the slave station. When the timer 22 receives the notification of cell reception as a reset signal, the timer 22 is set to a reference time (for example, a timer value = 0). That is, slave station 2
In the case of 0a, the timer 22 is corrected to the timer value = 0, and starts measuring time based on the same reference time (timer value = 0) as the master station 10a.

Therefore, as shown in FIG. 7 (b), even if the timer phases of the master station 10a and the slave station 20a are shifted by φ, the time transfer cell transmitted from the master station at the reference time with the timer value = 0 is obtained. By receiving the signal from the slave station 20a, the phases of the two can be matched. FIG. 8 is a diagram showing the configuration and operation of the second embodiment corresponding to claim 2. Although the functions may be slightly different, for convenience of explanation, the same names as those in FIG.
The same reference numerals are given. The same applies to the following embodiments.

In FIG. 8A, the master station 10b
It includes a timer 11, a cell generator 12, and a cell multiplexer 13. The slave station 20b includes a cell extractor 21 and a timer 22. In the above configuration, the correspondence with the claims is as follows. In the master station 1b,
The master station 10b corresponds. The cell generation means 1b2 includes:
The cell generator 12 corresponds. In the cell insertion means 1b3,
The cell multiplexer 13 corresponds. The slave station 20b corresponds to the slave station 2b. The cell extractor 21 corresponds to the cell extracting means 2b1. The setting means 2b2 mainly corresponds to the timer 22.

The operation of the second embodiment according to claim 2 will be described below. In the master station 10b, the timer 11 and the cell multiplexer 13 have been described in the first embodiment. The cell generator 12 generates a time transfer cell that is distinguished from a normal user cell by a special VCI / VPI value as in the first embodiment. In the second embodiment, the timer 11 measures the time. At an arbitrary current time T, a time transfer cell in which the current time T is added to a predetermined area in the payload is generated. This arbitrary current time T is a predetermined time at which time correction is to be performed.

In the slave station 20b, the cell extractor 21
However, similarly to the first embodiment, the multiplexed cell taken from the transmission path is distinguished between the user cell and the time transfer cell by the VCI / VPI value in the header portion, and the user cell is relayed to the transmission path. While transmitting, the time transfer cell is taken in. In this second embodiment, the cell extractor 21
When the reception of the time transfer cell can be extracted by the CI / VPI value, the payload is examined, the time information (that is, the T value) is extracted, and the timer 22 is notified of the T value together with the notification of the cell reception.

The timer 22 is a clock which gives a reference for creating various timings in the slave station as in the first embodiment. However, since the notification of the cell reception is accompanied by the notification of the T value, the timer 22 is used. Is received, the T value is set as the timer value. That is, the timer value is corrected to the T value. Therefore, as shown in FIG.
Even if the timer phases of 0b and the slave station 20b are shifted by φ, the slave station 20b receives the time transfer cell transmitted from the master station at the time T, so that both phases can be matched.

In the second embodiment, one master station has
This is suitable for multiplex processing for transferring the same or different times to a plurality of slave stations via a plurality of transmission paths and synchronizing the plurality of slave stations. For example, when a cell is transferred from a plurality of slave stations to the master station, the slave station A changes the cell at time t1, the slave station B changes at time t2, the slave station C changes at time t3, and the slave station D changes at time t4. If the transfer is performed, the cells can be prevented from being congested in the master station, and the occurrence of cell discard can be suppressed.

FIG. 9 is a diagram showing the configuration and operation of a third embodiment according to the third aspect. The third embodiment is an example in which the transmission path delay time τ is considered in the first embodiment. In FIG. 9A, the master station 10c has a timer 1
1, a cell extractor 14 in addition to the cell generator 12 and the cell multiplexer 13. Output of cell extractor 14 (cell reception)
Is given to the cell generator 12.

The slave station 20c is connected to the cell extractor 2
1 and the timer 22, a cell generator 23, a cell multiplexer 2
4, an adder 25 and a divider 26 are provided. The output of the timer 22 is provided to the cell generator 23 and the adder 25. The output of the cell generator 23 is output to the cell multiplexer 2 together with the user cell.
4 given. The adder 25 receives the output of the cell extractor 21 and the output of the timer 22 and divides the addition result into a divider 26
Give to. The output of the divider 26 is provided to the timer 22 as a correction value.

In the above configuration, the correspondence with the claims is as follows. The master station 10c corresponds to the master station 1c. The cell extractor 14 corresponds to the first cell extracting means 1c1. The cell generator 12 corresponds to the first cell generator 1c2. First cell insertion means 1c
3 corresponds to the cell multiplexer 13. The slave station 20c corresponds to the slave station 2c. Second cell generating means 2
The cell generator 23 corresponds to c1. The cell multiplexer 24 corresponds to the second cell insertion means 2c2. The cell extractor 21 corresponds to the second extracting means 2c3. Correction means 2
The entirety of the adder 25 and the divider 26 mainly corresponds to c4. The setting means 2c5 mainly corresponds to the timer 22.

The operation of the third embodiment according to claim 3 will be described below. In the third embodiment, as shown in FIG. 9B, the slave station 20c starts time synchronization processing. That is, in the slave station 20c, the cell generator 23
Monitors that the timed output of the timer 22 reaches a reference time (for example, timer value = 0), and when the reference time comes, a specific V
A first time transfer cell having a CI / VPI value is generated. This reference time is the second predetermined time at which time correction is to be performed.

The first time transfer cell is a cell multiplexer 24.
, And arrives at the master station 10c after a time τ. Therefore, in the master station 10c, the timing at which the cell extractor 14 notifies the cell generator 12 of the reception of the first time transfer cell is based on the phase difference φ between the two stations from the reference time of the slave station 20c (timer value = 0). After a lapse of φ + τ, which is the sum of the transfer time τ and The cell generator 12
The reception time of the first cell (timed output of the timer 11 = current time) is stored, and the reception time to be stored is φ + τ.

The cell generator 12 of the master station 10c monitors that the time output of the timer 11 reaches a reference time (for example, a timer value = 0), and when the reference time comes, a specific VCI / V
A second time transfer cell having a PI value is generated. This reference time is the first predetermined time at which time correction is to be performed. In the second time transfer cell, a reception time φ + τ is set in a predetermined area of the payload. This second time transfer cell is:
The time information (φ + τ) transmitted from the cell multiplexer 13 to the transmission path, arrives at the slave station 20 c after a time τ, is extracted by the cell extractor 21, and set in the payload is added to the adder 2.
5 is applied to one input.

Here, the slave station 20c is connected to the master station 1
The second time transfer cell arrives after τ−φ at the time seen by the slave station 20c because it is delayed from the phase 0c by the phase φ. That is, the current time provided by the timer 22 to the adder 25 is τ−φ. Therefore, the addition result of the adder 25 is 2τ. Since the divider 26 is an arithmetic unit that outputs a value of 入 力 with respect to the input, the time τ obtained by dividing the addition result 2τ of the adder 25 by 2 is equal to the timer 22.
Is given as a correction value. That is, the timer 22
Is set with the value τ as a reference time, and the timekeeping operation is restarted based on the value τ.

As described above, the slave station 20c is synchronized with the time τ as seen from the master 10c side. FIG. 10 is a diagram showing the configuration and operation of the fourth embodiment corresponding to claim 4. The fourth embodiment is an example in which the transmission path delay time τ is considered in the second embodiment.

In FIG. 10A, the master station 10d
Are the timer 11 and the cell generator 1 as in the third embodiment.
2, a cell multiplexer 13 and a cell extractor 14 are provided. Also,
The slave station 20d includes a cell extractor 21, a timer 22, a cell generator 23, a cell multiplexer 24, an adder 25, and a divider 2
6, a comparator 27 and a subtractor 28 are provided. The output of the timer 22 is provided to one input of a comparator 27 and one input of a subtractor 28, respectively. The other inputs of the comparator 27 and the subtractor 28 are provided with the transmission time values, respectively. Subtractor 2
The output of 8 is provided to one input of an adder 25. The adder 25 receives the output of the cell extractor 21 at the other input, and provides the addition result to the timer 22 as a correction value. The comparator 27 gives the comparison result to the cell generator 23. Others are the same as the third embodiment.

In the above configuration, the correspondence with the claims is as follows. The master station 1d corresponds to the master station 10d. The cell extractor 14 corresponds to the first cell extracting means 1d1. The cell generator 12 corresponds to the first cell generation means 1d2. First cell insertion means 1d
3 corresponds to the cell multiplexer 13. The slave station 20d corresponds to the slave station 2d. Second cell generating means 2
The cell generator 23 and the entire comparator 27 correspond to d1. The cell multiplexer 24 corresponds to the second cell insertion means 2d2. The cell extractor 21 corresponds to the second extracting means 2d3. The entirety of the adder 25, the divider 26, and the subtractor 28 mainly corresponds to the correction means 2c4. Setting means 2d
5 mainly corresponds to the timer 22. The time at which the time correction is to be performed corresponds to the transmission time value.

The operation of the fourth embodiment according to claim 4 will be described below. In the fourth embodiment, FIG.
As shown in (1), the slave station 20d starts time synchronization processing. That is, in the slave station 20d, the comparator 27
Is the current time that the timer 22 outputs and the transmission time value t
1 and outputs a request for creating a first time transfer cell to the cell generator 23 when it matches.

The cell generator 23 receives the cell creation request from the comparator 27, and receives a first VCI / VPI value having a specific VCI / VPI value.
Generate a time transfer cell. The first time transfer cell is transmitted from the cell multiplexer 24 to the transmission line, and arrives at the master station 10d after a time τ. Therefore, in the master station 10d, the timing at which the cell extractor 14 notifies the cell generator 12 of the reception of the first time transfer cell is based on the timing of the slave station 20d.
After the transmission time t1 of the above, a time of φ + τ obtained by adding the transfer time τ to the phase difference φ of both stations.

That is, the reception time as seen on the master side is the time measured by the timer 11, which is t1 + φ + τ. The cell generator 12 generates a second time transfer cell having a specific VCI / VPI value according to the time output of the timer 11. In the second time transfer cell, a reception time t1 + φ + τ is set in a predetermined area of the payload. This second
The time transfer cell is transmitted from the cell multiplexer 13 to the transmission path, arrives at the slave station 20d after a time τ, is extracted by the cell extractor 21, and the time information (t1 + φ + τ) set in the payload is added to the adder 25. It is provided to the other input.

Here, the slave station 20d is connected to the master station 1
0d, the master station 10d
The second time transfer cell transmitted at the time t1 + φ + τ seen in the above will arrive at the slave station 20d after the time t1 + 2τ seen at the slave station 20d. That is, the subtracter 28 provides the divider 26 with a value obtained by subtracting the transmission time t1 from the count value of the timer 22. The output value of the subtracter 28 at the time of extracting the second time transfer cell is (t1 + 2τ ) -T
1 = 2τ. Then, the divider 26 becomes the adder 2
The division value given to 5 is (2τ) / 2 = τ.

Therefore, the adder 25 adds the output value t1 + φ + τ of the cell extractor 21 and the output value τ of the divider 26 at the reception time t1 + 2τ of the second time transfer cell, and uses t1 + φ + 2τ as a correction value for the timer 22. Output. Thus, the timer 22 has the value (t1 + φ + 2τ)
Is set as the reference time, and the timekeeping operation is restarted based on the reference time. Thus, the slave station 20d
The time is synchronized with the time (t1 + φ + 2τ) on the master 10d side and synchronized.

FIG. 11 is a diagram showing the configuration and operation of a fifth embodiment according to the fifth aspect. The fifth embodiment is an example in which the transmission path delay time τ is considered in the second embodiment, as in the fourth embodiment. The difference from the fourth embodiment is that the time synchronization is activated from the master station. In FIG. 11A, the master station 10e
As in the embodiment, a timer 11, a cell generator 12, a cell multiplexer 13, and a cell extractor 14 are provided. The difference is that the output of the cell extractor 14 provided to the cell generator 12 is the second cell reception.

The slave station 20e is different from the fourth embodiment in that the comparator 27 is omitted and a latch 29 is provided. The cell extractor 21 latches the notification of the reception of the first cell 2
9 and the cell generator 23, and the time information extracted from the third cell is provided to the adder 25. The output of the timer 22 is supplied to one input of a subtractor 28 and a latch 29. The output of the latch 29 is provided to the other input of the subtractor 28.
Others are the same as the fourth embodiment.

In the above configuration, the correspondence with the claims is as follows. The master station 1e corresponds to the master station 10e. The cell generator 12 corresponds to the first cell generation means 1e1. The cell multiplexer 13 corresponds to the first cell insertion unit 1e2. First cell extracting means 1e
3 corresponds to the cell extractor 14. The slave station 20e corresponds to the slave station 2e. Second cell insertion means 2
The cell multiplexer 24 corresponds to e1. The cell generator 23 corresponds to the second cell generator 2e2. The cell extractor 21 corresponds to the second extracting means 2e3. Correction means 2
e4 mainly includes an adder 25, a divider 26, and a subtractor 2
8 and the latch 29 correspond to each other. The setting means 2e5 mainly corresponds to the timer 22.

The operation of the fifth embodiment according to claim 5 will be described below. In the fifth embodiment, FIG.
As shown in (1), the master station 10e starts time synchronization processing at a time when it is desired to perform time correction. That is, master station 1
In 0e, the cell generator 12 monitors the current time counted by the timer 11 and outputs a first time transfer cell having a specific VCI / VPI value when the measured value of the timer 11 matches the time at which time correction is to be performed. Generate. The first time transfer cell is transmitted from the cell multiplexer 13 to the transmission line and reaches the slave station 20e.

In the slave station 20e, the cell extractor 21
When the first cell is received, the first cell reception notification is given to the latch 29 and the cell generator 23. Latch 29
Is the first time since the timed output of the timer 22 is given.
In response to the notification of the cell reception, the count value (current time t1) of the timer 22 is held and output to one input of the subtracter 28. Further, the cell generator 23 generates a second time transfer cell having a specific VCI / VPI value in response to the notification of the reception of the first cell. This second time transfer cell is transmitted from the cell multiplexer 24 to the transmission line and reaches the master station 10e.

This second time transfer cell is connected to the slave station 20.
e is generated at the current time t1. This time t
1 is the time of t1 + φ as seen from the master station 10e. It reaches the master station 10e after the elapse of the transfer time τ. Therefore, the time output value of the timer 11 of the master station 10e to the cell generator 12 is t1 + φ + τ.
In the master station 10e, the cell generator 12
In response to the notification of the reception of the second cell from No. 4, a third time transfer cell having a specific VCI / VPI value is generated in accordance with the clock output of the timer 11. In the third time transfer cell, a reception time t1 + φ + τ is set in a predetermined area of the payload. The third time transfer cell is transmitted from the cell multiplexer 13 to the transmission line, arrives at the slave station 20e after a time τ, is extracted by the cell extractor 21, and adds time information (t1 + φ + τ) set in the payload. The other input of the unit 25 is provided.

Here, the slave station 20e is the master station 1
0e, the master station 10e
The second time transfer cell transmitted at the time t1 + φ + τ seen in the above will arrive at the slave station 20e after the time t1 + 2τ seen at the slave station 20d. That is, the subtracter 28 provides the divider 26 with a value obtained by subtracting the time t1 held and output by the latch 29 from the count value of the timer 22.
Therefore, the subtracter 28 at the time of extracting the third time transfer cell is used.
Is (t1 + 2τ) −t1 = 2τ. The division value given by the divider 26 to one input of the adder 25 is a value τ obtained by dividing 2τ by 2.

Accordingly, the adder 25 adds the output value t1 + φ + τ of the cell extractor 21 and the output value τ of the divider 26 at the reception time t1 + 2τ of the third time transfer cell to t1 + φ + 2τ as a correction value to the timer 22. Output. Thus, the timer 22 has the value (t1 + φ + 2τ)
Is set as the reference time, and the timekeeping operation is restarted based on the reference time. Thus, the slave station 20e
The time is synchronized with the time (t1 + φ + 2τ) on the master 10e side and synchronized.

FIG. 12 is a diagram showing the configuration and operation of the sixth embodiment according to the sixth aspect. The sixth embodiment is an example in which the transmission path delay time τ is taken into consideration in the second embodiment, as in the fourth and fifth embodiments, and the master station starts time synchronization. 4th embodiment,
The difference from the fifth embodiment is that the master station sets the time at which time correction is started for the slave station.

In FIG. 12A, the master station 10f
Is a timer 11, similar to the fourth and fifth embodiments.
A cell generator 12, a cell multiplexer 13, and a cell extractor 14 are provided. The output of the cell extractor 14 provided to the cell generator 12 is the second cell reception as in the fifth embodiment. The cell generator 12 generates a first time transfer cell and a third time transfer cell as in the fifth embodiment, except that a time t1 is set in the first time transfer cell.

The slave station 20f has a configuration in which the fourth embodiment and the fifth embodiment are combined. That is, the slave station 20f includes the cell extractor 21, the timer 2
2, a cell generator 23, a cell multiplexer 24, an adder 25, a divider 26, a comparator 27, a subtractor 28, and a latch 29. The cell extractor 21 supplies the received time t1 extracted from the first cell to the latch 29 and the time information extracted from the third cell to one input of the adder 25. The output of the timer 22 is provided to one input of a comparator 27 and one input of a subtractor 28, respectively. The output of the latch 29 is given to the other input of the comparator 27 and the other input of the subtracter 28, respectively.

The output of the subtracter 28 is provided to the other input of the adder 25. The adder 25 receives the output of the cell extractor 21 at one input, and provides the result of addition with the output of the divider 26 to the timer 22 as a correction value. The comparator 27
The comparison result is given to the cell generator 23. Cell generator 23
Receives the comparison result of the comparator 27 and generates a second time transfer cell as in the fifth embodiment.

In the above configuration, the correspondence with the claims is as follows. The master station 1f corresponds to the master station 10f. The cell generator 12 corresponds to the first cell generator 1f1. The cell multiplexer 13 corresponds to the first cell insertion unit 1f2. First cell extracting means 1f
3 corresponds to the cell extractor 14. The slave station 20f corresponds to the slave station 2f. Second cell generating means 2
The cell generator 23 and the entire comparator 27 correspond to f2. The cell extractor 21 corresponds to the second extracting means 2f1. The cell multiplexer 24 corresponds to the second cell insertion means 2f3. The entirety of the adder 25, the divider 26, the subtractor 28, and the latch 29 mainly corresponds to the correction means 2f4. The setting means 2f5 mainly corresponds to the timer 22.

The operation of the sixth embodiment according to claim 6 will be described below. In the sixth embodiment, FIG.
As shown in (5), the master station 10f designates a time to be time-corrected and starts time synchronization processing. That is, in the master station 10f, the cell generator 12 transmits the specific VCI / VPI
A first time transfer cell having a value and setting a time t1 at which time correction is desired to be performed in a predetermined area of the cell payload is generated. The first time transfer cell is transmitted from the cell multiplexer 13 to the transmission line and reaches the slave station 20f.

In the slave station 20f, the cell extractor 21
Receives the first time transfer cell, extracts it from the first cell, and gives the time t1 to the latch 29. The latch 29 holds and outputs the time t1 to one input of the comparator 27 and the subtractor 28. The comparator 27 calculates the time value of the timer 22 (current time).
Is monitored to match the time t1, and when they match, a cell generation request is output to the cell generator 23. Thereby, the cell generator 23 generates the second time transfer cell having the specific VCI / VPI value at the time t1 specified by the master station 10f. The second time transfer cell is transmitted from the cell multiplexer 24 to the transmission line and reaches the master station 10f.

The second time transfer cell is connected to the slave station 20.
It is generated at the current time t1 of f. This time t
1 is the time of t1 + φ when viewed from the master station 10f. It reaches the master station 10f after the elapse of the transfer time τ. Therefore, the time output value of the timer 11 of the master station 10f to the cell generator 12 is t1 + φ + τ.
In the master station 10f, the cell generator 12 operates as the cell extractor 1
In response to the notification of the reception of the second cell from No. 4, a third time transfer cell having a specific VCI / VPI value is generated in accordance with the clock output of the timer 11. In the third time transfer cell, a reception time t1 + φ + τ is set in a predetermined area of the payload. The third time transfer cell is transmitted from the cell multiplexer 13 to the transmission path, arrives at the slave station 20f after a time τ, is extracted by the cell extractor 21, and adds time information (t1 + φ + τ) set in the payload. The other input of the unit 25 is provided.

Here, the slave station 20f is connected to the master station 1
0f, the master station 10f
The second time transfer cell transmitted at the time t1 + φ + τ seen in the above will arrive at the slave station 20f after the time t1 + 2τ seen at the slave station 20f. That is, the subtracter 28 provides the divider 26 with a value obtained by subtracting the time t1 held and output by the latch 29 from the count value of the timer 22.
Therefore, the subtracter 28 at the time of extracting the third time transfer cell is used.
Is (t1 + 2τ) −t1 = 2τ. The division value given by the divider 26 to one input of the adder 25 is a value τ obtained by dividing 2τ by 2.

Therefore, the adder 25 adds the output value t1 + φ + τ of the cell extractor 21 and the output value τ of the divider 26 at the reception time t1 + 2τ of the third time transfer cell to t1 + φ + 2τ as a correction value to the timer 22. Output. Thus, the timer 22 has the value (t1 + φ + 2τ)
Is set as the reference time, and the timekeeping operation is restarted based on the reference time. Thus, the slave station 20f
The time is synchronized with the time (t1 + φ + 2τ) on the master 10f side and synchronized.

FIG. 13 is a diagram showing the configuration and operation of a seventh embodiment according to the seventh aspect. In the seventh embodiment, the master station 10g has the same configuration as the fifth embodiment, and the comparator 30 and the delay register 3
1 is provided, the time correction operation of the fifth embodiment is performed a plurality of times, and the time correction is performed using the one that minimizes the transmission path delay amount τ. Hereinafter, the portion according to the seventh embodiment will be mainly described.

In the slave station 20g, the output of the subtractor 28 is given to the comparator 30 and the delay register 31. The output of comparator 30 is provided to divider 26 and delay register 31. The output of the delay register 31 is provided to the comparator 30. In the above configuration, the correspondence between the invention and the claims is mainly that of the comparator 30 and the delay register 31 as a whole.

Hereinafter, the operation of the seventh embodiment will be described. In the seventh embodiment, FIG.
In this example, one correction operation is shown, but the master station 10g starts the time synchronization process a plurality of times at a time at which the time is to be corrected. In this process, the minimum value of the delay amount is held in the delay register 31 of the slave station 20g.

That is, in the slave station 20g, the latch 29
In response to the reception of the first cell in each execution,
(Current time) is given to the subtractor 28.
The subtracter 28 provides the adder 30 and the delay register 31 with a value obtained by subtracting the reception time (t1) of the first cell held and output by the latch 29 from the count value of the timer 22. The output value of the subtractor 28 at the time of receiving the third time transfer cell is:
That 2τ is described above.

Now, the first output value of the subtractor 28 is 2τ
1, the second output value is 2τ2,..., And the nth output value is 2τn. At the first time, the value 2τ1 is set in the delay register 31 as an initial value. Comparator 30
Compares the magnitude relationship between the value of the delay register 31 and the output value of the subtractor 28. In the first time, the value of the delay register 31 and the output value of the subtractor 28 are equal. Comparator 30
Is that the value of the delay register 31 and the output value of the subtractor 28 are
If the values are equal or the output value of the subtractor 28 is large, the value of the delay register 31 is given to the divider 26 without issuing an update instruction to the delay register 31.

On the other hand, if the output value of the subtractor 28 is smaller than the value of the delay register 31, the comparator 30
8 to the divider 26 and at the same time
1 to cause the delay register 31 to set the output value of the subtracter 28. The ATM network is a kind of standby system, in which processing queuing occurs in a switch or the like in the network, and the amount of transmission path delay fluctuates. In response to such fluctuations in the ATM network, the delay register 31 holds the minimum value 2τi obtained at the i-th time in the course of the n-time time correction operation. The value (t1 + φ + 2τ) is given to the timer 22 as the correction value as described in the fourth, fifth, and sixth embodiments, but the delay amount 2τ in the seventh embodiment is used.
Is the minimum delay amount obtained as described above.

In the seventh embodiment, the content of the delay register can be updated every time. However, the minimum value may be set after performing the time correction operation n times. Also,
Although the example in which the minimum value of the transmission path delay amount is obtained is applied to the fifth embodiment, it is needless to say that the example can be similarly applied to the third, fourth, and sixth embodiments.

[0075]

As described above, according to the first to seventh aspects of the present invention, a time transfer cell that can be distinguished from a user cell is defined, and time information is exchanged between a master station and a slave station. Since the configuration is possible, the time phase between the master station and the slave station can be made to coincide with each other as in the case of the STM network.

In particular, according to the inventions set forth in claims 3 to 6, the time phases can be matched in consideration of the transfer delay in the ATM network. In the invention according to claim 7,
Time phases can be matched in consideration of delay fluctuations in the ATM network. Therefore, according to the present invention, the ATM
Since time synchronization can be achieved between the nodes, it is also possible to easily determine a time zone and execute charging, for example. Further, when cells may be concentrated on a specific ATM node, the specific ATM node separately synchronizes the time with a plurality of other ATM nodes to prevent or reduce cell congestion. Cell disposal can be minimized.

[Brief description of the drawings]

FIG. 1 is a principle block diagram of the invention according to claim 1;

FIG. 2 is a principle block diagram of the invention according to claim 2;

FIG. 3 is a principle block diagram of the invention according to claim 3;

FIG. 4 is a principle block diagram of the invention according to claim 4;

FIG. 5 is a principle block diagram of the invention according to claim 5;

FIG. 6 is a principle block diagram of the invention according to claim 6;

FIG. 7 is a diagram showing the configuration and operation of the first embodiment corresponding to claim 1; (A) is a block diagram. (B) is an operation explanatory diagram.

FIG. 8 is a diagram showing the configuration and operation of a second embodiment corresponding to claim 2; (A) is a block diagram. (B) is an operation explanatory diagram.

FIG. 9 is a diagram showing the configuration and operation of a third embodiment corresponding to claim 3; (A) is a block diagram. (B) is an operation explanatory diagram.

FIG. 10 is a diagram showing the configuration and operation of a fourth embodiment corresponding to claim 4; (A) is a block diagram. (B) is an operation explanatory diagram.

FIG. 11 is a diagram showing the configuration and operation of a fifth embodiment corresponding to claim 5; (A) is a block diagram. (B) is an operation explanatory diagram.

FIG. 12 is a diagram showing the configuration and operation of a sixth embodiment corresponding to claim 6; (A) is a block diagram. (B) is an operation explanatory diagram.

FIG. 13 is a diagram showing the configuration and operation of a seventh embodiment corresponding to claim 7; (A) is a block diagram. (B) is an operation explanatory diagram.

[Explanation of symbols]

1a, 1b, 1c, 1d, 1e, 1f Master station 1a1, 1b1 Cell generator 1a2, 1b2 Cell inserter 1c1, 1d1, 1e3, 1f3 First cell extractor 1c2, 1d2, 1e1, 1f1 First cell generator 1c3 , 1d3, 1e2, 1f2 First cell inserting means 2a, 2b, 2c, 2d, 2e, 2f Slave station 2a1, 2b1 Cell extracting means 2a2, 2b2 Setting means 2c1, 2d1, 2e2, 2f2 Second cell generating means 2c2, 2d2 , 2e3, 2f3 Second cell inserting means 2c3, 2d3, 2e1, 2f1 Second cell extracting means 2c4, 2d4, 2e4, 2f4 Correcting means 2c5, 2d5, 2e5, 2f5 Setting means 10a, 10b, 10c, 10d, 10e, 10f , 1
0g Master station 11 Timer 12 Cell generator 13 Cell multiplexer 14 Cell extractor 20a, 20b, 20c, 20d, 20e, 20f, 2
0g Slave station 21 Cell extractor 22 Timer 23 Cell generator 24 Cell multiplexer 25 Adder 26 Divider 27,30 Comparator 28 Subtractor 29 Latch 31 Delay register

 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Kazuo Kato 4-1-1 Kamikadanaka, Nakahara-ku, Kawasaki City, Kanagawa Prefecture Inside Fujitsu Limited (72) Inventor Hideaki Ono 4-chome, Kamiodanaka, Nakahara-ku, Kawasaki City, Kanagawa Prefecture No. 1 Fujitsu Limited (72) Inventor Masatomo Nakano 2-10-1 Toranomon, Minato-ku, Tokyo Inside NTT Mobile Communication Network Corporation (72) Inventor Hiroki Morikawa Toranomon, Minato-ku, Tokyo 2-10-1 NTT Mobile Communication Network Co., Ltd.

Claims (7)

[Claims] 1. In an ATM network including a plurality of ATM nodes, a master station generates a time transfer cell, and inserts the time transfer cell into a transmission line at a predetermined time at which time correction is to be performed. Cell extracting means for extracting the time transfer cell from the multiplexed cell taken in from the transmission line, and setting the reception time of the extracted time transfer cell as a reference time of the slave station. Means in an ATM network. 2. In an ATM network including a plurality of ATM nodes, a master station generates a time transfer cell in which a predetermined time at which time correction is to be performed is set, and transmits the time transfer cell at the predetermined time. Cell extracting means for inserting the time transfer cell from a multiplexed cell fetched from the transmission path, and cell extraction means for inserting the time transfer cell from the multiplexed cell taken from the transmission path, and the predetermined time set in the extracted time transfer cell. Setting means for setting the reference time as a reference time of the slave station. 3. An ATM network including a plurality of ATM nodes, wherein a master station extracts first time transfer cells from multiplexed cells taken in from a transmission line, and said extracted first time transfer cells. First cell generating means for generating a second time transfer cell in which a cell reception time is set to a predetermined area; and a first cell for inserting the second time transfer cell into a transmission line at a first predetermined time at which time correction is to be performed A second cell generating means for generating the first time transfer cell; and a second means for inserting the first time transfer cell into a transmission line at a second predetermined time at which time correction is to be performed. Cell insertion means, second cell extraction means for extracting the second time transfer cell from the multiplexed cell taken from the transmission line, reception time set in the extracted second time transfer cell, and the second time Transfer cell A time synchronization method in an ATM network, comprising: correction means for calculating a transmission path delay amount as a correction value from the reception time of the slave station; and setting means for setting the correction value as a reference time of the slave station. 4. In an ATM network including a plurality of ATM nodes, a master station extracts first time transfer cells from multiplexed cells taken in from a transmission line, and said extracted first time transfer. First cell generation means for generating a second time transfer cell in which a cell reception time is set to a predetermined area; and inserting the second time transfer cell into a transmission line without delay from the reception time of the first time transfer cell A first cell insertion unit that generates the first time transfer cell, and the slave station inserts the first time transfer cell into a transmission line at a predetermined time when time correction is to be performed. Second cell insertion means for extracting the second time transfer cell from the multiplexed cell taken in from the transmission line, and the reception time set in the extracted second time transfer cell. Correction means for calculating a transmission path delay amount from the reception time of the second time transfer cell, and outputting an addition value of the calculated transmission path delay amount and the reception time set in the second time transfer cell as a correction value. And a setting means for setting the correction value as a reference time of the slave station. 5. In an ATM network including a plurality of ATM nodes, a master station generates a first time transfer cell requesting generation of a time transfer cell, and sets a reception time of the second time transfer cell in a predetermined area. First cell generating means for generating the third time transfer cell, inserting the first time transfer cell into a transmission line at a predetermined time at which time correction is to be performed, and setting the third time transfer cell to the third time transfer cell. First cell insertion means for inserting the transmission time into the transmission line without delay from the reception time of the two-time transfer cell; and first cell extraction means for extracting the second time transfer cell from the multiplexed cell taken from the transmission line. A second cell extracting means for extracting the first time transfer cell and the third time transfer cell from a multiplexed cell taken from a transmission line, and wherein the cell extracting means comprises a first time transfer cell. Second cell generation means for generating the second time transfer cell in response to the cell being extracted, and inserting the second time transfer cell into a transmission line without delay from the reception time of the first time transfer cell A second cell insertion unit, calculating a transmission path delay amount from the reception time set in the extracted third time transfer cell and the reception time of the third time transfer cell, and calculating the calculated transmission path delay amount and An ATM comprising: a correction unit that outputs a value added to a reception time set in a third time transfer cell as a correction value; and a setting unit that sets the correction value as a reference time of the slave station. Network time synchronization method. 6. An ATM network including a plurality of ATM nodes, wherein a master station sets a time at which a time transfer cell is generated in a predetermined area.
First cell generation means for generating a time transfer cell, and generating a third time transfer cell in which the reception time of the second time transfer cell is set in a predetermined area; and correcting the time of the first time transfer cell. Inserting the third time transfer cell into the second
First cell insertion means for inserting the time transfer cell into the transmission path without delay from the reception time; first cell extraction means for extracting the second time transfer cell from the multiplexed cell taken from the transmission path; A second station extracting means for extracting the first time transfer cell and the third time transfer cell from the multiplexed cell taken from the transmission line by the slave station; and the first time extracted by the cell extracting means. Second cell generation means for generating the second time transfer cell at a time set in the transfer cell; and inserting the second time transfer cell into a transmission line without delay from the reception time of the first time transfer cell. A second cell insertion unit, calculating a transmission path delay amount from the reception time set in the extracted third time transfer cell and the reception time of the third time transfer cell, and calculating the calculated transmission path delay amount and Third An ATM network comprising: a correction unit that outputs a value added to a reception time set in a time transfer cell as a correction value; and a setting unit that sets the correction value as a reference time of the slave station. Time synchronization method. 7. The ATM network time synchronization system according to claim 3, wherein said master station and said slave station are arranged in accordance with one of claims 3 to 6. A series of procedures shown in the figure are carried out a plurality of times, and the correction means of the slave station is provided with a detecting means for comparing the transmission path delay amounts obtained by the plurality of executions and detecting a minimum transmission path delay amount among them. A time synchronization method in an ATM network, characterized in that: