JP2010109157A - Semiconductor manufacturing apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a high quality, high performance semiconductor manufacturing apparatus which avoids the generation of dust and the degradation of durability by mitigating ion bombardment, and at the same time, is excellent in the uniformity control of plasma density by suppressing plasma diffusion. <P>SOLUTION: In the semiconductor manufacturing apparatus, a hollow plasma generation unit 8 having a recess is directly formed in the center of the sidewall of a vacuum chamber 1. The recess of the hollow plasma generation unit 8 is opened toward the circumferential direction of a wafer W. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a plasma potential control technique in a semiconductor manufacturing apparatus that performs plasma processing, and more particularly to an improvement in a semiconductor manufacturing apparatus that compensates electrons by a hollow plasma generating means in order to reduce the plasma potential.

  In recent years, the progress of plasma control technology has been remarkable, and further technical improvement has been demanded in the field of semiconductor manufacturing having a long history of using plasma. As a semiconductor manufacturing apparatus that performs plasma processing, for example, a reactive ion etching apparatus (reactive ion etching, hereinafter referred to as an RIE apparatus) in a film forming process is known.

  The RIE apparatus has a physical sputtering effect of ions and a chemical etching effect of radicals, and can exhibit excellent anisotropy and high productivity by these two synergistic effects. Therefore, it is widely used as an etching apparatus for semiconductor manufacturing processes.

  Here, a conventional example of the RIE apparatus will be specifically described with reference to the configuration diagram of FIG. The RIE apparatus in FIG. 6 is a capacitively coupled plasma.

As shown in FIG. 6, an etching gas 6 such as CF ₄ , Cl ₂ , SF ₆ , SiCl ₄ or the like is introduced into the vacuum chamber 1 that is a processing chamber at a pressure of about 1 to 100 Pa. In addition, a cathode stage 2 serving as a cathode electrode is disposed at the bottom of the vacuum chamber 1. A wafer W, which is a substrate to be processed, is placed on the upper surface portion of the cathode stage 2.

  A high frequency power source 5 such as RF or VHF is electrically connected to the cathode stage 2 through a blocking capacitor 4 as plasma generating means. Further, an anode electrode 3 is disposed above the cathode stage 2 so as to face each other. The anode 3 and the vacuum chamber 1 are grounded. Further, an exhaust hole 10 for exhausting an etching gas is provided in the vicinity of the side wall of the bottom surface of the vacuum chamber 1 and is connected to a vacuum pump (not shown).

  In the RIE apparatus having the above configuration, when a high frequency voltage is applied to the cathode stage (plate electrode) 2 by the high frequency power source 5, the etching gas 6 is turned into plasma, and the plasma P is generated between the cathode stage 2 and the anode electrode (counter electrode) 3. Will occur. At this time, the electrons existing in the space where the plasma P is generated move lightly and at a higher speed than the cations that are the active gas. Therefore, electrons rapidly gather on the cathode stage 2 and the anode electrode 3.

  Since the anode electrode 3 is grounded, the potential does not change. However, in the cathode stage 2, since the direct current is blocked by the blocking capacitor 4, electrons accumulate on the cathode stage 2 side, and the cathode stage 2 has a negative potential. (Cathode fall). This negative potential attracts positive ions, which are active gases in the plasma P, and enters the surface of the wafer W perpendicularly. Thereby, anisotropic etching suitable for fine processing can be performed.

  By the way, a portion of the plasma P close to the wall surface of the vacuum chamber 1 is a potential drop region called a sheath S. In this sheath S portion, the electric potential rapidly decreases and the electric field increases, so electrons and cations are accelerated and leave the plasma P and collide with the wall surface of the vacuum chamber 1 and disappear (see FIG. 7).

  Since the speed of electrons is faster than that of positive ions, the amount of electrons disappearing at the wall surface portion is also larger than the amount of ions disappearing at the wall surface portion. As a result, the plasma P has a positive potential to bind the electrons. The generation and disappearance of the plasma P are balanced, and the potential when the equilibrium is reached becomes the plasma potential.

The plasma potential in the RIE apparatus shown in FIG. 6 can be expressed by the following equation (1).

  Generally, in semiconductor manufacturing apparatuses, it is always required to increase the rate, but in order to satisfy this need, it is effective to increase the sheath voltage. At this time, as is clear from the above equation (1), the plasma potential is a parameter determined by the magnitude of the sheath voltage and the configuration of the vacuum chamber as the processing chamber. Will also increase.

  However, the plasma potential is also related to the size of the ion energy, and if the plasma potential is inadvertently increased to increase the sheath voltage, there will be a problem in terms of dust and life due to ion bombardment. The ion energy is a value derived from the difference between the plasma potential and the earth floating potential. If this ion energy is increased, ion bombardment to the anode electrode 3 and the wall surface of the vacuum chamber 1 which are counter electrodes increases.

  The increase in ion bombardment not only increases the amount of dust generated in the vacuum chamber 1, but also may lead to a decrease in durability at the portion where ions collide. Therefore, it is required to reduce the ion energy. Therefore, it can be said that it is desirable to lower the plasma potential from the viewpoint of reducing ion energy.

  As described above, when the sheath voltage is increased in order to obtain a high rate, the plasma potential increases, and the ion energy increases in proportion thereto. Therefore, ion bombardment that collides with the wall of the processing chamber and the counter electrode also increases, resulting in problems such as increased dust and shortened part life.

  In particular, dust is easily generated in the capacitively coupled RIE apparatus as shown in FIG. That is, since the plasma P is generated by applying a high-frequency voltage to the cathode stage 2 side on which the wafer W is placed, a large voltage is not applied to the anode electrode 3 side, and etching products are deposited here.

  Since the anode electrode 3 is located above the cathode stage 2, the ion bombardment on the anode electrode 3 shakes off the etching product deposited on the anode electrode 3 side. Therefore, the etching product may become dust and fall on the wafer W on the cathode stage 2.

  In order to avoid the harmful effects of ion bombardment as described above, it is important to lower the plasma potential that causes an increase in ion energy. One method for reducing the plasma potential is to change the sheath capacity, but it is difficult to change the sheath capacity due to the configuration of the chamber.

  For example, when the anode sheath capacity is increased, the area of the anode must be increased, and the installation area of the apparatus increases. An increase in the installation area of the apparatus leads to an increase in the occupied area in the clean room area, which makes it difficult to obtain good performance, which is not preferable.

  Further, as another approach for lowering the plasma potential, a method of increasing the plasma confinement by applying a DC voltage to the side wall of the vacuum chamber may be considered. However, in this method, it is necessary to provide a DC power source separately from the high-frequency power source that applies the AC voltage, and there is a problem that the configuration becomes complicated.

  Therefore, in the past, based on the principle of plasma potential generation, paying attention to the fact that the plasma potential is determined by the disappearance of electrons due to collision with the chamber wall surface, the positive potential of the plasma is increased by supplying electrons to the plasma. Techniques for lowering and lowering the plasma potential have been proposed. Such a conventional example will be described with reference to FIG.

  As shown in FIG. 8, a hollow cathode 7 is provided as an electron supply source to the plasma P on the anode electrode 3 which is a counter electrode. The hollow cathode 7 is a hollow cathode having a diameter of about 10 mm, and generates a high-density hollow plasma HP by a so-called hollow cathode phenomenon.

  The hollow cathode phenomenon is a phenomenon caused by the following mechanism. That is, when secondary electrons are emitted from the hollow cathode 7 by ion bombardment, the emitted secondary electrons are accelerated in the radial direction by the sheath. When the mean free path of secondary electrons is longer than the inner diameter D of the hollow cathode 7, it approaches the opposite cathode surface.

  At this time, if the sheath thickness ds is smaller than the radius of the inner diameter D of the hollow cathode 7, the electrons are reflected by the opposite sheath and accelerated toward the original cathode surface. By repeating acceleration by reflection at such a sheath, the lifetime of high-energy electrons is lengthened, and the number of ionizations is increased, and a hollow plasma HP having a high plasma density can be generated.

  When the hollow cathode 7 generates such a hollow plasma HP, electrons can be supplied to the plasma P. As a result, even if electrons disappear from the plasma P, it is possible to prevent the positive potential from being increased in the plasma P and to reduce the plasma potential.

  By reducing the plasma potential as described above, ion energy can be reduced and ion bombardment can be mitigated. Thereby, it can contribute to suppression of dust and prolonging the life of parts. In addition, since the high-density hollow plasma HP is obtained by the hollow cathode phenomenon, the etching gas can be efficiently ionized, which can contribute to reduction of power consumption in the high-frequency power source.

As a known example using the hollow cathode phenomenon as described above, the technique described in Patent Document 1 has been proposed. The technique of Patent Document 1 is to generate a hollow plasma by forming a recess in a cathode electrode.
JP 2001-135626 A

  However, the following problems have been pointed out in these conventional techniques. That is, if a hollow plasma generating means is provided on the anode electrode side which is a counter electrode, a high density plasma is generated, so that the plasma density becomes higher near the center of the processing chamber. On the other hand, when the plasma moves toward the wall surface of the processing chamber, plasma diffusion generally occurs and the plasma density decreases.

  For this reason, the plasma has a large plasma density difference between the central portion and the peripheral portion, and the uniformity of the plasma density is lowered. In recent years, substrates to be processed such as wafers and glass substrates for liquid crystal displays have been increased in area, and there has been a demand for semiconductor manufacturing equipment that can control plasma with high accuracy and uniform density while reducing ion bombardment. Has been.

  The present invention has been proposed in order to solve the above-described problems. The object of the present invention is to mitigate ion bombardment to avoid generation of dust and a decrease in durability, and at the same time, suppress plasma diffusion and suppress plasma. The object is to provide a high-quality and high-performance semiconductor manufacturing apparatus excellent in density uniformity control.

  In order to achieve the above object, the present invention provides a flat chamber electrode on which a substrate to be processed is placed and a counter electrode disposed opposite to the flat plate electrode in a process chamber capable of being depressurized. Is a semiconductor manufacturing apparatus configured to connect a high frequency power source, supply a film forming gas between the flat plate electrode and the counter electrode, and generate a plasma by applying a high frequency voltage from the high frequency power source to the flat plate electrode. And a hollow plasma generating means having a recess opening in a circumferential direction of the substrate to be processed is provided in a peripheral portion of the plasma space in which the plasma is generated.

  In the present invention having the above-described configuration, the hollow plasma generation means is provided in the peripheral portion of the plasma space, and the hollow plasma is generated from the concave portion toward the circumferential direction of the substrate to be processed. Can be achieved. In addition, since electrons are supplied to a portion having a low plasma density near the wall surface of the processing chamber, it is possible to suppress the diffusion of the plasma and improve the uniformity of the plasma density.

  According to the semiconductor manufacturing apparatus of the present invention, the plasma potential is reduced and the ion bombardment is mitigated by the extremely simple configuration in which the hollow plasma generating means is provided in the peripheral part of the plasma space, so that dust suppression and part life extension can be achieved. Further, it is possible to achieve excellent plasma density uniformity control and contribute to high quality plasma processing.

  Hereinafter, an example of an embodiment of a semiconductor manufacturing apparatus according to the present invention will be specifically described with reference to FIGS. The following embodiment is applied to an RIE apparatus that is a semiconductor manufacturing apparatus, as in the conventional example shown in FIG. 6, and the same members as those in the conventional example shown in FIG. The description is omitted.

(1) First Embodiment [Configuration]
The first embodiment will be described with reference to FIGS. FIG. 1 is a configuration diagram of the first embodiment, FIG. 2 is a cross-sectional view taken along line AA of FIG. 1, and FIG.

  As shown in FIGS. 1 and 2, the first embodiment is characterized in that a hollow plasma generation unit 8 having a recess is directly formed in the center of the side wall of the vacuum chamber 1. Here, the concave portion of the hollow plasma generation unit 8 is opened toward the circumferential direction of the wafer W.

  The hollow plasma generator 8 is located above the upper surface of the cathode stage 2 and below the lower surface of the anode 3 (see FIG. 1). Further, eight hollow plasma generators 8 are equally arranged along the circumferential direction of the wafer W (see FIG. 2).

  In addition, it is considered that the plasma density distribution can be adjusted by adjusting the position of the hollow plasma generation unit 8, and thereby uniformization can be obtained. For example, it is considered that the plasma density distribution can be adjusted and uniformity can be obtained by disposing the anode 3 closer to the cathode stage 2 than 1/2 of the distance between the anode 3 and the cathode stage 2.

[Function and effect]
In the first embodiment having the above configuration, since the recess of the hollow plasma generator 8 generates the hollow plasma HP in the circumferential direction of the wafer W, as shown in FIG. Electrons are supplied toward the plasma P.

  For this reason, it is possible to compensate for electrons lost by colliding with the wall surface of the vacuum chamber 1 away from the plasma P, and the plasma potential of the plasma P can be reduced. Therefore, ion energy can be suppressed and ion bombardment to the anode electrode 3 can be reduced. As a result, even if an etching product is deposited on the anode 3, there is no fear of dropping onto the wafer W on the cathode stage 2.

  Moreover, the lifetime of a structural member can be extended because ion bombardment decreased. In addition, since the high-density hollow plasma HP is obtained, the ionization of the etching gas can be efficiently performed, and the power consumption of the high-frequency power source 5 can be reduced.

  Further, the vicinity of the wall of the vacuum chamber 1 where the hollow plasma generator 8 supplies electrons is usually a region where plasma diffusion occurs and the plasma density is low. In the present embodiment, since electrons are supplied to such a low plasma density portion, the diffusion of the plasma P can be suppressed and the uniformity of the plasma density can be improved.

  Therefore, the first embodiment can maintain the plasma density uniformity at a high level even if the wafer W has a large area, and is suitable as a semiconductor manufacturing apparatus that processes the wafer W having a large area. Furthermore, in the first embodiment, since the hollow plasma generator 8 is directly provided in the vacuum chamber 1, the number of members can be reduced. Accordingly, it is possible to simplify the configuration and downsize the apparatus.

(2) Second Embodiment [Configuration]
Subsequently, the second embodiment will be described with reference to FIGS. 4 and 5. FIG. 4 is a configuration diagram of the second embodiment.

  In the second embodiment, a panel member 9 that is movable in the vertical direction is provided in the vicinity of the wall surface of the vacuum chamber 1. The panel member 9 is comprised from the panel part 9a and the support part 9b which supports this. When the panel member 9 is in the upper limit position, the hollow plasma generation unit 8 provided in the panel unit 9a is located between the upper surface portion of the cathode stage 2 and the lower surface portion of the anode electrode 3 (state of FIG. 4), and the panel When the member 9 is in the lower limit position, the panel portion 9a is positioned below the upper surface portion of the cathode stage 2 (state shown in FIG. 5).

  A hollow plasma generation unit 8 having a recess is formed on the surface of the panel unit 9a facing the circumferential direction of the wafer W. The hollow plasma generator 8 is provided with three grooves as recesses. Moreover, the panel part 9a is comprised from the material containing at least 1 among Si type | system | group, a ceramic, and quartz.

[Function and effect]
As in the first embodiment, the second embodiment having the above-described configuration has the effects of suppressing dust by extending ion bombardment, extending the life of parts, and improving the excellent plasma density uniformity. In addition to these, it has the following unique effects.

  That is, in the second embodiment, the panel portion 9a is made of a material containing at least one of Si, ceramic and quartz, so that metal contamination can be reliably suppressed. In addition, in the second embodiment, the hollow plasma generation unit 8 is formed in the panel member 9 which is a separate member from the vacuum chamber 1. For this reason, the hollow plasma production | generation part 8 and the vacuum chamber 1 can be produced separately. Therefore, it is easy to select the constituent material of the hollow plasma generation unit 8, and the cost can be reduced.

  In the second embodiment, when the panel member 9 is lowered and the panel portion 9a is at the lower limit position, the panel portion 9a is located below the upper surface portion of the cathode stage 2, so that the cathode stage 2 and the anode 3 The panel portion 9a does not block the space between the two. Therefore, there is an advantage that maintenance workability in the vacuum chamber 1 is improved.

(3) Other Embodiments The present invention is not limited to the above embodiment, and the shape and material of each member can be appropriately changed. For example, the diameter of the opening of the hollow plasma generator 8 needs to be twice or more the sheath thickness, and the specific inner diameter is determined by the discharge voltage, the size of the vacuum chamber 1 or the type of etching gas. It is possible to select as appropriate.

  Further, the number of the hollow plasma generation units 8 can be appropriately changed, and the recesses may be continuous to form an annular groove. Furthermore, the concave portion of the hollow plasma generation unit 8 may be a simple cylindrical shape, a truncated cone shape that narrows toward the opening portion, or a truncated cone shape that widens toward the opening portion.

  As a modification of the second embodiment, the panel portion 9a of the panel member 9 may be detachable from the support portion 9b. According to such embodiment, since the panel part 9a can be removed and wash | cleaned, the maintainability of the hollow plasma production | generation part 8 becomes favorable.

  Further, the movable wall may be circular along the wall of the vacuum chamber when viewed from directly above, but may be formed by combining a plurality of fan-shaped ones. In that case, it is calculated that abnormal discharge does not occur in the combined portions, and the distance is increased. In the embodiment, the wafer is directly placed on the cathode stage 2, but it may be placed indirectly on the cathode stage 2 through a mechanism for attracting the wafer such as an electrostatic chuck.

1 is a configuration diagram of a first embodiment according to the present invention. AA sectional drawing of FIG. The enlarged view near the vacuum chamber wall surface part in 1st Embodiment. The block diagram of 2nd Embodiment which concerns on this invention. The block diagram of the 2nd Embodiment which concerns on this invention (The state in which the panel member fell). The block diagram of a general capacitive coupling type RIE apparatus. The enlarged view of the vacuum chamber wall surface vicinity vicinity. The block diagram of the capacitive coupling type RIE apparatus which has a hollow cathode.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Vacuum chamber 2 ... Cathode stage 3 ... Anode electrode 4 ... Blocking capacitor 5 ... High frequency power supply 6 ... Etching gas 7 ... Hollow cathode 8 ... Hollow plasma generation part 9 ... Panel member 9a ... Panel part 9b ... Support part 10 ... Exhaust hole D: Inner diameter ds of hollow cathode 7: Sheath thickness HP ... Hollow plasma P ... Plasma S ... Sheath W ... Wafer

Claims (8)

A flat plate electrode on which a substrate to be processed is placed and a counter electrode disposed opposite to the flat plate electrode are provided in a process chamber capable of depressurization. A high frequency power source is connected to the flat plate electrode, and the flat plate electrode and the counter electrode are opposed to each other. In a semiconductor manufacturing apparatus configured to generate a plasma by supplying a film forming gas between electrodes and applying a high frequency voltage from the high frequency power source to the flat plate electrode,
A semiconductor manufacturing apparatus, wherein a hollow plasma generating means having a recess opening in a circumferential direction of the substrate to be processed is provided at a peripheral portion of the plasma space where the plasma is generated.   The semiconductor manufacturing apparatus according to claim 1, wherein the concave portion of the hollow plasma generation unit is directly formed in a side wall portion of the processing chamber.   The semiconductor manufacturing apparatus according to claim 1, wherein the hollow plasma generation unit is attached to a panel member disposed in the vicinity of a side wall portion of the processing chamber.   4. The semiconductor manufacturing apparatus according to claim 3, wherein the panel member is installed so as to be movable in the vertical direction.   5. The semiconductor manufacturing apparatus according to claim 3, wherein the panel member includes a support portion and a panel portion detachably attached to the support portion.   The semiconductor manufacturing apparatus according to claim 1, wherein the hollow plasma generating unit is detachably attached to a side wall portion of the processing chamber.   The semiconductor manufacturing apparatus according to claim 1, wherein a plurality of the hollow plasma generation means are arranged uniformly in the circumferential direction of the substrate to be processed.   The semiconductor manufacturing apparatus according to claim 1, wherein the hollow plasma generating unit is made of a material containing at least one of Si, ceramic, and quartz.

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