JP2010103644A - Solid-state imaging device and method of driving the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a solid-state imaging device wherein signal charge storage can be started and terminated simultaneously in all pixel parts without degradation in an S/N of output, and to provide a method of driving the same. <P>SOLUTION: A second reset switch resets signal charges of an amplifying means, and a select switch outputs the reset signal charges of the amplifying means to a signal output line as a first noise component in line sequence of pixel parts, and after a certain time, the select switch outputs the signal charges of the amplifying means as a second noise component in line sequence of pixel parts to a signal output line while a transfer switch is in an off-state. Subtractors (416 and 417) output a difference between the first noise component and the second noise component as a leakage current component. Furthermore, the subtractors subtract a third noise component and the leakage current component from a signal noise mixture component. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a solid-state imaging device used for a video camera, a digital still camera, and the like and a driving method thereof.

  In recent years, in order to increase the resolution, the cell size of photoelectric conversion elements using a miniaturization process has been vigorously reduced, while the photoelectric conversion signal output has decreased, etc., so that the photoelectric conversion signal is amplified and output. Amplification type photoelectric conversion devices that can be used are attracting attention. Such amplification type photoelectric conversion devices include MOS type, AMI, CMD, BASIS and the like.

  Among these, the MOS type stores light carriers generated in the photodiode in the gate electrode of the MOS transistor, and amplifies the potential change to the output unit according to the drive timing from the scanning circuit and outputs it. In recent years, CMOS sensors that are realized by a CMOS process, including the photoelectric conversion portion and its peripheral circuit portion, of the MOS type have attracted particular attention.

  The CMOS sensor amplifies the signal charge with a charge amplification amplifier in the pixel and reads it as a voltage. In the case of an area-type CMOS sensor that photoelectrically converts two-dimensional image information, a horizontal pixel group is simultaneously read out row by row as proposed in Patent Document 1 below. However, in the method of Patent Document 1, when the accumulated charge of the photodiode generated by the optical signal is transferred to the floatin diffusion capacitor that is the input node of the source follower amplifier circuit, the next signal charge accumulation is started. As a result, the signal accumulation start and end timings are shifted for each row. For this reason, when the subject to be imaged moves fast, the shape of the subject may be distorted, or flicker of a fluorescent lamp may appear in the image.

  As a method for solving this problem, in Patent Document 2 below, a reset switch that can be independently controlled is provided in a photodiode. All photodiodes formed in an area are simultaneously reset, accumulated signal charges for a predetermined time, transferred to the floating diffusion capacitor in a batch for all pixels, and then sequentially read out one row at a time. To solve the problem of shifting.

JP-A-11-274454 JP 2005-65184 A

  However, in the readout method described in Patent Document 2, since there is a leakage current in the floating diffusion capacitor, the signal charge in a row having a long holding time has a noise corresponding to the leakage current increasing in proportion to the time. There is a problem of being superimposed. The cause of the leakage current is light leakage caused by insufficient light shielding and leakage of the semiconductor PN junction. For this reason, the process of slow reading and the amount of superimposed noise increase, the SN ratio of the output decreases, and the image deteriorates significantly.

  The present invention has been made in view of the above-described conventional problems, and an object of the present invention is to simultaneously perform the start and end timings of signal charge accumulation in all the pixel portions without deteriorating the SN ratio of the output. To provide a solid-state imaging device and a driving method thereof.

  The solid-state imaging device according to the present invention includes a photoelectric conversion unit that converts light into signal charge and stores it, a first reset switch that resets the signal charge stored in the photoelectric conversion unit, and a signal charge of the photoelectric conversion unit. A transfer switch for transferring the signal, amplifying means for amplifying the signal charge transferred by the transfer switch, a second reset switch for resetting the signal charge of the amplifying means, and the signal charge amplified by the amplifying means And a selection switch for outputting to the signal output line, and the second reset switch resets the signal charge of the amplification means, and the selection switch is reset. The signal charge of the amplifying means is output to the signal output line in the row order of the pixel portion as a first noise component, and after a certain period of time, the transfer switch is turned off. The selection switch outputs the signal charge of the amplifying unit as a second noise component to the signal output line in a row order of the pixel unit, and further, the first noise component and the second noise component And a subtractor that outputs the difference as a leakage current component, and after outputting the second noise component, the first reset switches of all the pixel units simultaneously reset the signal charges of the photoelectric conversion means. Then, the second reset switch resets the signal charge of the amplifying unit, and the selection switch outputs the signal in the row order of the pixel unit using the reset signal charge of the amplifying unit as a third noise component. After the accumulation period has elapsed, the transfer switches of all the pixel units simultaneously transfer the signal charges of the photoelectric conversion means, and the selection switch The signal charge is output to the signal output line in the row order of the pixel unit as a signal noise mixed component, and the subtractor subtracts the third noise component and the leakage current component from the signal noise mixed component. Features.

  The solid-state imaging device driving method according to the present invention includes a photoelectric conversion unit that converts light into signal charges and stores the photoelectric conversion unit, a first reset switch that resets the signal charges stored in the photoelectric conversion unit, and the photoelectric conversion unit. A transfer switch for transferring the signal charge of the conversion means, an amplification means for amplifying the signal charge transferred by the transfer switch, a second reset switch for resetting the signal charge of the amplification means, and amplified by the amplification means A solid-state imaging device having a two-dimensionally arranged pixel unit including a selection switch that selects a signal charge and outputs the selected signal charge to a signal output line, wherein the second reset switch is a signal of the amplifying unit. The charge is reset, and the selection switch uses the reset signal charge of the amplifying means as a first noise component to the signal output line in the row order of the pixel portion. And when the transfer switch is off after a certain period of time, the selection switch outputs the signal charge of the amplifying means to the signal output line in the row order of the pixel portion as a second noise component. And a step of outputting a difference between the first noise component and the second noise component as a leakage current component, and outputting the second noise component, and then the first reset of all the pixel units A step of simultaneously resetting the signal charge of the photoelectric conversion means by the switch; and thereafter, the second reset switch resets the signal charge of the amplification means, and the selection switch resets the signal charge of the amplified means. Output to the signal output line in the row order of the pixel unit as a noise component of 3, and the transfer of all the pixel units after the accumulation period has elapsed The switch simultaneously transfers the signal charge of the photoelectric conversion means, and the selection switch outputs the signal charge of the amplification means to the signal output line in the row order of the pixel unit as a signal noise mixed component; Subtracting the third noise component and the leakage current component from the mixed component.

  Leakage current components can be removed, signal charge can be started and stopped simultaneously for all pixel portions, and even when a moving subject is imaged, a high-quality image without distortion can be obtained.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
FIG. 1 is an equivalent circuit diagram showing a solid-state imaging device according to an embodiment of the present invention. Reference numeral 406 denotes a horizontal shift register. Reference numeral 407 denotes a vertical shift register. Reference numeral 408 denotes a transfer switch for transferring a signal to the common signal output line 415. Reference numerals 408_1, 408_2, and 408_3 denote drive pulses supplied from the horizontal shift register 406 to the transfer switch 408. Reference numeral 409 denotes a constant current source. Reference numeral 410 denotes an output amplifier. Reference numeral 411 denotes an output. Reference numeral 412 denotes an AD (analog-digital) converter. Reference numeral 413 denotes a signal storage unit. Reference numeral 414 denotes a first frame memory. Reference numeral 415 denotes a second frame memory. Reference numeral 416 denotes a first subtractor. Reference numeral 417 denotes a second subtractor.

  Reference numeral 401 denotes a PD (photodiode) reset line. Reference numeral 402 denotes a transfer switch line. Reference numerals 403_1, 403_2, and 403_3 denote reset switch lines. Hereinafter, the individual or generic name of the reset switch lines 403_1, 403_2, and 403_3 is referred to as a reset switch line 403. Reference numerals 404_1, 404_2, and 404_3 denote selection switch lines. Hereinafter, individual or generic names of the selection switch lines 404_1, 404_2, and 404_3 are referred to as selection switch lines 404. Reference numerals 405_1, 405_2, and 405_3 denote signal output lines. Hereinafter, the individual or generic name of the signal output lines 405_1, 405_2, and 405_3 is referred to as a signal output line 405.

  P1_1, P1_2, and P1_3 are pixel portions constituting the first row. P2_1, P2_2, and P2_3 are pixel portions constituting the second row. P3_1, P3_2, and P3_3 are pixel portions constituting the third row. In FIG. 1, for simplicity, the pixel portion has three rows and three columns. However, the number of pixel portions is actually larger.

  FIG. 2 is a diagram for explaining the pixel portion of FIG. 1 in more detail. In the figure, PD is a photodiode (photoelectric conversion means), which generates and accumulates pixel signals by photoelectric conversion. Q101 is a transfer switch composed of a MOS field effect transistor (hereinafter referred to as a MOS transistor). Q102 is a reset switch (second reset switch) composed of a MOS transistor for resetting the floating diffusion capacitor. Q104 is a selection switch composed of a MOS transistor for selecting a readout pixel portion. Q103 is a source follower input MOS transistor (amplifying means) having a floating diffusion capacitor connected to the gate and a source connected to the drain of the selection switch Q104. Q105 is a PD reset switch (first reset switch) composed of a MOS transistor for resetting the photodiode PD.

  Reference numeral 101 denotes a PD reset switch line for driving the PD reset switch Q105. A transfer switch line 102 drives the transfer switch Q101. Reference numeral 103 denotes a reset switch line for driving the reset switch Q102. A selection switch line 104 drives the selection switch Q104. Reference numeral 105 denotes a signal output line for reading out signals from the pixel portion.

  The PD reset line 401 in FIG. 1 corresponds to the PD reset line 101 in FIG. The transfer switch line 402 in FIG. 1 corresponds to the transfer switch line 102 in FIG. The reset switch line 403 in FIG. 1 corresponds to the reset switch line 103 in FIG. The selection switch line 404 in FIG. 1 corresponds to the selection switch line 104 in FIG. The signal output line 405 in FIG. 1 corresponds to the signal output line 105 in FIG.

  Next, the operation of the pixel portion will be described. First, reset operation and row selection are performed. The reset operation is an operation of inputting a reset voltage to the gate of the input MOS transistor Q103 of the source follower by turning on the reset switch Q102 by driving the reset switch line 103. The row selection is a selection by turning on the selection switch Q104 in accordance with the drive of the selection switch line 104. Next, the floating diffusion capacitor connected to the gate of the input MOS transistor Q103 of the source follower is made floating. Thereby, a signal of a noise component composed of fixed pattern noise such as reset noise and threshold voltage variation of the input MOS transistor Q103 of the source follower is read.

  Further, by turning on the PD reset switch Q105 by driving the PD reset switch line 101, the photodiode PD is reset, and charge accumulation of the photodiode PD is started. When the desired accumulation time has elapsed, the transfer switch Q101 is turned on, the accumulated charge of the photodiode PD generated by the optical signal is transferred to the gate of the input MOS transistor Q103 of the source follower, and the noise component and the optical signal component described above are transferred. Read the sum signal. Thereafter, the difference between the sum signal and the noise component signal is taken to remove the reset noise and fixed pattern noise, and the optical signal component is taken out to obtain an image signal with a high S / N ratio.

  According to the configuration of this embodiment, the start of signal charge accumulation in the photodiode PD and the transfer of accumulated charge from the photodiode PD to the gate of the input MOS transistor Q103 of the source follower can be controlled independently.

  Next, a driving method of the solid-state imaging device according to the present embodiment will be described with reference to timing charts of FIGS. In the present embodiment, after resetting the photodiodes PD in all the pixel portions at the same timing, the incident light is photoelectrically converted, and all the pixel portions are collectively transferred to and held in the floating diffusion capacitor. Then, reading is performed sequentially from the first line. FIG. 3 is a timing diagram for explaining a method of measuring in advance a leak current component that is mixed while a signal charge is held in the floating diffusion capacitor.

  First, prior to reading, PD reset switch lines 401 in all rows are set to a high level, transfer switch lines 402 in all rows are set to a low level, and reset switch lines 403 in all rows are set to a high level. Then, the PD reset switch Q105 and the reset switch Q102 are turned on, and the transfer switch Q101 is turned off. As a result, the floating diffusion capacitors at the gates of the photodiodes PD of all the pixel portions and the input MOS transistor Q103 of the source follower are reset. The PD reset switch line 401, the transfer switch line 402, the reset switch line 403, and the selection switch line 404 are driven by the vertical shift register 407.

  Next, as shown in FIG. 3, the first row reset switch line 403_1 (403_2 is the second row and 403_3 is the third row reset switch line) is set to the low level, and the first row reset switch Q102 is turned off. As a result, the floating diffusion capacitance at the gate of the input MOS transistor Q103 of the source follower is made floating. Thereafter, the selection switch line 404_1 of the first row (404_2 in FIG. 3 is the second row and 404_3 is the selection switch line of the third row) is set to the high level, and the selection switch Q104 of the first row is turned on to perform row selection. . As a result, the first noise component including the fixed pattern noise such as the reset noise and the threshold voltage variation of the source follower input MOS transistor Q103 is read out to the signal storage unit 413.

  Here, it is important that the gate of the input MOS transistor Q103 of the source follower is maintained until the reset switch Q102 is turned off and then this row is read after the first noise component is read. Is to keep it floating. By doing this, the floating diffusion capacitor becomes floating for the same time as the signal holding time for holding the signal charge. Therefore, it is possible to measure in advance the noise component consisting of the leakage current that occurs during the signal holding time. Noise components can be removed.

  Next, as shown in FIG. 3, the drive pulses 408_1 to 408_3 from the horizontal shift register 406 are sequentially set to the high level, and the transfer switches 408 of the MOS transistors are sequentially turned on, whereby the output 411 of the first row is output to the output 411 via the amplifier 410. 1 noise components are sequentially read out. The read noise component is AD converted by an AD (Analog to Digital) converter 412 and held in the first frame memory 414 via the data bus 418. The second and subsequent rows are similarly read out as shown in FIG. 3, and the first noise components of all the pixel portions are held in the first frame memory 414.

  When the reading operation of the third row, which is the last row, is completed (point A in FIG. 3), the first to third rows are read again. The read operation for the first row will be described. The selection switch line 404_1 of the first row is set to the high level, the selection switch Q104 of the first row is turned on to perform row selection, and the second noise component consisting of the sum of the first noise component and the leakage current of the floating diffusion capacitor Is read out to the signal storage unit 413.

  Next, as shown in FIG. 3, the drive pulses 408_1 to 408_3 from the horizontal shift register 406 are sequentially set to the high level, and the transfer switches 408 of the MOS transistors are sequentially turned on, whereby the output 411 of the first row is output to the output 411 via the amplifier 410. The two noise components are sequentially read out. The read noise component is AD converted by the AD converter 412 and held in the second frame memory 415 via the data bus 418. The second and subsequent rows are similarly read out as shown in FIG. 3, and the second noise components of all the pixel portions are held in the second frame memory 415.

  Next, only the leakage current component of the floating diffusion capacitor is obtained by subtracting the first noise component recorded in the first frame memory 414 from the second noise component recorded in the second frame memory 415. Is calculated and stored in the second frame memory 415. A specific method of this calculation will be described below. First, a method for calculating the leakage current component of the pixel portion P1_1 in FIG. 2 will be described.

  The address of the first frame memory 414 in which the first noise component of the pixel unit P1_1 is recorded is accessed, the first noise component data of the pixel unit P1_1 is read out via the data bus 418, and the subtractor 416 -Set to the input terminal. Next, the address of the second frame memory 415 in which the second noise component of the pixel unit P1_1 is recorded is accessed, the second noise component of the pixel unit P1_1 is read out via the data bus 418, and the subtractor Set to the 416 + input terminal. Next, the subtractor 416 is operated, the first noise component set at the −input terminal is subtracted from the second noise component set at the + input terminal, and the leakage current component of the floating diffusion capacitance is calculated. Record in the second frame memory 415. This calculation is performed on the pixel portions P1_2 to P1_3, P2_1 to P2_3, and P3_1 to P3_3 in FIG. 2 to calculate the leakage current components of the floating diffusion capacitors of all the pixel portions and record them in the second frame memory 415.

  By this processing, the signal charges generated by the photodiodes PD of all the pixel portions are transferred to the floating diffusion capacitor at once, and a leakage current component mixed when held is held in advance, and the second frame memory is measured. 415 can be recorded.

  Next, using FIG. 4, the accumulated signal charge is transferred to the floating diffusion capacitor in a batch for all pixel units, and then sequentially read, and at the same time, the leak current component measured in advance is calculated from the read signal component. The subtraction operation will be described.

  First, prior to the signal charge accumulation operation, the PD reset switch lines 401 in all rows are set to high level, the transfer switch lines 402 in all rows are set to low level, and the reset switch lines 403 in all rows are set to high level. Then, the PD reset switch Q105 and the reset switch Q102 are turned on, and the transfer switch Q101 is turned off. As a result, the floating diffusion capacitors at the gates of the photodiodes PD of all the pixel portions and the input MOS transistor Q103 of the source follower are reset. The PD reset switch line 401, the transfer switch line 402, the reset switch line 403, and the selection switch line 404 are driven by the vertical shift register 407.

  Next, as shown in FIG. 4, the PD reset switch lines 401 of all rows are set to the low level, and the PD reset switch Q105 is turned off to start accumulation of signal charges photoelectrically converted by the photodiode PD (A in FIG. 4). point). When a desired accumulation time has elapsed, the transfer switch Q101 is turned on by high-level driving of the transfer switch lines 402 of all rows. As a result, the charge accumulated in the photodiode PD is transferred to the floating diffusion capacitance at the gate of the input MOS transistor Q103 of the source follower (point B in FIG. 4). The range indicated by the arrow in FIG. 4 is the accumulation period.

  Next, before the floating diffusion capacitance transfer of the signal charge (point B in FIG. 4), the first noise component consisting of the fixed pattern noise such as the reset noise and the threshold voltage variation of the source follower input MOS transistor Q103 is read. Then, the first noise component is recorded in the first frame memory 414.

  As shown in FIG. 4, the first row reset switch line 403_1 (403_2 is the second row, 403_3 is the third row reset switch line) is set to the low level, and the first row reset switch Q102 is turned off. As a result, the floating diffusion capacitance at the gate of the input MOS transistor Q103 of the source follower is made floating. Thereafter, the selection switch line 404_1 of the first row (404_2 in FIG. 3 is the second row and 404_3 is the selection switch line of the third row) is set to the high level, and the selection switch Q104 of the first row is turned on to perform row selection. . As a result, the first noise component including the fixed pattern noise such as the reset noise and the threshold voltage variation of the source follower input MOS transistor Q103 is read out to the signal storage unit 413.

  Next, as shown in FIG. 4, the drive pulses 408_1 to 408_3 from the horizontal shift register 406 are sequentially set to the high level, and the MOS transistor transfer switch 408 is sequentially turned on, so that the output 411 of the first row is output to the output 411 via the amplifier 410. 1 noise components are sequentially read out. The read noise component is AD-converted by the AD converter 412 and recorded in the first frame memory 414 via the data bus 418. The second and subsequent rows are similarly read out as shown in FIG. 4, and the first noise components of all the pixel portions are held in the first frame memory 414.

  When the read operation of the third row, which is the last row, is completed, the transfer switch Q101 is turned on by driving the transfer switch lines 402 of all rows at a high level. As a result, the charge stored in the photodiode PD is transferred to the floating diffusion capacitor at the gate of the input MOS transistor Q103 of the source follower. When the transfer is completed, the photodiode PD is reset by turning on the PD reset switch Q105 by setting the PD reset switch line 401 to the high level. With this reset operation, even when incident light is present on the light receiving surface of the photodiode, electrons generated by photoelectric conversion are discharged into the silicon substrate without being mixed into the floating diffusion capacitor.

  Next, a signal charge reading operation of all the pixel portions held in the floating diffusion capacitor will be described.

  The selection switch line 404_1 in the first row is set to the high level, and the selection switch Q104 in the first row is turned on to perform row selection. As a result, the second noise component composed of the leakage current of the floating diffusion capacitor at the time of holding the signal and the signal noise mixed component which is the sum of the held signal charges are read out to the signal storage unit 413.

  Next, as shown in FIG. 4, the drive pulse 408_1 from the horizontal shift register 406 is set to the high level, and the MOS transistor transfer switch 408 is turned on, whereby the signal of the pixel portion P1_1 in the first row is output to the output 411 via the amplifier 410. Read the noise mixture component. The read signal noise mixed component is AD-converted by the AD converter 412 and set to the + input terminal of the first subtractor 416 via the data bus 418. At the same time, the first noise component of the pixel portion P1_1 in the first row recorded in the first frame memory 414 is read out via the data bus 418 and set to the negative input terminal of the subtractor 416.

  Next, the subtractor 416 is operated to subtract the first noise component set at the − input terminal from the signal noise mixed component set at the + input terminal.

  Next, the output result of the subtractor 416 from which the first noise component has been removed from the signal noise mixed component is set to the + input terminal of the second subtractor 417. At the same time, the leakage current component of the pixel portion P1_1 in the first row recorded in the second frame memory 415 is read out via the data bus 418 and set to the negative input terminal of the subtractor 417.

  Next, the subtractor 417 is operated to subtract the leak current component set at the − input terminal from the signal noise mixed component set at the + input terminal. As a result of this series of processing, the first noise component and the leakage current component (the leakage current of the floating diffusion capacitor during signal holding) are removed from the signal noise mixed component. Here, the first noise component is fixed pattern noise such as reset noise and threshold voltage variation of the input MOS transistor Q103 of the source follower. Thereby, only the signal component photoelectrically converted by the photodiode PD becomes the output result of the subtractor 417.

  Similarly, the drive pulses 408_2 and 408_3 are sequentially set to the high level to turn on the MOS transistor transfer switch 408, read out the signal noise mixed components of the remaining pixel portions P1_2 and P1_3 in the first row, and performed the same processing. Only the signal component is calculated. The second and subsequent rows are similarly read out, and an image signal with a high S / N ratio is obtained.

  According to the above operation, since the signal accumulation start and end timings of all rows are the same, even if the subject is moving fast, the subject is distorted in shape, or flicker of a fluorescent lamp appears in the image. It is possible to capture a good quality image.

  In addition, the PD reset switch lines 401 in all rows are at the high level except for the accumulation period, and the PD reset switches Q105 in all the pixel portions are on. Therefore, even if light enters during a period other than the accumulation period and the accumulated charge exceeds the saturation charge amount of the photodiode PD, it is possible to prevent a blooming phenomenon that overflows and enters the adjacent floating diffusion capacitor or photodiode PD. .

  Furthermore, since the noise component due to the generated leakage current is measured in advance and subtracted at the time of signal readout during the time when the floating diffusion capacitance of each row is floating, image quality deterioration due to the leakage current, which has been a problem until now, can be prevented. In the present embodiment, the case where the pixel portion has three rows and three columns has been described in a simplified manner, but the present invention is not limited to this.

  In the embodiment of FIG. 1, frame memories 414 and 415 and a signal storage unit 413 for holding noise components of all the pixel units are required. On the other hand, a mode in which the signal accumulation start and end timings of all rows need to be made at the same time is often a mode for capturing a moving image. In this case, it is possible to reduce the number of pixel portions to be read and improve the frame rate by thinning out unnecessary rows without reading out all rows. Further, in the case of reading out unnecessary rows by thinning out, it suffices to have as many frame memories 414 and 415 and signal storage units 413 as necessary pixel units.

  In the thinning-out operation, the PD reset switch line 401 and the reset switch line 403 in the row that is not read are always set to the high level. Thereby, even if the charge accumulated in the photodiodes PD in unnecessary rows exceeds the saturation charge amount, it is possible to prevent a blooming phenomenon that overflows and enters the adjacent floating diffusion capacitors or photodiodes.

  As described above, according to the present embodiment, a CMOS sensor capable of accumulating operation at the same time that is not affected by the leakage current of the floating diffusion capacitor can be realized. A high-quality CMOS sensor can be realized.

  In the solid-state imaging device of this embodiment, the photoelectric conversion means (photodiode) PD converts light into signal charges and accumulates them. The first reset switch (PD reset switch) Q105 resets the signal charge accumulated in the photoelectric conversion means PD. The transfer switch Q101 transfers the signal charge of the photoelectric conversion means PD. The amplifying means (source MOS follower input MOS transistor) Q103 amplifies the signal charge transferred by the transfer switch Q101. The second reset switch Q102 resets the signal charge of the amplifying unit Q103. The selection switch Q104 selects the signal charge amplified by the amplification means Q103 and outputs it to the signal output line 105. The pixel portions P1_1 to P1_3, P2_1 to P2_3, and P3_1 to P3_3 include a photoelectric conversion unit PD, a first reset switch Q105, a transfer switch Q101, an amplification unit Q103, a second reset switch Q102, and a selection switch Q104, respectively. The pixel portions P1_1 to P1_3, P2_1 to P2_3, and P3_1 to P3_3 are two-dimensionally arranged.

  In FIG. 3, the second reset switch Q102 resets the signal charge of the amplification means Q103, and the selection switch Q104 outputs the signal charge of the amplification means Q103 as the first noise component in the row order of the pixel portion. Output to line 105.

  After a certain period of time has elapsed, the transfer switch Q101 is in an OFF state, and the selection switch Q104 outputs the signal charge of the amplification means Q103 to the signal output line 105 as the second noise component in the row order of the pixel portion.

  The subtractor 416 outputs the difference between the first noise component and the second noise component as a leakage current component.

  In FIG. 4, after outputting the second noise component, the first reset switches Q105 of all the pixel portions simultaneously reset the signal charges of the photoelectric conversion means PD.

  Thereafter, the second reset switch Q102 resets the signal charge of the amplifying means Q103, and the selection switch Q104 uses the reset signal charge of the amplifying means Q103 as a third noise component in the signal output line 105 in the row order of the pixel portion. Output to.

  After the accumulation period has elapsed, the transfer switches Q101 of all the pixel units simultaneously transfer the signal charges of the photoelectric conversion means PD, and the selection switch Q104 outputs the signal charges of the pixel sections in the row order using the signal charges of the amplification means Q103 as signal noise mixing components. Output to line 105.

  The subtractors 416 and 417 subtract the third noise component and the leakage current component from the signal noise mixed component.

  The first frame memory 414 stores a component obtained by analog-digital conversion of the first noise component output to the signal output line 105. The second frame memory 415 stores a component obtained by analog-digital conversion of the second noise component output to the signal output line 105. The subtractor 416 outputs a difference between the first noise component of the first frame memory 414 and the second noise component of the second frame memory 415 as a leakage current component.

  The first frame memory 414 stores a third noise component. The second frame memory 415 stores the leak current component output from the subtractor 416. The first subtractor 416 subtracts the third noise component of the first frame memory 414 from the signal noise mixed component. The second subtractor 417 subtracts the leak current component of the second frame memory 415 from the output of the first subtractor 416.

  According to the present embodiment, leakage current components can be removed, signal charge accumulation can be started and ended simultaneously for all the pixel portions, and a high-quality image without distortion can be obtained even when a moving subject is imaged. be able to.

  The above-described embodiments are merely examples of implementation in carrying out the present invention, and the technical scope of the present invention should not be construed in a limited manner. That is, the present invention can be implemented in various forms without departing from the technical idea or the main features thereof.

1 is an equivalent circuit diagram illustrating a solid-state imaging device according to an embodiment of the present invention. It is an equivalent circuit diagram which shows the pixel part of the solid-state imaging device of this embodiment. It is a timing diagram which shows operation | movement of a solid-state imaging device. It is a timing diagram which shows operation | movement of a solid-state imaging device.

Explanation of symbols

101 PD reset line 102 Transfer switch line 103 Reset switch line 104 Select switch line 105 Signal output line 401 PD reset line 402 Transfer switch line 403_1, 403_2, 403_3 Reset switch line 404_1, 404_2, 404_3 Select switch line 405_1, 405_2, 405_3 Signal Output line 406 Horizontal shift register 407 Vertical shift register 408 Transfer switch 409 Constant current source 410 Output amplifier 411 Output 412 AD converter 413 Signal storage unit 414 First frame memory 415 Second frame memory 416 First subtractor 417 Second Subtractor PD Photodiode Q101 Transfer switch Q102 Reset switch Q103 Source follower input MOS transistor Q104 Select switch 105 PD reset switch

Claims (4)

Photoelectric conversion means for converting light into signal charge and storing;
A first reset switch for resetting the signal charge accumulated in the photoelectric conversion means;
A transfer switch for transferring a signal charge of the photoelectric conversion means;
Amplifying means for amplifying the signal charge transferred by the transfer switch;
A second reset switch for resetting the signal charge of the amplification means;
A two-dimensionally arranged pixel unit including a selection switch that selects the signal charge amplified by the amplification means and outputs the signal charge to a signal output line;
The second reset switch resets the signal charge of the amplifying unit, and the selection switch outputs the reset signal charge of the amplifying unit to the signal output line in the row order of the pixel portion as a first noise component. And
After a certain period of time, the transfer switch is in an off state, the selection switch outputs the signal charge of the amplifying means to the signal output line in the row order of the pixel unit as a second noise component,
And a subtractor that outputs a difference between the first noise component and the second noise component as a leakage current component,
After outputting the second noise component, the first reset switches of all the pixel units simultaneously reset the signal charges of the photoelectric conversion means,
Thereafter, the second reset switch resets the signal charge of the amplifying unit, and the selection switch uses the reset signal charge of the amplifying unit as a third noise component in the row order of the pixel unit. Output to
After the accumulation period has elapsed, the transfer switches of all the pixel units simultaneously transfer the signal charges of the photoelectric conversion means, and the selection switch uses the signal charges of the amplification means as signal noise mixing components in the row order of the pixel units. Output to the signal output line,
The subtractor subtracts the third noise component and the leakage current component from the signal noise mixed component. A first frame memory for storing a component obtained by analog-digital conversion of the first noise component output to the signal output line;
A second frame memory for storing a component obtained by analog-digital conversion of the second noise component output to the signal output line;
2. The subtractor outputs a difference between the first noise component of the first frame memory and the second noise component of the second frame memory as a leakage current component. The solid-state imaging device described. The first frame memory stores the third noise component;
The second frame memory stores a leakage current component output by the subtractor,
The subtractor has a first subtractor and a second subtractor,
The first subtracter subtracts the third noise component of the first frame memory from the signal noise mixed component;
The solid-state imaging device according to claim 2, wherein the second subtracter subtracts a leak current component of the second frame memory from an output of the first subtractor. Photoelectric conversion means for converting light into signal charge and storing;
A first reset switch for resetting the signal charge accumulated in the photoelectric conversion means;
A transfer switch for transferring a signal charge of the photoelectric conversion means;
Amplifying means for amplifying the signal charge transferred by the transfer switch;
A second reset switch for resetting the signal charge of the amplification means;
A driving method of a solid-state imaging device having a two-dimensionally arranged pixel unit including a selection switch that selects a signal charge amplified by the amplifying means and outputs the signal charge to a signal output line;
The second reset switch resets the signal charge of the amplifying unit, and the selection switch outputs the reset signal charge of the amplifying unit to the signal output line in the row order of the pixel portion as a first noise component. And steps to
A step of outputting the signal charge of the amplifying means to the signal output line in the row order of the pixel unit as a second noise component in a state where the transfer switch is turned off after a certain period of time;
Outputting a difference between the first noise component and the second noise component as a leakage current component;
After outputting the second noise component, the first reset switch of all the pixel units simultaneously resets the signal charges of the photoelectric conversion means; and
Thereafter, the second reset switch resets the signal charge of the amplifying unit, and the selection switch uses the reset signal charge of the amplifying unit as a third noise component in the row order of the pixel unit. A step to output to
After the accumulation period has elapsed, the transfer switches of all the pixel units simultaneously transfer the signal charges of the photoelectric conversion means, and the selection switch uses the signal charges of the amplification means as signal noise mixing components in the row order of the pixel units. Outputting to the signal output line;
Subtracting the third noise component and the leakage current component from the signal noise mixed component, and a driving method of the solid-state imaging device.

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