JP2010103419A - Printed circuit board, and electronic device with the same - Google Patents

Printed circuit board, and electronic device with the same Download PDF

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Publication number
JP2010103419A
JP2010103419A JP2008275587A JP2008275587A JP2010103419A JP 2010103419 A JP2010103419 A JP 2010103419A JP 2008275587 A JP2008275587 A JP 2008275587A JP 2008275587 A JP2008275587 A JP 2008275587A JP 2010103419 A JP2010103419 A JP 2010103419A
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Prior art keywords
wiring pattern
circuit board
substrate
printed circuit
bonding
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JP2008275587A
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Japanese (ja)
Inventor
Go Koyanazu
剛 小▲柳▼津
Haruki Takei
春樹 武井
Kiyoko Kawashima
淨子 川島
Naoko Matsui
直子 松井
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Toshiba Lighting and Technology Corp
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Toshiba Lighting and Technology Corp
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Priority to JP2008275587A priority Critical patent/JP2010103419A/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H01L2224/48228—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item the bond pad being disposed in a recess of the surface of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors

Landscapes

  • Wire Bonding (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a printed circuit board having higher connection reliability between bonding wires and a wiring pattern formed of a printed layer. <P>SOLUTION: The printed circuit board 3 includes a substrate 5, the wiring pattern 7, a light-emitting diode (electronic component) 11, the bonding wires 13, and curing units 7c. The wiring pattern 7 is formed by printing a paste, into which conductor particles 7a are mixed, on the substrate 5. The bonding wires 13 connect the light-emitting diode 11 mounted on the substrate 5 and the wiring pattern 7. The wiring pattern 7 has the curing units 7c subjected to curing. The curing units 7c are formed of connections between the wiring pattern 7 and the bonding wires 13. The volume density of the curing units 7c is higher than that of portions 7d of the wiring pattern except the curing units. Pattern connecting ends 13b of the bonding wires 13 are connected to the curing units 7c in a wire bonding process. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

本発明は、基板に印刷された配線パターンと基板に実装された例えばＬＥＤ（発光ダイオード）等の電子部品とがボンディングワイヤにより接続された構造を有するプリント回路板、及びこの回路板を例えば発光源として備えた照明装置等の電子機器に関する。   The present invention relates to a printed circuit board having a structure in which a wiring pattern printed on a substrate and an electronic component such as an LED (light emitting diode) mounted on the substrate are connected by a bonding wire, and the circuit board as a light emitting source, for example. The present invention relates to an electronic device such as a lighting device.

従来、電子部品が実装される印刷配線基板に対してスクリーン印刷により導電材からなる印刷剤（配線パターン）を塗布する技術が知られている（例えば、特許文献１参照。）。   Conventionally, a technique for applying a printing agent (wiring pattern) made of a conductive material to a printed wiring board on which electronic components are mounted by screen printing is known (for example, see Patent Document 1).

この技術では、印刷配線基板の厚みより薄い電子部品が印刷配線基板の貫通孔に収容され、この電子部品の一部に被るように印刷剤（配線パターン）が印刷配線基板の表面に印刷されることによって、電子部品と配線パターンとが電気的に接続されている。   In this technique, an electronic component thinner than the thickness of the printed wiring board is accommodated in the through hole of the printed wiring board, and a printing agent (wiring pattern) is printed on the surface of the printed wiring board so as to cover a part of the electronic component. Thus, the electronic component and the wiring pattern are electrically connected.

この技術によれば、印刷配線基板の貫通孔内に実装された電子部品に加えて、配線パターンが印刷された印刷配線基板の表面に他の電子部品を実装できるので、より多くの電子部品を実装できる利点がある。
特許第３９１６５１５号公報（段落0007−0021、図１−図１３） According to this technology, in addition to the electronic components mounted in the through holes of the printed wiring board, other electronic components can be mounted on the surface of the printed wiring board on which the wiring pattern is printed. There is an advantage that can be implemented.
Japanese Patent No. 3916515 (paragraphs 0007-0021, FIGS. 1 to 13)

しかし、前記公報には、印刷配線基板の表面に実装される前記他の電子部品と配線パターンとの接続関係についての記載がない。   However, the publication does not describe the connection relationship between the other electronic component mounted on the surface of the printed wiring board and the wiring pattern.

通常、基板の表面に実装されたチップ状のＬＥＤ等の電子部品と、基板表面に設けられた配線パターンとの電気的接続は、ボンディングマシンを用いたワイヤボンディングにより実施されることが一般的である。この場合、金等の細線からなるボンディングワイヤの一端が、電子部品の端子にボールボンディング等によりファーストボンディングされ、ボンディングワイヤの他端が配線パターンに超音波ボンディング等によりセカンドボンディングされる。それにより、電子部品と配線パターンとがボンディングワイヤを介して接続される。   In general, electrical connection between an electronic component such as a chip-like LED mounted on the surface of a substrate and a wiring pattern provided on the surface of the substrate is generally performed by wire bonding using a bonding machine. is there. In this case, one end of a bonding wire made of a fine wire such as gold is first bonded to a terminal of an electronic component by ball bonding or the like, and the other end of the bonding wire is second bonded to a wiring pattern by ultrasonic bonding or the like. Thereby, an electronic component and a wiring pattern are connected via a bonding wire.

ところで、基板表面の配線パターンが、メッキ層ではなく、引用文献１に記載のようにスクリーン印刷により設けられた印刷層からなる場合、これにボンディングワイヤをワイヤボンディングすることは、以下の技術上の課題があることが本発明者により見出された。   By the way, when the wiring pattern on the substrate surface is not a plating layer but a printing layer provided by screen printing as described in the cited document 1, wire bonding of a bonding wire to this is technically as follows. It has been found by the present inventors that there is a problem.

即ち、配線パターンは、その製造上、金属の導電性微粒子を混ぜたペースト（インク）を、スクリーン印刷により基板表面に塗布（印刷）した後、この基板を加熱炉で加熱して印刷層を硬化させることで形成される。この硬化処理を経ることによって、導電性粒子間に粒子間間隙が少なからず不規則に形成されることは避けられない。それにより、印刷層からなる配線パターンの各部の体積密度は、メッキ層からなる配線パターンの各部の体積密度より低く、したがって、印刷層からなる配線パターンは柔らかである。   That is, the wiring pattern is manufactured by applying (printing) a paste (ink) mixed with metal conductive fine particles to the substrate surface by screen printing, and then heating the substrate in a heating furnace to cure the printed layer. It is formed by letting. By undergoing this curing treatment, it is inevitable that the interparticle gaps are not small and irregularly formed between the conductive particles. Thereby, the volume density of each part of the wiring pattern made of the printed layer is lower than the volume density of each part of the wiring pattern made of the plated layer, and therefore the wiring pattern made of the printed layer is soft.

そのため、印刷層からなる配線パターンにボンディングワイヤをワイヤボンディングにより接続する際に、配線パターンのボンディング箇所に加えられる押圧力が、前記粒子間間隙の影響により変動し、それに伴いボンディング箇所の変形は一定せずにばらつく。したがって、印刷層からなる配線パターンとこれにワイヤボンディングにより接続されたボンディングワイヤとの接続強度が大きくばらつき易く、この接続の信頼性が低い。   Therefore, when a bonding wire is connected to a wiring pattern made of a printed layer by wire bonding, the pressing force applied to the bonding portion of the wiring pattern varies due to the effect of the inter-particle gap, and accordingly, the deformation of the bonding portion is constant. It varies without doing. Therefore, the connection strength between the wiring pattern made of the printed layer and the bonding wire connected thereto by wire bonding tends to vary greatly, and the reliability of this connection is low.

本発明の目的は、印刷層からなる配線パターンとボンディングワイヤとの接続の信頼性を向上できるプリント回路板及びこれを備えた電子機器を提供することにある。   An object of the present invention is to provide a printed circuit board capable of improving the reliability of connection between a wiring pattern made of a printed layer and a bonding wire, and an electronic apparatus including the printed circuit board.

請求項１の発明のプリント回路板は、基板と；導電体微粒子が混ぜられたペーストを前記基板に印刷して設けられた配線パターンと；前記基板に実装された電子部品と；この電子部品と前記配線パターンとを接続して設けられたボンディングワイヤと；前記配線パターンの内、少なくとも前記ボンディングワイヤのパターン接続端部が接続される接続部に硬化処理が施されて形成されているともに、前記接続部以外の部位での体積密度より体積密度が高密度である硬化処理部と；を具備していることを特徴とする。   A printed circuit board according to a first aspect of the present invention includes a substrate; a wiring pattern provided by printing a paste mixed with conductive fine particles on the substrate; an electronic component mounted on the substrate; and the electronic component A bonding wire provided by connecting the wiring pattern; and at least a connection portion to which a pattern connection end portion of the bonding wire is connected is formed by being subjected to a curing process, And a curing treatment part having a higher volume density than the volume density at a part other than the connection part.

この請求項１の発明においては、請求項２の発明のように前記硬化処理部が前記配線パターンの一部に形成された凹部の直下の部位であって、この硬化処理部での体積密度が、前記凹部直下以外の部位での体積密度に対して１１０％〜５００％高密度であることが好ましい。   In the first aspect of the present invention, as in the second aspect of the present invention, the hardened portion is a portion immediately below a recess formed in a part of the wiring pattern, and the volume density in the hardened portion is It is preferable that the density is 110% to 500% with respect to the volume density at a portion other than directly below the concave portion.

請求項１，２の発明のプリント回路板とは、配線パターンが設けられた基板の表面に電子部品が実装されていて、この電子部品と配線パターンとがワイヤボンディングにより電気的に接続されたものを指している。この請求項１，２の発明で、基板は、全体が絶縁材料で形成されていても、表面側のみが絶縁材料製で裏面側が金属材料で形成された積層構造であっても良い。請求項１，２の発明で、印刷層からなる配線パターンは、例えばスクリーン印刷により好適に基板の表面に設けることができる。   In the printed circuit board according to the first and second aspects of the invention, an electronic component is mounted on the surface of a substrate on which a wiring pattern is provided, and the electronic component and the wiring pattern are electrically connected by wire bonding. Pointing. In the first and second aspects of the present invention, the substrate may be entirely formed of an insulating material, or may have a laminated structure in which only the front side is made of an insulating material and the back side is formed of a metal material. In the first and second aspects of the invention, the wiring pattern made of the printed layer can be suitably provided on the surface of the substrate by, for example, screen printing.

請求項１，２の発明で、電子部品には、チップ状のＬＥＤに限らず、ワイヤボンディングに適合する構成の種々の電子部品を用いることが可能である。請求項１，２の発明で、基板への電子部品の実装形態は、基板表面に電子部品がダイボンドされた直接的な実装態様だけではなく、基板表面に印刷された配線パターン上に電子部品がダイボンドされた間接的な実装態様も含んでいる。後者の実装態様の場合には、配線パターンとボンディングワイヤとの接続部だけではなく、配線パターンに対する電子部品の実装部位も高密度化することができる。   In the first and second aspects of the invention, the electronic component is not limited to the chip-shaped LED, and various electronic components having a configuration suitable for wire bonding can be used. According to the first and second aspects of the invention, the electronic component is mounted on the substrate not only in a direct mounting form in which the electronic component is die-bonded on the substrate surface, but also on the wiring pattern printed on the substrate surface. It also includes a die-bonded indirect implementation. In the case of the latter mounting mode, not only the connection portion between the wiring pattern and the bonding wire, but also the mounting part of the electronic component on the wiring pattern can be densified.

請求項１，２の発明で、配線パターンとボンディングワイヤとの接続部からなる硬化処理部は、硬化処理が施されて高密度化された部位を指している。この硬化処理部への硬化処理としては、好適には、配線パターンのボンディング箇所（接続部）を厚み方向にプレス加工等により圧縮して、ボンディング箇所を凹ませることにより実現可能であるが、これには制約されず、例えば接続部及びその周囲を薬剤や他の部材で硬化させることで実現することもできる。   In the first and second aspects of the present invention, the curing processing unit composed of the connection portion between the wiring pattern and the bonding wire indicates a part that has been subjected to curing processing and has been densified. The curing process to the curing processing part can be realized preferably by compressing the bonding part (connecting part) of the wiring pattern in the thickness direction by pressing or the like, and denting the bonding part. For example, it can be realized by curing the connecting portion and its periphery with a medicine or other member.

この請求項１，２の発明のプリント回路板では、配線パターンに形成された硬化処理部にボンディングワイヤのパターン接続端部が、ワイヤボンディングで接続され、それにより、配線パターンとボンディングワイヤとが電気的に接続されている。この接続のために実施されたワイヤボンディングでは、ボンディングワイヤのパターン接続端部を、ボンディングマシンのキャピラリにより硬化処理部に押付けてなされる。   In the printed circuit board according to the first and second aspects of the present invention, the pattern connection end of the bonding wire is connected to the cured portion formed in the wiring pattern by wire bonding, whereby the wiring pattern and the bonding wire are electrically connected. Connected. In wire bonding performed for this connection, the pattern connection end portion of the bonding wire is pressed against the curing processing portion by the capillary of the bonding machine.

この場合、配線パターンの硬化処理部での体積密度はこの硬化処理部以外の部位での体積密度より高密度であり、言い換えれば、配線パターンの硬化処理部は他の部位より緻密となっている。そのため、配線パターンが印刷層からなるにも拘わらず、硬化処理部に対するボンディングワイヤとの接合強度のばらつきを抑制できる。   In this case, the volume density of the wiring pattern in the hardened portion is higher than the volume density in the portion other than the hardened portion. In other words, the hardened portion of the wiring pattern is denser than the other portions. . For this reason, it is possible to suppress variation in bonding strength with the bonding wire with respect to the cured portion even though the wiring pattern is formed of a printed layer.

請求項３の発明の電子機器は、請求項１又は２に記載のプリント回路板を備えたことを特徴としている。   According to a third aspect of the present invention, there is provided an electronic apparatus comprising the printed circuit board according to the first or second aspect.

この請求項３の発明によれば、印刷層からなる配線パターンとボンディングワイヤとの接続の信頼性を向上できるプリント回路板を備えた電子機器を提供できる。   According to the third aspect of the present invention, it is possible to provide an electronic apparatus including a printed circuit board that can improve the connection reliability between a wiring pattern made of a printed layer and a bonding wire.

請求項１，２の発明のプリント回路板によれば、印刷層からなる配線パターンとボンディングワイヤとの接続の信頼性を向上できる。   According to the printed circuit board of the first and second aspects of the invention, it is possible to improve the reliability of the connection between the wiring pattern made of the printed layer and the bonding wire.

請求項３の発明の電子機器によれば、請求項１又は２のプリント回路板を備えるので、印刷層からなる配線パターンとボンディングワイヤとの接続の信頼性を向上できる。   According to the electronic device of the third aspect, since the printed circuit board according to the first or second aspect is provided, the reliability of the connection between the wiring pattern made of the printed layer and the bonding wire can be improved.

図１〜図５を参照して本発明の一実施形態を説明する
図１中符号１は電子機器例えば一般照明の分野に用いられる照明装置を示している。この照明装置１は、例えばＣＯＢ（chip on board）型の発光モジュール２と、点灯装置２１とを具備している。 An embodiment of the present invention will be described with reference to FIGS. 1 to 5. Reference numeral 1 in FIG. 1 denotes an electronic apparatus, for example, a lighting device used in the field of general lighting. The lighting device 1 includes, for example, a COB (chip on board) type light emitting module 2 and a lighting device 21.

発光モジュール２は、プリント回路板３と、枠部材１５と、封止部材１８とを備えている。   The light emitting module 2 includes a printed circuit board 3, a frame member 15, and a sealing member 18.

図２に示すようにプリント回路板３は、基板５と、配線パターン７と、複数の電子部品例えば半導体発光素子具体的にはチップ状の発光ダイオード１１と、ボンディングワイヤ１３とを具備している。   As shown in FIG. 2, the printed circuit board 3 includes a substrate 5, a wiring pattern 7, a plurality of electronic components such as semiconductor light emitting elements, specifically chip-shaped light emitting diodes 11, and bonding wires 13. .

基板５は、全体が絶縁材料例えば絶縁性合成樹脂からなり、図１に示すように例えば四角形状をなしている。   The substrate 5 is entirely made of an insulating material such as an insulating synthetic resin, and has, for example, a rectangular shape as shown in FIG.

配線パターン７は基板５の表面となる一面に例えば縦横に整列して設けられている。この配線パターン７は、印刷層からなる。つまり、配線パターン７は、主成分となる金属粉の導電体微粒子が混ぜられたペースト（インキ）を、スクリーン印刷により基板５の表面に、所望のパターンニングで印刷し、この印刷層を焼成する加熱処理により硬化して形成されている。配線パターン７の厚みは１０μｍ以上であり、この厚みはメッキ層で形成された配線パターンの厚みの数倍以上である。   For example, the wiring pattern 7 is provided on one surface as the surface of the substrate 5 so as to be aligned vertically and horizontally. This wiring pattern 7 consists of a printing layer. That is, the wiring pattern 7 is printed with a desired patterning on the surface of the substrate 5 by screen printing with a paste (ink) mixed with conductive fine particles of metal powder as a main component, and the printed layer is baked. It is formed by curing by heat treatment. The thickness of the wiring pattern 7 is 10 μm or more, and this thickness is several times or more the thickness of the wiring pattern formed by the plating layer.

配線パターン７を印刷層とすることは、プリント回路板３の製造において、配線パターン７のパターンニングを任意に変更する上で、メッキ層で配線パターンを形成する場合に比較して遥かに簡単に対応できるので、様々なパターンニングのプリント回路板３を製造するのに有利である。   Making the wiring pattern 7 as a printed layer is much easier in manufacturing the printed circuit board 3 as compared with the case where the wiring pattern is formed with a plating layer in arbitrarily changing the patterning of the wiring pattern 7. Since it can respond, it is advantageous to manufacture the printed circuit board 3 of various patterns.

図３〜図５中符号７ａは配線パターン７の主成分をなした導電性微粒子を模式的に示しており、又、符号７ｂは前記焼成によって配線パターン７内に不規則に発生した粒子間間隙を示している。   3 to 5, reference numeral 7 a schematically shows conductive fine particles that are the main component of the wiring pattern 7, and reference numeral 7 b is an interparticle gap that is irregularly generated in the wiring pattern 7 by the firing. Is shown.

各配線パターン７は、その所定部位例えば配線パターン７の両端部に図３及び図５に示す凹部８と、この凹部８の形成によって硬化果処理を施された硬化処理部７ｃを有している。   Each wiring pattern 7 has a concave portion 8 shown in FIGS. 3 and 5 at a predetermined portion thereof, for example, both ends of the wiring pattern 7, and a curing processing portion 7 c that has been subjected to a curing fruit process by forming the concave portion 8. .

凹部８は、焼成された配線パターン７（図４参照）に対して図示しないプレス装置を用いて、この装置が備える所定形状の加圧ヘッドで、基板５側に向けて所定の圧力を、ボンディング予定位置である配線パターン７の端部に加えて、この端部をプレスすることにより、形成されている。このプレス時の圧力は、後述する超音波ボンディングにおいて配線パターン７に加えられる押圧力より遥かに大きい。   The concave portion 8 is formed by bonding a predetermined pressure toward the substrate 5 with a pressurizing head having a predetermined shape provided in the press using a pressing device (not shown) for the fired wiring pattern 7 (see FIG. 4). In addition to the end portion of the wiring pattern 7 which is a predetermined position, the end portion is formed by pressing the end portion. The pressure at the time of pressing is much larger than the pressing force applied to the wiring pattern 7 in ultrasonic bonding described later.

凹部８は配線パターン７の表面、つまり、基板５の表面とは反対側に位置した面、及び配線パターン７の基板５表面に対して略直角な側面にわたって開放されている。凹部８の大きさは、後述するキャピラリの先端部が挿脱できるようにこの先端部より大きく形成されている。しかも、凹部８は、後述するパターン接続端部１３ｂ全体の形状に倣った部位を有しておらず、パターン接続端部１３ｂとは異なる形状に凹んで形成されている。   The recess 8 is open over the surface of the wiring pattern 7, that is, the surface located on the opposite side of the surface of the substrate 5 and the side surface substantially perpendicular to the surface of the substrate 5 of the wiring pattern 7. The size of the recess 8 is larger than the tip so that the tip of the capillary, which will be described later, can be inserted and removed. Moreover, the concave portion 8 does not have a portion that follows the shape of the entire pattern connection end portion 13b, which will be described later, and is formed in a concave shape different from the pattern connection end portion 13b.

以上のようにプレスして凹部８が形成されることにより配線パターン７に硬化処理が施される。即ち、後述のボンディングワイヤ１３が接続される凹部８の底面８ａ（図５参照）が、配線パターン７の表面より基板５の表面側に位置するように、凹部８の底面８ａ直下の部位からなる硬化処理部７ｃが圧縮されている。この圧縮により、配線パターン７の硬化処理部７ｃでの導電性微粒子７ａは押し潰されている。   The wiring pattern 7 is subjected to curing treatment by forming the recesses 8 by pressing as described above. That is, the bottom surface 8a (see FIG. 5) of the concave portion 8 to which a bonding wire 13 described later is connected is a portion immediately below the bottom surface 8a of the concave portion 8 so that the bottom surface 8a is positioned on the surface side of the substrate 5 from the surface of the wiring pattern 7. The curing processing unit 7c is compressed. By this compression, the conductive fine particles 7a in the curing processing portion 7c of the wiring pattern 7 are crushed.

そのため、硬化処理部７ｃにプレス前に粒子間間隙があっても、この粒子間間隙が前記圧縮に伴い消失された状態となるから、この硬化処理部７ｃの金属組織は配線パターン７のその他の部位７ｄよりも緻密でかつ高強度になっている。即ち、配線パターン７の硬化処理部７ｃでの体積密度は、この硬化処理部７ｃ以外の配線パターン７の他の部位７ｄでの体積密度より高密度である。   For this reason, even if there is an interparticle gap before pressing in the hardening processing section 7c, the interparticle gap is lost due to the compression, so that the metal structure of the hardening processing section 7c is the other of the wiring pattern 7. It is denser and stronger than the portion 7d. That is, the volume density of the wiring pattern 7 at the curing processing unit 7c is higher than the volume density at the other portion 7d of the wiring pattern 7 other than the curing processing unit 7c.

この場合、硬化処理部７ｃでの体積密度は、この硬化処理部７ｃ以外の他の部位７ｄでの体積密度に対して１１０％〜５００％高密度であることが好ましい。体積密度の比率が１１０％未満であることは、前記プレスによる硬化処理で粒子間間隙を消失させる上で十分ではなく、又、体積密度の比率が５００％を超えることは、前記キャピラリ及び特に基板５が樹脂製である場合にこの基板５に過大な負荷を与え易い点で適当ではない。   In this case, the volume density in the curing processing unit 7c is preferably 110% to 500% higher than the volume density in other portions 7d other than the curing processing unit 7c. When the volume density ratio is less than 110%, it is not sufficient for eliminating the interparticle gaps by the curing treatment by the press, and when the volume density ratio exceeds 500%, the capillary and particularly the substrate are used. When 5 is made of resin, it is not appropriate in that an excessive load is easily applied to the substrate 5.

発光ダイオード１１は、例えば４６０ｎｍの主波長を有して青色の光を発するチップ状の半導体発光素子からなる。図３及び図５に示すように発光ダイオード１１は、サファイア等からなる絶縁性の素子基板１１ａの一面に半導体発光層１１ｂを積層し、さらに、この半導体発光層１１ｂ上に一対の素子電極１１ｃ，１１ｄを設けて形成されている。   The light emitting diode 11 is composed of a chip-like semiconductor light emitting element that emits blue light having a dominant wavelength of 460 nm, for example. As shown in FIGS. 3 and 5, the light emitting diode 11 includes a semiconductor light emitting layer 11b stacked on one surface of an insulating element substrate 11a made of sapphire or the like, and a pair of device electrodes 11c, 11d is provided.

この発光ダイオード１１の素子基板１１ａは、ダイボンド材（図３及び図５参照）１２を用いてプリント回路板３に接着（実装）されている。これらの発光ダイオード１１は、各配線パターン７と交互に配置されているとともにプリント回路板３の表面全域に縦横に整列されている。   The element substrate 11a of the light emitting diode 11 is bonded (mounted) to the printed circuit board 3 by using a die bond material (see FIGS. 3 and 5) 12. These light emitting diodes 11 are alternately arranged with the respective wiring patterns 7 and aligned vertically and horizontally over the entire surface of the printed circuit board 3.

各発光ダイオード１１は、これを間において配置された配線パターン７にボンディングワイヤ（図３参照）１３により接続されている。この接続により、各発光ダイオード１１は直列接続されていて、この直列回路の一端は電極１４ａに接続され、他端は電極１４ｂに接続されている。電極１４ａ，電極１４ｂは、基板５の表面に配線パターン７とともにスクリーン印刷により設けられたものである。   Each light emitting diode 11 is connected to a wiring pattern 7 disposed therebetween by a bonding wire (see FIG. 3) 13. With this connection, the light emitting diodes 11 are connected in series, and one end of the series circuit is connected to the electrode 14a and the other end is connected to the electrode 14b. The electrodes 14 a and 14 b are provided on the surface of the substrate 5 together with the wiring pattern 7 by screen printing.

ボンディングワイヤ１３は、金属細線、好適には金の細線からなり、その素子側端部１３ａが発光ダイオード１１の素子電極１１ｃ又は１１ｄにファーストボンディングされ、この後に、パターン接続端部１３ｂが配線パターン７の凹部８の底面８ａにセカンドボンディングされることにより、互いに隣接した配線パターン７と発光ダイオード１１とにわたって設けられている。ここにパターン接続端部１３ｂとは、凹部８に収納された部位を指しており、具体的には、底面８ａに接続された部位と、これから折れ曲がっていて凹部８の側面８ｂ（図３及び図５参照）に対向した部位を指しており、図示例では略Ｌ字状をなしている。   The bonding wire 13 is made of a fine metal wire, preferably a gold fine wire, and its element side end 13a is first bonded to the element electrode 11c or 11d of the light emitting diode 11, and thereafter, the pattern connection end 13b is connected to the wiring pattern 7. By being second-bonded to the bottom surface 8 a of the recess 8, the wiring pattern 7 and the light emitting diode 11 adjacent to each other are provided. Here, the pattern connection end portion 13b refers to a portion housed in the concave portion 8, specifically, a portion connected to the bottom surface 8a and a side surface 8b of the concave portion 8 that is bent from now on (FIGS. 3 and FIG. 3). 5), and is substantially L-shaped in the illustrated example.

凹部８の底面８ａに対するパターン接続端部１３ｂの接続、言い換えれば、硬化処理部７ｃに対するパターン接続端部１３ｂの接続は、超音波ボンディング（超音波溶接）により行われている。この超音波ボンディングでは、図示しないボンディングマシンのキャピラリ（又はツールともいう）によりボンディングワイヤ１３のパターン接続端部１３ｂを、硬化処理部７ｃの上面をなした凹部８の底面８ａに押付け、この状態で超音波を掛けて、パターン接続端部１３ｂと凹部８の底面８ａとの界面に超音波エネルギーを集中させ、そのエネルギーでパターン接続端部１３ｂを硬化処理部７ｃに圧着する。   The connection of the pattern connection end portion 13b to the bottom surface 8a of the concave portion 8, in other words, the connection of the pattern connection end portion 13b to the curing processing portion 7c is performed by ultrasonic bonding (ultrasonic welding). In this ultrasonic bonding, the pattern connection end portion 13b of the bonding wire 13 is pressed against the bottom surface 8a of the concave portion 8 formed on the top surface of the curing processing portion 7c by a capillary (or a tool) of a bonding machine (not shown). Ultrasonic waves are applied to concentrate ultrasonic energy on the interface between the pattern connection end portion 13b and the bottom surface 8a of the concave portion 8, and the pattern connection end portion 13b is pressure-bonded to the curing processing portion 7c with the energy.

この超音波ボンディングによる配線パターン７とボンディングワイヤ１３との電気的接続の信頼性は以下の理由により高い。   The reliability of electrical connection between the wiring pattern 7 and the bonding wire 13 by this ultrasonic bonding is high for the following reasons.

即ち、既述のように配線パターン７の硬化処理部７ｃでの体積密度は、この硬化処理部７ｃを外れた配線パターン７のその他の部位７ｄでの体積密度より高密度であり、凹部８の底面８ａの直下の硬化処理部７ｃは他より緻密となっている。そのため、硬化処理部７ｃに対するボンディングワイヤ１３との接続強度のばらつきが抑制される。したがって、配線パターン７が印刷層からなるにも拘わらず、配線パターン７とボンディングワイヤ１３との電気的接続の信頼性を高めることができる。   That is, as described above, the volume density of the wiring pattern 7 at the curing processing portion 7c is higher than the volume density at the other portion 7d of the wiring pattern 7 outside the curing processing portion 7c. The curing processing portion 7c directly below the bottom surface 8a is denser than the others. Therefore, the dispersion | variation in the connection strength with the bonding wire 13 with respect to the hardening process part 7c is suppressed. Therefore, the reliability of electrical connection between the wiring pattern 7 and the bonding wire 13 can be improved even though the wiring pattern 7 is formed of a printed layer.

しかも、硬化処理部７ｃに対する超音波ボンディングにおいては、既述のように前記キャピラリが凹部８に挿入されて、パターン接続端部１３ｂを凹部８の底面８ａに押付けることに基づいて、硬化処理部７ｃの上面をなした凹部８の底面８ａに接続されたボンディングワイヤ１３のパターン接続端部１３ｂと、凹部８の側面８ｂ（図３及び図５参照）とは、互いの間に隙間を設けて対向される。そのため、凹部８が深い場合において、ボンディング後に、次の製造工程に向けてプリント回路板３を取扱う際にボンディングワイヤ１３が動揺することがあっても、凹部８の縁とボンディングワイヤ１３とが擦れ合うことが抑制される。したがって、ボンディングワイヤ１３が傷付く恐れがなくなり、プリント回路板３の品質を向上できる。   Moreover, in the ultrasonic bonding to the curing processing unit 7c, the curing processing unit is based on the fact that the capillary is inserted into the recess 8 and the pattern connection end 13b is pressed against the bottom surface 8a of the recess 8 as described above. The pattern connection end portion 13b of the bonding wire 13 connected to the bottom surface 8a of the concave portion 8 forming the upper surface of 7c and the side surface 8b (see FIGS. 3 and 5) of the concave portion 8 are provided with a gap therebetween. Opposed. Therefore, when the concave portion 8 is deep, the edge of the concave portion 8 and the bonding wire 13 rub against each other even if the bonding wire 13 may be shaken after handling the printed circuit board 3 for the next manufacturing process. It is suppressed. Therefore, there is no possibility that the bonding wire 13 is damaged, and the quality of the printed circuit board 3 can be improved.

図１に示すように枠部材１５は、基板５より一回り小さい四角枠状をなしていて、全ての発光ダイオード１１を囲んで基板５の表面に取付けられている。この枠部材１５の一辺には前記電極１４ａ，１４ｂが交差している。   As shown in FIG. 1, the frame member 15 has a rectangular frame shape slightly smaller than the substrate 5, and is attached to the surface of the substrate 5 so as to surround all the light emitting diodes 11. The electrodes 14 a and 14 b intersect with one side of the frame member 15.

封止部材１８は枠部材１５の内側に充填されている。この封止部材１８は、各発光ダイオード１１、配線パターン７及びボンディングワイヤ１３を埋めていて、これらを封止している。封止部材１８は透光性材料例えば透明樹脂具体的には透明シリコーン樹脂で形成されている。この封止部材１８の内部には、例えば粒子状の黄色蛍光体が混入され、この蛍光体は好ましくは完全分散されており、それにより封止部材１８は蛍光体層を形成している。なお、封止部材１８中の蛍光体として、演色性を更に改善するために、青色の光で励起されて赤色の光を発する赤色蛍光体や緑色の光を発する緑色蛍光体を必要に応じて加えることもできる。   The sealing member 18 is filled inside the frame member 15. This sealing member 18 fills each light emitting diode 11, the wiring pattern 7, and the bonding wire 13 and seals them. The sealing member 18 is formed of a translucent material such as a transparent resin, specifically, a transparent silicone resin. For example, a particulate yellow phosphor is mixed inside the sealing member 18, and the phosphor is preferably completely dispersed, whereby the sealing member 18 forms a phosphor layer. As the phosphor in the sealing member 18, a red phosphor that emits red light when excited by blue light or a green phosphor that emits green light is used as necessary in order to further improve color rendering. It can also be added.

図１に示すように点灯装置２１は、制御部２２と、パルス発生器２３とを備えている。パルス発生器２３の出力端は電極１４ａ，１４ｂに電気的に接続されている。制御部２２はパルス発生器２３が発生するパルスの発生タイミング、このパルスのパルス幅及び波高値等を制御するようになっている。この制御部２２には直流電源２４が接続されている。   As shown in FIG. 1, the lighting device 21 includes a control unit 22 and a pulse generator 23. The output end of the pulse generator 23 is electrically connected to the electrodes 14a and 14b. The control unit 22 controls the generation timing of the pulse generated by the pulse generator 23, the pulse width and the peak value of this pulse, and the like. A DC power supply 24 is connected to the control unit 22.

前記構成の照明装置１がその点灯装置２１により点灯された場合、以下の照明が行われる。即ち、通電により各発光ダイオード１１が点灯されるので、これら発光ダイオード１１は青色の光を主波長とする光を発し、この青色光は透明な封止部材１８に入射する。封止部材１８に入射した青色光の一部は、封止部材１８中に分散されている黄色蛍光体に当たって吸収され、残りの青色光は、黄色蛍光体に当たることなく封止部材１８を透過して光の利用方向に出射される。一方、青色光を吸収した黄色蛍光体は、励起されて青色の光とは異なる色の光、具体的には主として黄色の光を放射し、この黄色の光は、封止部材１８を透過して光の利用方向に出射される。したがって、封止部材１８に含まれた蛍光体が放射した黄色の光と封止部材１８を透過した青色の光とが混じって白色となり、この白色の光が照明に供される。   When the lighting device 1 having the above-described configuration is turned on by the lighting device 21, the following illumination is performed. That is, since each light emitting diode 11 is turned on by energization, these light emitting diodes 11 emit light having blue light as a main wavelength, and this blue light is incident on the transparent sealing member 18. Part of the blue light incident on the sealing member 18 is absorbed by the yellow phosphor dispersed in the sealing member 18, and the remaining blue light is transmitted through the sealing member 18 without hitting the yellow phosphor. Are emitted in the light utilization direction. On the other hand, the yellow phosphor that has absorbed blue light is excited to emit light of a color different from that of blue light, specifically, mainly yellow light, and this yellow light is transmitted through the sealing member 18. Are emitted in the light utilization direction. Therefore, the yellow light emitted from the phosphor contained in the sealing member 18 and the blue light transmitted through the sealing member 18 are mixed to become white, and this white light is used for illumination.

本発明の一実施形態に係る照明装置を説明する概略図。Schematic explaining the illuminating device which concerns on one Embodiment of this invention. 図１中Ｆ２−Ｆ２線に沿って示す断面図。Sectional drawing shown along the F2-F2 line in FIG. 図１の照明装置が備えるプリント回路板の一部を拡大して示す断面図。Sectional drawing which expands and shows a part of printed circuit board with which the illuminating device of FIG. 1 is provided. 図１の照明装置が備えるプリント回路板の一部をその基板表面に配線パターンが形成された状態で示す断面図。Sectional drawing which shows a part of printed circuit board with which the illuminating device of FIG. 1 is provided in the state by which the wiring pattern was formed in the board | substrate surface. 図１の照明装置が備えるプリント回路板の一部をその基板表面に発光ダイオードがダイボンディングされた状態で示す断面図。Sectional drawing which shows a part of printed circuit board with which the illuminating device of FIG. 1 is provided in the state by which the light emitting diode was die-bonded to the board | substrate surface.

符号の説明Explanation of symbols

１…照明装置（電子機器）、３…プリント回路板、５…基板、７…配線パターン、７ａ…導電体微粒子、７ｃ…硬化処理部、７ｄ…硬化処理部以外の部位、８…凹部、８ａ…凹部の底面（硬化処理部の上面）、１１…発光ダイオード（電子部品）、１３…ボンディングワイヤ、１３ａ…パターン側接続端部   DESCRIPTION OF SYMBOLS 1 ... Illuminating device (electronic device), 3 ... Printed circuit board, 5 ... Board | substrate, 7 ... Wiring pattern, 7a ... Conductor microparticles | fine-particles, 7c ... Curing process part, 7d ... Site other than a curing process part, 8 ... Recessed part, 8a ... Bottom surface of recess (upper surface of cured portion), 11 ... light emitting diode (electronic component), 13 ... bonding wire, 13a ... pattern side connection end

Claims (3)

基板と；
導電体微粒子が混ぜられたペーストを前記基板に印刷して設けられた配線パターンと；
前記基板に実装された電子部品と；
この電子部品と前記配線パターンとを接続して設けられたボンディングワイヤと；
前記配線パターンの内、少なくとも前記ボンディングワイヤのパターン接続端部が接続される接続部に硬化処理が施されて形成されているともに、前記接続部以外の部位での体積密度より体積密度が高密度である硬化処理部と；
を具備していることを特徴とするプリント回路板。 A substrate;
A wiring pattern provided by printing a paste mixed with conductive fine particles on the substrate;
An electronic component mounted on the substrate;
A bonding wire provided by connecting the electronic component and the wiring pattern;
Among the wiring patterns, at least a connection portion to which the pattern connection end portion of the bonding wire is connected is formed by being cured, and the volume density is higher than the volume density at a portion other than the connection portion. A curing treatment part which is;
A printed circuit board comprising: 前記硬化処理部が前記配線パターンの一部に形成された凹部の直下の部位であって、この硬化処理部での体積密度が、前記凹部直下以外の部位での体積密度に対して１１０％〜５００％高密度であることを特徴とする請求項１に記載のプリント回路板。   The hardened part is a part immediately below a recess formed in a part of the wiring pattern, and the volume density in the hardened part is 110% to the volume density in a part other than the part directly below the concave part. The printed circuit board according to claim 1, wherein the printed circuit board has a high density of 500%. 請求項１又は２に記載のプリント回路板を備えたことを特徴とする電子機器。   An electronic apparatus comprising the printed circuit board according to claim 1.
JP2008275587A 2008-10-27 2008-10-27 Printed circuit board, and electronic device with the same Pending JP2010103419A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015503208A (en) * 2011-12-14 2015-01-29 ワンス イノヴェイションズ, インコーポレイテッドOnce Innovations, Inc. Light emitting system

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03105934A (en) * 1989-09-20 1991-05-02 Hitachi Ltd Semiconductor integrated circuit device and manufacture thereof
JP2007251065A (en) * 2006-03-17 2007-09-27 Mitsubishi Electric Corp Ceramic wiring board, and its manufacturing method

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03105934A (en) * 1989-09-20 1991-05-02 Hitachi Ltd Semiconductor integrated circuit device and manufacture thereof
JP2007251065A (en) * 2006-03-17 2007-09-27 Mitsubishi Electric Corp Ceramic wiring board, and its manufacturing method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015503208A (en) * 2011-12-14 2015-01-29 ワンス イノヴェイションズ, インコーポレイテッドOnce Innovations, Inc. Light emitting system

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