JP2010088003A - Balancing circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a balancing circuit which enhances an in-phase component removal ratio (CMRR) by eliminating a difference in input impedance between a backward input terminal and a forward input terminal in balance input amplification sections. <P>SOLUTION: The present invention uses two balance input amplification sections of a balancing circuit. With respect to a backward input terminal and a forward input terminal with a difference in input impedance therebetween, balance signal inputs are alternately connected to the backward input terminal of one balance input amplification section and the forward input terminal of the other balance input amplification section. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a balance circuit in which in-phase and out-of-phase input impedances are made equal in an audio amplifier circuit.

In an audio power amplifier circuit, the circuit is simple in unbalanced driving / single-ended driving, but current flows through the ground, and the ground potential fluctuates depending on the signal due to the resistance of the ground. Because of the increase and the noise on the signal and the ground appear in the output as it is, the balance drive for sending the inverted signal has become the mainstream in high-quality audio. In the balanced drive, the drive current flows from the normal signal side amplifier to the non-normal signal side amplifier and does not flow to the ground. Therefore, the ground can maintain the reference potential. Therefore, crosstalk is also improved. In addition, when a signal is sent as a differential signal of a normal signal and a non-normal signal, noise on the signal is removed as an in-phase component. Has been driven by the balance of audio products. However, there are many problems in balance driving. For example, Patent Document 1 discloses a measure for improving that the reference voltage of the output of the balance circuit fluctuates depending on the output, and therefore oscillation is likely to occur.
JP-A-5-327406

FIG. 2 shows an unbalance / balance conversion circuit that is often used conventionally.
One channel of a stereo signal is shown. It consists of an inverted signal generator 2A and a balance input amplifier 2B surrounded by a dotted line frame. This operation will be described. In the inverted signal generator 2A, the signal source 100 is inverted and amplified by the operational amplifier 103 having the input resistors R0 and 101 and the feedback resistors R0 and 102, and an inverted signal is generated at the inverting amplifier output terminal 104. In the balanced input amplifier 2B, the inverting input terminal 113, the input resistors R1, 109, R3, 111 and the feedback resistors R2, 110, R4, 112 connected to both the inverting input 107 and the normal input 108 of the operational amplifier 106, The difference in voltage input to the normal input terminal 114 is output to the output terminal 115.

Next, when the input impedance viewed from the inverting input terminal 113 and the normal rotation input terminal 114 is obtained in the balanced input amplifying unit 2B, equations (1) and (2) are obtained.
The input impedance Z1i of the inverting input terminal 113 is
Z1i = (R1 + R2) / {1-R4. (R1 + R2) .V1 / {R1. (R3 + R4) .V2}
+ R2 / R1}
However, V1 is the voltage of the inverting input terminal 113, and V2 is the voltage of the normal input terminal 114.
Also, the input impedance Z2i of the forward rotation input terminal 114 is
Z2i = R3 + R4
Here, when R1 = R2 = R3 = R4 and V1 = −V2,
Z1i = 2R1 / 3 (1)
Z2i = 2R1 (2)
It becomes.
When R1 is 5 kΩ, Z1i = 3.33 kΩ and Z2i = 10 kΩ, and the input impedance does not match. This causes the following inconvenience.

If there is a difference in input impedance when in-phase noise is present in the signal system, the voltage difference obtained by multiplying the in-phase noise current and the input impedance difference becomes differential noise, so the in-phase rejection ratio (CMRR) and accordingly Sound quality deteriorates. In particular, there is an influence when the transmission impedance of a normal cable is a reactance system.

In view of the above circumstances, the problem to be solved is a balance that improves the common-mode rejection ratio (CMRR) by eliminating the difference in input impedance between the inverting input terminal and the non-inverting input terminal of the balanced input amplifier. To provide a circuit.

As a means for solving the above-described problem, the balance circuit according to the present invention uses two balance input amplifiers of a conventional balance circuit, and has an inverting input terminal having a difference in input impedance and a non-inverting input terminal. On the other hand, each of the balance signal inputs is alternately connected to the inverting input terminal of one balance input amplification section and the normal input terminal of the other balance input amplification section. The input impedance is the same value.
Hereinafter, it demonstrates along a claim.

The invention according to claim 1 is a balance circuit, and includes an inverted signal generation unit, a balance input amplification unit A, and a balance input amplification unit B. The inverted signal generation unit receives an audio signal and outputs a normal signal. The balanced input amplification unit A has a resistor 1A and a resistor 2A connected to the normal input of the operational amplifier, and the resistor 2A is connected to the normal input. The terminal on the opposite side is connected to the ground, and has a resistor 3A and a resistor 4A connected to the inverting input of the operational amplifier, and the terminal on the opposite side to the side connected to the inverting input in the resistor 4A The balanced input amplifying unit A and the balanced input amplifying unit B are connected to the output of an amplifier, the operational amplifier having the same characteristics, the resistor 1B having the same resistance as the resistor 1A, and the same resistor as the resistor 2A. The resistor 2B, the resistor 3B having the same resistance as the resistor 3A, and the resistor 4B having the same resistance as the resistor 4A are respectively used in the same configuration, and the resistor 1A, the resistor 1B, the resistor 3A, At each terminal of the resistor 3B opposite to the side connected to the normal input and the inverted input, the terminal of the resistor 1A and the terminal of the resistor 3B receive the inverted signal, and the terminal of the resistor 1B and the terminal The terminal of the resistor 3A is connected to receive the normal rotation signal, so that the inverted signal and the normal rotation signal have the same input impedance as viewed on the balance input amplification unit A and the balance input amplification unit B side. To do.

The invention according to claim 2 is the balance circuit according to claim 1, wherein each of the resistor 1A and the resistor 3A, the resistor 1B and the resistor 3B, the resistor 2A and the resistor 4A, the resistor 2B and the resistor 4B It is characterized in that the resistance value is made equal for each pair.

According to a third aspect of the present invention, there is provided the balance circuit according to the second aspect, wherein the resistor 1A, the resistor 2A, the resistor 3A, the resistor 4A, the resistor 1B, the resistor 2B, the resistor 3B, and the resistor 4B It is characterized by equal values.

According to a fourth aspect of the present invention, in the balance circuit according to the third aspect, the resistance value is 15 kΩ.

Since it is configured as described above, in the balance circuit according to the present invention, the common-mode rejection ratio (CMRR) is improved, and the common-mode noise is improved.

In the balance circuit according to the present invention, two balance input amplifying units of the conventional balance circuit are used, and each of the balance signal inputs is applied to the inverting input terminal and the non-inverting input terminal having different input impedances. Are connected alternately to the inverting input terminal of the other balanced input amplifying unit and the normal input terminal of the other balanced input amplifying unit.

FIG. 1 is a diagram showing an embodiment of a balance circuit according to the present invention. It has an inverted signal generation unit 1A and a balance input amplification unit 1B surrounded by a dotted line frame, and a balance input amplification unit 1C having the same configuration as this. The operation of the inverted signal generator 1A is exactly the same as that of the inverted signal generator 2A of FIG. Since the balance input amplification unit 1B is exactly the same as the balance input amplification unit 2B of FIG. 2, description thereof is also omitted. The balanced input amplifying unit 1C has exactly the same elements and circuit configuration as the balanced input amplifying unit 1B, but the output terminal 115B has resistors RG and 116 between the grounds.

The inverting amplifier output terminal 104 is connected to the inverting input terminal 113A of the balance input amplifier 1B and the normal input terminal 114B of the balance input amplifier 1C, and the normal signal terminal 105 is connected to the normal input terminal 114A of the balance input amplifier 1A. It is connected to the inverting input terminal 113B of the balance input amplifier 1C. Therefore, the input impedances when the balanced input amplifiers 1B and 1C are viewed from the inverting amplifier output terminal 104 and the normal signal terminal 105 are both the parallel resistances of Z1i and Z2i described in FIG. When R1 is 15 kΩ, Z1i = 10 kΩ and Z2i = 30 kΩ, so the input impedance is 7.5 kΩ. By such means, the value of the input impedance can be made the same.

In the balance circuit according to the present invention, since both of the input impedances of the balanced input amplification unit can be made the same in this way, a common circuit rejection ratio (CMRR) can be improved, and a balance circuit that eliminates the influence of common mode noise can be provided. It has great industrial utility.

FIG. 3 is a diagram showing an embodiment of a balance circuit according to the present invention. 2 shows an unbalance / balance conversion circuit that has been frequently used in the past.

Explanation of symbols

1A, 2A Inverted signal generator 1B, 1C, 2B Balanced input amplifier 100 Signal source 101 Input resistance R0
102 Feedback resistor R0
103, 106 Operational amplifier 104 Inverting amplifier output terminal 105 Normal signal terminal 107 Inverted input 108 Normal input 109 Input resistance R1
111 Input resistance R3
110 Feedback resistor R2,
112 Feedback resistor R4
113, 113A Inversion input terminals 114, 114B Normal input terminals 115, 115A, 115B Output terminal 116 Resistance RG

Claims (4)

An inverted signal generation unit, a balance input amplification unit A, and a balance input amplification unit B, wherein the inverted signal generation unit receives an audio signal and generates an inverted signal obtained by inverting the normal signal; The amplifying unit A has a resistor 1A and a resistor 2A connected to the normal input of the operational amplifier, and a terminal of the resistor 2A opposite to the side connected to the normal input is connected to the ground, and the operational amplifier A resistor 3A and a resistor 4A connected to the inverting input, and a terminal of the resistor 4A opposite to the side connected to the inverting input is connected to the output of the operational amplifier. The balanced input amplification unit B has the same characteristics as the operational amplifier, the resistor 1B having the same resistance as the resistor 1A, the resistor 2B having the same resistance as the resistor 2A, and the same resistance as the resistor 3A. The resistor 3B and the resistor 4B having the same resistance as the resistor 4A are respectively configured in the same manner, and the resistor 1A, the resistor 1B, the resistor 3A, the forward input and the inverted input of the resistor 3B are used. In each terminal opposite to the connected side, the terminal of the resistor 1A and the terminal of the resistor 3B receive the inverted signal, and the terminal of the resistor 1B and the terminal of the resistor 3A are connected to receive the normal rotation signal. Thus, the balance circuit is characterized in that the inverted signal and the normal signal have the same input impedance as viewed on the balance input amplifier A and the balance input amplifier B side. The resistance value is equalized for each pair of the resistor 1A and the resistor 3A, the resistor 1B and the resistor 3B, the resistor 2A and the resistor 4A, and the pair of the resistor 2B and the resistor 4B. The balance circuit described. 3. The balance circuit according to claim 2, wherein resistance values of the resistor 1A, the resistor 2A, the resistor 3A, the resistor 4A, the resistor 1B, the resistor 2B, the resistor 3B, and the resistor 4B are made equal. 4. The balance circuit according to claim 3, wherein the resistance value is 15 kΩ.

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