JP2010079485A - Semiconductor recording device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve data holding performance even when the variations of data holding characteristics is generated by physical block units by absorbing the characteristic variations. <P>SOLUTION: When writing data, the parity of an M word is added to the data of an N word, and a first ECC code is obtained. Each word is distributed to each of (N+M) pieces of physical blocks, and the data attached with a second ECC code having each word of A pieces of first ECC codes as configuring elements are written in each page of the physical block. When reading data, error correction is performed based on the second ECC code, and when any error is not corrected with the second ECC code, disappearing correction is performed with the first ECC code. The corrected physical block is defined as a warning block, and a priority order as the physical block as the write-in object is decreased. The data of the warning block are read in a prescribed timing, and ECC-corrected, and written in another physical block. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a nonvolatile semiconductor recording device such as a memory card, and more particularly to a semiconductor recording device that suppresses deterioration due to variations in data retention characteristics of internal nonvolatile memory and an increase in the number of rewrites.

  Conventionally, a semiconductor recording device such as an SD (Secure Digital) card, which is a card-type recording medium with a built-in flash memory, is ultra-small and ultra-thin. Widely used for recording data such as images.

  A flash memory built in a semiconductor recording device is a memory that includes a large number of physical blocks of a certain size and can erase data in units of physical blocks. In order to respond to the recent demand for larger capacity, flash memory has been commercialized as multi-value flash memory that can store data of 2 bits or more in one cell.

  FIG. 1 shows an example of the relationship between the number of electrons stored in the floating gate of the multilevel flash memory and the threshold voltage (Vth). As shown in FIG. 1, in the quaternary flash memory, the accumulation state of electrons in the floating gate is managed in four states according to the threshold voltage (Vth). In the erased state, the potential is the lowest, which is (1, 1). As the electrons accumulate, the threshold voltage increases discretely, and the states are (1, 0) (0, 0) (0, 1), respectively. As described above, since the potential increases in proportion to the number of accumulated electrons, 2-bit data can be recorded in one memory cell by performing control so as to fall within a predetermined potential threshold.

  FIG. 2 shows a schematic diagram of one physical block of the quaternary flash memory. The physical block shown in FIG. 2 is composed of 2K pages (K is a natural number). Then, the writing process is performed in ascending order from page number 0. Here, it is assumed that the page with the page number m (0 ≦ m <K) and the page with the page number (K + m) are in a relationship sharing one memory cell (hereinafter referred to as a cell sharing relationship). In a page having a cell sharing relationship, a page to be written first is called a first page, and a page to be written next is called a second page. In other words, writing to the page number m (writing to the first page) and writing to the page number (K + m) (writing to the second page) charge the same cell. Referring to FIG. 1, control is performed so that the potential rises only up to half when writing to the first page, and so that the potential increases from half to maximum when writing to the next second page. Control.

FIG. 3 shows the state transition of the flash memory cell. As shown in FIG. 3, the state of one memory cell in the physical block of the flash memory changes as follows.
(A) After erasing data, the state of the memory cell is (1, 1)
(B) After writing to the first page, the cell state is (1, 1) or (1, 0).
(C) After writing to the second page, the state of the cell is (1,1), (1,0), (0,0) or (0,1)
As described above, in the multi-value flash memory, a plurality of states are provided in the threshold voltage Vth to perform multi-value recording for controlling the amount of electrons stored in the flash memory, thereby realizing a large capacity.

  However, in the multilevel flash memory, in order to identify the four states based on the amount of accumulated electrons, the threshold voltage (Vth) difference between the states is smaller than that of the binary flash memory. If data rewrite is repeated each time the number of rewrites is repeated, slight damage occurs to the gate oxide film due to injection and extraction of electrons. When this damage is accumulated, a large number of electron traps are formed, and the number of electrons accumulated in the actual floating gate is reduced. In proportion to the miniaturization of the semiconductor process, the number of electrons stored in the floating gate is reduced, so that the influence of the electron trap is increased. As described above, the problem that the data retention characteristic of the flash memory deteriorates with the multi-level recording and the miniaturization of the semiconductor process that support the increase in the capacity of the flash memory has become prominent.

As a technique for solving the above-described problems, the number of flash memory rewrites is limited or error correction is enhanced. In Patent Document 1, an ECC code having a high error correction capability is recorded in units of pages constituting a physical block of a flash memory, and error correction is performed at the time of reading. If the number of errors is equal to or greater than the reference value, the data on the page is re-recorded on the page of the erased block, thereby preventing the data on the page from becoming uncorrectable in the near future. .
JP 2006-221334 A

  In the semiconductor recording device, as the number of rewrites increases, a large number of electron traps due to damage to the gate oxide film are formed, so that the number of electrons accumulated in the actual floating gate is reduced and data retention characteristics are deteriorated. Since the flash memory is erased in units of physical blocks, the variation in data retention characteristics of the flash memory is likely to occur in units of physical blocks. Furthermore, if the variation in the number of rewrites of each physical block occurs due to the control method of the flash memory, the variation in the data retention characteristics is accelerated.

In general, in flash memory control, by using a conversion table (hereinafter referred to as a logical-physical conversion table) for converting a logical block address and a physical block address, even if there is a variation in writing to the logical block, the physical block is rewritten. The number of times is averaged. An example of the logical-physical conversion table is shown in FIG. As shown in FIG. 4, if one logical block is in use, the corresponding physical block number is registered. If the logical block is unused, a nonexistent physical block number (eg, Z) is registered. sign up. In the semiconductor recording device, the number of rewrites is averaged by the following method.
(S1) The logical-physical conversion table is read when the power is turned on, and a block entry table indicating the use status (used or unused) of all physical blocks is created.
(S2) When a write command is issued from the host, unused physical blocks are extracted from the block entry table at random or in ascending order from the search initial value of the physical block number.
(S3) Erase the extracted physical block and write the data transferred from the host.
(S4) The logical / physical conversion table and the block entry table are updated.

  However, in the above method, for example, when there are two files, file 1 and file 2, and file 2 is updated repeatedly without updating file 1, each file 1 and 2 are updated. It occurs to the extent that variations in the number of block rewrites cannot be ignored. That is, the number of rewrites of the physical block allocated to the file 1 is constant while the file 2 is repeatedly updated, but the number of rewrites of the other physical blocks is increased. Thereafter, when the files 1 and 2 are updated, the number of rewrites of the entire physical block increases. Therefore, the number of rewrites of the physical block at this time is significantly different between the physical block assigned to the original file 1 and the other physical blocks.

  As described above, when the number of rewrites of the physical block varies, the data retention characteristics vary greatly depending on the physical block. Therefore, in the conventional method, there is a possibility that the data retention characteristic due to the variation in the number of rewrites is deteriorated and the error correction level cannot be achieved. In this case, there is a problem in that it is impossible to re-record the error-corrected page data on the erased block page.

  An object of the present invention is to solve the above-mentioned problems, and to provide a semiconductor recording device that can absorb the variation and improve the data retention performance even when the variation in the data retention characteristic occurs in units of physical blocks. To do.

  It is another object of the present invention to provide a semiconductor recording apparatus capable of reducing the variation in the number of times of rewriting physical blocks and improving the data retention characteristics even when the number of times of rewriting of each physical block occurs.

  In order to solve this problem, a semiconductor recording device of the present invention includes a nonvolatile memory that includes a plurality of physical blocks, and each physical block includes a plurality of pages. First ECC generating means for generating A first ECC code (A is a natural number) by adding an ECC parity to data input at the time of data writing in a semiconductor recording device as a group And B (B is a natural number) for data distribution means for distributing the first ECC code generated by the first ECC generation means, and A words distributed from the data distribution means to the respective physical blocks. ) Second ECC generation means for generating a second ECC code of (A + B) words by adding word parity; and output from the second ECC generation means Data writing means for writing data of (A + B) words to each physical block of one group, data reading means for reading a first ECC code from a physical block of one group of the nonvolatile memory, and the data reading When there is an error in the data of each page read by the means, the second ECC correction means for correcting the error by the second ECC code, and when the error cannot be corrected by the second ECC code, An erasure correction unit that performs erasure correction using the first ECC code, and a page that has an error exceeding the threshold number of pages based on the number of pages that have been erasure-corrected by the erasure correction unit when reading data in the warning block table And the first ECC correction code including the warning block is retained. Warning block management means for registering other physical blocks as a pair block, warning blocks registered in the warning block management means at a predetermined timing, and data of the pair blocks are read out, and erasure correction is performed by the erasure correction means. And a sequencer that controls to write the data of the repaired warning block to the erased physical block.

  Here, the non-volatile memory is one in which N + M physical blocks (N and M are natural numbers) are grouped, and the ECC generation means is input at the time of data writing (A * N) For word data, M words of ECC parity may be added to N words extracted at intervals of A words to generate A (N + M) word ECC codes.

  Here, the data distribution unit repeatedly distributes (N + M) words of the ECC code generated by the ECC generation unit to different physical blocks within the group of physical blocks of the nonvolatile memory for each word, A word may be distributed to one group of physical blocks.

  Here, at the time of data writing and reading, a logical-physical conversion table indicating correspondence between a logical block indicated by a logical address given from the outside and a physical block of the nonvolatile memory, and a block entry table indicating availability of each physical block And a table management means for extracting a new physical block at the time of data writing.

  Here, the predetermined timing of the sequencer may be after writing of data based on a write command.

  Here, in the process of extracting a new writable physical block, the table management means may extract the warning block registered in the warning table with a lower priority.

  Here, the warning block management means may increase the threshold value of the number of error-corrected pages as the total number of rewrites of the nonvolatile memory increases.

  Here, when the table management means extracts a physical block of one group that can be used, the table management means may extract so that the number of the warning blocks in the group is M or less.

  Here, the (M + N) physical blocks belonging to the one group may be different nonvolatile memories.

  With the above configuration, the physical block managed as a warning block is determined as a physical block with deteriorated data retention characteristics from the result of error correction using the first ECC code at the time of data reading, and is written to the block. Since the data thus written is rewritten to another physical block, even if a variation in data retention characteristics occurs in units of physical blocks, the variation can be absorbed and the data retention performance can be improved.

  Further, when selecting a writable physical block at the time of data writing, if the priority order of the warning block is reduced, the bias of the total number of rewrites can be suppressed.

  Also, when setting a reference value for the number of pages with errors as a result of error correction using the first ECC code, the reference value should be increased in response to an increase in the total number of rewrites of the physical block of the flash memory. For example, a physical block with degraded data retention characteristics can be detected as a warning block with higher accuracy.

  In addition, when selecting a writable physical block at the time of data writing, if the number of warning blocks is limited to M or less, the number of warning blocks can be set below the number of error corrections of the first ECC code. The performance by the first ECC correction can be sufficiently exhibited.

  As described above, even when the data retention characteristic and the number of rewrites vary in physical block units, it is possible to provide a semiconductor recording device that can absorb the characteristic variation and improve the data retention performance.

  FIG. 5 shows a configuration diagram of a semiconductor recording apparatus according to an embodiment of the present invention. In the present embodiment, the external interface means 1 is an interface that receives commands and data from a host device (not shown) and transfers data.

  When receiving a write command from the host device, the first ECC generation means 2 adds an ECC parity for error correction to the received write data. More specifically, ECC parity of M words (M is a natural number) is added to N words extracted at intervals of A words for the input (A * N) word data (A and N are natural numbers). Thus, A first ECC codes of (N + M) words are generated. The ECC parity is a code having an error correction function. In the present embodiment, description is made assuming that N is 4, M is 2, and A is 512.

  The data distribution unit 3 distributes the ECC code to which the ECC parity is added by the ECC generation unit 2 to different physical blocks of the flash memory in units of words. More specifically, (N + M) words of the ECC code generated by the ECC generation means 2, in this case, 6 words are distributed to different physical blocks for each word, thereby repeating (N + M) physical blocks with A. Distribute word by word.

  The second ECC generators 4a to 4f add an ECC parity of B words (B is a natural number) to data of A words per physical block distributed by the data distributor 3. In the present embodiment, A is 512 and B is 3. In this case, 1-word data can be corrected, and an error position of 2-word data can be detected.

  The data writing means 5a to 5f are for recording the data of (A + B) words generated by the second ECC generating means 4a to 4f in each physical block of the nonvolatile memory. Here, since (M + N) is 6, data writing means 5a to 5f are mounted in parallel, and data is written to one physical block of each of the six flash memories 6a to 6f.

  The semiconductor recording device of the present embodiment has (M + N), here, six flash memories 6a to 6f. The flash memories 6a to 6f are quaternary flash memories, each of which includes a large number of physical blocks. The physical block is an erasing unit and has 2K pages (K is a natural number). The inside of the flash memory is managed with page numbers from 0 to 2K-1 as shown in FIG. Among these, the K page with page numbers 0 to K-1 is constituted by the first page of the memory cell, and the K page with page numbers K to 2K-1 is constituted by the second page of the memory cell. Each page has a storage capacity of A words and has a redundant area of B words or more. Here, one word is, for example, 1 byte, that is, 8 bits. Four logical blocks constituting the ECC code generated by the ECC generation means 2 are referred to as a logical segment, and (M + N) physical blocks corresponding to each logical segment are referred to as a group.

  The table management means 7a to 7f manage the logical / physical conversion table and the block entry table, and six are installed corresponding to the number of flash memories. The logical-physical conversion table associates the logical block designated via the external interface means 1 with the address of the physical block of the flash memory corresponding to the logical block. The block entry table is generated after power is turned on, and is a table indicating whether each physical block is used or not used. The table management means 7a to 7f operate independently, and manage these tables and extract a new physical block corresponding to a logical block at the time of data writing with reference to a warning block management means described later.

  The data reading means 8a to 8f are for reading data from the physical blocks of the flash memories 6a to 6f corresponding to the designated logical block when a read command is given from the host device to the semiconductor recording device. The data reading means 8a to 8f are also activated by a sequencer 12 described later.

  If there is an error in the page data read based on the second ECC parity generated by the second ECC generation means 4a to 4f, the second ECC correction means 9a to 9f performs ECC correction. The corrected data and an error flag indicating whether correction is possible are output.

  The erasure correction unit 10 uses the corrected data output from the second ECC correction units 9a to 9f and the error flag indicating whether correction is possible, and the data that cannot be corrected by the second ECC correction units 9a to 9f. Is corrected using the first ECC parity.

  The warning block management means 11 discriminates physical blocks having the number of corrected pages equal to or greater than a predetermined number from the physical blocks corrected by the erasure correction means 10 and registers them as warning blocks in the warning block table. . In the warning block table, a physical block that constitutes the first ECC code together with the warning block is registered as a pair block of the warning block.

  The sequencer 12 rewrites the flash memory by repairing the error in the warning block data at a predetermined timing. More specifically, the sequencer 12 reads the data of the warning block and the paired blocks of the warning block through the data reading means 8a to 8f, performs error correction by the second ECC correction means 9a to 9f, and erases correction means. 10 to perform erasure correction. Further, the sequencer 12 writes the repaired warning block data to the new physical block via the data distribution means 3, the second ECC generation means 4a to 4f, and the data writing means 5a to 5f.

  Next, the operation of the semiconductor recording device of the present embodiment will be described. First, the table management means 7a to 7f read the logical-physical conversion table when the power is turned on, and create a block entry table indicating the use state (used or unused) of all physical blocks. In the present embodiment, the table management means 7a to 7f create six block entry tables in order to control six flash memories. An example of the block entry table is shown in FIG. In FIG. 6, the upper row shows the physical block number, and the lower row shows the use state, where 1 is used and 0 is a usable block.

  Next, data writing will be described. When writing data, the host device transfers a logical address and write data together with a write command to the semiconductor recording device. Here, write data is displayed in units of words, and data from word 0 to word 8KA is transferred as write data. When a write command is received via the external interface unit 1, the first ECC generation unit 2 separates write data for each A word in units of words and adds an ECC parity. The data distribution unit 3 distributes data for each A word for recording in each flash memory and inputs the data to the second ECC generation units 4a to 4f. In the second ECC means 4a to 4f, B word, here 3 word parity, is added to the input A word, here 512 word data.

  FIG. 7 is a diagram showing the relationship between parallel physical blocks, data, and parity when striping recording is performed in the six flash memories 6a to 6f. In the figure, the physical block PB0 is the physical block of the flash memory 6a, the physical block PB1 is the physical block of the flash memory 6b, and the physical blocks PB2, PB3, PB4, and PB5 are the flash memories 6c, 6d, 6e, and 6f, respectively. Physical block. N indicates a page number. The word number in the flash memory page, the flash memory number, the physical block number of each flash memory, and the page number in the physical block are uniquely determined for the write address specified by the external host device. Each page of the physical blocks PB0 to PB3 in FIG. 7 shows the leading word number to be written on the page. The ECC parity generated by the first ECC generation means 2 is written in each page of the physical blocks of the flash memories 6e and 6f.

  FIG. 8 shows an ECC parity generation method in the first ECC generation means 2. FIG. 8A shows the word assignment of page 0 of each physical block PB0, PB1, PB2, PB3 and PB4, PB5. FIG. 8B is a relation diagram between the first word of page 0 and ECC parity of each block PB0 to PB3, and FIG. 8C is a diagram of the second word of page 0 and ECC parity of each block B0 to PB3. FIG. 8D is a relation diagram between the last word of page 0 of each block B0 to PB3 and the ECC parity. As described above, each of the plurality of data is an element, and the plurality of elements are extracted from different physical blocks, here, PB0 to PB3 to generate ECC parity, and the ECC parity for 2 bytes is generated for each byte. It is recorded in a physical block, here PB4 and PB5.

Here, the first ECC code will be described. In the first ECC generation means 2, one word, that is, one byte is divided into upper 4 bits and lower 4 bits, and each 4 bits constitute one symbol. Then, in a GF (16) Galois field with X ⁴ + X + 1 as a generator polynomial, a Reed-Solomon code of (6, 4) is formed to generate a 2-symbol parity. That is, when the input symbol is (a3, a2, a1, a0) and the parity symbol is (p1, p0), the information polynomial of the input symbol is expressed by the following equation.
A (X) = a3 * X ³ + a2 * X ² + a1 * X ¹ + a0 (1)
The code generation polynomial is expressed by the following equation.
G (X) = (X−α ⁰ ) (X−α) (2)
In this code generator polynomial,
The remainder R (X) of A (X) * X ² ÷ G (X) is obtained, and the first order term of R (X) is p1 and the 0th order term of R (X) is p0. In FIG. 8, P1_0, P1_1,... P1_ (A-1) as primary terms are written in the physical block PB4, and P0_0, P0_1,... P0_ (A-1) as zeroth terms are written into the physical block PB5. Indicates that it will be written.

  In this way, even if an error occurs in writing to a maximum of two of these physical blocks and two elements out of a3, a2, a1, a0, p1, and p0 become errors, other elements of the ECC code By performing the erasure correction based on the data, the data can be restored.

  The data distribution unit 3 distributes data to be recorded in each flash memory as shown in FIG. 7 and inputs the data to the second ECC generation units 4a to 4f, respectively.

In the second ECC means 4a to 4f, B word, here 3 word parity, is added to the input A word, here 512 word data. In this case, 1-word data can be corrected, and 2-word data errors can be detected. As the error correction code, a Reed-Solomon code or the like is used as in the first ECC generation means. In this case, in GF (1024), the code generation polynomial is as follows:
G1 (X) = (X−α ⁰ ) (X−α ¹ ) (X−α ² ) (3)
Then, assuming the information polynomial A (X) of the 511th order input symbol, the remainder R (X) of A (X) * X ³ ÷ G (X) is obtained, and the second and first order terms of R (X) and 0 The next term is generated as 3-word parity.

When data is written, the table management means 7a to 7f select a physical block corresponding to the logical block. Hereinafter, the process of extracting new physical blocks by the table management means 7a to 7f will be described in detail with reference to the flowchart of FIG.
(S11) When a write command is issued from the host device, one unused block is extracted for each flash memory from the block entry table created when the power is turned on using the algorithms (S11a) to (S11f).
(S11a) A search pointer SP for a physical block number is randomly generated for each flash memory. Using the block entry table, unused physical blocks are extracted in ascending order from the physical block number of the search pointer SP.
(S11b) If the extracted physical block is not a warning block, the extracted block is set as a new physical block of the flash memory. Steps (S11a) and (S11b) are repeated until all the flash memories have been processed.
(S11c) If the six physical blocks extracted from each flash memory include a warning block, the search pointer SP of the flash memory from which the warning block is extracted is advanced one by one, and an unused physical block If it is not a warning block, it is set as a new physical block.
(S11d) If it is a warning block even if the search pointer is advanced by the number of loops C (C is a predetermined natural number), the process is temporarily stopped.
(S11e) At this stage, if there are two or more warning blocks in the six physical blocks extracted from each flash memory, the search pointer SP of the flash memory from which the warning block is further extracted is set one by one. Proceed.
(S11f) Further, when the search pointer is advanced by the number of loops C (C is a predetermined natural number), if it is a warning block, the search for the physical block is finished with the warning block as a new physical block. Here, it is assumed that PB0 to PB5 are selected.
(S12) The data of the six new physical blocks extracted in this way are erased. Next, the data writing means 5a to 5f record the (A + B) word data generated by the second ECC generation means 4a to 4f in the physical blocks PB0 to PB5 of the nonvolatile memory as shown in FIG. Here, A word (512 words) is recorded in the normal recording area of each page, and B word (3 words) is recorded in the redundant area.
(S13) The logical-physical conversion table and block entry table are updated.

  In this way, by adding the processing of (S11b) to (S11d) to the conventional operation, the physical block can be extracted with the adoption priority of the warning block lowered. Further, when data is written with the 1 or 2 warning block as a new physical block by the processing of (S11e) to (S11f), even if the data read from the warning block cannot be corrected with the second ECC code. The erasure correction can be performed in the first ECC code.

  Next, the reading process of this embodiment will be described. At the time of reading, the host device gives a read command to the semiconductor recording device. The semiconductor recording device receives this via the external interface means 1. The data reading means 8a to 8f read data from the physical blocks of the flash memories 6a to 6f corresponding to the designated logical block. The read data is output to the second ECC correction means 9a to 9f. If there is an error based on the ECC parity in units of pages generated by the second ECC generation units 4a to 4f, the second ECC correction units 9a to 9f perform correction as follows.

In the 514th order received code polynomial U (X) expressed by 515 words composed of data and parity, the syndrome formulas (4) to (6) and the double error condition (7) are calculated.
s0 = U (α ⁰ ) (4)
s1 = U (α) (5)
s2 = U (α ² ) (6)
M2 = s1 ² + s0 * s2 (7)
Note that s0 is a remainder obtained by dividing the received code polynomial U (X) by the root α ⁰ of the code generator polynomial, s1 is a remainder obtained by dividing the received code polynomial U (X) by the root α of the code generator polynomial, and s2 Is the remainder of dividing the received code polynomial U (X) by the root α ² of the code generator polynomial.
Here, if no error has occurred, M2 = s0 = 0.
If one error has occurred, M2 = 0 and s0 ≠ 0.
When there is one error, assuming that the error position is y2 and the error size, that is, the correct data is z2, the following equation is established.
s0 = z2 = U (α ⁰ ) (8)
s1 = α ^y2 * z2 = U (α) (9)
From this, the error position y2 and the correction data z2 can be obtained.

  If there are two errors, M2 ≠ 0, and the second ECC correction means 9a to 9f cannot correct it. Therefore, the second ECC correction units 9 a to 9 f output the corrected data and an error flag indicating whether correction is possible or not to the erasure correction unit 10.

The erasure correction means 10 uses the first ECC code for the data that could not be corrected by the second ECC correction means 9a to 9f, using the data corrected in this way and an error flag indicating whether correction is possible. correct. The six symbols received here are b3, b2, b1, b0, q1, and q0. In this symbol, b3 is PB0, b2 is PB1, b1 is PB2, b0 is PB3, q1 is PB4, and q0 is data read from each physical block of PB5. Among these, the symbol with the error flag set includes an error. In this case, the following equation is a received code polynomial.
U (X) = b3 * X ⁵ + b2 * X ⁴ + b1 * X ³ + b0 * X ² + q1 * X + q0 (10)
In U (X), U (1) and U (α) are calculated by setting two symbols whose error positions are known to 0. Here, when the error symbol position is y0, y1 (integer satisfying 0 ≦ y0, y1 ≦ 5) and the error magnitude is z0, z1, the following equations (11), (12) are established.
z0 + z1 = U (α ⁰ ), (11)
α ^y0 * z0 + α ^y1 * z1 = U (α) (12)
Since the error positions y0 and y1 are known in the equations (11) and (12), the error magnitudes z0 and z1 are calculated by solving the binary simultaneous equations, and the symbols associated with the error positions y0 and y1 are respectively represented by z0. , Z1 can be error-corrected. Thus, even if error correction of a maximum of 2 pages is impossible in the 6 second ECC corrections, the remaining 4 pages of data and 2 error positions are calculated, and the data of the page at the error position is lost. It can be corrected. Of the corrected data, the page data corresponding to the logical address is output to the outside via the external interface means 1.

  The warning block management means 11 registers the physical block that has been ECC-corrected by the erasure correction means 10 and the number of corrected pages is a predetermined number or more as a warning block in the warning block table. Also, the numbers of other physical blocks constituting one group together with the warning block are registered as pair blocks.

  FIG. 10 is a diagram showing an example of the warning block table. For example, when there are a predetermined number or more of correction pages in the physical block PB2, PB2 is registered as a warning block, and PB0, PB1, PB3, PB4, and PB5, which are physical blocks that constitute the first ECC code together with PB2. Is registered as a pair block.

  Next, correction processing of data held in the flash memory will be described. The sequencer 12 monitors the interval between control commands issued from the host device. If no command is issued for a predetermined time or more, it is determined whether or not there is a write command thereafter. If there is a write command and the data writing process is terminated in response to this write command, then the warning block registered in the warning block table and the number of its pair block are read. Then, the data of the six physical blocks constituting the warning block and the first ECC code are read through the data reading means 8a to 8f, and error correction is performed by the second ECC correcting means 9a to 9f. Then, erasure correction is performed by the erasure correction means 10 to restore the data of the warning block. Further, the sequencer 12 writes the warning block data restored via the data writing means 5a to 5f to the new physical block.

The data restoration and writing process is performed in the following steps.
(S21) The warning block and the number of the warning block and its pair block are read.
(S22) One or two new physical blocks are secured according to the number of warning blocks of one group by the algorithm of (S11a) to (S11f) described above.
(S23) All the pages of the pair block read in S21 are read by the data reading means 8a to 8f.
(S24) The read ECC data is ECC corrected by the second ECC correction means 9a to 9f. Further, the data of these blocks is used, and the data of the warning block is erasure corrected by the erasure correction means 10.
(S25) The data of the warning block subjected to the erasure correction is written into the new physical block secured in S22 via the data distribution unit 3, the second ECC generation units 4a to 4f, and the data writing units 5a to 5f. Data distribution in this case is to distribute data to one or two necessary blocks, and only one or two of the second ECC generation means 4a to 4f and data writing means 5a to 5f are used. In this way, the new physical block becomes a physical block in use holding valid data, and the warning block is no longer a valid block. The table management means 7a to 7f update the block entry table in this way.
(S26) The warning block management means 11 deletes the pair block information from the warning table. Because the warning block error has been repaired, the pair block information is no longer needed. However, the information as the warning block is retained as it is. This is because a physical block that has once become a warning block is likely to cause an error again, and is necessary for lowering the priority when a new block is extracted.

  As described above, according to the present embodiment, N + M physical blocks are grouped into one group, and at the time of data writing, each of the first ECC codes having N word data and M word parity as elements. A word is distributed to each physical block of a group, A first ECC codes are generated, and the second of (A + B) words by A word data and B word parity each having one word as a component The ECC code is written on each page of the physical block. In reading data, when the first ECC code is read in page units, (N + M) pages are read, error correction is performed with the second ECC code in each page, and error correction cannot be performed with the second ECC code. Then, after erasure correction is performed on the axis of the first ECC code, it is output. At this time, the physical block corrected by the first ECC code by the warning block management means and the physical block constituting the first ECC code are stored in the warning block table as a pair block of the warning block and the warning block. sign up.

  Then, after the write command is issued from the host and the writing of the write command is finished, the position of the warning block and its pair block is read, and the warning block data is erasure corrected using the first ECC code. Write to erased new physical block.

  Further, a physical block registered as a warning block is determined as a physical block with degraded data retention characteristics, and is selected as little as possible when extracting a new physical block. Even if a warning block is selected, the number is preferably limited to M or less. In this way, even if an error occurs when data is recorded in the warning block, the number of error corrections of the first ECC code can be reduced to less than that, so that the performance by the first ECC correction can be sufficiently exerted. it can. For this reason, even when a variation in data retention characteristics occurs in units of physical blocks, the characteristic variation can be absorbed and data retention performance can be improved.

  Since such processing is performed after data writing from the host device inside the semiconductor recording device, the user using this semiconductor device needs to be aware of the deterioration of the data retention characteristics and the warning block rewriting processing. There is no.

  According to the present embodiment, in the process of extracting a new physical block from the logical-physical conversion table, the warning block that is likely to have a large number of rewrites is extracted with a lower priority. Bias can be suppressed.

  In the above description, for the sake of simplicity, the first ECC parity is set to 2 parity, but more parity may be added or 1 parity may be added. That is, the number M of parity can be any natural number greater than or equal to one. In the above description, for the sake of simplicity, the second ECC parity is set to 3 parity, but more parity may be added.

  Further, in the present embodiment, each element of the first ECC code is stored in each flash memory using six flash memories, but is recorded in different physical blocks in one flash memory. It may be.

  In the present embodiment, a semiconductor recording device using a 4-level flash memory in which the number of bits stored in one memory cell is 2 bits has been described. However, the present invention further increases the state and stores 3 bits or more in one cell. It can be applied to a multi-level flash memory that can be used. Furthermore, the same effect can be obtained by adapting not only to the multi-level flash memory but also to the binary flash memory and other nonvolatile memories.

Also, the total number of rewrite times, for example separately managed in total erase count of the physical block, the threshold value N _E error number of pages of the physical block per determines that a warning block, may be proportional to the total number of the number of rewrites. For example, in a flash memory in which the number of rewrites is 1000, in the case of (total number of rewrites / number of physical blocks <500), a physical block having 10 or more errors per block is determined as a warning block, in the event of a (total / physical block number ≧ 500 number of times of rewriting) may change the threshold value N _E as the number of errors per block becomes a warning block 20 or more physical blocks. It may be more finely changing the threshold value N _E of the warning blocks according total number of rewrites. In this way, the total number of warning blocks does not change significantly, and new physical blocks can be appropriately extracted.

  In this embodiment, the sequencer repairs the data containing the error written in the warning block after the write command. Instead, the host device issues a data retention characteristic improvement command, and the warning is issued accordingly. Block errors may be repaired and written to another physical block.

  The semiconductor recording device of the present invention relates to a semiconductor recording device such as a memory card, and in particular, can suppress variation in data retention characteristics in units of physical blocks in a nonvolatile memory. Therefore, it can be suitably used in a semiconductor recording device using a multi-level flash memory with poor data retention characteristics and in a professional video recording field in which rewriting is frequently performed.

Schematic diagram showing the accumulation state of electrons in the multi-level flash memory Diagram showing cell sharing of physical block of multi-level flash memory Multistate flash memory cell state transition diagram Diagram showing an example of a logical-physical conversion table Configuration diagram of a semiconductor recording device in an embodiment of the present invention An example of a block entry table in the present embodiment Explanatory drawing of arrangement | positioning of the data of a physical block and parity in this Embodiment Explanatory drawing of parity creation in this embodiment New physical block search flow in this embodiment The figure which shows an example of the warning block table in this Embodiment.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 External interface means 2 1st ECC production | generation means 3 Data distribution means 4a-4f 2nd ECC production | generation means 5a-5f Data writing means 6a-6f Flash memory 7a-6f Table management means 8a-8f Data read-out means 9a-9f Second ECC correction means 10 Erasure correction means 11 Warning block management means 12 Sequencer

Claims (9)

In a semiconductor recording device that includes a non-volatile memory that includes a plurality of physical blocks and each physical block includes a plurality of pages, and includes a predetermined number of the physical blocks as one group.
First ECC generating means for generating A first ECC codes (A is a natural number) by adding an ECC parity to data input at the time of data writing;
Data distribution means for distributing the first ECC code generated by the first ECC generation means;
Second ECC generation for generating a second ECC code of (A + B) words by adding a parity of B (B is a natural number) words to the A words distributed from the data distribution means to each physical block Means,
Data writing means for writing (A + B) word data output from the second ECC generation means to each physical block of one group;
Data reading means for reading a first ECC code from a physical block of one group of the nonvolatile memory;
Second ECC correction means for correcting an error with a second ECC code when there is an error in the data of each page read by the data reading means;
When error correction cannot be performed with the second ECC code, erasure correction means for performing erasure correction with the first ECC code;
Based on the number of pages that have been erasure corrected by the erasure correction means at the time of data reading, a page having an error equal to or greater than the threshold number of pages is registered in the warning block table as a warning block, and the first ECC correction including the warning block Warning block management means for registering other physical blocks holding codes as pair blocks,
The warning block registered in the warning block management unit and its pair block data are read at a predetermined timing, the erasure correction unit performs erasure correction, and the repaired warning block data is written to the erased physical block. And a sequencer for controlling the semiconductor recording apparatus. The non-volatile memory is a group of N + M physical blocks (N and M are natural numbers),
The ECC generation means adds M word ECC parity to N words extracted at intervals of A words for (A * N) word data input at the time of data writing, and (N + M) 2. The semiconductor recording apparatus according to claim 1, wherein A word ECC codes are generated.   The data distribution means repeats the distribution of the (N + M) words of the ECC code generated by the ECC generation means to different physical blocks within the group of physical blocks of the nonvolatile memory for each word. 3. The semiconductor recording apparatus according to claim 2, wherein A word is distributed to the physical blocks of the group by A word.   Registration of a logical-physical conversion table indicating the correspondence between a logical block indicated by a logical address given from the outside and a physical block of the nonvolatile memory, and a block entry table indicating the availability of each physical block at the time of data writing and reading 4. The semiconductor recording apparatus according to claim 1, further comprising table management means for updating and extracting a new physical block at the time of data writing.   The semiconductor recording device according to claim 1, wherein the predetermined timing of the sequencer is after writing of data based on a write command.   5. The semiconductor recording apparatus according to claim 4, wherein the table management means extracts the warning block registered in the warning table by lowering the priority in the process of extracting a new writable physical block.   The semiconductor recording according to claim 1, wherein the warning block management unit increases a threshold value of the number of error-corrected pages as the total number of rewrites of the nonvolatile memory increases. apparatus.   7. The semiconductor recording device according to claim 4, wherein when the table management means extracts a physical block of one group that can be used, the table management means extracts the number of the warning blocks in the group so that it is not more than M. . 9. The semiconductor recording device according to claim 2, wherein (M + N) physical blocks belonging to the one group are different nonvolatile memories.

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